1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeOrdering.h"
16 #include "SDNodeDbgValue.h"
17 #include "llvm/CallingConv.h"
18 #include "llvm/Constants.h"
19 #include "llvm/DebugInfo.h"
20 #include "llvm/DerivedTypes.h"
21 #include "llvm/Function.h"
22 #include "llvm/GlobalAlias.h"
23 #include "llvm/GlobalVariable.h"
24 #include "llvm/Intrinsics.h"
25 #include "llvm/Analysis/ValueTracking.h"
26 #include "llvm/Assembly/Writer.h"
27 #include "llvm/CodeGen/MachineBasicBlock.h"
28 #include "llvm/CodeGen/MachineConstantPool.h"
29 #include "llvm/CodeGen/MachineFrameInfo.h"
30 #include "llvm/CodeGen/MachineModuleInfo.h"
31 #include "llvm/Target/TargetRegisterInfo.h"
32 #include "llvm/DataLayout.h"
33 #include "llvm/Target/TargetLowering.h"
34 #include "llvm/Target/TargetSelectionDAGInfo.h"
35 #include "llvm/Target/TargetOptions.h"
36 #include "llvm/Target/TargetInstrInfo.h"
37 #include "llvm/Target/TargetIntrinsicInfo.h"
38 #include "llvm/Target/TargetMachine.h"
39 #include "llvm/Support/CommandLine.h"
40 #include "llvm/Support/Debug.h"
41 #include "llvm/Support/ErrorHandling.h"
42 #include "llvm/Support/ManagedStatic.h"
43 #include "llvm/Support/MathExtras.h"
44 #include "llvm/Support/raw_ostream.h"
45 #include "llvm/Support/Mutex.h"
46 #include "llvm/ADT/SetVector.h"
47 #include "llvm/ADT/SmallPtrSet.h"
48 #include "llvm/ADT/SmallSet.h"
49 #include "llvm/ADT/SmallVector.h"
50 #include "llvm/ADT/StringExtras.h"
55 /// makeVTList - Return an instance of the SDVTList struct initialized with the
56 /// specified members.
57 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
58 SDVTList Res = {VTs, NumVTs};
62 static const fltSemantics *EVTToAPFloatSemantics(EVT VT) {
63 switch (VT.getSimpleVT().SimpleTy) {
64 default: llvm_unreachable("Unknown FP format");
65 case MVT::f16: return &APFloat::IEEEhalf;
66 case MVT::f32: return &APFloat::IEEEsingle;
67 case MVT::f64: return &APFloat::IEEEdouble;
68 case MVT::f80: return &APFloat::x87DoubleExtended;
69 case MVT::f128: return &APFloat::IEEEquad;
70 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
74 // Default null implementations of the callbacks.
75 void SelectionDAG::DAGUpdateListener::NodeDeleted(SDNode*, SDNode*) {}
76 void SelectionDAG::DAGUpdateListener::NodeUpdated(SDNode*) {}
78 //===----------------------------------------------------------------------===//
79 // ConstantFPSDNode Class
80 //===----------------------------------------------------------------------===//
82 /// isExactlyValue - We don't rely on operator== working on double values, as
83 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
84 /// As such, this method can be used to do an exact bit-for-bit comparison of
85 /// two floating point values.
86 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
87 return getValueAPF().bitwiseIsEqual(V);
90 bool ConstantFPSDNode::isValueValidForType(EVT VT,
92 assert(VT.isFloatingPoint() && "Can only convert between FP types");
94 // convert modifies in place, so make a copy.
95 APFloat Val2 = APFloat(Val);
97 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
102 //===----------------------------------------------------------------------===//
104 //===----------------------------------------------------------------------===//
106 /// isBuildVectorAllOnes - Return true if the specified node is a
107 /// BUILD_VECTOR where all of the elements are ~0 or undef.
108 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
109 // Look through a bit convert.
110 if (N->getOpcode() == ISD::BITCAST)
111 N = N->getOperand(0).getNode();
113 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
115 unsigned i = 0, e = N->getNumOperands();
117 // Skip over all of the undef values.
118 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
121 // Do not accept an all-undef vector.
122 if (i == e) return false;
124 // Do not accept build_vectors that aren't all constants or which have non-~0
125 // elements. We have to be a bit careful here, as the type of the constant
126 // may not be the same as the type of the vector elements due to type
127 // legalization (the elements are promoted to a legal type for the target and
128 // a vector of a type may be legal when the base element type is not).
129 // We only want to check enough bits to cover the vector elements, because
130 // we care if the resultant vector is all ones, not whether the individual
132 SDValue NotZero = N->getOperand(i);
133 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits();
134 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(NotZero)) {
135 if (CN->getAPIntValue().countTrailingOnes() < EltSize)
137 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(NotZero)) {
138 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingOnes() < EltSize)
143 // Okay, we have at least one ~0 value, check to see if the rest match or are
144 // undefs. Even with the above element type twiddling, this should be OK, as
145 // the same type legalization should have applied to all the elements.
146 for (++i; i != e; ++i)
147 if (N->getOperand(i) != NotZero &&
148 N->getOperand(i).getOpcode() != ISD::UNDEF)
154 /// isBuildVectorAllZeros - Return true if the specified node is a
155 /// BUILD_VECTOR where all of the elements are 0 or undef.
156 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
157 // Look through a bit convert.
158 if (N->getOpcode() == ISD::BITCAST)
159 N = N->getOperand(0).getNode();
161 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
163 unsigned i = 0, e = N->getNumOperands();
165 // Skip over all of the undef values.
166 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
169 // Do not accept an all-undef vector.
170 if (i == e) return false;
172 // Do not accept build_vectors that aren't all constants or which have non-0
174 SDValue Zero = N->getOperand(i);
175 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Zero)) {
176 if (!CN->isNullValue())
178 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(Zero)) {
179 if (!CFPN->getValueAPF().isPosZero())
184 // Okay, we have at least one 0 value, check to see if the rest match or are
186 for (++i; i != e; ++i)
187 if (N->getOperand(i) != Zero &&
188 N->getOperand(i).getOpcode() != ISD::UNDEF)
193 /// isScalarToVector - Return true if the specified node is a
194 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
195 /// element is not an undef.
196 bool ISD::isScalarToVector(const SDNode *N) {
197 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
200 if (N->getOpcode() != ISD::BUILD_VECTOR)
202 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
204 unsigned NumElems = N->getNumOperands();
207 for (unsigned i = 1; i < NumElems; ++i) {
208 SDValue V = N->getOperand(i);
209 if (V.getOpcode() != ISD::UNDEF)
215 /// allOperandsUndef - Return true if the node has at least one operand
216 /// and all operands of the specified node are ISD::UNDEF.
217 bool ISD::allOperandsUndef(const SDNode *N) {
218 // Return false if the node has no operands.
219 // This is "logically inconsistent" with the definition of "all" but
220 // is probably the desired behavior.
221 if (N->getNumOperands() == 0)
224 for (unsigned i = 0, e = N->getNumOperands(); i != e ; ++i)
225 if (N->getOperand(i).getOpcode() != ISD::UNDEF)
231 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
232 /// when given the operation for (X op Y).
233 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
234 // To perform this operation, we just need to swap the L and G bits of the
236 unsigned OldL = (Operation >> 2) & 1;
237 unsigned OldG = (Operation >> 1) & 1;
238 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
239 (OldL << 1) | // New G bit
240 (OldG << 2)); // New L bit.
243 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
244 /// 'op' is a valid SetCC operation.
245 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
246 unsigned Operation = Op;
248 Operation ^= 7; // Flip L, G, E bits, but not U.
250 Operation ^= 15; // Flip all of the condition bits.
252 if (Operation > ISD::SETTRUE2)
253 Operation &= ~8; // Don't let N and U bits get set.
255 return ISD::CondCode(Operation);
259 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
260 /// signed operation and 2 if the result is an unsigned comparison. Return zero
261 /// if the operation does not depend on the sign of the input (setne and seteq).
262 static int isSignedOp(ISD::CondCode Opcode) {
264 default: llvm_unreachable("Illegal integer setcc operation!");
266 case ISD::SETNE: return 0;
270 case ISD::SETGE: return 1;
274 case ISD::SETUGE: return 2;
278 /// getSetCCOrOperation - Return the result of a logical OR between different
279 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
280 /// returns SETCC_INVALID if it is not possible to represent the resultant
282 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
284 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
285 // Cannot fold a signed integer setcc with an unsigned integer setcc.
286 return ISD::SETCC_INVALID;
288 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
290 // If the N and U bits get set then the resultant comparison DOES suddenly
291 // care about orderedness, and is true when ordered.
292 if (Op > ISD::SETTRUE2)
293 Op &= ~16; // Clear the U bit if the N bit is set.
295 // Canonicalize illegal integer setcc's.
296 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
299 return ISD::CondCode(Op);
302 /// getSetCCAndOperation - Return the result of a logical AND between different
303 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
304 /// function returns zero if it is not possible to represent the resultant
306 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
308 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
309 // Cannot fold a signed setcc with an unsigned setcc.
310 return ISD::SETCC_INVALID;
312 // Combine all of the condition bits.
313 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
315 // Canonicalize illegal integer setcc's.
319 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
320 case ISD::SETOEQ: // SETEQ & SETU[LG]E
321 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
322 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
323 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
330 //===----------------------------------------------------------------------===//
331 // SDNode Profile Support
332 //===----------------------------------------------------------------------===//
334 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
336 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
340 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
341 /// solely with their pointer.
342 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
343 ID.AddPointer(VTList.VTs);
346 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
348 static void AddNodeIDOperands(FoldingSetNodeID &ID,
349 const SDValue *Ops, unsigned NumOps) {
350 for (; NumOps; --NumOps, ++Ops) {
351 ID.AddPointer(Ops->getNode());
352 ID.AddInteger(Ops->getResNo());
356 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
358 static void AddNodeIDOperands(FoldingSetNodeID &ID,
359 const SDUse *Ops, unsigned NumOps) {
360 for (; NumOps; --NumOps, ++Ops) {
361 ID.AddPointer(Ops->getNode());
362 ID.AddInteger(Ops->getResNo());
366 static void AddNodeIDNode(FoldingSetNodeID &ID,
367 unsigned short OpC, SDVTList VTList,
368 const SDValue *OpList, unsigned N) {
369 AddNodeIDOpcode(ID, OpC);
370 AddNodeIDValueTypes(ID, VTList);
371 AddNodeIDOperands(ID, OpList, N);
374 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
376 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
377 switch (N->getOpcode()) {
378 case ISD::TargetExternalSymbol:
379 case ISD::ExternalSymbol:
380 llvm_unreachable("Should only be used on nodes with operands");
381 default: break; // Normal nodes don't need extra info.
382 case ISD::TargetConstant:
384 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
386 case ISD::TargetConstantFP:
387 case ISD::ConstantFP: {
388 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
391 case ISD::TargetGlobalAddress:
392 case ISD::GlobalAddress:
393 case ISD::TargetGlobalTLSAddress:
394 case ISD::GlobalTLSAddress: {
395 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
396 ID.AddPointer(GA->getGlobal());
397 ID.AddInteger(GA->getOffset());
398 ID.AddInteger(GA->getTargetFlags());
399 ID.AddInteger(GA->getAddressSpace());
402 case ISD::BasicBlock:
403 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
406 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
408 case ISD::RegisterMask:
409 ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask());
412 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
414 case ISD::FrameIndex:
415 case ISD::TargetFrameIndex:
416 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
419 case ISD::TargetJumpTable:
420 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
421 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
423 case ISD::ConstantPool:
424 case ISD::TargetConstantPool: {
425 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
426 ID.AddInteger(CP->getAlignment());
427 ID.AddInteger(CP->getOffset());
428 if (CP->isMachineConstantPoolEntry())
429 CP->getMachineCPVal()->addSelectionDAGCSEId(ID);
431 ID.AddPointer(CP->getConstVal());
432 ID.AddInteger(CP->getTargetFlags());
435 case ISD::TargetIndex: {
436 const TargetIndexSDNode *TI = cast<TargetIndexSDNode>(N);
437 ID.AddInteger(TI->getIndex());
438 ID.AddInteger(TI->getOffset());
439 ID.AddInteger(TI->getTargetFlags());
443 const LoadSDNode *LD = cast<LoadSDNode>(N);
444 ID.AddInteger(LD->getMemoryVT().getRawBits());
445 ID.AddInteger(LD->getRawSubclassData());
446 ID.AddInteger(LD->getPointerInfo().getAddrSpace());
450 const StoreSDNode *ST = cast<StoreSDNode>(N);
451 ID.AddInteger(ST->getMemoryVT().getRawBits());
452 ID.AddInteger(ST->getRawSubclassData());
453 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
456 case ISD::ATOMIC_CMP_SWAP:
457 case ISD::ATOMIC_SWAP:
458 case ISD::ATOMIC_LOAD_ADD:
459 case ISD::ATOMIC_LOAD_SUB:
460 case ISD::ATOMIC_LOAD_AND:
461 case ISD::ATOMIC_LOAD_OR:
462 case ISD::ATOMIC_LOAD_XOR:
463 case ISD::ATOMIC_LOAD_NAND:
464 case ISD::ATOMIC_LOAD_MIN:
465 case ISD::ATOMIC_LOAD_MAX:
466 case ISD::ATOMIC_LOAD_UMIN:
467 case ISD::ATOMIC_LOAD_UMAX:
468 case ISD::ATOMIC_LOAD:
469 case ISD::ATOMIC_STORE: {
470 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
471 ID.AddInteger(AT->getMemoryVT().getRawBits());
472 ID.AddInteger(AT->getRawSubclassData());
473 ID.AddInteger(AT->getPointerInfo().getAddrSpace());
476 case ISD::PREFETCH: {
477 const MemSDNode *PF = cast<MemSDNode>(N);
478 ID.AddInteger(PF->getPointerInfo().getAddrSpace());
481 case ISD::VECTOR_SHUFFLE: {
482 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
483 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
485 ID.AddInteger(SVN->getMaskElt(i));
488 case ISD::TargetBlockAddress:
489 case ISD::BlockAddress: {
490 const BlockAddressSDNode *BA = cast<BlockAddressSDNode>(N);
491 ID.AddPointer(BA->getBlockAddress());
492 ID.AddInteger(BA->getOffset());
493 ID.AddInteger(BA->getTargetFlags());
496 } // end switch (N->getOpcode())
498 // Target specific memory nodes could also have address spaces to check.
499 if (N->isTargetMemoryOpcode())
500 ID.AddInteger(cast<MemSDNode>(N)->getPointerInfo().getAddrSpace());
503 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
505 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
506 AddNodeIDOpcode(ID, N->getOpcode());
507 // Add the return value info.
508 AddNodeIDValueTypes(ID, N->getVTList());
509 // Add the operand info.
510 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
512 // Handle SDNode leafs with special info.
513 AddNodeIDCustom(ID, N);
516 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
517 /// the CSE map that carries volatility, temporalness, indexing mode, and
518 /// extension/truncation information.
520 static inline unsigned
521 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
522 bool isNonTemporal, bool isInvariant) {
523 assert((ConvType & 3) == ConvType &&
524 "ConvType may not require more than 2 bits!");
525 assert((AM & 7) == AM &&
526 "AM may not require more than 3 bits!");
530 (isNonTemporal << 6) |
534 //===----------------------------------------------------------------------===//
535 // SelectionDAG Class
536 //===----------------------------------------------------------------------===//
538 /// doNotCSE - Return true if CSE should not be performed for this node.
539 static bool doNotCSE(SDNode *N) {
540 if (N->getValueType(0) == MVT::Glue)
541 return true; // Never CSE anything that produces a flag.
543 switch (N->getOpcode()) {
545 case ISD::HANDLENODE:
547 return true; // Never CSE these nodes.
550 // Check that remaining values produced are not flags.
551 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
552 if (N->getValueType(i) == MVT::Glue)
553 return true; // Never CSE anything that produces a flag.
558 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
560 void SelectionDAG::RemoveDeadNodes() {
561 // Create a dummy node (which is not added to allnodes), that adds a reference
562 // to the root node, preventing it from being deleted.
563 HandleSDNode Dummy(getRoot());
565 SmallVector<SDNode*, 128> DeadNodes;
567 // Add all obviously-dead nodes to the DeadNodes worklist.
568 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
570 DeadNodes.push_back(I);
572 RemoveDeadNodes(DeadNodes);
574 // If the root changed (e.g. it was a dead load, update the root).
575 setRoot(Dummy.getValue());
578 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
579 /// given list, and any nodes that become unreachable as a result.
580 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes) {
582 // Process the worklist, deleting the nodes and adding their uses to the
584 while (!DeadNodes.empty()) {
585 SDNode *N = DeadNodes.pop_back_val();
587 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
588 DUL->NodeDeleted(N, 0);
590 // Take the node out of the appropriate CSE map.
591 RemoveNodeFromCSEMaps(N);
593 // Next, brutally remove the operand list. This is safe to do, as there are
594 // no cycles in the graph.
595 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
597 SDNode *Operand = Use.getNode();
600 // Now that we removed this operand, see if there are no uses of it left.
601 if (Operand->use_empty())
602 DeadNodes.push_back(Operand);
609 void SelectionDAG::RemoveDeadNode(SDNode *N){
610 SmallVector<SDNode*, 16> DeadNodes(1, N);
612 // Create a dummy node that adds a reference to the root node, preventing
613 // it from being deleted. (This matters if the root is an operand of the
615 HandleSDNode Dummy(getRoot());
617 RemoveDeadNodes(DeadNodes);
620 void SelectionDAG::DeleteNode(SDNode *N) {
621 // First take this out of the appropriate CSE map.
622 RemoveNodeFromCSEMaps(N);
624 // Finally, remove uses due to operands of this node, remove from the
625 // AllNodes list, and delete the node.
626 DeleteNodeNotInCSEMaps(N);
629 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
630 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
631 assert(N->use_empty() && "Cannot delete a node that is not dead!");
633 // Drop all of the operands and decrement used node's use counts.
639 void SelectionDAG::DeallocateNode(SDNode *N) {
640 if (N->OperandsNeedDelete)
641 delete[] N->OperandList;
643 // Set the opcode to DELETED_NODE to help catch bugs when node
644 // memory is reallocated.
645 N->NodeType = ISD::DELETED_NODE;
647 NodeAllocator.Deallocate(AllNodes.remove(N));
649 // Remove the ordering of this node.
652 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them.
653 ArrayRef<SDDbgValue*> DbgVals = DbgInfo->getSDDbgValues(N);
654 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i)
655 DbgVals[i]->setIsInvalidated();
658 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
659 /// correspond to it. This is useful when we're about to delete or repurpose
660 /// the node. We don't want future request for structurally identical nodes
661 /// to return N anymore.
662 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
664 switch (N->getOpcode()) {
665 case ISD::HANDLENODE: return false; // noop.
667 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
668 "Cond code doesn't exist!");
669 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
670 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
672 case ISD::ExternalSymbol:
673 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
675 case ISD::TargetExternalSymbol: {
676 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
677 Erased = TargetExternalSymbols.erase(
678 std::pair<std::string,unsigned char>(ESN->getSymbol(),
679 ESN->getTargetFlags()));
682 case ISD::VALUETYPE: {
683 EVT VT = cast<VTSDNode>(N)->getVT();
684 if (VT.isExtended()) {
685 Erased = ExtendedValueTypeNodes.erase(VT);
687 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0;
688 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0;
693 // Remove it from the CSE Map.
694 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!");
695 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!");
696 Erased = CSEMap.RemoveNode(N);
700 // Verify that the node was actually in one of the CSE maps, unless it has a
701 // flag result (which cannot be CSE'd) or is one of the special cases that are
702 // not subject to CSE.
703 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue &&
704 !N->isMachineOpcode() && !doNotCSE(N)) {
707 llvm_unreachable("Node is not in map!");
713 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
714 /// maps and modified in place. Add it back to the CSE maps, unless an identical
715 /// node already exists, in which case transfer all its users to the existing
716 /// node. This transfer can potentially trigger recursive merging.
719 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N) {
720 // For node types that aren't CSE'd, just act as if no identical node
723 SDNode *Existing = CSEMap.GetOrInsertNode(N);
725 // If there was already an existing matching node, use ReplaceAllUsesWith
726 // to replace the dead one with the existing one. This can cause
727 // recursive merging of other unrelated nodes down the line.
728 ReplaceAllUsesWith(N, Existing);
730 // N is now dead. Inform the listeners and delete it.
731 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
732 DUL->NodeDeleted(N, Existing);
733 DeleteNodeNotInCSEMaps(N);
738 // If the node doesn't already exist, we updated it. Inform listeners.
739 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
743 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
744 /// were replaced with those specified. If this node is never memoized,
745 /// return null, otherwise return a pointer to the slot it would take. If a
746 /// node already exists with these operands, the slot will be non-null.
747 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
752 SDValue Ops[] = { Op };
754 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
755 AddNodeIDCustom(ID, N);
756 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
760 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
761 /// were replaced with those specified. If this node is never memoized,
762 /// return null, otherwise return a pointer to the slot it would take. If a
763 /// node already exists with these operands, the slot will be non-null.
764 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
765 SDValue Op1, SDValue Op2,
770 SDValue Ops[] = { Op1, Op2 };
772 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
773 AddNodeIDCustom(ID, N);
774 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
779 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
780 /// were replaced with those specified. If this node is never memoized,
781 /// return null, otherwise return a pointer to the slot it would take. If a
782 /// node already exists with these operands, the slot will be non-null.
783 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
784 const SDValue *Ops,unsigned NumOps,
790 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
791 AddNodeIDCustom(ID, N);
792 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
797 /// VerifyNodeCommon - Sanity check the given node. Aborts if it is invalid.
798 static void VerifyNodeCommon(SDNode *N) {
799 switch (N->getOpcode()) {
802 case ISD::BUILD_PAIR: {
803 EVT VT = N->getValueType(0);
804 assert(N->getNumValues() == 1 && "Too many results!");
805 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
806 "Wrong return type!");
807 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
808 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
809 "Mismatched operand types!");
810 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
811 "Wrong operand type!");
812 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
813 "Wrong return type size");
816 case ISD::BUILD_VECTOR: {
817 assert(N->getNumValues() == 1 && "Too many results!");
818 assert(N->getValueType(0).isVector() && "Wrong return type!");
819 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
820 "Wrong number of operands!");
821 EVT EltVT = N->getValueType(0).getVectorElementType();
822 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
823 assert((I->getValueType() == EltVT ||
824 (EltVT.isInteger() && I->getValueType().isInteger() &&
825 EltVT.bitsLE(I->getValueType()))) &&
826 "Wrong operand type!");
827 assert(I->getValueType() == N->getOperand(0).getValueType() &&
828 "Operands must all have the same type");
835 /// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid.
836 static void VerifySDNode(SDNode *N) {
837 // The SDNode allocators cannot be used to allocate nodes with fields that are
838 // not present in an SDNode!
839 assert(!isa<MemSDNode>(N) && "Bad MemSDNode!");
840 assert(!isa<ShuffleVectorSDNode>(N) && "Bad ShuffleVectorSDNode!");
841 assert(!isa<ConstantSDNode>(N) && "Bad ConstantSDNode!");
842 assert(!isa<ConstantFPSDNode>(N) && "Bad ConstantFPSDNode!");
843 assert(!isa<GlobalAddressSDNode>(N) && "Bad GlobalAddressSDNode!");
844 assert(!isa<FrameIndexSDNode>(N) && "Bad FrameIndexSDNode!");
845 assert(!isa<JumpTableSDNode>(N) && "Bad JumpTableSDNode!");
846 assert(!isa<ConstantPoolSDNode>(N) && "Bad ConstantPoolSDNode!");
847 assert(!isa<BasicBlockSDNode>(N) && "Bad BasicBlockSDNode!");
848 assert(!isa<SrcValueSDNode>(N) && "Bad SrcValueSDNode!");
849 assert(!isa<MDNodeSDNode>(N) && "Bad MDNodeSDNode!");
850 assert(!isa<RegisterSDNode>(N) && "Bad RegisterSDNode!");
851 assert(!isa<BlockAddressSDNode>(N) && "Bad BlockAddressSDNode!");
852 assert(!isa<EHLabelSDNode>(N) && "Bad EHLabelSDNode!");
853 assert(!isa<ExternalSymbolSDNode>(N) && "Bad ExternalSymbolSDNode!");
854 assert(!isa<CondCodeSDNode>(N) && "Bad CondCodeSDNode!");
855 assert(!isa<CvtRndSatSDNode>(N) && "Bad CvtRndSatSDNode!");
856 assert(!isa<VTSDNode>(N) && "Bad VTSDNode!");
857 assert(!isa<MachineSDNode>(N) && "Bad MachineSDNode!");
862 /// VerifyMachineNode - Sanity check the given MachineNode. Aborts if it is
864 static void VerifyMachineNode(SDNode *N) {
865 // The MachineNode allocators cannot be used to allocate nodes with fields
866 // that are not present in a MachineNode!
867 // Currently there are no such nodes.
873 /// getEVTAlignment - Compute the default alignment value for the
876 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
877 Type *Ty = VT == MVT::iPTR ?
878 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
879 VT.getTypeForEVT(*getContext());
881 return TLI.getDataLayout()->getABITypeAlignment(Ty);
884 // EntryNode could meaningfully have debug info if we can find it...
885 SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL)
886 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()),
887 OptLevel(OL), EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)),
888 Root(getEntryNode()), Ordering(0), UpdateListeners(0) {
889 AllNodes.push_back(&EntryNode);
890 Ordering = new SDNodeOrdering();
891 DbgInfo = new SDDbgInfo();
894 void SelectionDAG::init(MachineFunction &mf) {
896 Context = &mf.getFunction()->getContext();
899 SelectionDAG::~SelectionDAG() {
900 assert(!UpdateListeners && "Dangling registered DAGUpdateListeners");
906 void SelectionDAG::allnodes_clear() {
907 assert(&*AllNodes.begin() == &EntryNode);
908 AllNodes.remove(AllNodes.begin());
909 while (!AllNodes.empty())
910 DeallocateNode(AllNodes.begin());
913 void SelectionDAG::clear() {
915 OperandAllocator.Reset();
918 ExtendedValueTypeNodes.clear();
919 ExternalSymbols.clear();
920 TargetExternalSymbols.clear();
921 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
922 static_cast<CondCodeSDNode*>(0));
923 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
924 static_cast<SDNode*>(0));
926 EntryNode.UseList = 0;
927 AllNodes.push_back(&EntryNode);
928 Root = getEntryNode();
933 SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
934 return VT.bitsGT(Op.getValueType()) ?
935 getNode(ISD::ANY_EXTEND, DL, VT, Op) :
936 getNode(ISD::TRUNCATE, DL, VT, Op);
939 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
940 return VT.bitsGT(Op.getValueType()) ?
941 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
942 getNode(ISD::TRUNCATE, DL, VT, Op);
945 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
946 return VT.bitsGT(Op.getValueType()) ?
947 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
948 getNode(ISD::TRUNCATE, DL, VT, Op);
951 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) {
952 assert(!VT.isVector() &&
953 "getZeroExtendInReg should use the vector element type instead of "
955 if (Op.getValueType() == VT) return Op;
956 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
957 APInt Imm = APInt::getLowBitsSet(BitWidth,
959 return getNode(ISD::AND, DL, Op.getValueType(), Op,
960 getConstant(Imm, Op.getValueType()));
963 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
965 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) {
966 EVT EltVT = VT.getScalarType();
968 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
969 return getNode(ISD::XOR, DL, VT, Val, NegOne);
972 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) {
973 EVT EltVT = VT.getScalarType();
974 assert((EltVT.getSizeInBits() >= 64 ||
975 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
976 "getConstant with a uint64_t value that doesn't fit in the type!");
977 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
980 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) {
981 return getConstant(*ConstantInt::get(*Context, Val), VT, isT);
984 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) {
985 assert(VT.isInteger() && "Cannot create FP integer constant!");
987 EVT EltVT = VT.getScalarType();
988 const ConstantInt *Elt = &Val;
990 // In some cases the vector type is legal but the element type is illegal and
991 // needs to be promoted, for example v8i8 on ARM. In this case, promote the
992 // inserted value (the type does not need to match the vector element type).
993 // Any extra bits introduced will be truncated away.
994 if (VT.isVector() && TLI.getTypeAction(*getContext(), EltVT) ==
995 TargetLowering::TypePromoteInteger) {
996 EltVT = TLI.getTypeToTransformTo(*getContext(), EltVT);
997 APInt NewVal = Elt->getValue().zext(EltVT.getSizeInBits());
998 Elt = ConstantInt::get(*getContext(), NewVal);
1001 assert(Elt->getBitWidth() == EltVT.getSizeInBits() &&
1002 "APInt size does not match type size!");
1003 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
1004 FoldingSetNodeID ID;
1005 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
1009 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
1011 return SDValue(N, 0);
1014 N = new (NodeAllocator) ConstantSDNode(isT, Elt, EltVT);
1015 CSEMap.InsertNode(N, IP);
1016 AllNodes.push_back(N);
1019 SDValue Result(N, 0);
1020 if (VT.isVector()) {
1021 SmallVector<SDValue, 8> Ops;
1022 Ops.assign(VT.getVectorNumElements(), Result);
1023 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
1028 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
1029 return getConstant(Val, TLI.getPointerTy(), isTarget);
1033 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
1034 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
1037 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
1038 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
1040 EVT EltVT = VT.getScalarType();
1042 // Do the map lookup using the actual bit pattern for the floating point
1043 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
1044 // we don't have issues with SNANs.
1045 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
1046 FoldingSetNodeID ID;
1047 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
1051 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
1053 return SDValue(N, 0);
1056 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT);
1057 CSEMap.InsertNode(N, IP);
1058 AllNodes.push_back(N);
1061 SDValue Result(N, 0);
1062 if (VT.isVector()) {
1063 SmallVector<SDValue, 8> Ops;
1064 Ops.assign(VT.getVectorNumElements(), Result);
1065 // FIXME DebugLoc info might be appropriate here
1066 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
1071 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
1072 EVT EltVT = VT.getScalarType();
1073 if (EltVT==MVT::f32)
1074 return getConstantFP(APFloat((float)Val), VT, isTarget);
1075 else if (EltVT==MVT::f64)
1076 return getConstantFP(APFloat(Val), VT, isTarget);
1077 else if (EltVT==MVT::f80 || EltVT==MVT::f128 || EltVT==MVT::f16) {
1079 APFloat apf = APFloat(Val);
1080 apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven,
1082 return getConstantFP(apf, VT, isTarget);
1084 llvm_unreachable("Unsupported type in getConstantFP");
1087 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, DebugLoc DL,
1088 EVT VT, int64_t Offset,
1090 unsigned char TargetFlags) {
1091 assert((TargetFlags == 0 || isTargetGA) &&
1092 "Cannot set target flags on target-independent globals");
1094 // Truncate (with sign-extension) the offset value to the pointer size.
1095 unsigned BitWidth = TLI.getPointerTy().getSizeInBits();
1097 Offset = SignExtend64(Offset, BitWidth);
1099 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
1101 // If GV is an alias then use the aliasee for determining thread-localness.
1102 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
1103 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
1107 if (GVar && GVar->isThreadLocal())
1108 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
1110 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
1112 FoldingSetNodeID ID;
1113 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1115 ID.AddInteger(Offset);
1116 ID.AddInteger(TargetFlags);
1117 ID.AddInteger(GV->getType()->getAddressSpace());
1119 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1120 return SDValue(E, 0);
1122 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL, GV, VT,
1123 Offset, TargetFlags);
1124 CSEMap.InsertNode(N, IP);
1125 AllNodes.push_back(N);
1126 return SDValue(N, 0);
1129 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1130 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1131 FoldingSetNodeID ID;
1132 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1135 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1136 return SDValue(E, 0);
1138 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget);
1139 CSEMap.InsertNode(N, IP);
1140 AllNodes.push_back(N);
1141 return SDValue(N, 0);
1144 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1145 unsigned char TargetFlags) {
1146 assert((TargetFlags == 0 || isTarget) &&
1147 "Cannot set target flags on target-independent jump tables");
1148 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1149 FoldingSetNodeID ID;
1150 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1152 ID.AddInteger(TargetFlags);
1154 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1155 return SDValue(E, 0);
1157 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget,
1159 CSEMap.InsertNode(N, IP);
1160 AllNodes.push_back(N);
1161 return SDValue(N, 0);
1164 SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
1165 unsigned Alignment, int Offset,
1167 unsigned char TargetFlags) {
1168 assert((TargetFlags == 0 || isTarget) &&
1169 "Cannot set target flags on target-independent globals");
1171 Alignment = TLI.getDataLayout()->getPrefTypeAlignment(C->getType());
1172 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1173 FoldingSetNodeID ID;
1174 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1175 ID.AddInteger(Alignment);
1176 ID.AddInteger(Offset);
1178 ID.AddInteger(TargetFlags);
1180 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1181 return SDValue(E, 0);
1183 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1184 Alignment, TargetFlags);
1185 CSEMap.InsertNode(N, IP);
1186 AllNodes.push_back(N);
1187 return SDValue(N, 0);
1191 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1192 unsigned Alignment, int Offset,
1194 unsigned char TargetFlags) {
1195 assert((TargetFlags == 0 || isTarget) &&
1196 "Cannot set target flags on target-independent globals");
1198 Alignment = TLI.getDataLayout()->getPrefTypeAlignment(C->getType());
1199 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1200 FoldingSetNodeID ID;
1201 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1202 ID.AddInteger(Alignment);
1203 ID.AddInteger(Offset);
1204 C->addSelectionDAGCSEId(ID);
1205 ID.AddInteger(TargetFlags);
1207 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1208 return SDValue(E, 0);
1210 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1211 Alignment, TargetFlags);
1212 CSEMap.InsertNode(N, IP);
1213 AllNodes.push_back(N);
1214 return SDValue(N, 0);
1217 SDValue SelectionDAG::getTargetIndex(int Index, EVT VT, int64_t Offset,
1218 unsigned char TargetFlags) {
1219 FoldingSetNodeID ID;
1220 AddNodeIDNode(ID, ISD::TargetIndex, getVTList(VT), 0, 0);
1221 ID.AddInteger(Index);
1222 ID.AddInteger(Offset);
1223 ID.AddInteger(TargetFlags);
1225 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1226 return SDValue(E, 0);
1228 SDNode *N = new (NodeAllocator) TargetIndexSDNode(Index, VT, Offset,
1230 CSEMap.InsertNode(N, IP);
1231 AllNodes.push_back(N);
1232 return SDValue(N, 0);
1235 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1236 FoldingSetNodeID ID;
1237 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1240 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1241 return SDValue(E, 0);
1243 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB);
1244 CSEMap.InsertNode(N, IP);
1245 AllNodes.push_back(N);
1246 return SDValue(N, 0);
1249 SDValue SelectionDAG::getValueType(EVT VT) {
1250 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1251 ValueTypeNodes.size())
1252 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1254 SDNode *&N = VT.isExtended() ?
1255 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1257 if (N) return SDValue(N, 0);
1258 N = new (NodeAllocator) VTSDNode(VT);
1259 AllNodes.push_back(N);
1260 return SDValue(N, 0);
1263 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1264 SDNode *&N = ExternalSymbols[Sym];
1265 if (N) return SDValue(N, 0);
1266 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT);
1267 AllNodes.push_back(N);
1268 return SDValue(N, 0);
1271 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1272 unsigned char TargetFlags) {
1274 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1276 if (N) return SDValue(N, 0);
1277 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1278 AllNodes.push_back(N);
1279 return SDValue(N, 0);
1282 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1283 if ((unsigned)Cond >= CondCodeNodes.size())
1284 CondCodeNodes.resize(Cond+1);
1286 if (CondCodeNodes[Cond] == 0) {
1287 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond);
1288 CondCodeNodes[Cond] = N;
1289 AllNodes.push_back(N);
1292 return SDValue(CondCodeNodes[Cond], 0);
1295 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1296 // the shuffle mask M that point at N1 to point at N2, and indices that point
1297 // N2 to point at N1.
1298 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1300 int NElts = M.size();
1301 for (int i = 0; i != NElts; ++i) {
1309 SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1,
1310 SDValue N2, const int *Mask) {
1311 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE");
1312 assert(VT.isVector() && N1.getValueType().isVector() &&
1313 "Vector Shuffle VTs must be a vectors");
1314 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType()
1315 && "Vector Shuffle VTs must have same element type");
1317 // Canonicalize shuffle undef, undef -> undef
1318 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1319 return getUNDEF(VT);
1321 // Validate that all indices in Mask are within the range of the elements
1322 // input to the shuffle.
1323 unsigned NElts = VT.getVectorNumElements();
1324 SmallVector<int, 8> MaskVec;
1325 for (unsigned i = 0; i != NElts; ++i) {
1326 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1327 MaskVec.push_back(Mask[i]);
1330 // Canonicalize shuffle v, v -> v, undef
1333 for (unsigned i = 0; i != NElts; ++i)
1334 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1337 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1338 if (N1.getOpcode() == ISD::UNDEF)
1339 commuteShuffle(N1, N2, MaskVec);
1341 // Canonicalize all index into lhs, -> shuffle lhs, undef
1342 // Canonicalize all index into rhs, -> shuffle rhs, undef
1343 bool AllLHS = true, AllRHS = true;
1344 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1345 for (unsigned i = 0; i != NElts; ++i) {
1346 if (MaskVec[i] >= (int)NElts) {
1351 } else if (MaskVec[i] >= 0) {
1355 if (AllLHS && AllRHS)
1356 return getUNDEF(VT);
1357 if (AllLHS && !N2Undef)
1361 commuteShuffle(N1, N2, MaskVec);
1364 // If Identity shuffle, or all shuffle in to undef, return that node.
1365 bool AllUndef = true;
1366 bool Identity = true;
1367 for (unsigned i = 0; i != NElts; ++i) {
1368 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1369 if (MaskVec[i] >= 0) AllUndef = false;
1371 if (Identity && NElts == N1.getValueType().getVectorNumElements())
1374 return getUNDEF(VT);
1376 FoldingSetNodeID ID;
1377 SDValue Ops[2] = { N1, N2 };
1378 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2);
1379 for (unsigned i = 0; i != NElts; ++i)
1380 ID.AddInteger(MaskVec[i]);
1383 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1384 return SDValue(E, 0);
1386 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1387 // SDNode doesn't have access to it. This memory will be "leaked" when
1388 // the node is deallocated, but recovered when the NodeAllocator is released.
1389 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1390 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1392 ShuffleVectorSDNode *N =
1393 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc);
1394 CSEMap.InsertNode(N, IP);
1395 AllNodes.push_back(N);
1396 return SDValue(N, 0);
1399 SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl,
1400 SDValue Val, SDValue DTy,
1401 SDValue STy, SDValue Rnd, SDValue Sat,
1402 ISD::CvtCode Code) {
1403 // If the src and dest types are the same and the conversion is between
1404 // integer types of the same sign or two floats, no conversion is necessary.
1406 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1409 FoldingSetNodeID ID;
1410 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1411 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5);
1413 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1414 return SDValue(E, 0);
1416 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5,
1418 CSEMap.InsertNode(N, IP);
1419 AllNodes.push_back(N);
1420 return SDValue(N, 0);
1423 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1424 FoldingSetNodeID ID;
1425 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1426 ID.AddInteger(RegNo);
1428 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1429 return SDValue(E, 0);
1431 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT);
1432 CSEMap.InsertNode(N, IP);
1433 AllNodes.push_back(N);
1434 return SDValue(N, 0);
1437 SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) {
1438 FoldingSetNodeID ID;
1439 AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), 0, 0);
1440 ID.AddPointer(RegMask);
1442 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1443 return SDValue(E, 0);
1445 SDNode *N = new (NodeAllocator) RegisterMaskSDNode(RegMask);
1446 CSEMap.InsertNode(N, IP);
1447 AllNodes.push_back(N);
1448 return SDValue(N, 0);
1451 SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) {
1452 FoldingSetNodeID ID;
1453 SDValue Ops[] = { Root };
1454 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1);
1455 ID.AddPointer(Label);
1457 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1458 return SDValue(E, 0);
1460 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label);
1461 CSEMap.InsertNode(N, IP);
1462 AllNodes.push_back(N);
1463 return SDValue(N, 0);
1467 SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
1470 unsigned char TargetFlags) {
1471 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1473 FoldingSetNodeID ID;
1474 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1476 ID.AddInteger(Offset);
1477 ID.AddInteger(TargetFlags);
1479 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1480 return SDValue(E, 0);
1482 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, Offset,
1484 CSEMap.InsertNode(N, IP);
1485 AllNodes.push_back(N);
1486 return SDValue(N, 0);
1489 SDValue SelectionDAG::getSrcValue(const Value *V) {
1490 assert((!V || V->getType()->isPointerTy()) &&
1491 "SrcValue is not a pointer?");
1493 FoldingSetNodeID ID;
1494 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1498 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1499 return SDValue(E, 0);
1501 SDNode *N = new (NodeAllocator) SrcValueSDNode(V);
1502 CSEMap.InsertNode(N, IP);
1503 AllNodes.push_back(N);
1504 return SDValue(N, 0);
1507 /// getMDNode - Return an MDNodeSDNode which holds an MDNode.
1508 SDValue SelectionDAG::getMDNode(const MDNode *MD) {
1509 FoldingSetNodeID ID;
1510 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0);
1514 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1515 return SDValue(E, 0);
1517 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD);
1518 CSEMap.InsertNode(N, IP);
1519 AllNodes.push_back(N);
1520 return SDValue(N, 0);
1524 /// getShiftAmountOperand - Return the specified value casted to
1525 /// the target's desired shift amount type.
1526 SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) {
1527 EVT OpTy = Op.getValueType();
1528 MVT ShTy = TLI.getShiftAmountTy(LHSTy);
1529 if (OpTy == ShTy || OpTy.isVector()) return Op;
1531 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1532 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op);
1535 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1536 /// specified value type.
1537 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1538 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1539 unsigned ByteSize = VT.getStoreSize();
1540 Type *Ty = VT.getTypeForEVT(*getContext());
1541 unsigned StackAlign =
1542 std::max((unsigned)TLI.getDataLayout()->getPrefTypeAlignment(Ty), minAlign);
1544 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1545 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1548 /// CreateStackTemporary - Create a stack temporary suitable for holding
1549 /// either of the specified value types.
1550 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1551 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1552 VT2.getStoreSizeInBits())/8;
1553 Type *Ty1 = VT1.getTypeForEVT(*getContext());
1554 Type *Ty2 = VT2.getTypeForEVT(*getContext());
1555 const DataLayout *TD = TLI.getDataLayout();
1556 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1557 TD->getPrefTypeAlignment(Ty2));
1559 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1560 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1561 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1564 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1565 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1566 // These setcc operations always fold.
1570 case ISD::SETFALSE2: return getConstant(0, VT);
1572 case ISD::SETTRUE2: return getConstant(1, VT);
1584 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1588 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1589 const APInt &C2 = N2C->getAPIntValue();
1590 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1591 const APInt &C1 = N1C->getAPIntValue();
1594 default: llvm_unreachable("Unknown integer setcc!");
1595 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1596 case ISD::SETNE: return getConstant(C1 != C2, VT);
1597 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1598 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1599 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1600 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1601 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1602 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1603 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1604 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1608 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1609 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1610 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1613 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1614 return getUNDEF(VT);
1616 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1617 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1618 return getUNDEF(VT);
1620 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1621 R==APFloat::cmpLessThan, VT);
1622 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1623 return getUNDEF(VT);
1625 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1626 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1627 return getUNDEF(VT);
1629 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1630 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1631 return getUNDEF(VT);
1633 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1634 R==APFloat::cmpEqual, VT);
1635 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1636 return getUNDEF(VT);
1638 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1639 R==APFloat::cmpEqual, VT);
1640 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1641 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1642 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1643 R==APFloat::cmpEqual, VT);
1644 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1645 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1646 R==APFloat::cmpLessThan, VT);
1647 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1648 R==APFloat::cmpUnordered, VT);
1649 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1650 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1653 // Ensure that the constant occurs on the RHS.
1654 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1658 // Could not fold it.
1662 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1663 /// use this predicate to simplify operations downstream.
1664 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1665 // This predicate is not safe for vector operations.
1666 if (Op.getValueType().isVector())
1669 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1670 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1673 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1674 /// this predicate to simplify operations downstream. Mask is known to be zero
1675 /// for bits that V cannot have.
1676 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1677 unsigned Depth) const {
1678 APInt KnownZero, KnownOne;
1679 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth);
1680 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1681 return (KnownZero & Mask) == Mask;
1684 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1685 /// known to be either zero or one and return them in the KnownZero/KnownOne
1686 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1688 void SelectionDAG::ComputeMaskedBits(SDValue Op, APInt &KnownZero,
1689 APInt &KnownOne, unsigned Depth) const {
1690 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1692 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1694 return; // Limit search depth.
1696 APInt KnownZero2, KnownOne2;
1698 switch (Op.getOpcode()) {
1700 // We know all of the bits for a constant!
1701 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue();
1702 KnownZero = ~KnownOne;
1705 // If either the LHS or the RHS are Zero, the result is zero.
1706 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1707 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1708 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1709 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1711 // Output known-1 bits are only known if set in both the LHS & RHS.
1712 KnownOne &= KnownOne2;
1713 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1714 KnownZero |= KnownZero2;
1717 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1718 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1719 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1720 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1722 // Output known-0 bits are only known if clear in both the LHS & RHS.
1723 KnownZero &= KnownZero2;
1724 // Output known-1 are known to be set if set in either the LHS | RHS.
1725 KnownOne |= KnownOne2;
1728 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1729 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1730 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1731 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1733 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1734 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1735 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1736 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1737 KnownZero = KnownZeroOut;
1741 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1742 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1743 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1744 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1746 // If low bits are zero in either operand, output low known-0 bits.
1747 // Also compute a conserative estimate for high known-0 bits.
1748 // More trickiness is possible, but this is sufficient for the
1749 // interesting case of alignment computation.
1750 KnownOne.clearAllBits();
1751 unsigned TrailZ = KnownZero.countTrailingOnes() +
1752 KnownZero2.countTrailingOnes();
1753 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1754 KnownZero2.countLeadingOnes(),
1755 BitWidth) - BitWidth;
1757 TrailZ = std::min(TrailZ, BitWidth);
1758 LeadZ = std::min(LeadZ, BitWidth);
1759 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1760 APInt::getHighBitsSet(BitWidth, LeadZ);
1764 // For the purposes of computing leading zeros we can conservatively
1765 // treat a udiv as a logical right shift by the power of 2 known to
1766 // be less than the denominator.
1767 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1768 unsigned LeadZ = KnownZero2.countLeadingOnes();
1770 KnownOne2.clearAllBits();
1771 KnownZero2.clearAllBits();
1772 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
1773 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1774 if (RHSUnknownLeadingOnes != BitWidth)
1775 LeadZ = std::min(BitWidth,
1776 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1778 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ);
1782 ComputeMaskedBits(Op.getOperand(2), KnownZero, KnownOne, Depth+1);
1783 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
1784 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1785 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1787 // Only known if known in both the LHS and RHS.
1788 KnownOne &= KnownOne2;
1789 KnownZero &= KnownZero2;
1791 case ISD::SELECT_CC:
1792 ComputeMaskedBits(Op.getOperand(3), KnownZero, KnownOne, Depth+1);
1793 ComputeMaskedBits(Op.getOperand(2), KnownZero2, KnownOne2, Depth+1);
1794 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1795 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1797 // Only known if known in both the LHS and RHS.
1798 KnownOne &= KnownOne2;
1799 KnownZero &= KnownZero2;
1807 if (Op.getResNo() != 1)
1809 // The boolean result conforms to getBooleanContents. Fall through.
1811 // If we know the result of a setcc has the top bits zero, use this info.
1812 if (TLI.getBooleanContents(Op.getValueType().isVector()) ==
1813 TargetLowering::ZeroOrOneBooleanContent && BitWidth > 1)
1814 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1817 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1818 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1819 unsigned ShAmt = SA->getZExtValue();
1821 // If the shift count is an invalid immediate, don't do anything.
1822 if (ShAmt >= BitWidth)
1825 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1826 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1827 KnownZero <<= ShAmt;
1829 // low bits known zero.
1830 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1834 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1835 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1836 unsigned ShAmt = SA->getZExtValue();
1838 // If the shift count is an invalid immediate, don't do anything.
1839 if (ShAmt >= BitWidth)
1842 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1843 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1844 KnownZero = KnownZero.lshr(ShAmt);
1845 KnownOne = KnownOne.lshr(ShAmt);
1847 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
1848 KnownZero |= HighBits; // High bits known zero.
1852 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1853 unsigned ShAmt = SA->getZExtValue();
1855 // If the shift count is an invalid immediate, don't do anything.
1856 if (ShAmt >= BitWidth)
1859 // If any of the demanded bits are produced by the sign extension, we also
1860 // demand the input sign bit.
1861 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
1863 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1864 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1865 KnownZero = KnownZero.lshr(ShAmt);
1866 KnownOne = KnownOne.lshr(ShAmt);
1868 // Handle the sign bits.
1869 APInt SignBit = APInt::getSignBit(BitWidth);
1870 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1872 if (KnownZero.intersects(SignBit)) {
1873 KnownZero |= HighBits; // New bits are known zero.
1874 } else if (KnownOne.intersects(SignBit)) {
1875 KnownOne |= HighBits; // New bits are known one.
1879 case ISD::SIGN_EXTEND_INREG: {
1880 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1881 unsigned EBits = EVT.getScalarType().getSizeInBits();
1883 // Sign extension. Compute the demanded bits in the result that are not
1884 // present in the input.
1885 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits);
1887 APInt InSignBit = APInt::getSignBit(EBits);
1888 APInt InputDemandedBits = APInt::getLowBitsSet(BitWidth, EBits);
1890 // If the sign extended bits are demanded, we know that the sign
1892 InSignBit = InSignBit.zext(BitWidth);
1893 if (NewBits.getBoolValue())
1894 InputDemandedBits |= InSignBit;
1896 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1897 KnownOne &= InputDemandedBits;
1898 KnownZero &= InputDemandedBits;
1899 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1901 // If the sign bit of the input is known set or clear, then we know the
1902 // top bits of the result.
1903 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1904 KnownZero |= NewBits;
1905 KnownOne &= ~NewBits;
1906 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1907 KnownOne |= NewBits;
1908 KnownZero &= ~NewBits;
1909 } else { // Input sign bit unknown
1910 KnownZero &= ~NewBits;
1911 KnownOne &= ~NewBits;
1916 case ISD::CTTZ_ZERO_UNDEF:
1918 case ISD::CTLZ_ZERO_UNDEF:
1920 unsigned LowBits = Log2_32(BitWidth)+1;
1921 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1922 KnownOne.clearAllBits();
1926 LoadSDNode *LD = cast<LoadSDNode>(Op);
1927 if (ISD::isZEXTLoad(Op.getNode())) {
1928 EVT VT = LD->getMemoryVT();
1929 unsigned MemBits = VT.getScalarType().getSizeInBits();
1930 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits);
1931 } else if (const MDNode *Ranges = LD->getRanges()) {
1932 computeMaskedBitsLoad(*Ranges, KnownZero);
1936 case ISD::ZERO_EXTEND: {
1937 EVT InVT = Op.getOperand(0).getValueType();
1938 unsigned InBits = InVT.getScalarType().getSizeInBits();
1939 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
1940 KnownZero = KnownZero.trunc(InBits);
1941 KnownOne = KnownOne.trunc(InBits);
1942 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1943 KnownZero = KnownZero.zext(BitWidth);
1944 KnownOne = KnownOne.zext(BitWidth);
1945 KnownZero |= NewBits;
1948 case ISD::SIGN_EXTEND: {
1949 EVT InVT = Op.getOperand(0).getValueType();
1950 unsigned InBits = InVT.getScalarType().getSizeInBits();
1951 APInt InSignBit = APInt::getSignBit(InBits);
1952 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
1954 KnownZero = KnownZero.trunc(InBits);
1955 KnownOne = KnownOne.trunc(InBits);
1956 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1958 // Note if the sign bit is known to be zero or one.
1959 bool SignBitKnownZero = KnownZero.isNegative();
1960 bool SignBitKnownOne = KnownOne.isNegative();
1961 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1962 "Sign bit can't be known to be both zero and one!");
1964 KnownZero = KnownZero.zext(BitWidth);
1965 KnownOne = KnownOne.zext(BitWidth);
1967 // If the sign bit is known zero or one, the top bits match.
1968 if (SignBitKnownZero)
1969 KnownZero |= NewBits;
1970 else if (SignBitKnownOne)
1971 KnownOne |= NewBits;
1974 case ISD::ANY_EXTEND: {
1975 EVT InVT = Op.getOperand(0).getValueType();
1976 unsigned InBits = InVT.getScalarType().getSizeInBits();
1977 KnownZero = KnownZero.trunc(InBits);
1978 KnownOne = KnownOne.trunc(InBits);
1979 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1980 KnownZero = KnownZero.zext(BitWidth);
1981 KnownOne = KnownOne.zext(BitWidth);
1984 case ISD::TRUNCATE: {
1985 EVT InVT = Op.getOperand(0).getValueType();
1986 unsigned InBits = InVT.getScalarType().getSizeInBits();
1987 KnownZero = KnownZero.zext(InBits);
1988 KnownOne = KnownOne.zext(InBits);
1989 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1990 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1991 KnownZero = KnownZero.trunc(BitWidth);
1992 KnownOne = KnownOne.trunc(BitWidth);
1995 case ISD::AssertZext: {
1996 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1997 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1998 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1999 KnownZero |= (~InMask);
2000 KnownOne &= (~KnownZero);
2004 // All bits are zero except the low bit.
2005 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
2009 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
2010 // We know that the top bits of C-X are clear if X contains less bits
2011 // than C (i.e. no wrap-around can happen). For example, 20-X is
2012 // positive if we can prove that X is >= 0 and < 16.
2013 if (CLHS->getAPIntValue().isNonNegative()) {
2014 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
2015 // NLZ can't be BitWidth with no sign bit
2016 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
2017 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2019 // If all of the MaskV bits are known to be zero, then we know the
2020 // output top bits are zero, because we now know that the output is
2022 if ((KnownZero2 & MaskV) == MaskV) {
2023 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
2024 // Top bits known zero.
2025 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2);
2033 // Output known-0 bits are known if clear or set in both the low clear bits
2034 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
2035 // low 3 bits clear.
2036 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2037 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
2038 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
2040 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2041 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
2042 KnownZeroOut = std::min(KnownZeroOut,
2043 KnownZero2.countTrailingOnes());
2045 if (Op.getOpcode() == ISD::ADD) {
2046 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
2050 // With ADDE, a carry bit may be added in, so we can only use this
2051 // information if we know (at least) that the low two bits are clear. We
2052 // then return to the caller that the low bit is unknown but that other bits
2054 if (KnownZeroOut >= 2) // ADDE
2055 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut);
2059 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2060 const APInt &RA = Rem->getAPIntValue().abs();
2061 if (RA.isPowerOf2()) {
2062 APInt LowBits = RA - 1;
2063 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
2064 ComputeMaskedBits(Op.getOperand(0), KnownZero2,KnownOne2,Depth+1);
2066 // The low bits of the first operand are unchanged by the srem.
2067 KnownZero = KnownZero2 & LowBits;
2068 KnownOne = KnownOne2 & LowBits;
2070 // If the first operand is non-negative or has all low bits zero, then
2071 // the upper bits are all zero.
2072 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
2073 KnownZero |= ~LowBits;
2075 // If the first operand is negative and not all low bits are zero, then
2076 // the upper bits are all one.
2077 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
2078 KnownOne |= ~LowBits;
2079 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2084 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2085 const APInt &RA = Rem->getAPIntValue();
2086 if (RA.isPowerOf2()) {
2087 APInt LowBits = (RA - 1);
2088 KnownZero |= ~LowBits;
2089 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne,Depth+1);
2090 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2095 // Since the result is less than or equal to either operand, any leading
2096 // zero bits in either operand must also exist in the result.
2097 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2098 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2100 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
2101 KnownZero2.countLeadingOnes());
2102 KnownOne.clearAllBits();
2103 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders);
2106 case ISD::FrameIndex:
2107 case ISD::TargetFrameIndex:
2108 if (unsigned Align = InferPtrAlignment(Op)) {
2109 // The low bits are known zero if the pointer is aligned.
2110 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align));
2116 if (Op.getOpcode() < ISD::BUILTIN_OP_END)
2119 case ISD::INTRINSIC_WO_CHAIN:
2120 case ISD::INTRINSIC_W_CHAIN:
2121 case ISD::INTRINSIC_VOID:
2122 // Allow the target to implement this method for its nodes.
2123 TLI.computeMaskedBitsForTargetNode(Op, KnownZero, KnownOne, *this, Depth);
2128 /// ComputeNumSignBits - Return the number of times the sign bit of the
2129 /// register is replicated into the other bits. We know that at least 1 bit
2130 /// is always equal to the sign bit (itself), but other cases can give us
2131 /// information. For example, immediately after an "SRA X, 2", we know that
2132 /// the top 3 bits are all equal to each other, so we return 3.
2133 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
2134 EVT VT = Op.getValueType();
2135 assert(VT.isInteger() && "Invalid VT!");
2136 unsigned VTBits = VT.getScalarType().getSizeInBits();
2138 unsigned FirstAnswer = 1;
2141 return 1; // Limit search depth.
2143 switch (Op.getOpcode()) {
2145 case ISD::AssertSext:
2146 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2147 return VTBits-Tmp+1;
2148 case ISD::AssertZext:
2149 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2152 case ISD::Constant: {
2153 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2154 return Val.getNumSignBits();
2157 case ISD::SIGN_EXTEND:
2158 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2159 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2161 case ISD::SIGN_EXTEND_INREG:
2162 // Max of the input and what this extends.
2164 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2167 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2168 return std::max(Tmp, Tmp2);
2171 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2172 // SRA X, C -> adds C sign bits.
2173 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2174 Tmp += C->getZExtValue();
2175 if (Tmp > VTBits) Tmp = VTBits;
2179 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2180 // shl destroys sign bits.
2181 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2182 if (C->getZExtValue() >= VTBits || // Bad shift.
2183 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2184 return Tmp - C->getZExtValue();
2189 case ISD::XOR: // NOT is handled here.
2190 // Logical binary ops preserve the number of sign bits at the worst.
2191 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2193 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2194 FirstAnswer = std::min(Tmp, Tmp2);
2195 // We computed what we know about the sign bits as our first
2196 // answer. Now proceed to the generic code that uses
2197 // ComputeMaskedBits, and pick whichever answer is better.
2202 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2203 if (Tmp == 1) return 1; // Early out.
2204 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2205 return std::min(Tmp, Tmp2);
2213 if (Op.getResNo() != 1)
2215 // The boolean result conforms to getBooleanContents. Fall through.
2217 // If setcc returns 0/-1, all bits are sign bits.
2218 if (TLI.getBooleanContents(Op.getValueType().isVector()) ==
2219 TargetLowering::ZeroOrNegativeOneBooleanContent)
2224 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2225 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2227 // Handle rotate right by N like a rotate left by 32-N.
2228 if (Op.getOpcode() == ISD::ROTR)
2229 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2231 // If we aren't rotating out all of the known-in sign bits, return the
2232 // number that are left. This handles rotl(sext(x), 1) for example.
2233 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2234 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2238 // Add can have at most one carry bit. Thus we know that the output
2239 // is, at worst, one more bit than the inputs.
2240 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2241 if (Tmp == 1) return 1; // Early out.
2243 // Special case decrementing a value (ADD X, -1):
2244 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2245 if (CRHS->isAllOnesValue()) {
2246 APInt KnownZero, KnownOne;
2247 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2249 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2251 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2254 // If we are subtracting one from a positive number, there is no carry
2255 // out of the result.
2256 if (KnownZero.isNegative())
2260 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2261 if (Tmp2 == 1) return 1;
2262 return std::min(Tmp, Tmp2)-1;
2265 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2266 if (Tmp2 == 1) return 1;
2269 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2270 if (CLHS->isNullValue()) {
2271 APInt KnownZero, KnownOne;
2272 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2273 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2275 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2278 // If the input is known to be positive (the sign bit is known clear),
2279 // the output of the NEG has the same number of sign bits as the input.
2280 if (KnownZero.isNegative())
2283 // Otherwise, we treat this like a SUB.
2286 // Sub can have at most one carry bit. Thus we know that the output
2287 // is, at worst, one more bit than the inputs.
2288 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2289 if (Tmp == 1) return 1; // Early out.
2290 return std::min(Tmp, Tmp2)-1;
2292 // FIXME: it's tricky to do anything useful for this, but it is an important
2293 // case for targets like X86.
2297 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2298 if (LoadSDNode *LD = dyn_cast<LoadSDNode>(Op)) {
2299 unsigned ExtType = LD->getExtensionType();
2302 case ISD::SEXTLOAD: // '17' bits known
2303 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2304 return VTBits-Tmp+1;
2305 case ISD::ZEXTLOAD: // '16' bits known
2306 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2311 // Allow the target to implement this method for its nodes.
2312 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2313 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2314 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2315 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2316 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2317 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2320 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2321 // use this information.
2322 APInt KnownZero, KnownOne;
2323 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth);
2326 if (KnownZero.isNegative()) { // sign bit is 0
2328 } else if (KnownOne.isNegative()) { // sign bit is 1;
2335 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2336 // the number of identical bits in the top of the input value.
2338 Mask <<= Mask.getBitWidth()-VTBits;
2339 // Return # leading zeros. We use 'min' here in case Val was zero before
2340 // shifting. We don't want to return '64' as for an i32 "0".
2341 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2344 /// isBaseWithConstantOffset - Return true if the specified operand is an
2345 /// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an
2346 /// ISD::OR with a ConstantSDNode that is guaranteed to have the same
2347 /// semantics as an ADD. This handles the equivalence:
2348 /// X|Cst == X+Cst iff X&Cst = 0.
2349 bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const {
2350 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) ||
2351 !isa<ConstantSDNode>(Op.getOperand(1)))
2354 if (Op.getOpcode() == ISD::OR &&
2355 !MaskedValueIsZero(Op.getOperand(0),
2356 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue()))
2363 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2364 // If we're told that NaNs won't happen, assume they won't.
2365 if (getTarget().Options.NoNaNsFPMath)
2368 // If the value is a constant, we can obviously see if it is a NaN or not.
2369 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2370 return !C->getValueAPF().isNaN();
2372 // TODO: Recognize more cases here.
2377 bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
2378 // If the value is a constant, we can obviously see if it is a zero or not.
2379 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2380 return !C->isZero();
2382 // TODO: Recognize more cases here.
2383 switch (Op.getOpcode()) {
2386 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2387 return !C->isNullValue();
2394 bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
2395 // Check the obvious case.
2396 if (A == B) return true;
2398 // For for negative and positive zero.
2399 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
2400 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
2401 if (CA->isZero() && CB->isZero()) return true;
2403 // Otherwise they may not be equal.
2407 /// getNode - Gets or creates the specified node.
2409 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) {
2410 FoldingSetNodeID ID;
2411 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2413 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2414 return SDValue(E, 0);
2416 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT));
2417 CSEMap.InsertNode(N, IP);
2419 AllNodes.push_back(N);
2423 return SDValue(N, 0);
2426 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2427 EVT VT, SDValue Operand) {
2428 // Constant fold unary operations with an integer constant operand.
2429 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2430 const APInt &Val = C->getAPIntValue();
2433 case ISD::SIGN_EXTEND:
2434 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT);
2435 case ISD::ANY_EXTEND:
2436 case ISD::ZERO_EXTEND:
2438 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT);
2439 case ISD::UINT_TO_FP:
2440 case ISD::SINT_TO_FP: {
2441 APFloat apf(APInt::getNullValue(VT.getSizeInBits()));
2442 (void)apf.convertFromAPInt(Val,
2443 Opcode==ISD::SINT_TO_FP,
2444 APFloat::rmNearestTiesToEven);
2445 return getConstantFP(apf, VT);
2448 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2449 return getConstantFP(APFloat(Val), VT);
2450 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2451 return getConstantFP(APFloat(Val), VT);
2454 return getConstant(Val.byteSwap(), VT);
2456 return getConstant(Val.countPopulation(), VT);
2458 case ISD::CTLZ_ZERO_UNDEF:
2459 return getConstant(Val.countLeadingZeros(), VT);
2461 case ISD::CTTZ_ZERO_UNDEF:
2462 return getConstant(Val.countTrailingZeros(), VT);
2466 // Constant fold unary operations with a floating point constant operand.
2467 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2468 APFloat V = C->getValueAPF(); // make copy
2472 return getConstantFP(V, VT);
2475 return getConstantFP(V, VT);
2477 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardPositive);
2478 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2479 return getConstantFP(V, VT);
2483 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardZero);
2484 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2485 return getConstantFP(V, VT);
2489 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardNegative);
2490 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2491 return getConstantFP(V, VT);
2494 case ISD::FP_EXTEND: {
2496 // This can return overflow, underflow, or inexact; we don't care.
2497 // FIXME need to be more flexible about rounding mode.
2498 (void)V.convert(*EVTToAPFloatSemantics(VT),
2499 APFloat::rmNearestTiesToEven, &ignored);
2500 return getConstantFP(V, VT);
2502 case ISD::FP_TO_SINT:
2503 case ISD::FP_TO_UINT: {
2506 assert(integerPartWidth >= 64);
2507 // FIXME need to be more flexible about rounding mode.
2508 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2509 Opcode==ISD::FP_TO_SINT,
2510 APFloat::rmTowardZero, &ignored);
2511 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2513 APInt api(VT.getSizeInBits(), x);
2514 return getConstant(api, VT);
2517 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2518 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2519 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2520 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2525 unsigned OpOpcode = Operand.getNode()->getOpcode();
2527 case ISD::TokenFactor:
2528 case ISD::MERGE_VALUES:
2529 case ISD::CONCAT_VECTORS:
2530 return Operand; // Factor, merge or concat of one node? No need.
2531 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2532 case ISD::FP_EXTEND:
2533 assert(VT.isFloatingPoint() &&
2534 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2535 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2536 assert((!VT.isVector() ||
2537 VT.getVectorNumElements() ==
2538 Operand.getValueType().getVectorNumElements()) &&
2539 "Vector element count mismatch!");
2540 if (Operand.getOpcode() == ISD::UNDEF)
2541 return getUNDEF(VT);
2543 case ISD::SIGN_EXTEND:
2544 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2545 "Invalid SIGN_EXTEND!");
2546 if (Operand.getValueType() == VT) return Operand; // noop extension
2547 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2548 "Invalid sext node, dst < src!");
2549 assert((!VT.isVector() ||
2550 VT.getVectorNumElements() ==
2551 Operand.getValueType().getVectorNumElements()) &&
2552 "Vector element count mismatch!");
2553 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2554 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2555 else if (OpOpcode == ISD::UNDEF)
2556 // sext(undef) = 0, because the top bits will all be the same.
2557 return getConstant(0, VT);
2559 case ISD::ZERO_EXTEND:
2560 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2561 "Invalid ZERO_EXTEND!");
2562 if (Operand.getValueType() == VT) return Operand; // noop extension
2563 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2564 "Invalid zext node, dst < src!");
2565 assert((!VT.isVector() ||
2566 VT.getVectorNumElements() ==
2567 Operand.getValueType().getVectorNumElements()) &&
2568 "Vector element count mismatch!");
2569 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2570 return getNode(ISD::ZERO_EXTEND, DL, VT,
2571 Operand.getNode()->getOperand(0));
2572 else if (OpOpcode == ISD::UNDEF)
2573 // zext(undef) = 0, because the top bits will be zero.
2574 return getConstant(0, VT);
2576 case ISD::ANY_EXTEND:
2577 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2578 "Invalid ANY_EXTEND!");
2579 if (Operand.getValueType() == VT) return Operand; // noop extension
2580 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2581 "Invalid anyext node, dst < src!");
2582 assert((!VT.isVector() ||
2583 VT.getVectorNumElements() ==
2584 Operand.getValueType().getVectorNumElements()) &&
2585 "Vector element count mismatch!");
2587 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2588 OpOpcode == ISD::ANY_EXTEND)
2589 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2590 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2591 else if (OpOpcode == ISD::UNDEF)
2592 return getUNDEF(VT);
2594 // (ext (trunx x)) -> x
2595 if (OpOpcode == ISD::TRUNCATE) {
2596 SDValue OpOp = Operand.getNode()->getOperand(0);
2597 if (OpOp.getValueType() == VT)
2602 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2603 "Invalid TRUNCATE!");
2604 if (Operand.getValueType() == VT) return Operand; // noop truncate
2605 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) &&
2606 "Invalid truncate node, src < dst!");
2607 assert((!VT.isVector() ||
2608 VT.getVectorNumElements() ==
2609 Operand.getValueType().getVectorNumElements()) &&
2610 "Vector element count mismatch!");
2611 if (OpOpcode == ISD::TRUNCATE)
2612 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2613 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2614 OpOpcode == ISD::ANY_EXTEND) {
2615 // If the source is smaller than the dest, we still need an extend.
2616 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
2617 .bitsLT(VT.getScalarType()))
2618 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2619 if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2620 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2621 return Operand.getNode()->getOperand(0);
2623 if (OpOpcode == ISD::UNDEF)
2624 return getUNDEF(VT);
2627 // Basic sanity checking.
2628 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2629 && "Cannot BITCAST between types of different sizes!");
2630 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2631 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x)
2632 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0));
2633 if (OpOpcode == ISD::UNDEF)
2634 return getUNDEF(VT);
2636 case ISD::SCALAR_TO_VECTOR:
2637 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2638 (VT.getVectorElementType() == Operand.getValueType() ||
2639 (VT.getVectorElementType().isInteger() &&
2640 Operand.getValueType().isInteger() &&
2641 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2642 "Illegal SCALAR_TO_VECTOR node!");
2643 if (OpOpcode == ISD::UNDEF)
2644 return getUNDEF(VT);
2645 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2646 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2647 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2648 Operand.getConstantOperandVal(1) == 0 &&
2649 Operand.getOperand(0).getValueType() == VT)
2650 return Operand.getOperand(0);
2653 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2654 if (getTarget().Options.UnsafeFPMath && OpOpcode == ISD::FSUB)
2655 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2656 Operand.getNode()->getOperand(0));
2657 if (OpOpcode == ISD::FNEG) // --X -> X
2658 return Operand.getNode()->getOperand(0);
2661 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2662 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2667 SDVTList VTs = getVTList(VT);
2668 if (VT != MVT::Glue) { // Don't CSE flag producing nodes
2669 FoldingSetNodeID ID;
2670 SDValue Ops[1] = { Operand };
2671 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2673 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2674 return SDValue(E, 0);
2676 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2677 CSEMap.InsertNode(N, IP);
2679 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2682 AllNodes.push_back(N);
2686 return SDValue(N, 0);
2689 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2691 ConstantSDNode *Cst1,
2692 ConstantSDNode *Cst2) {
2693 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2696 case ISD::ADD: return getConstant(C1 + C2, VT);
2697 case ISD::SUB: return getConstant(C1 - C2, VT);
2698 case ISD::MUL: return getConstant(C1 * C2, VT);
2700 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2703 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2706 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2709 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2711 case ISD::AND: return getConstant(C1 & C2, VT);
2712 case ISD::OR: return getConstant(C1 | C2, VT);
2713 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2714 case ISD::SHL: return getConstant(C1 << C2, VT);
2715 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2716 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2717 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2718 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2725 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2726 SDValue N1, SDValue N2) {
2727 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2728 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2731 case ISD::TokenFactor:
2732 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2733 N2.getValueType() == MVT::Other && "Invalid token factor!");
2734 // Fold trivial token factors.
2735 if (N1.getOpcode() == ISD::EntryToken) return N2;
2736 if (N2.getOpcode() == ISD::EntryToken) return N1;
2737 if (N1 == N2) return N1;
2739 case ISD::CONCAT_VECTORS:
2740 // Concat of UNDEFs is UNDEF.
2741 if (N1.getOpcode() == ISD::UNDEF &&
2742 N2.getOpcode() == ISD::UNDEF)
2743 return getUNDEF(VT);
2745 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2746 // one big BUILD_VECTOR.
2747 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2748 N2.getOpcode() == ISD::BUILD_VECTOR) {
2749 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
2750 N1.getNode()->op_end());
2751 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
2752 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2756 assert(VT.isInteger() && "This operator does not apply to FP types!");
2757 assert(N1.getValueType() == N2.getValueType() &&
2758 N1.getValueType() == VT && "Binary operator types must match!");
2759 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2760 // worth handling here.
2761 if (N2C && N2C->isNullValue())
2763 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2770 assert(VT.isInteger() && "This operator does not apply to FP types!");
2771 assert(N1.getValueType() == N2.getValueType() &&
2772 N1.getValueType() == VT && "Binary operator types must match!");
2773 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2774 // it's worth handling here.
2775 if (N2C && N2C->isNullValue())
2785 assert(VT.isInteger() && "This operator does not apply to FP types!");
2786 assert(N1.getValueType() == N2.getValueType() &&
2787 N1.getValueType() == VT && "Binary operator types must match!");
2794 if (getTarget().Options.UnsafeFPMath) {
2795 if (Opcode == ISD::FADD) {
2797 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2798 if (CFP->getValueAPF().isZero())
2801 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2802 if (CFP->getValueAPF().isZero())
2804 } else if (Opcode == ISD::FSUB) {
2806 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2807 if (CFP->getValueAPF().isZero())
2809 } else if (Opcode == ISD::FMUL) {
2810 ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1);
2813 // If the first operand isn't the constant, try the second
2815 CFP = dyn_cast<ConstantFPSDNode>(N2);
2822 return SDValue(CFP,0);
2824 if (CFP->isExactlyValue(1.0))
2829 assert(VT.isFloatingPoint() && "This operator only applies to FP types!");
2830 assert(N1.getValueType() == N2.getValueType() &&
2831 N1.getValueType() == VT && "Binary operator types must match!");
2833 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2834 assert(N1.getValueType() == VT &&
2835 N1.getValueType().isFloatingPoint() &&
2836 N2.getValueType().isFloatingPoint() &&
2837 "Invalid FCOPYSIGN!");
2844 assert(VT == N1.getValueType() &&
2845 "Shift operators return type must be the same as their first arg");
2846 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2847 "Shifts only work on integers");
2848 // Verify that the shift amount VT is bit enough to hold valid shift
2849 // amounts. This catches things like trying to shift an i1024 value by an
2850 // i8, which is easy to fall into in generic code that uses
2851 // TLI.getShiftAmount().
2852 assert(N2.getValueType().getSizeInBits() >=
2853 Log2_32_Ceil(N1.getValueType().getSizeInBits()) &&
2854 "Invalid use of small shift amount with oversized value!");
2856 // Always fold shifts of i1 values so the code generator doesn't need to
2857 // handle them. Since we know the size of the shift has to be less than the
2858 // size of the value, the shift/rotate count is guaranteed to be zero.
2861 if (N2C && N2C->isNullValue())
2864 case ISD::FP_ROUND_INREG: {
2865 EVT EVT = cast<VTSDNode>(N2)->getVT();
2866 assert(VT == N1.getValueType() && "Not an inreg round!");
2867 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2868 "Cannot FP_ROUND_INREG integer types");
2869 assert(EVT.isVector() == VT.isVector() &&
2870 "FP_ROUND_INREG type should be vector iff the operand "
2872 assert((!EVT.isVector() ||
2873 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2874 "Vector element counts must match in FP_ROUND_INREG");
2875 assert(EVT.bitsLE(VT) && "Not rounding down!");
2877 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2881 assert(VT.isFloatingPoint() &&
2882 N1.getValueType().isFloatingPoint() &&
2883 VT.bitsLE(N1.getValueType()) &&
2884 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2885 if (N1.getValueType() == VT) return N1; // noop conversion.
2887 case ISD::AssertSext:
2888 case ISD::AssertZext: {
2889 EVT EVT = cast<VTSDNode>(N2)->getVT();
2890 assert(VT == N1.getValueType() && "Not an inreg extend!");
2891 assert(VT.isInteger() && EVT.isInteger() &&
2892 "Cannot *_EXTEND_INREG FP types");
2893 assert(!EVT.isVector() &&
2894 "AssertSExt/AssertZExt type should be the vector element type "
2895 "rather than the vector type!");
2896 assert(EVT.bitsLE(VT) && "Not extending!");
2897 if (VT == EVT) return N1; // noop assertion.
2900 case ISD::SIGN_EXTEND_INREG: {
2901 EVT EVT = cast<VTSDNode>(N2)->getVT();
2902 assert(VT == N1.getValueType() && "Not an inreg extend!");
2903 assert(VT.isInteger() && EVT.isInteger() &&
2904 "Cannot *_EXTEND_INREG FP types");
2905 assert(EVT.isVector() == VT.isVector() &&
2906 "SIGN_EXTEND_INREG type should be vector iff the operand "
2908 assert((!EVT.isVector() ||
2909 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2910 "Vector element counts must match in SIGN_EXTEND_INREG");
2911 assert(EVT.bitsLE(VT) && "Not extending!");
2912 if (EVT == VT) return N1; // Not actually extending
2915 APInt Val = N1C->getAPIntValue();
2916 unsigned FromBits = EVT.getScalarType().getSizeInBits();
2917 Val <<= Val.getBitWidth()-FromBits;
2918 Val = Val.ashr(Val.getBitWidth()-FromBits);
2919 return getConstant(Val, VT);
2923 case ISD::EXTRACT_VECTOR_ELT:
2924 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2925 if (N1.getOpcode() == ISD::UNDEF)
2926 return getUNDEF(VT);
2928 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2929 // expanding copies of large vectors from registers.
2931 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2932 N1.getNumOperands() > 0) {
2934 N1.getOperand(0).getValueType().getVectorNumElements();
2935 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
2936 N1.getOperand(N2C->getZExtValue() / Factor),
2937 getConstant(N2C->getZExtValue() % Factor,
2938 N2.getValueType()));
2941 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2942 // expanding large vector constants.
2943 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
2944 SDValue Elt = N1.getOperand(N2C->getZExtValue());
2946 if (VT != Elt.getValueType())
2947 // If the vector element type is not legal, the BUILD_VECTOR operands
2948 // are promoted and implicitly truncated, and the result implicitly
2949 // extended. Make that explicit here.
2950 Elt = getAnyExtOrTrunc(Elt, DL, VT);
2955 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2956 // operations are lowered to scalars.
2957 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2958 // If the indices are the same, return the inserted element else
2959 // if the indices are known different, extract the element from
2960 // the original vector.
2961 SDValue N1Op2 = N1.getOperand(2);
2962 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode());
2964 if (N1Op2C && N2C) {
2965 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) {
2966 if (VT == N1.getOperand(1).getValueType())
2967 return N1.getOperand(1);
2969 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
2972 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
2976 case ISD::EXTRACT_ELEMENT:
2977 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2978 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2979 (N1.getValueType().isInteger() == VT.isInteger()) &&
2980 N1.getValueType() != VT &&
2981 "Wrong types for EXTRACT_ELEMENT!");
2983 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2984 // 64-bit integers into 32-bit parts. Instead of building the extract of
2985 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2986 if (N1.getOpcode() == ISD::BUILD_PAIR)
2987 return N1.getOperand(N2C->getZExtValue());
2989 // EXTRACT_ELEMENT of a constant int is also very common.
2990 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2991 unsigned ElementSize = VT.getSizeInBits();
2992 unsigned Shift = ElementSize * N2C->getZExtValue();
2993 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2994 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2997 case ISD::EXTRACT_SUBVECTOR: {
2999 if (VT.isSimple() && N1.getValueType().isSimple()) {
3000 assert(VT.isVector() && N1.getValueType().isVector() &&
3001 "Extract subvector VTs must be a vectors!");
3002 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() &&
3003 "Extract subvector VTs must have the same element type!");
3004 assert(VT.getSimpleVT() <= N1.getValueType().getSimpleVT() &&
3005 "Extract subvector must be from larger vector to smaller vector!");
3007 if (isa<ConstantSDNode>(Index.getNode())) {
3008 assert((VT.getVectorNumElements() +
3009 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3010 <= N1.getValueType().getVectorNumElements())
3011 && "Extract subvector overflow!");
3014 // Trivial extraction.
3015 if (VT.getSimpleVT() == N1.getValueType().getSimpleVT())
3024 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
3025 if (SV.getNode()) return SV;
3026 } else { // Cannonicalize constant to RHS if commutative
3027 if (isCommutativeBinOp(Opcode)) {
3028 std::swap(N1C, N2C);
3034 // Constant fold FP operations.
3035 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
3036 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
3038 if (!N2CFP && isCommutativeBinOp(Opcode)) {
3039 // Cannonicalize constant to RHS if commutative
3040 std::swap(N1CFP, N2CFP);
3043 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
3044 APFloat::opStatus s;
3047 s = V1.add(V2, APFloat::rmNearestTiesToEven);
3048 if (s != APFloat::opInvalidOp)
3049 return getConstantFP(V1, VT);
3052 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
3053 if (s!=APFloat::opInvalidOp)
3054 return getConstantFP(V1, VT);
3057 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
3058 if (s!=APFloat::opInvalidOp)
3059 return getConstantFP(V1, VT);
3062 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
3063 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
3064 return getConstantFP(V1, VT);
3067 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
3068 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
3069 return getConstantFP(V1, VT);
3071 case ISD::FCOPYSIGN:
3073 return getConstantFP(V1, VT);
3078 if (Opcode == ISD::FP_ROUND) {
3079 APFloat V = N1CFP->getValueAPF(); // make copy
3081 // This can return overflow, underflow, or inexact; we don't care.
3082 // FIXME need to be more flexible about rounding mode.
3083 (void)V.convert(*EVTToAPFloatSemantics(VT),
3084 APFloat::rmNearestTiesToEven, &ignored);
3085 return getConstantFP(V, VT);
3089 // Canonicalize an UNDEF to the RHS, even over a constant.
3090 if (N1.getOpcode() == ISD::UNDEF) {
3091 if (isCommutativeBinOp(Opcode)) {
3095 case ISD::FP_ROUND_INREG:
3096 case ISD::SIGN_EXTEND_INREG:
3102 return N1; // fold op(undef, arg2) -> undef
3110 return getConstant(0, VT); // fold op(undef, arg2) -> 0
3111 // For vectors, we can't easily build an all zero vector, just return
3118 // Fold a bunch of operators when the RHS is undef.
3119 if (N2.getOpcode() == ISD::UNDEF) {
3122 if (N1.getOpcode() == ISD::UNDEF)
3123 // Handle undef ^ undef -> 0 special case. This is a common
3125 return getConstant(0, VT);
3135 return N2; // fold op(arg1, undef) -> undef
3141 if (getTarget().Options.UnsafeFPMath)
3149 return getConstant(0, VT); // fold op(arg1, undef) -> 0
3150 // For vectors, we can't easily build an all zero vector, just return
3155 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
3156 // For vectors, we can't easily build an all one vector, just return
3164 // Memoize this node if possible.
3166 SDVTList VTs = getVTList(VT);
3167 if (VT != MVT::Glue) {
3168 SDValue Ops[] = { N1, N2 };
3169 FoldingSetNodeID ID;
3170 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
3172 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3173 return SDValue(E, 0);
3175 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3176 CSEMap.InsertNode(N, IP);
3178 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3181 AllNodes.push_back(N);
3185 return SDValue(N, 0);
3188 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3189 SDValue N1, SDValue N2, SDValue N3) {
3190 // Perform various simplifications.
3191 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
3193 case ISD::CONCAT_VECTORS:
3194 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3195 // one big BUILD_VECTOR.
3196 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3197 N2.getOpcode() == ISD::BUILD_VECTOR &&
3198 N3.getOpcode() == ISD::BUILD_VECTOR) {
3199 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3200 N1.getNode()->op_end());
3201 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3202 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end());
3203 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
3207 // Use FoldSetCC to simplify SETCC's.
3208 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
3209 if (Simp.getNode()) return Simp;
3214 if (N1C->getZExtValue())
3215 return N2; // select true, X, Y -> X
3216 return N3; // select false, X, Y -> Y
3219 if (N2 == N3) return N2; // select C, X, X -> X
3221 case ISD::VECTOR_SHUFFLE:
3222 llvm_unreachable("should use getVectorShuffle constructor!");
3223 case ISD::INSERT_SUBVECTOR: {
3225 if (VT.isSimple() && N1.getValueType().isSimple()
3226 && N2.getValueType().isSimple()) {
3227 assert(VT.isVector() && N1.getValueType().isVector() &&
3228 N2.getValueType().isVector() &&
3229 "Insert subvector VTs must be a vectors");
3230 assert(VT == N1.getValueType() &&
3231 "Dest and insert subvector source types must match!");
3232 assert(N2.getValueType().getSimpleVT() <= N1.getValueType().getSimpleVT() &&
3233 "Insert subvector must be from smaller vector to larger vector!");
3234 if (isa<ConstantSDNode>(Index.getNode())) {
3235 assert((N2.getValueType().getVectorNumElements() +
3236 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3237 <= VT.getVectorNumElements())
3238 && "Insert subvector overflow!");
3241 // Trivial insertion.
3242 if (VT.getSimpleVT() == N2.getValueType().getSimpleVT())
3248 // Fold bit_convert nodes from a type to themselves.
3249 if (N1.getValueType() == VT)
3254 // Memoize node if it doesn't produce a flag.
3256 SDVTList VTs = getVTList(VT);
3257 if (VT != MVT::Glue) {
3258 SDValue Ops[] = { N1, N2, N3 };
3259 FoldingSetNodeID ID;
3260 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3262 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3263 return SDValue(E, 0);
3265 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3266 CSEMap.InsertNode(N, IP);
3268 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3271 AllNodes.push_back(N);
3275 return SDValue(N, 0);
3278 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3279 SDValue N1, SDValue N2, SDValue N3,
3281 SDValue Ops[] = { N1, N2, N3, N4 };
3282 return getNode(Opcode, DL, VT, Ops, 4);
3285 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3286 SDValue N1, SDValue N2, SDValue N3,
3287 SDValue N4, SDValue N5) {
3288 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3289 return getNode(Opcode, DL, VT, Ops, 5);
3292 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3293 /// the incoming stack arguments to be loaded from the stack.
3294 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3295 SmallVector<SDValue, 8> ArgChains;
3297 // Include the original chain at the beginning of the list. When this is
3298 // used by target LowerCall hooks, this helps legalize find the
3299 // CALLSEQ_BEGIN node.
3300 ArgChains.push_back(Chain);
3302 // Add a chain value for each stack argument.
3303 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3304 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3305 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3306 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3307 if (FI->getIndex() < 0)
3308 ArgChains.push_back(SDValue(L, 1));
3310 // Build a tokenfactor for all the chains.
3311 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other,
3312 &ArgChains[0], ArgChains.size());
3315 /// SplatByte - Distribute ByteVal over NumBits bits.
3316 static APInt SplatByte(unsigned NumBits, uint8_t ByteVal) {
3317 APInt Val = APInt(NumBits, ByteVal);
3319 for (unsigned i = NumBits; i > 8; i >>= 1) {
3320 Val = (Val << Shift) | Val;
3326 /// getMemsetValue - Vectorized representation of the memset value
3328 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3330 assert(Value.getOpcode() != ISD::UNDEF);
3332 unsigned NumBits = VT.getScalarType().getSizeInBits();
3333 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3334 APInt Val = SplatByte(NumBits, C->getZExtValue() & 255);
3336 return DAG.getConstant(Val, VT);
3337 return DAG.getConstantFP(APFloat(Val), VT);
3340 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3342 // Use a multiplication with 0x010101... to extend the input to the
3344 APInt Magic = SplatByte(NumBits, 0x01);
3345 Value = DAG.getNode(ISD::MUL, dl, VT, Value, DAG.getConstant(Magic, VT));
3351 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3352 /// used when a memcpy is turned into a memset when the source is a constant
3354 static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG,
3355 const TargetLowering &TLI, StringRef Str) {
3356 // Handle vector with all elements zero.
3359 return DAG.getConstant(0, VT);
3360 else if (VT == MVT::f32 || VT == MVT::f64)
3361 return DAG.getConstantFP(0.0, VT);
3362 else if (VT.isVector()) {
3363 unsigned NumElts = VT.getVectorNumElements();
3364 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3365 return DAG.getNode(ISD::BITCAST, dl, VT,
3366 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(),
3369 llvm_unreachable("Expected type!");
3372 assert(!VT.isVector() && "Can't handle vector type here!");
3373 unsigned NumVTBytes = VT.getSizeInBits() / 8;
3374 unsigned NumBytes = std::min(NumVTBytes, unsigned(Str.size()));
3377 if (TLI.isLittleEndian()) {
3378 for (unsigned i = 0; i != NumBytes; ++i)
3379 Val |= (uint64_t)(unsigned char)Str[i] << i*8;
3381 for (unsigned i = 0; i != NumBytes; ++i)
3382 Val |= (uint64_t)(unsigned char)Str[i] << (NumVTBytes-i-1)*8;
3385 return DAG.getConstant(Val, VT);
3388 /// getMemBasePlusOffset - Returns base and offset node for the
3390 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
3391 SelectionDAG &DAG) {
3392 EVT VT = Base.getValueType();
3393 return DAG.getNode(ISD::ADD, Base.getDebugLoc(),
3394 VT, Base, DAG.getConstant(Offset, VT));
3397 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3399 static bool isMemSrcFromString(SDValue Src, StringRef &Str) {
3400 unsigned SrcDelta = 0;
3401 GlobalAddressSDNode *G = NULL;
3402 if (Src.getOpcode() == ISD::GlobalAddress)
3403 G = cast<GlobalAddressSDNode>(Src);
3404 else if (Src.getOpcode() == ISD::ADD &&
3405 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3406 Src.getOperand(1).getOpcode() == ISD::Constant) {
3407 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3408 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3413 return getConstantStringInfo(G->getGlobal(), Str, SrcDelta, false);
3416 /// FindOptimalMemOpLowering - Determines the optimial series memory ops
3417 /// to replace the memset / memcpy. Return true if the number of memory ops
3418 /// is below the threshold. It returns the types of the sequence of
3419 /// memory ops to perform memset / memcpy by reference.
3420 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
3421 unsigned Limit, uint64_t Size,
3422 unsigned DstAlign, unsigned SrcAlign,
3426 const TargetLowering &TLI) {
3427 assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
3428 "Expecting memcpy / memset source to meet alignment requirement!");
3429 // If 'SrcAlign' is zero, that means the memory operation does not need to
3430 // load the value, i.e. memset or memcpy from constant string. Otherwise,
3431 // it's the inferred alignment of the source. 'DstAlign', on the other hand,
3432 // is the specified alignment of the memory operation. If it is zero, that
3433 // means it's possible to change the alignment of the destination.
3434 // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does
3435 // not need to be loaded.
3436 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
3437 IsZeroVal, MemcpyStrSrc,
3438 DAG.getMachineFunction());
3440 if (VT == MVT::Other) {
3441 if (DstAlign >= TLI.getDataLayout()->getPointerPrefAlignment() ||
3442 TLI.allowsUnalignedMemoryAccesses(VT)) {
3443 VT = TLI.getPointerTy();
3445 switch (DstAlign & 7) {
3446 case 0: VT = MVT::i64; break;
3447 case 4: VT = MVT::i32; break;
3448 case 2: VT = MVT::i16; break;
3449 default: VT = MVT::i8; break;
3454 while (!TLI.isTypeLegal(LVT))
3455 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3456 assert(LVT.isInteger());
3462 unsigned NumMemOps = 0;
3464 unsigned VTSize = VT.getSizeInBits() / 8;
3465 while (VTSize > Size) {
3466 // For now, only use non-vector load / store's for the left-over pieces.
3467 if (VT.isVector() || VT.isFloatingPoint()) {
3469 while (!TLI.isTypeLegal(VT))
3470 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3471 VTSize = VT.getSizeInBits() / 8;
3473 // This can result in a type that is not legal on the target, e.g.
3474 // 1 or 2 bytes on PPC.
3475 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3480 if (++NumMemOps > Limit)
3482 MemOps.push_back(VT);
3489 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3490 SDValue Chain, SDValue Dst,
3491 SDValue Src, uint64_t Size,
3492 unsigned Align, bool isVol,
3494 MachinePointerInfo DstPtrInfo,
3495 MachinePointerInfo SrcPtrInfo) {
3496 // Turn a memcpy of undef to nop.
3497 if (Src.getOpcode() == ISD::UNDEF)
3500 // Expand memcpy to a series of load and store ops if the size operand falls
3501 // below a certain threshold.
3502 // TODO: In the AlwaysInline case, if the size is big then generate a loop
3503 // rather than maybe a humongous number of loads and stores.
3504 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3505 std::vector<EVT> MemOps;
3506 bool DstAlignCanChange = false;
3507 MachineFunction &MF = DAG.getMachineFunction();
3508 MachineFrameInfo *MFI = MF.getFrameInfo();
3510 MF.getFunction()->getFnAttributes().
3511 hasAttribute(Attributes::OptimizeForSize);
3512 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3513 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3514 DstAlignCanChange = true;
3515 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3516 if (Align > SrcAlign)
3519 bool CopyFromStr = isMemSrcFromString(Src, Str);
3520 bool isZeroStr = CopyFromStr && Str.empty();
3521 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize);
3523 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3524 (DstAlignCanChange ? 0 : Align),
3525 (isZeroStr ? 0 : SrcAlign),
3526 true, CopyFromStr, DAG, TLI))
3529 if (DstAlignCanChange) {
3530 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3531 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
3532 if (NewAlign > Align) {
3533 // Give the stack frame object a larger alignment if needed.
3534 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3535 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3540 SmallVector<SDValue, 8> OutChains;
3541 unsigned NumMemOps = MemOps.size();
3542 uint64_t SrcOff = 0, DstOff = 0;
3543 for (unsigned i = 0; i != NumMemOps; ++i) {
3545 unsigned VTSize = VT.getSizeInBits() / 8;
3546 SDValue Value, Store;
3549 (isZeroStr || (VT.isInteger() && !VT.isVector()))) {
3550 // It's unlikely a store of a vector immediate can be done in a single
3551 // instruction. It would require a load from a constantpool first.
3552 // We only handle zero vectors here.
3553 // FIXME: Handle other cases where store of vector immediate is done in
3554 // a single instruction.
3555 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str.substr(SrcOff));
3556 Store = DAG.getStore(Chain, dl, Value,
3557 getMemBasePlusOffset(Dst, DstOff, DAG),
3558 DstPtrInfo.getWithOffset(DstOff), isVol,
3561 // The type might not be legal for the target. This should only happen
3562 // if the type is smaller than a legal type, as on PPC, so the right
3563 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
3564 // to Load/Store if NVT==VT.
3565 // FIXME does the case above also need this?
3566 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
3567 assert(NVT.bitsGE(VT));
3568 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
3569 getMemBasePlusOffset(Src, SrcOff, DAG),
3570 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false,
3571 MinAlign(SrcAlign, SrcOff));
3572 Store = DAG.getTruncStore(Chain, dl, Value,
3573 getMemBasePlusOffset(Dst, DstOff, DAG),
3574 DstPtrInfo.getWithOffset(DstOff), VT, isVol,
3577 OutChains.push_back(Store);
3582 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3583 &OutChains[0], OutChains.size());
3586 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3587 SDValue Chain, SDValue Dst,
3588 SDValue Src, uint64_t Size,
3589 unsigned Align, bool isVol,
3591 MachinePointerInfo DstPtrInfo,
3592 MachinePointerInfo SrcPtrInfo) {
3593 // Turn a memmove of undef to nop.
3594 if (Src.getOpcode() == ISD::UNDEF)
3597 // Expand memmove to a series of load and store ops if the size operand falls
3598 // below a certain threshold.
3599 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3600 std::vector<EVT> MemOps;
3601 bool DstAlignCanChange = false;
3602 MachineFunction &MF = DAG.getMachineFunction();
3603 MachineFrameInfo *MFI = MF.getFrameInfo();
3604 bool OptSize = MF.getFunction()->getFnAttributes().
3605 hasAttribute(Attributes::OptimizeForSize);
3606 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3607 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3608 DstAlignCanChange = true;
3609 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3610 if (Align > SrcAlign)
3612 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize);
3614 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3615 (DstAlignCanChange ? 0 : Align),
3616 SrcAlign, true, false, DAG, TLI))
3619 if (DstAlignCanChange) {
3620 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3621 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
3622 if (NewAlign > Align) {
3623 // Give the stack frame object a larger alignment if needed.
3624 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3625 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3630 uint64_t SrcOff = 0, DstOff = 0;
3631 SmallVector<SDValue, 8> LoadValues;
3632 SmallVector<SDValue, 8> LoadChains;
3633 SmallVector<SDValue, 8> OutChains;
3634 unsigned NumMemOps = MemOps.size();
3635 for (unsigned i = 0; i < NumMemOps; i++) {
3637 unsigned VTSize = VT.getSizeInBits() / 8;
3638 SDValue Value, Store;
3640 Value = DAG.getLoad(VT, dl, Chain,
3641 getMemBasePlusOffset(Src, SrcOff, DAG),
3642 SrcPtrInfo.getWithOffset(SrcOff), isVol,
3643 false, false, SrcAlign);
3644 LoadValues.push_back(Value);
3645 LoadChains.push_back(Value.getValue(1));
3648 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3649 &LoadChains[0], LoadChains.size());
3651 for (unsigned i = 0; i < NumMemOps; i++) {
3653 unsigned VTSize = VT.getSizeInBits() / 8;
3654 SDValue Value, Store;
3656 Store = DAG.getStore(Chain, dl, LoadValues[i],
3657 getMemBasePlusOffset(Dst, DstOff, DAG),
3658 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align);
3659 OutChains.push_back(Store);
3663 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3664 &OutChains[0], OutChains.size());
3667 static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
3668 SDValue Chain, SDValue Dst,
3669 SDValue Src, uint64_t Size,
3670 unsigned Align, bool isVol,
3671 MachinePointerInfo DstPtrInfo) {
3672 // Turn a memset of undef to nop.
3673 if (Src.getOpcode() == ISD::UNDEF)
3676 // Expand memset to a series of load/store ops if the size operand
3677 // falls below a certain threshold.
3678 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3679 std::vector<EVT> MemOps;
3680 bool DstAlignCanChange = false;
3681 MachineFunction &MF = DAG.getMachineFunction();
3682 MachineFrameInfo *MFI = MF.getFrameInfo();
3683 bool OptSize = MF.getFunction()->getFnAttributes().
3684 hasAttribute(Attributes::OptimizeForSize);
3685 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3686 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3687 DstAlignCanChange = true;
3689 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
3690 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize),
3691 Size, (DstAlignCanChange ? 0 : Align), 0,
3692 IsZeroVal, false, DAG, TLI))
3695 if (DstAlignCanChange) {
3696 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3697 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
3698 if (NewAlign > Align) {
3699 // Give the stack frame object a larger alignment if needed.
3700 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3701 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3706 SmallVector<SDValue, 8> OutChains;
3707 uint64_t DstOff = 0;
3708 unsigned NumMemOps = MemOps.size();
3710 // Find the largest store and generate the bit pattern for it.
3711 EVT LargestVT = MemOps[0];
3712 for (unsigned i = 1; i < NumMemOps; i++)
3713 if (MemOps[i].bitsGT(LargestVT))
3714 LargestVT = MemOps[i];
3715 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl);
3717 for (unsigned i = 0; i < NumMemOps; i++) {
3720 // If this store is smaller than the largest store see whether we can get
3721 // the smaller value for free with a truncate.
3722 SDValue Value = MemSetValue;
3723 if (VT.bitsLT(LargestVT)) {
3724 if (!LargestVT.isVector() && !VT.isVector() &&
3725 TLI.isTruncateFree(LargestVT, VT))
3726 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue);
3728 Value = getMemsetValue(Src, VT, DAG, dl);
3730 assert(Value.getValueType() == VT && "Value with wrong type.");
3731 SDValue Store = DAG.getStore(Chain, dl, Value,
3732 getMemBasePlusOffset(Dst, DstOff, DAG),
3733 DstPtrInfo.getWithOffset(DstOff),
3734 isVol, false, Align);
3735 OutChains.push_back(Store);
3736 DstOff += VT.getSizeInBits() / 8;
3739 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3740 &OutChains[0], OutChains.size());
3743 SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
3744 SDValue Src, SDValue Size,
3745 unsigned Align, bool isVol, bool AlwaysInline,
3746 MachinePointerInfo DstPtrInfo,
3747 MachinePointerInfo SrcPtrInfo) {
3749 // Check to see if we should lower the memcpy to loads and stores first.
3750 // For cases within the target-specified limits, this is the best choice.
3751 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3753 // Memcpy with size zero? Just return the original chain.
3754 if (ConstantSize->isNullValue())
3757 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3758 ConstantSize->getZExtValue(),Align,
3759 isVol, false, DstPtrInfo, SrcPtrInfo);
3760 if (Result.getNode())
3764 // Then check to see if we should lower the memcpy with target-specific
3765 // code. If the target chooses to do this, this is the next best.
3767 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3768 isVol, AlwaysInline,
3769 DstPtrInfo, SrcPtrInfo);
3770 if (Result.getNode())
3773 // If we really need inline code and the target declined to provide it,
3774 // use a (potentially long) sequence of loads and stores.
3776 assert(ConstantSize && "AlwaysInline requires a constant size!");
3777 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3778 ConstantSize->getZExtValue(), Align, isVol,
3779 true, DstPtrInfo, SrcPtrInfo);
3782 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc
3783 // memcpy is not guaranteed to be safe. libc memcpys aren't required to
3784 // respect volatile, so they may do things like read or write memory
3785 // beyond the given memory regions. But fixing this isn't easy, and most
3786 // people don't care.
3788 // Emit a library call.
3789 TargetLowering::ArgListTy Args;
3790 TargetLowering::ArgListEntry Entry;
3791 Entry.Ty = TLI.getDataLayout()->getIntPtrType(*getContext());
3792 Entry.Node = Dst; Args.push_back(Entry);
3793 Entry.Node = Src; Args.push_back(Entry);
3794 Entry.Node = Size; Args.push_back(Entry);
3795 // FIXME: pass in DebugLoc
3797 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()),
3798 false, false, false, false, 0,
3799 TLI.getLibcallCallingConv(RTLIB::MEMCPY),
3800 /*isTailCall=*/false,
3801 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false,
3802 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY),
3803 TLI.getPointerTy()),
3805 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI);
3807 return CallResult.second;
3810 SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
3811 SDValue Src, SDValue Size,
3812 unsigned Align, bool isVol,
3813 MachinePointerInfo DstPtrInfo,
3814 MachinePointerInfo SrcPtrInfo) {
3816 // Check to see if we should lower the memmove to loads and stores first.
3817 // For cases within the target-specified limits, this is the best choice.
3818 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3820 // Memmove with size zero? Just return the original chain.
3821 if (ConstantSize->isNullValue())
3825 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3826 ConstantSize->getZExtValue(), Align, isVol,
3827 false, DstPtrInfo, SrcPtrInfo);
3828 if (Result.getNode())
3832 // Then check to see if we should lower the memmove with target-specific
3833 // code. If the target chooses to do this, this is the next best.
3835 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3836 DstPtrInfo, SrcPtrInfo);
3837 if (Result.getNode())
3840 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may
3841 // not be safe. See memcpy above for more details.
3843 // Emit a library call.
3844 TargetLowering::ArgListTy Args;
3845 TargetLowering::ArgListEntry Entry;
3846 Entry.Ty = TLI.getDataLayout()->getIntPtrType(*getContext());
3847 Entry.Node = Dst; Args.push_back(Entry);
3848 Entry.Node = Src; Args.push_back(Entry);
3849 Entry.Node = Size; Args.push_back(Entry);
3850 // FIXME: pass in DebugLoc
3852 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()),
3853 false, false, false, false, 0,
3854 TLI.getLibcallCallingConv(RTLIB::MEMMOVE),
3855 /*isTailCall=*/false,
3856 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false,
3857 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE),
3858 TLI.getPointerTy()),
3860 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI);
3862 return CallResult.second;
3865 SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
3866 SDValue Src, SDValue Size,
3867 unsigned Align, bool isVol,
3868 MachinePointerInfo DstPtrInfo) {
3870 // Check to see if we should lower the memset to stores first.
3871 // For cases within the target-specified limits, this is the best choice.
3872 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3874 // Memset with size zero? Just return the original chain.
3875 if (ConstantSize->isNullValue())
3879 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
3880 Align, isVol, DstPtrInfo);
3882 if (Result.getNode())
3886 // Then check to see if we should lower the memset with target-specific
3887 // code. If the target chooses to do this, this is the next best.
3889 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3891 if (Result.getNode())
3894 // Emit a library call.
3895 Type *IntPtrTy = TLI.getDataLayout()->getIntPtrType(*getContext());
3896 TargetLowering::ArgListTy Args;
3897 TargetLowering::ArgListEntry Entry;
3898 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3899 Args.push_back(Entry);
3900 // Extend or truncate the argument to be an i32 value for the call.
3901 if (Src.getValueType().bitsGT(MVT::i32))
3902 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
3904 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
3906 Entry.Ty = Type::getInt32Ty(*getContext());
3907 Entry.isSExt = true;
3908 Args.push_back(Entry);
3910 Entry.Ty = IntPtrTy;
3911 Entry.isSExt = false;
3912 Args.push_back(Entry);
3913 // FIXME: pass in DebugLoc
3915 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()),
3916 false, false, false, false, 0,
3917 TLI.getLibcallCallingConv(RTLIB::MEMSET),
3918 /*isTailCall=*/false,
3919 /*doesNotReturn*/false, /*isReturnValueUsed=*/false,
3920 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET),
3921 TLI.getPointerTy()),
3923 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI);
3925 return CallResult.second;
3928 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3929 SDValue Chain, SDValue Ptr, SDValue Cmp,
3930 SDValue Swp, MachinePointerInfo PtrInfo,
3932 AtomicOrdering Ordering,
3933 SynchronizationScope SynchScope) {
3934 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3935 Alignment = getEVTAlignment(MemVT);
3937 MachineFunction &MF = getMachineFunction();
3939 // All atomics are load and store, except for ATMOIC_LOAD and ATOMIC_STORE.
3940 // For now, atomics are considered to be volatile always.
3941 // FIXME: Volatile isn't really correct; we should keep track of atomic
3942 // orderings in the memoperand.
3943 unsigned Flags = MachineMemOperand::MOVolatile;
3944 if (Opcode != ISD::ATOMIC_STORE)
3945 Flags |= MachineMemOperand::MOLoad;
3946 if (Opcode != ISD::ATOMIC_LOAD)
3947 Flags |= MachineMemOperand::MOStore;
3949 MachineMemOperand *MMO =
3950 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment);
3952 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO,
3953 Ordering, SynchScope);
3956 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3958 SDValue Ptr, SDValue Cmp,
3959 SDValue Swp, MachineMemOperand *MMO,
3960 AtomicOrdering Ordering,
3961 SynchronizationScope SynchScope) {
3962 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3963 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3965 EVT VT = Cmp.getValueType();
3967 SDVTList VTs = getVTList(VT, MVT::Other);
3968 FoldingSetNodeID ID;
3969 ID.AddInteger(MemVT.getRawBits());
3970 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3971 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3972 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
3974 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3975 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3976 return SDValue(E, 0);
3978 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3979 Ptr, Cmp, Swp, MMO, Ordering,
3981 CSEMap.InsertNode(N, IP);
3982 AllNodes.push_back(N);
3983 return SDValue(N, 0);
3986 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3988 SDValue Ptr, SDValue Val,
3989 const Value* PtrVal,
3991 AtomicOrdering Ordering,
3992 SynchronizationScope SynchScope) {
3993 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3994 Alignment = getEVTAlignment(MemVT);
3996 MachineFunction &MF = getMachineFunction();
3997 // An atomic store does not load. An atomic load does not store.
3998 // (An atomicrmw obviously both loads and stores.)
3999 // For now, atomics are considered to be volatile always, and they are
4001 // FIXME: Volatile isn't really correct; we should keep track of atomic
4002 // orderings in the memoperand.
4003 unsigned Flags = MachineMemOperand::MOVolatile;
4004 if (Opcode != ISD::ATOMIC_STORE)
4005 Flags |= MachineMemOperand::MOLoad;
4006 if (Opcode != ISD::ATOMIC_LOAD)
4007 Flags |= MachineMemOperand::MOStore;
4009 MachineMemOperand *MMO =
4010 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
4011 MemVT.getStoreSize(), Alignment);
4013 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO,
4014 Ordering, SynchScope);
4017 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4019 SDValue Ptr, SDValue Val,
4020 MachineMemOperand *MMO,
4021 AtomicOrdering Ordering,
4022 SynchronizationScope SynchScope) {
4023 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
4024 Opcode == ISD::ATOMIC_LOAD_SUB ||
4025 Opcode == ISD::ATOMIC_LOAD_AND ||
4026 Opcode == ISD::ATOMIC_LOAD_OR ||
4027 Opcode == ISD::ATOMIC_LOAD_XOR ||
4028 Opcode == ISD::ATOMIC_LOAD_NAND ||
4029 Opcode == ISD::ATOMIC_LOAD_MIN ||
4030 Opcode == ISD::ATOMIC_LOAD_MAX ||
4031 Opcode == ISD::ATOMIC_LOAD_UMIN ||
4032 Opcode == ISD::ATOMIC_LOAD_UMAX ||
4033 Opcode == ISD::ATOMIC_SWAP ||
4034 Opcode == ISD::ATOMIC_STORE) &&
4035 "Invalid Atomic Op");
4037 EVT VT = Val.getValueType();
4039 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) :
4040 getVTList(VT, MVT::Other);
4041 FoldingSetNodeID ID;
4042 ID.AddInteger(MemVT.getRawBits());
4043 SDValue Ops[] = {Chain, Ptr, Val};
4044 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
4045 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4047 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4048 cast<AtomicSDNode>(E)->refineAlignment(MMO);
4049 return SDValue(E, 0);
4051 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
4053 Ordering, SynchScope);
4054 CSEMap.InsertNode(N, IP);
4055 AllNodes.push_back(N);
4056 return SDValue(N, 0);
4059 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4060 EVT VT, SDValue Chain,
4062 const Value* PtrVal,
4064 AtomicOrdering Ordering,
4065 SynchronizationScope SynchScope) {
4066 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4067 Alignment = getEVTAlignment(MemVT);
4069 MachineFunction &MF = getMachineFunction();
4070 // An atomic store does not load. An atomic load does not store.
4071 // (An atomicrmw obviously both loads and stores.)
4072 // For now, atomics are considered to be volatile always, and they are
4074 // FIXME: Volatile isn't really correct; we should keep track of atomic
4075 // orderings in the memoperand.
4076 unsigned Flags = MachineMemOperand::MOVolatile;
4077 if (Opcode != ISD::ATOMIC_STORE)
4078 Flags |= MachineMemOperand::MOLoad;
4079 if (Opcode != ISD::ATOMIC_LOAD)
4080 Flags |= MachineMemOperand::MOStore;
4082 MachineMemOperand *MMO =
4083 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
4084 MemVT.getStoreSize(), Alignment);
4086 return getAtomic(Opcode, dl, MemVT, VT, Chain, Ptr, MMO,
4087 Ordering, SynchScope);
4090 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4091 EVT VT, SDValue Chain,
4093 MachineMemOperand *MMO,
4094 AtomicOrdering Ordering,
4095 SynchronizationScope SynchScope) {
4096 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op");
4098 SDVTList VTs = getVTList(VT, MVT::Other);
4099 FoldingSetNodeID ID;
4100 ID.AddInteger(MemVT.getRawBits());
4101 SDValue Ops[] = {Chain, Ptr};
4102 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
4103 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4105 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4106 cast<AtomicSDNode>(E)->refineAlignment(MMO);
4107 return SDValue(E, 0);
4109 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
4110 Ptr, MMO, Ordering, SynchScope);
4111 CSEMap.InsertNode(N, IP);
4112 AllNodes.push_back(N);
4113 return SDValue(N, 0);
4116 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
4117 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
4122 SmallVector<EVT, 4> VTs;
4123 VTs.reserve(NumOps);
4124 for (unsigned i = 0; i < NumOps; ++i)
4125 VTs.push_back(Ops[i].getValueType());
4126 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
4131 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
4132 const EVT *VTs, unsigned NumVTs,
4133 const SDValue *Ops, unsigned NumOps,
4134 EVT MemVT, MachinePointerInfo PtrInfo,
4135 unsigned Align, bool Vol,
4136 bool ReadMem, bool WriteMem) {
4137 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
4138 MemVT, PtrInfo, Align, Vol,
4143 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
4144 const SDValue *Ops, unsigned NumOps,
4145 EVT MemVT, MachinePointerInfo PtrInfo,
4146 unsigned Align, bool Vol,
4147 bool ReadMem, bool WriteMem) {
4148 if (Align == 0) // Ensure that codegen never sees alignment 0
4149 Align = getEVTAlignment(MemVT);
4151 MachineFunction &MF = getMachineFunction();
4154 Flags |= MachineMemOperand::MOStore;
4156 Flags |= MachineMemOperand::MOLoad;
4158 Flags |= MachineMemOperand::MOVolatile;
4159 MachineMemOperand *MMO =
4160 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align);
4162 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
4166 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
4167 const SDValue *Ops, unsigned NumOps,
4168 EVT MemVT, MachineMemOperand *MMO) {
4169 assert((Opcode == ISD::INTRINSIC_VOID ||
4170 Opcode == ISD::INTRINSIC_W_CHAIN ||
4171 Opcode == ISD::PREFETCH ||
4172 Opcode == ISD::LIFETIME_START ||
4173 Opcode == ISD::LIFETIME_END ||
4174 (Opcode <= INT_MAX &&
4175 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
4176 "Opcode is not a memory-accessing opcode!");
4178 // Memoize the node unless it returns a flag.
4179 MemIntrinsicSDNode *N;
4180 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4181 FoldingSetNodeID ID;
4182 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4183 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4185 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4186 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
4187 return SDValue(E, 0);
4190 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
4192 CSEMap.InsertNode(N, IP);
4194 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
4197 AllNodes.push_back(N);
4198 return SDValue(N, 0);
4201 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4202 /// MachinePointerInfo record from it. This is particularly useful because the
4203 /// code generator has many cases where it doesn't bother passing in a
4204 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4205 static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) {
4206 // If this is FI+Offset, we can model it.
4207 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr))
4208 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset);
4210 // If this is (FI+Offset1)+Offset2, we can model it.
4211 if (Ptr.getOpcode() != ISD::ADD ||
4212 !isa<ConstantSDNode>(Ptr.getOperand(1)) ||
4213 !isa<FrameIndexSDNode>(Ptr.getOperand(0)))
4214 return MachinePointerInfo();
4216 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
4217 return MachinePointerInfo::getFixedStack(FI, Offset+
4218 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue());
4221 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4222 /// MachinePointerInfo record from it. This is particularly useful because the
4223 /// code generator has many cases where it doesn't bother passing in a
4224 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4225 static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) {
4226 // If the 'Offset' value isn't a constant, we can't handle this.
4227 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp))
4228 return InferPointerInfo(Ptr, OffsetNode->getSExtValue());
4229 if (OffsetOp.getOpcode() == ISD::UNDEF)
4230 return InferPointerInfo(Ptr);
4231 return MachinePointerInfo();
4236 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4237 EVT VT, DebugLoc dl, SDValue Chain,
4238 SDValue Ptr, SDValue Offset,
4239 MachinePointerInfo PtrInfo, EVT MemVT,
4240 bool isVolatile, bool isNonTemporal, bool isInvariant,
4241 unsigned Alignment, const MDNode *TBAAInfo,
4242 const MDNode *Ranges) {
4243 assert(Chain.getValueType() == MVT::Other &&
4244 "Invalid chain type");
4245 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4246 Alignment = getEVTAlignment(VT);
4248 unsigned Flags = MachineMemOperand::MOLoad;
4250 Flags |= MachineMemOperand::MOVolatile;
4252 Flags |= MachineMemOperand::MONonTemporal;
4254 Flags |= MachineMemOperand::MOInvariant;
4256 // If we don't have a PtrInfo, infer the trivial frame index case to simplify
4259 PtrInfo = InferPointerInfo(Ptr, Offset);
4261 MachineFunction &MF = getMachineFunction();
4262 MachineMemOperand *MMO =
4263 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment,
4265 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO);
4269 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4270 EVT VT, DebugLoc dl, SDValue Chain,
4271 SDValue Ptr, SDValue Offset, EVT MemVT,
4272 MachineMemOperand *MMO) {
4274 ExtType = ISD::NON_EXTLOAD;
4275 } else if (ExtType == ISD::NON_EXTLOAD) {
4276 assert(VT == MemVT && "Non-extending load from different memory type!");
4279 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
4280 "Should only be an extending load, not truncating!");
4281 assert(VT.isInteger() == MemVT.isInteger() &&
4282 "Cannot convert from FP to Int or Int -> FP!");
4283 assert(VT.isVector() == MemVT.isVector() &&
4284 "Cannot use trunc store to convert to or from a vector!");
4285 assert((!VT.isVector() ||
4286 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
4287 "Cannot use trunc store to change the number of vector elements!");
4290 bool Indexed = AM != ISD::UNINDEXED;
4291 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
4292 "Unindexed load with an offset!");
4294 SDVTList VTs = Indexed ?
4295 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
4296 SDValue Ops[] = { Chain, Ptr, Offset };
4297 FoldingSetNodeID ID;
4298 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
4299 ID.AddInteger(MemVT.getRawBits());
4300 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
4301 MMO->isNonTemporal(),
4302 MMO->isInvariant()));
4303 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4305 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4306 cast<LoadSDNode>(E)->refineAlignment(MMO);
4307 return SDValue(E, 0);
4309 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType,
4311 CSEMap.InsertNode(N, IP);
4312 AllNodes.push_back(N);
4313 return SDValue(N, 0);
4316 SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl,
4317 SDValue Chain, SDValue Ptr,
4318 MachinePointerInfo PtrInfo,
4319 bool isVolatile, bool isNonTemporal,
4320 bool isInvariant, unsigned Alignment,
4321 const MDNode *TBAAInfo,
4322 const MDNode *Ranges) {
4323 SDValue Undef = getUNDEF(Ptr.getValueType());
4324 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
4325 PtrInfo, VT, isVolatile, isNonTemporal, isInvariant, Alignment,
4329 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT,
4330 SDValue Chain, SDValue Ptr,
4331 MachinePointerInfo PtrInfo, EVT MemVT,
4332 bool isVolatile, bool isNonTemporal,
4333 unsigned Alignment, const MDNode *TBAAInfo) {
4334 SDValue Undef = getUNDEF(Ptr.getValueType());
4335 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
4336 PtrInfo, MemVT, isVolatile, isNonTemporal, false, Alignment,
4342 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
4343 SDValue Offset, ISD::MemIndexedMode AM) {
4344 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
4345 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
4346 "Load is already a indexed load!");
4347 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl,
4348 LD->getChain(), Base, Offset, LD->getPointerInfo(),
4349 LD->getMemoryVT(), LD->isVolatile(), LD->isNonTemporal(),
4350 false, LD->getAlignment());
4353 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4354 SDValue Ptr, MachinePointerInfo PtrInfo,
4355 bool isVolatile, bool isNonTemporal,
4356 unsigned Alignment, const MDNode *TBAAInfo) {
4357 assert(Chain.getValueType() == MVT::Other &&
4358 "Invalid chain type");
4359 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4360 Alignment = getEVTAlignment(Val.getValueType());
4362 unsigned Flags = MachineMemOperand::MOStore;
4364 Flags |= MachineMemOperand::MOVolatile;
4366 Flags |= MachineMemOperand::MONonTemporal;
4369 PtrInfo = InferPointerInfo(Ptr);
4371 MachineFunction &MF = getMachineFunction();
4372 MachineMemOperand *MMO =
4373 MF.getMachineMemOperand(PtrInfo, Flags,
4374 Val.getValueType().getStoreSize(), Alignment,
4377 return getStore(Chain, dl, Val, Ptr, MMO);
4380 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4381 SDValue Ptr, MachineMemOperand *MMO) {
4382 assert(Chain.getValueType() == MVT::Other &&
4383 "Invalid chain type");
4384 EVT VT = Val.getValueType();
4385 SDVTList VTs = getVTList(MVT::Other);
4386 SDValue Undef = getUNDEF(Ptr.getValueType());
4387 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4388 FoldingSetNodeID ID;
4389 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4390 ID.AddInteger(VT.getRawBits());
4391 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
4392 MMO->isNonTemporal(), MMO->isInvariant()));
4393 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4395 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4396 cast<StoreSDNode>(E)->refineAlignment(MMO);
4397 return SDValue(E, 0);
4399 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4401 CSEMap.InsertNode(N, IP);
4402 AllNodes.push_back(N);
4403 return SDValue(N, 0);
4406 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4407 SDValue Ptr, MachinePointerInfo PtrInfo,
4408 EVT SVT,bool isVolatile, bool isNonTemporal,
4410 const MDNode *TBAAInfo) {
4411 assert(Chain.getValueType() == MVT::Other &&
4412 "Invalid chain type");
4413 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4414 Alignment = getEVTAlignment(SVT);
4416 unsigned Flags = MachineMemOperand::MOStore;
4418 Flags |= MachineMemOperand::MOVolatile;
4420 Flags |= MachineMemOperand::MONonTemporal;
4423 PtrInfo = InferPointerInfo(Ptr);
4425 MachineFunction &MF = getMachineFunction();
4426 MachineMemOperand *MMO =
4427 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment,
4430 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
4433 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4434 SDValue Ptr, EVT SVT,
4435 MachineMemOperand *MMO) {
4436 EVT VT = Val.getValueType();
4438 assert(Chain.getValueType() == MVT::Other &&
4439 "Invalid chain type");
4441 return getStore(Chain, dl, Val, Ptr, MMO);
4443 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
4444 "Should only be a truncating store, not extending!");
4445 assert(VT.isInteger() == SVT.isInteger() &&
4446 "Can't do FP-INT conversion!");
4447 assert(VT.isVector() == SVT.isVector() &&
4448 "Cannot use trunc store to convert to or from a vector!");
4449 assert((!VT.isVector() ||
4450 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
4451 "Cannot use trunc store to change the number of vector elements!");
4453 SDVTList VTs = getVTList(MVT::Other);
4454 SDValue Undef = getUNDEF(Ptr.getValueType());
4455 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4456 FoldingSetNodeID ID;
4457 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4458 ID.AddInteger(SVT.getRawBits());
4459 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
4460 MMO->isNonTemporal(), MMO->isInvariant()));
4461 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4463 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4464 cast<StoreSDNode>(E)->refineAlignment(MMO);
4465 return SDValue(E, 0);
4467 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4469 CSEMap.InsertNode(N, IP);
4470 AllNodes.push_back(N);
4471 return SDValue(N, 0);
4475 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
4476 SDValue Offset, ISD::MemIndexedMode AM) {
4477 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
4478 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
4479 "Store is already a indexed store!");
4480 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
4481 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
4482 FoldingSetNodeID ID;
4483 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4484 ID.AddInteger(ST->getMemoryVT().getRawBits());
4485 ID.AddInteger(ST->getRawSubclassData());
4486 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
4488 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4489 return SDValue(E, 0);
4491 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM,
4492 ST->isTruncatingStore(),
4494 ST->getMemOperand());
4495 CSEMap.InsertNode(N, IP);
4496 AllNodes.push_back(N);
4497 return SDValue(N, 0);
4500 SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl,
4501 SDValue Chain, SDValue Ptr,
4504 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) };
4505 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4);
4508 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4509 const SDUse *Ops, unsigned NumOps) {
4511 case 0: return getNode(Opcode, DL, VT);
4512 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4513 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4514 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4518 // Copy from an SDUse array into an SDValue array for use with
4519 // the regular getNode logic.
4520 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
4521 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
4524 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4525 const SDValue *Ops, unsigned NumOps) {
4527 case 0: return getNode(Opcode, DL, VT);
4528 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4529 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4530 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4536 case ISD::SELECT_CC: {
4537 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
4538 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
4539 "LHS and RHS of condition must have same type!");
4540 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4541 "True and False arms of SelectCC must have same type!");
4542 assert(Ops[2].getValueType() == VT &&
4543 "select_cc node must be of same type as true and false value!");
4547 assert(NumOps == 5 && "BR_CC takes 5 operands!");
4548 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4549 "LHS/RHS of comparison should match types!");
4556 SDVTList VTs = getVTList(VT);
4558 if (VT != MVT::Glue) {
4559 FoldingSetNodeID ID;
4560 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
4563 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4564 return SDValue(E, 0);
4566 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4567 CSEMap.InsertNode(N, IP);
4569 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4572 AllNodes.push_back(N);
4576 return SDValue(N, 0);
4579 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4580 const std::vector<EVT> &ResultTys,
4581 const SDValue *Ops, unsigned NumOps) {
4582 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
4586 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4587 const EVT *VTs, unsigned NumVTs,
4588 const SDValue *Ops, unsigned NumOps) {
4590 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
4591 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
4594 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4595 const SDValue *Ops, unsigned NumOps) {
4596 if (VTList.NumVTs == 1)
4597 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
4601 // FIXME: figure out how to safely handle things like
4602 // int foo(int x) { return 1 << (x & 255); }
4603 // int bar() { return foo(256); }
4604 case ISD::SRA_PARTS:
4605 case ISD::SRL_PARTS:
4606 case ISD::SHL_PARTS:
4607 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
4608 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
4609 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4610 else if (N3.getOpcode() == ISD::AND)
4611 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
4612 // If the and is only masking out bits that cannot effect the shift,
4613 // eliminate the and.
4614 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
4615 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
4616 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4622 // Memoize the node unless it returns a flag.
4624 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4625 FoldingSetNodeID ID;
4626 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4628 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4629 return SDValue(E, 0);
4632 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4633 } else if (NumOps == 2) {
4634 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4635 } else if (NumOps == 3) {
4636 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4639 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4641 CSEMap.InsertNode(N, IP);
4644 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4645 } else if (NumOps == 2) {
4646 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4647 } else if (NumOps == 3) {
4648 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4651 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4654 AllNodes.push_back(N);
4658 return SDValue(N, 0);
4661 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
4662 return getNode(Opcode, DL, VTList, 0, 0);
4665 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4667 SDValue Ops[] = { N1 };
4668 return getNode(Opcode, DL, VTList, Ops, 1);
4671 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4672 SDValue N1, SDValue N2) {
4673 SDValue Ops[] = { N1, N2 };
4674 return getNode(Opcode, DL, VTList, Ops, 2);
4677 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4678 SDValue N1, SDValue N2, SDValue N3) {
4679 SDValue Ops[] = { N1, N2, N3 };
4680 return getNode(Opcode, DL, VTList, Ops, 3);
4683 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4684 SDValue N1, SDValue N2, SDValue N3,
4686 SDValue Ops[] = { N1, N2, N3, N4 };
4687 return getNode(Opcode, DL, VTList, Ops, 4);
4690 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4691 SDValue N1, SDValue N2, SDValue N3,
4692 SDValue N4, SDValue N5) {
4693 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4694 return getNode(Opcode, DL, VTList, Ops, 5);
4697 SDVTList SelectionDAG::getVTList(EVT VT) {
4698 return makeVTList(SDNode::getValueTypeList(VT), 1);
4701 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
4702 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4703 E = VTList.rend(); I != E; ++I)
4704 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4707 EVT *Array = Allocator.Allocate<EVT>(2);
4710 SDVTList Result = makeVTList(Array, 2);
4711 VTList.push_back(Result);
4715 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
4716 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4717 E = VTList.rend(); I != E; ++I)
4718 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4722 EVT *Array = Allocator.Allocate<EVT>(3);
4726 SDVTList Result = makeVTList(Array, 3);
4727 VTList.push_back(Result);
4731 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
4732 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4733 E = VTList.rend(); I != E; ++I)
4734 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4735 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4738 EVT *Array = Allocator.Allocate<EVT>(4);
4743 SDVTList Result = makeVTList(Array, 4);
4744 VTList.push_back(Result);
4748 SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) {
4750 case 0: llvm_unreachable("Cannot have nodes without results!");
4751 case 1: return getVTList(VTs[0]);
4752 case 2: return getVTList(VTs[0], VTs[1]);
4753 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4754 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]);
4758 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4759 E = VTList.rend(); I != E; ++I) {
4760 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4763 if (std::equal(&VTs[2], &VTs[NumVTs], &I->VTs[2]))
4767 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
4768 std::copy(VTs, VTs+NumVTs, Array);
4769 SDVTList Result = makeVTList(Array, NumVTs);
4770 VTList.push_back(Result);
4775 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4776 /// specified operands. If the resultant node already exists in the DAG,
4777 /// this does not modify the specified node, instead it returns the node that
4778 /// already exists. If the resultant node does not exist in the DAG, the
4779 /// input node is returned. As a degenerate case, if you specify the same
4780 /// input operands as the node already has, the input node is returned.
4781 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) {
4782 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4784 // Check to see if there is no change.
4785 if (Op == N->getOperand(0)) return N;
4787 // See if the modified node already exists.
4788 void *InsertPos = 0;
4789 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4792 // Nope it doesn't. Remove the node from its current place in the maps.
4794 if (!RemoveNodeFromCSEMaps(N))
4797 // Now we update the operands.
4798 N->OperandList[0].set(Op);
4800 // If this gets put into a CSE map, add it.
4801 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4805 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) {
4806 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4808 // Check to see if there is no change.
4809 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4810 return N; // No operands changed, just return the input node.
4812 // See if the modified node already exists.
4813 void *InsertPos = 0;
4814 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4817 // Nope it doesn't. Remove the node from its current place in the maps.
4819 if (!RemoveNodeFromCSEMaps(N))
4822 // Now we update the operands.
4823 if (N->OperandList[0] != Op1)
4824 N->OperandList[0].set(Op1);
4825 if (N->OperandList[1] != Op2)
4826 N->OperandList[1].set(Op2);
4828 // If this gets put into a CSE map, add it.
4829 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4833 SDNode *SelectionDAG::
4834 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) {
4835 SDValue Ops[] = { Op1, Op2, Op3 };
4836 return UpdateNodeOperands(N, Ops, 3);
4839 SDNode *SelectionDAG::
4840 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4841 SDValue Op3, SDValue Op4) {
4842 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4843 return UpdateNodeOperands(N, Ops, 4);
4846 SDNode *SelectionDAG::
4847 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4848 SDValue Op3, SDValue Op4, SDValue Op5) {
4849 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4850 return UpdateNodeOperands(N, Ops, 5);
4853 SDNode *SelectionDAG::
4854 UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) {
4855 assert(N->getNumOperands() == NumOps &&
4856 "Update with wrong number of operands");
4858 // Check to see if there is no change.
4859 bool AnyChange = false;
4860 for (unsigned i = 0; i != NumOps; ++i) {
4861 if (Ops[i] != N->getOperand(i)) {
4867 // No operands changed, just return the input node.
4868 if (!AnyChange) return N;
4870 // See if the modified node already exists.
4871 void *InsertPos = 0;
4872 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4875 // Nope it doesn't. Remove the node from its current place in the maps.
4877 if (!RemoveNodeFromCSEMaps(N))
4880 // Now we update the operands.
4881 for (unsigned i = 0; i != NumOps; ++i)
4882 if (N->OperandList[i] != Ops[i])
4883 N->OperandList[i].set(Ops[i]);
4885 // If this gets put into a CSE map, add it.
4886 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4890 /// DropOperands - Release the operands and set this node to have
4892 void SDNode::DropOperands() {
4893 // Unlike the code in MorphNodeTo that does this, we don't need to
4894 // watch for dead nodes here.
4895 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4901 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4904 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4906 SDVTList VTs = getVTList(VT);
4907 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4910 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4911 EVT VT, SDValue Op1) {
4912 SDVTList VTs = getVTList(VT);
4913 SDValue Ops[] = { Op1 };
4914 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4917 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4918 EVT VT, SDValue Op1,
4920 SDVTList VTs = getVTList(VT);
4921 SDValue Ops[] = { Op1, Op2 };
4922 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4925 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4926 EVT VT, SDValue Op1,
4927 SDValue Op2, SDValue Op3) {
4928 SDVTList VTs = getVTList(VT);
4929 SDValue Ops[] = { Op1, Op2, Op3 };
4930 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4933 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4934 EVT VT, const SDValue *Ops,
4936 SDVTList VTs = getVTList(VT);
4937 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4940 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4941 EVT VT1, EVT VT2, const SDValue *Ops,
4943 SDVTList VTs = getVTList(VT1, VT2);
4944 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4947 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4949 SDVTList VTs = getVTList(VT1, VT2);
4950 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4953 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4954 EVT VT1, EVT VT2, EVT VT3,
4955 const SDValue *Ops, unsigned NumOps) {
4956 SDVTList VTs = getVTList(VT1, VT2, VT3);
4957 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4960 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4961 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
4962 const SDValue *Ops, unsigned NumOps) {
4963 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4964 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4967 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4970 SDVTList VTs = getVTList(VT1, VT2);
4971 SDValue Ops[] = { Op1 };
4972 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4975 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4977 SDValue Op1, SDValue Op2) {
4978 SDVTList VTs = getVTList(VT1, VT2);
4979 SDValue Ops[] = { Op1, Op2 };
4980 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4983 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4985 SDValue Op1, SDValue Op2,
4987 SDVTList VTs = getVTList(VT1, VT2);
4988 SDValue Ops[] = { Op1, Op2, Op3 };
4989 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4992 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4993 EVT VT1, EVT VT2, EVT VT3,
4994 SDValue Op1, SDValue Op2,
4996 SDVTList VTs = getVTList(VT1, VT2, VT3);
4997 SDValue Ops[] = { Op1, Op2, Op3 };
4998 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
5001 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5002 SDVTList VTs, const SDValue *Ops,
5004 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
5005 // Reset the NodeID to -1.
5010 /// UpdadeDebugLocOnMergedSDNode - If the opt level is -O0 then it throws away
5011 /// the line number information on the merged node since it is not possible to
5012 /// preserve the information that operation is associated with multiple lines.
5013 /// This will make the debugger working better at -O0, were there is a higher
5014 /// probability having other instructions associated with that line.
5016 SDNode *SelectionDAG::UpdadeDebugLocOnMergedSDNode(SDNode *N, DebugLoc OLoc) {
5017 DebugLoc NLoc = N->getDebugLoc();
5018 if (!(NLoc.isUnknown()) && (OptLevel == CodeGenOpt::None) && (OLoc != NLoc)) {
5019 N->setDebugLoc(DebugLoc());
5024 /// MorphNodeTo - This *mutates* the specified node to have the specified
5025 /// return type, opcode, and operands.
5027 /// Note that MorphNodeTo returns the resultant node. If there is already a
5028 /// node of the specified opcode and operands, it returns that node instead of
5029 /// the current one. Note that the DebugLoc need not be the same.
5031 /// Using MorphNodeTo is faster than creating a new node and swapping it in
5032 /// with ReplaceAllUsesWith both because it often avoids allocating a new
5033 /// node, and because it doesn't require CSE recalculation for any of
5034 /// the node's users.
5036 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
5037 SDVTList VTs, const SDValue *Ops,
5039 // If an identical node already exists, use it.
5041 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) {
5042 FoldingSetNodeID ID;
5043 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
5044 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
5045 return UpdadeDebugLocOnMergedSDNode(ON, N->getDebugLoc());
5048 if (!RemoveNodeFromCSEMaps(N))
5051 // Start the morphing.
5053 N->ValueList = VTs.VTs;
5054 N->NumValues = VTs.NumVTs;
5056 // Clear the operands list, updating used nodes to remove this from their
5057 // use list. Keep track of any operands that become dead as a result.
5058 SmallPtrSet<SDNode*, 16> DeadNodeSet;
5059 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
5061 SDNode *Used = Use.getNode();
5063 if (Used->use_empty())
5064 DeadNodeSet.insert(Used);
5067 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
5068 // Initialize the memory references information.
5069 MN->setMemRefs(0, 0);
5070 // If NumOps is larger than the # of operands we can have in a
5071 // MachineSDNode, reallocate the operand list.
5072 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
5073 if (MN->OperandsNeedDelete)
5074 delete[] MN->OperandList;
5075 if (NumOps > array_lengthof(MN->LocalOperands))
5076 // We're creating a final node that will live unmorphed for the
5077 // remainder of the current SelectionDAG iteration, so we can allocate
5078 // the operands directly out of a pool with no recycling metadata.
5079 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5082 MN->InitOperands(MN->LocalOperands, Ops, NumOps);
5083 MN->OperandsNeedDelete = false;
5085 MN->InitOperands(MN->OperandList, Ops, NumOps);
5087 // If NumOps is larger than the # of operands we currently have, reallocate
5088 // the operand list.
5089 if (NumOps > N->NumOperands) {
5090 if (N->OperandsNeedDelete)
5091 delete[] N->OperandList;
5092 N->InitOperands(new SDUse[NumOps], Ops, NumOps);
5093 N->OperandsNeedDelete = true;
5095 N->InitOperands(N->OperandList, Ops, NumOps);
5098 // Delete any nodes that are still dead after adding the uses for the
5100 if (!DeadNodeSet.empty()) {
5101 SmallVector<SDNode *, 16> DeadNodes;
5102 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
5103 E = DeadNodeSet.end(); I != E; ++I)
5104 if ((*I)->use_empty())
5105 DeadNodes.push_back(*I);
5106 RemoveDeadNodes(DeadNodes);
5110 CSEMap.InsertNode(N, IP); // Memoize the new node.
5115 /// getMachineNode - These are used for target selectors to create a new node
5116 /// with specified return type(s), MachineInstr opcode, and operands.
5118 /// Note that getMachineNode returns the resultant node. If there is already a
5119 /// node of the specified opcode and operands, it returns that node instead of
5120 /// the current one.
5122 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) {
5123 SDVTList VTs = getVTList(VT);
5124 return getMachineNode(Opcode, dl, VTs, 0, 0);
5128 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) {
5129 SDVTList VTs = getVTList(VT);
5130 SDValue Ops[] = { Op1 };
5131 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5135 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5136 SDValue Op1, SDValue Op2) {
5137 SDVTList VTs = getVTList(VT);
5138 SDValue Ops[] = { Op1, Op2 };
5139 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5143 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5144 SDValue Op1, SDValue Op2, SDValue Op3) {
5145 SDVTList VTs = getVTList(VT);
5146 SDValue Ops[] = { Op1, Op2, Op3 };
5147 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5151 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5152 const SDValue *Ops, unsigned NumOps) {
5153 SDVTList VTs = getVTList(VT);
5154 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5158 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) {
5159 SDVTList VTs = getVTList(VT1, VT2);
5160 return getMachineNode(Opcode, dl, VTs, 0, 0);
5164 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5165 EVT VT1, EVT VT2, SDValue Op1) {
5166 SDVTList VTs = getVTList(VT1, VT2);
5167 SDValue Ops[] = { Op1 };
5168 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5172 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5173 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
5174 SDVTList VTs = getVTList(VT1, VT2);
5175 SDValue Ops[] = { Op1, Op2 };
5176 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5180 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5181 EVT VT1, EVT VT2, SDValue Op1,
5182 SDValue Op2, SDValue Op3) {
5183 SDVTList VTs = getVTList(VT1, VT2);
5184 SDValue Ops[] = { Op1, Op2, Op3 };
5185 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5189 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5191 const SDValue *Ops, unsigned NumOps) {
5192 SDVTList VTs = getVTList(VT1, VT2);
5193 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5197 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5198 EVT VT1, EVT VT2, EVT VT3,
5199 SDValue Op1, SDValue Op2) {
5200 SDVTList VTs = getVTList(VT1, VT2, VT3);
5201 SDValue Ops[] = { Op1, Op2 };
5202 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5206 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5207 EVT VT1, EVT VT2, EVT VT3,
5208 SDValue Op1, SDValue Op2, SDValue Op3) {
5209 SDVTList VTs = getVTList(VT1, VT2, VT3);
5210 SDValue Ops[] = { Op1, Op2, Op3 };
5211 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5215 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5216 EVT VT1, EVT VT2, EVT VT3,
5217 const SDValue *Ops, unsigned NumOps) {
5218 SDVTList VTs = getVTList(VT1, VT2, VT3);
5219 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5223 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
5224 EVT VT2, EVT VT3, EVT VT4,
5225 const SDValue *Ops, unsigned NumOps) {
5226 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
5227 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5231 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5232 const std::vector<EVT> &ResultTys,
5233 const SDValue *Ops, unsigned NumOps) {
5234 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size());
5235 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5239 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs,
5240 const SDValue *Ops, unsigned NumOps) {
5241 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue;
5246 FoldingSetNodeID ID;
5247 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps);
5249 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
5250 return cast<MachineSDNode>(UpdadeDebugLocOnMergedSDNode(E, DL));
5254 // Allocate a new MachineSDNode.
5255 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs);
5257 // Initialize the operands list.
5258 if (NumOps > array_lengthof(N->LocalOperands))
5259 // We're creating a final node that will live unmorphed for the
5260 // remainder of the current SelectionDAG iteration, so we can allocate
5261 // the operands directly out of a pool with no recycling metadata.
5262 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5265 N->InitOperands(N->LocalOperands, Ops, NumOps);
5266 N->OperandsNeedDelete = false;
5269 CSEMap.InsertNode(N, IP);
5271 AllNodes.push_back(N);
5273 VerifyMachineNode(N);
5278 /// getTargetExtractSubreg - A convenience function for creating
5279 /// TargetOpcode::EXTRACT_SUBREG nodes.
5281 SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT,
5283 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5284 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
5285 VT, Operand, SRIdxVal);
5286 return SDValue(Subreg, 0);
5289 /// getTargetInsertSubreg - A convenience function for creating
5290 /// TargetOpcode::INSERT_SUBREG nodes.
5292 SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT,
5293 SDValue Operand, SDValue Subreg) {
5294 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5295 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
5296 VT, Operand, Subreg, SRIdxVal);
5297 return SDValue(Result, 0);
5300 /// getNodeIfExists - Get the specified node if it's already available, or
5301 /// else return NULL.
5302 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
5303 const SDValue *Ops, unsigned NumOps) {
5304 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
5305 FoldingSetNodeID ID;
5306 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
5308 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5314 /// getDbgValue - Creates a SDDbgValue node.
5317 SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off,
5318 DebugLoc DL, unsigned O) {
5319 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O);
5323 SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off,
5324 DebugLoc DL, unsigned O) {
5325 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O);
5329 SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off,
5330 DebugLoc DL, unsigned O) {
5331 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O);
5336 /// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node
5337 /// pointed to by a use iterator is deleted, increment the use iterator
5338 /// so that it doesn't dangle.
5340 class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
5341 SDNode::use_iterator &UI;
5342 SDNode::use_iterator &UE;
5344 virtual void NodeDeleted(SDNode *N, SDNode *E) {
5345 // Increment the iterator as needed.
5346 while (UI != UE && N == *UI)
5351 RAUWUpdateListener(SelectionDAG &d,
5352 SDNode::use_iterator &ui,
5353 SDNode::use_iterator &ue)
5354 : SelectionDAG::DAGUpdateListener(d), UI(ui), UE(ue) {}
5359 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5360 /// This can cause recursive merging of nodes in the DAG.
5362 /// This version assumes From has a single result value.
5364 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To) {
5365 SDNode *From = FromN.getNode();
5366 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
5367 "Cannot replace with this method!");
5368 assert(From != To.getNode() && "Cannot replace uses of with self");
5370 // Iterate over all the existing uses of From. New uses will be added
5371 // to the beginning of the use list, which we avoid visiting.
5372 // This specifically avoids visiting uses of From that arise while the
5373 // replacement is happening, because any such uses would be the result
5374 // of CSE: If an existing node looks like From after one of its operands
5375 // is replaced by To, we don't want to replace of all its users with To
5376 // too. See PR3018 for more info.
5377 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5378 RAUWUpdateListener Listener(*this, UI, UE);
5382 // This node is about to morph, remove its old self from the CSE maps.
5383 RemoveNodeFromCSEMaps(User);
5385 // A user can appear in a use list multiple times, and when this
5386 // happens the uses are usually next to each other in the list.
5387 // To help reduce the number of CSE recomputations, process all
5388 // the uses of this user that we can find this way.
5390 SDUse &Use = UI.getUse();
5393 } while (UI != UE && *UI == User);
5395 // Now that we have modified User, add it back to the CSE maps. If it
5396 // already exists there, recursively merge the results together.
5397 AddModifiedNodeToCSEMaps(User);
5400 // If we just RAUW'd the root, take note.
5401 if (FromN == getRoot())
5405 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5406 /// This can cause recursive merging of nodes in the DAG.
5408 /// This version assumes that for each value of From, there is a
5409 /// corresponding value in To in the same position with the same type.
5411 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To) {
5413 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
5414 assert((!From->hasAnyUseOfValue(i) ||
5415 From->getValueType(i) == To->getValueType(i)) &&
5416 "Cannot use this version of ReplaceAllUsesWith!");
5419 // Handle the trivial case.
5423 // Iterate over just the existing users of From. See the comments in
5424 // the ReplaceAllUsesWith above.
5425 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5426 RAUWUpdateListener Listener(*this, UI, UE);
5430 // This node is about to morph, remove its old self from the CSE maps.
5431 RemoveNodeFromCSEMaps(User);
5433 // A user can appear in a use list multiple times, and when this
5434 // happens the uses are usually next to each other in the list.
5435 // To help reduce the number of CSE recomputations, process all
5436 // the uses of this user that we can find this way.
5438 SDUse &Use = UI.getUse();
5441 } while (UI != UE && *UI == User);
5443 // Now that we have modified User, add it back to the CSE maps. If it
5444 // already exists there, recursively merge the results together.
5445 AddModifiedNodeToCSEMaps(User);
5448 // If we just RAUW'd the root, take note.
5449 if (From == getRoot().getNode())
5450 setRoot(SDValue(To, getRoot().getResNo()));
5453 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5454 /// This can cause recursive merging of nodes in the DAG.
5456 /// This version can replace From with any result values. To must match the
5457 /// number and types of values returned by From.
5458 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, const SDValue *To) {
5459 if (From->getNumValues() == 1) // Handle the simple case efficiently.
5460 return ReplaceAllUsesWith(SDValue(From, 0), To[0]);
5462 // Iterate over just the existing users of From. See the comments in
5463 // the ReplaceAllUsesWith above.
5464 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5465 RAUWUpdateListener Listener(*this, UI, UE);
5469 // This node is about to morph, remove its old self from the CSE maps.
5470 RemoveNodeFromCSEMaps(User);
5472 // A user can appear in a use list multiple times, and when this
5473 // happens the uses are usually next to each other in the list.
5474 // To help reduce the number of CSE recomputations, process all
5475 // the uses of this user that we can find this way.
5477 SDUse &Use = UI.getUse();
5478 const SDValue &ToOp = To[Use.getResNo()];
5481 } while (UI != UE && *UI == User);
5483 // Now that we have modified User, add it back to the CSE maps. If it
5484 // already exists there, recursively merge the results together.
5485 AddModifiedNodeToCSEMaps(User);
5488 // If we just RAUW'd the root, take note.
5489 if (From == getRoot().getNode())
5490 setRoot(SDValue(To[getRoot().getResNo()]));
5493 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
5494 /// uses of other values produced by From.getNode() alone. The Deleted
5495 /// vector is handled the same way as for ReplaceAllUsesWith.
5496 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To){
5497 // Handle the really simple, really trivial case efficiently.
5498 if (From == To) return;
5500 // Handle the simple, trivial, case efficiently.
5501 if (From.getNode()->getNumValues() == 1) {
5502 ReplaceAllUsesWith(From, To);
5506 // Iterate over just the existing users of From. See the comments in
5507 // the ReplaceAllUsesWith above.
5508 SDNode::use_iterator UI = From.getNode()->use_begin(),
5509 UE = From.getNode()->use_end();
5510 RAUWUpdateListener Listener(*this, UI, UE);
5513 bool UserRemovedFromCSEMaps = false;
5515 // A user can appear in a use list multiple times, and when this
5516 // happens the uses are usually next to each other in the list.
5517 // To help reduce the number of CSE recomputations, process all
5518 // the uses of this user that we can find this way.
5520 SDUse &Use = UI.getUse();
5522 // Skip uses of different values from the same node.
5523 if (Use.getResNo() != From.getResNo()) {
5528 // If this node hasn't been modified yet, it's still in the CSE maps,
5529 // so remove its old self from the CSE maps.
5530 if (!UserRemovedFromCSEMaps) {
5531 RemoveNodeFromCSEMaps(User);
5532 UserRemovedFromCSEMaps = true;
5537 } while (UI != UE && *UI == User);
5539 // We are iterating over all uses of the From node, so if a use
5540 // doesn't use the specific value, no changes are made.
5541 if (!UserRemovedFromCSEMaps)
5544 // Now that we have modified User, add it back to the CSE maps. If it
5545 // already exists there, recursively merge the results together.
5546 AddModifiedNodeToCSEMaps(User);
5549 // If we just RAUW'd the root, take note.
5550 if (From == getRoot())
5555 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
5556 /// to record information about a use.
5563 /// operator< - Sort Memos by User.
5564 bool operator<(const UseMemo &L, const UseMemo &R) {
5565 return (intptr_t)L.User < (intptr_t)R.User;
5569 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
5570 /// uses of other values produced by From.getNode() alone. The same value
5571 /// may appear in both the From and To list. The Deleted vector is
5572 /// handled the same way as for ReplaceAllUsesWith.
5573 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
5576 // Handle the simple, trivial case efficiently.
5578 return ReplaceAllUsesOfValueWith(*From, *To);
5580 // Read up all the uses and make records of them. This helps
5581 // processing new uses that are introduced during the
5582 // replacement process.
5583 SmallVector<UseMemo, 4> Uses;
5584 for (unsigned i = 0; i != Num; ++i) {
5585 unsigned FromResNo = From[i].getResNo();
5586 SDNode *FromNode = From[i].getNode();
5587 for (SDNode::use_iterator UI = FromNode->use_begin(),
5588 E = FromNode->use_end(); UI != E; ++UI) {
5589 SDUse &Use = UI.getUse();
5590 if (Use.getResNo() == FromResNo) {
5591 UseMemo Memo = { *UI, i, &Use };
5592 Uses.push_back(Memo);
5597 // Sort the uses, so that all the uses from a given User are together.
5598 std::sort(Uses.begin(), Uses.end());
5600 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
5601 UseIndex != UseIndexEnd; ) {
5602 // We know that this user uses some value of From. If it is the right
5603 // value, update it.
5604 SDNode *User = Uses[UseIndex].User;
5606 // This node is about to morph, remove its old self from the CSE maps.
5607 RemoveNodeFromCSEMaps(User);
5609 // The Uses array is sorted, so all the uses for a given User
5610 // are next to each other in the list.
5611 // To help reduce the number of CSE recomputations, process all
5612 // the uses of this user that we can find this way.
5614 unsigned i = Uses[UseIndex].Index;
5615 SDUse &Use = *Uses[UseIndex].Use;
5619 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
5621 // Now that we have modified User, add it back to the CSE maps. If it
5622 // already exists there, recursively merge the results together.
5623 AddModifiedNodeToCSEMaps(User);
5627 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
5628 /// based on their topological order. It returns the maximum id and a vector
5629 /// of the SDNodes* in assigned order by reference.
5630 unsigned SelectionDAG::AssignTopologicalOrder() {
5632 unsigned DAGSize = 0;
5634 // SortedPos tracks the progress of the algorithm. Nodes before it are
5635 // sorted, nodes after it are unsorted. When the algorithm completes
5636 // it is at the end of the list.
5637 allnodes_iterator SortedPos = allnodes_begin();
5639 // Visit all the nodes. Move nodes with no operands to the front of
5640 // the list immediately. Annotate nodes that do have operands with their
5641 // operand count. Before we do this, the Node Id fields of the nodes
5642 // may contain arbitrary values. After, the Node Id fields for nodes
5643 // before SortedPos will contain the topological sort index, and the
5644 // Node Id fields for nodes At SortedPos and after will contain the
5645 // count of outstanding operands.
5646 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
5649 unsigned Degree = N->getNumOperands();
5651 // A node with no uses, add it to the result array immediately.
5652 N->setNodeId(DAGSize++);
5653 allnodes_iterator Q = N;
5655 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
5656 assert(SortedPos != AllNodes.end() && "Overran node list");
5659 // Temporarily use the Node Id as scratch space for the degree count.
5660 N->setNodeId(Degree);
5664 // Visit all the nodes. As we iterate, move nodes into sorted order,
5665 // such that by the time the end is reached all nodes will be sorted.
5666 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
5669 // N is in sorted position, so all its uses have one less operand
5670 // that needs to be sorted.
5671 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
5674 unsigned Degree = P->getNodeId();
5675 assert(Degree != 0 && "Invalid node degree");
5678 // All of P's operands are sorted, so P may sorted now.
5679 P->setNodeId(DAGSize++);
5681 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
5682 assert(SortedPos != AllNodes.end() && "Overran node list");
5685 // Update P's outstanding operand count.
5686 P->setNodeId(Degree);
5689 if (I == SortedPos) {
5692 dbgs() << "Overran sorted position:\n";
5695 llvm_unreachable(0);
5699 assert(SortedPos == AllNodes.end() &&
5700 "Topological sort incomplete!");
5701 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
5702 "First node in topological sort is not the entry token!");
5703 assert(AllNodes.front().getNodeId() == 0 &&
5704 "First node in topological sort has non-zero id!");
5705 assert(AllNodes.front().getNumOperands() == 0 &&
5706 "First node in topological sort has operands!");
5707 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
5708 "Last node in topologic sort has unexpected id!");
5709 assert(AllNodes.back().use_empty() &&
5710 "Last node in topologic sort has users!");
5711 assert(DAGSize == allnodes_size() && "Node count mismatch!");
5715 /// AssignOrdering - Assign an order to the SDNode.
5716 void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) {
5717 assert(SD && "Trying to assign an order to a null node!");
5718 Ordering->add(SD, Order);
5721 /// GetOrdering - Get the order for the SDNode.
5722 unsigned SelectionDAG::GetOrdering(const SDNode *SD) const {
5723 assert(SD && "Trying to get the order of a null node!");
5724 return Ordering->getOrder(SD);
5727 /// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
5728 /// value is produced by SD.
5729 void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) {
5730 DbgInfo->add(DB, SD, isParameter);
5732 SD->setHasDebugValue(true);
5735 /// TransferDbgValues - Transfer SDDbgValues.
5736 void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) {
5737 if (From == To || !From.getNode()->getHasDebugValue())
5739 SDNode *FromNode = From.getNode();
5740 SDNode *ToNode = To.getNode();
5741 ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode);
5742 SmallVector<SDDbgValue *, 2> ClonedDVs;
5743 for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end();
5745 SDDbgValue *Dbg = *I;
5746 if (Dbg->getKind() == SDDbgValue::SDNODE) {
5747 SDDbgValue *Clone = getDbgValue(Dbg->getMDPtr(), ToNode, To.getResNo(),
5748 Dbg->getOffset(), Dbg->getDebugLoc(),
5750 ClonedDVs.push_back(Clone);
5753 for (SmallVector<SDDbgValue *, 2>::iterator I = ClonedDVs.begin(),
5754 E = ClonedDVs.end(); I != E; ++I)
5755 AddDbgValue(*I, ToNode, false);
5758 //===----------------------------------------------------------------------===//
5760 //===----------------------------------------------------------------------===//
5762 HandleSDNode::~HandleSDNode() {
5766 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, DebugLoc DL,
5767 const GlobalValue *GA,
5768 EVT VT, int64_t o, unsigned char TF)
5769 : SDNode(Opc, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) {
5773 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt,
5774 MachineMemOperand *mmo)
5775 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) {
5776 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5777 MMO->isNonTemporal(), MMO->isInvariant());
5778 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5779 assert(isNonTemporal() == MMO->isNonTemporal() &&
5780 "Non-temporal encoding error!");
5781 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5784 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
5785 const SDValue *Ops, unsigned NumOps, EVT memvt,
5786 MachineMemOperand *mmo)
5787 : SDNode(Opc, dl, VTs, Ops, NumOps),
5788 MemoryVT(memvt), MMO(mmo) {
5789 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5790 MMO->isNonTemporal(), MMO->isInvariant());
5791 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5792 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5795 /// Profile - Gather unique data for the node.
5797 void SDNode::Profile(FoldingSetNodeID &ID) const {
5798 AddNodeIDNode(ID, this);
5803 std::vector<EVT> VTs;
5806 VTs.reserve(MVT::LAST_VALUETYPE);
5807 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
5808 VTs.push_back(MVT((MVT::SimpleValueType)i));
5813 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
5814 static ManagedStatic<EVTArray> SimpleVTArray;
5815 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
5817 /// getValueTypeList - Return a pointer to the specified value type.
5819 const EVT *SDNode::getValueTypeList(EVT VT) {
5820 if (VT.isExtended()) {
5821 sys::SmartScopedLock<true> Lock(*VTMutex);
5822 return &(*EVTs->insert(VT).first);
5824 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE &&
5825 "Value type out of range!");
5826 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
5830 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5831 /// indicated value. This method ignores uses of other values defined by this
5833 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5834 assert(Value < getNumValues() && "Bad value!");
5836 // TODO: Only iterate over uses of a given value of the node
5837 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5838 if (UI.getUse().getResNo() == Value) {
5845 // Found exactly the right number of uses?
5850 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5851 /// value. This method ignores uses of other values defined by this operation.
5852 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5853 assert(Value < getNumValues() && "Bad value!");
5855 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5856 if (UI.getUse().getResNo() == Value)
5863 /// isOnlyUserOf - Return true if this node is the only use of N.
5865 bool SDNode::isOnlyUserOf(SDNode *N) const {
5867 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
5878 /// isOperand - Return true if this node is an operand of N.
5880 bool SDValue::isOperandOf(SDNode *N) const {
5881 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5882 if (*this == N->getOperand(i))
5887 bool SDNode::isOperandOf(SDNode *N) const {
5888 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
5889 if (this == N->OperandList[i].getNode())
5894 /// reachesChainWithoutSideEffects - Return true if this operand (which must
5895 /// be a chain) reaches the specified operand without crossing any
5896 /// side-effecting instructions on any chain path. In practice, this looks
5897 /// through token factors and non-volatile loads. In order to remain efficient,
5898 /// this only looks a couple of nodes in, it does not do an exhaustive search.
5899 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
5900 unsigned Depth) const {
5901 if (*this == Dest) return true;
5903 // Don't search too deeply, we just want to be able to see through
5904 // TokenFactor's etc.
5905 if (Depth == 0) return false;
5907 // If this is a token factor, all inputs to the TF happen in parallel. If any
5908 // of the operands of the TF does not reach dest, then we cannot do the xform.
5909 if (getOpcode() == ISD::TokenFactor) {
5910 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
5911 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
5916 // Loads don't have side effects, look through them.
5917 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
5918 if (!Ld->isVolatile())
5919 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
5924 /// hasPredecessor - Return true if N is a predecessor of this node.
5925 /// N is either an operand of this node, or can be reached by recursively
5926 /// traversing up the operands.
5927 /// NOTE: This is an expensive method. Use it carefully.
5928 bool SDNode::hasPredecessor(const SDNode *N) const {
5929 SmallPtrSet<const SDNode *, 32> Visited;
5930 SmallVector<const SDNode *, 16> Worklist;
5931 return hasPredecessorHelper(N, Visited, Worklist);
5934 bool SDNode::hasPredecessorHelper(const SDNode *N,
5935 SmallPtrSet<const SDNode *, 32> &Visited,
5936 SmallVector<const SDNode *, 16> &Worklist) const {
5937 if (Visited.empty()) {
5938 Worklist.push_back(this);
5940 // Take a look in the visited set. If we've already encountered this node
5941 // we needn't search further.
5942 if (Visited.count(N))
5946 // Haven't visited N yet. Continue the search.
5947 while (!Worklist.empty()) {
5948 const SDNode *M = Worklist.pop_back_val();
5949 for (unsigned i = 0, e = M->getNumOperands(); i != e; ++i) {
5950 SDNode *Op = M->getOperand(i).getNode();
5951 if (Visited.insert(Op))
5952 Worklist.push_back(Op);
5961 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
5962 assert(Num < NumOperands && "Invalid child # of SDNode!");
5963 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
5966 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
5967 assert(N->getNumValues() == 1 &&
5968 "Can't unroll a vector with multiple results!");
5970 EVT VT = N->getValueType(0);
5971 unsigned NE = VT.getVectorNumElements();
5972 EVT EltVT = VT.getVectorElementType();
5973 DebugLoc dl = N->getDebugLoc();
5975 SmallVector<SDValue, 8> Scalars;
5976 SmallVector<SDValue, 4> Operands(N->getNumOperands());
5978 // If ResNE is 0, fully unroll the vector op.
5981 else if (NE > ResNE)
5985 for (i= 0; i != NE; ++i) {
5986 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) {
5987 SDValue Operand = N->getOperand(j);
5988 EVT OperandVT = Operand.getValueType();
5989 if (OperandVT.isVector()) {
5990 // A vector operand; extract a single element.
5991 EVT OperandEltVT = OperandVT.getVectorElementType();
5992 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
5995 getConstant(i, TLI.getPointerTy()));
5997 // A scalar operand; just use it as is.
5998 Operands[j] = Operand;
6002 switch (N->getOpcode()) {
6004 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6005 &Operands[0], Operands.size()));
6008 Scalars.push_back(getNode(ISD::SELECT, dl, EltVT,
6009 &Operands[0], Operands.size()));
6016 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
6017 getShiftAmountOperand(Operands[0].getValueType(),
6020 case ISD::SIGN_EXTEND_INREG:
6021 case ISD::FP_ROUND_INREG: {
6022 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
6023 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6025 getValueType(ExtVT)));
6030 for (; i < ResNE; ++i)
6031 Scalars.push_back(getUNDEF(EltVT));
6033 return getNode(ISD::BUILD_VECTOR, dl,
6034 EVT::getVectorVT(*getContext(), EltVT, ResNE),
6035 &Scalars[0], Scalars.size());
6039 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
6040 /// location that is 'Dist' units away from the location that the 'Base' load
6041 /// is loading from.
6042 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
6043 unsigned Bytes, int Dist) const {
6044 if (LD->getChain() != Base->getChain())
6046 EVT VT = LD->getValueType(0);
6047 if (VT.getSizeInBits() / 8 != Bytes)
6050 SDValue Loc = LD->getOperand(1);
6051 SDValue BaseLoc = Base->getOperand(1);
6052 if (Loc.getOpcode() == ISD::FrameIndex) {
6053 if (BaseLoc.getOpcode() != ISD::FrameIndex)
6055 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
6056 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
6057 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6058 int FS = MFI->getObjectSize(FI);
6059 int BFS = MFI->getObjectSize(BFI);
6060 if (FS != BFS || FS != (int)Bytes) return false;
6061 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
6065 if (isBaseWithConstantOffset(Loc) && Loc.getOperand(0) == BaseLoc &&
6066 cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue() == Dist*Bytes)
6069 const GlobalValue *GV1 = NULL;
6070 const GlobalValue *GV2 = NULL;
6071 int64_t Offset1 = 0;
6072 int64_t Offset2 = 0;
6073 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6074 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
6075 if (isGA1 && isGA2 && GV1 == GV2)
6076 return Offset1 == (Offset2 + Dist*Bytes);
6081 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6082 /// it cannot be inferred.
6083 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6084 // If this is a GlobalAddress + cst, return the alignment.
6085 const GlobalValue *GV;
6086 int64_t GVOffset = 0;
6087 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
6088 unsigned PtrWidth = TLI.getPointerTy().getSizeInBits();
6089 APInt KnownZero(PtrWidth, 0), KnownOne(PtrWidth, 0);
6090 llvm::ComputeMaskedBits(const_cast<GlobalValue*>(GV), KnownZero, KnownOne,
6091 TLI.getDataLayout());
6092 unsigned AlignBits = KnownZero.countTrailingOnes();
6093 unsigned Align = AlignBits ? 1 << std::min(31U, AlignBits) : 0;
6095 return MinAlign(Align, GVOffset);
6098 // If this is a direct reference to a stack slot, use information about the
6099 // stack slot's alignment.
6100 int FrameIdx = 1 << 31;
6101 int64_t FrameOffset = 0;
6102 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6103 FrameIdx = FI->getIndex();
6104 } else if (isBaseWithConstantOffset(Ptr) &&
6105 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6107 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6108 FrameOffset = Ptr.getConstantOperandVal(1);
6111 if (FrameIdx != (1 << 31)) {
6112 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
6113 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
6121 // getAddressSpace - Return the address space this GlobalAddress belongs to.
6122 unsigned GlobalAddressSDNode::getAddressSpace() const {
6123 return getGlobal()->getType()->getAddressSpace();
6127 Type *ConstantPoolSDNode::getType() const {
6128 if (isMachineConstantPoolEntry())
6129 return Val.MachineCPVal->getType();
6130 return Val.ConstVal->getType();
6133 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
6135 unsigned &SplatBitSize,
6137 unsigned MinSplatBits,
6139 EVT VT = getValueType(0);
6140 assert(VT.isVector() && "Expected a vector type");
6141 unsigned sz = VT.getSizeInBits();
6142 if (MinSplatBits > sz)
6145 SplatValue = APInt(sz, 0);
6146 SplatUndef = APInt(sz, 0);
6148 // Get the bits. Bits with undefined values (when the corresponding element
6149 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
6150 // in SplatValue. If any of the values are not constant, give up and return
6152 unsigned int nOps = getNumOperands();
6153 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
6154 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
6156 for (unsigned j = 0; j < nOps; ++j) {
6157 unsigned i = isBigEndian ? nOps-1-j : j;
6158 SDValue OpVal = getOperand(i);
6159 unsigned BitPos = j * EltBitSize;
6161 if (OpVal.getOpcode() == ISD::UNDEF)
6162 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
6163 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
6164 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize).
6165 zextOrTrunc(sz) << BitPos;
6166 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
6167 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
6172 // The build_vector is all constants or undefs. Find the smallest element
6173 // size that splats the vector.
6175 HasAnyUndefs = (SplatUndef != 0);
6178 unsigned HalfSize = sz / 2;
6179 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize);
6180 APInt LowValue = SplatValue.trunc(HalfSize);
6181 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize);
6182 APInt LowUndef = SplatUndef.trunc(HalfSize);
6184 // If the two halves do not match (ignoring undef bits), stop here.
6185 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
6186 MinSplatBits > HalfSize)
6189 SplatValue = HighValue | LowValue;
6190 SplatUndef = HighUndef & LowUndef;
6199 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
6200 // Find the first non-undef value in the shuffle mask.
6202 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
6205 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
6207 // Make sure all remaining elements are either undef or the same as the first
6209 for (int Idx = Mask[i]; i != e; ++i)
6210 if (Mask[i] >= 0 && Mask[i] != Idx)
6216 static void checkForCyclesHelper(const SDNode *N,
6217 SmallPtrSet<const SDNode*, 32> &Visited,
6218 SmallPtrSet<const SDNode*, 32> &Checked) {
6219 // If this node has already been checked, don't check it again.
6220 if (Checked.count(N))
6223 // If a node has already been visited on this depth-first walk, reject it as
6225 if (!Visited.insert(N)) {
6226 dbgs() << "Offending node:\n";
6228 errs() << "Detected cycle in SelectionDAG\n";
6232 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6233 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked);
6240 void llvm::checkForCycles(const llvm::SDNode *N) {
6242 assert(N && "Checking nonexistant SDNode");
6243 SmallPtrSet<const SDNode*, 32> visited;
6244 SmallPtrSet<const SDNode*, 32> checked;
6245 checkForCyclesHelper(N, visited, checked);
6249 void llvm::checkForCycles(const llvm::SelectionDAG *DAG) {
6250 checkForCycles(DAG->getRoot().getNode());