1 //===---- TargetInfo.cpp - Encapsulate target details -----------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // These classes wrap the information about a call or function
11 // definition used to handle ABI compliancy.
13 //===----------------------------------------------------------------------===//
15 #include "TargetInfo.h"
17 #include "CodeGenFunction.h"
18 #include "clang/AST/RecordLayout.h"
19 #include "clang/Frontend/CodeGenOptions.h"
20 #include "llvm/Type.h"
21 #include "llvm/Target/TargetData.h"
22 #include "llvm/ADT/Triple.h"
23 #include "llvm/Support/raw_ostream.h"
24 using namespace clang;
25 using namespace CodeGen;
27 static void AssignToArrayRange(CodeGen::CGBuilderTy &Builder,
32 // Alternatively, we could emit this as a loop in the source.
33 for (unsigned I = FirstIndex; I <= LastIndex; ++I) {
34 llvm::Value *Cell = Builder.CreateConstInBoundsGEP1_32(Array, I);
35 Builder.CreateStore(Value, Cell);
39 static bool isAggregateTypeForABI(QualType T) {
40 return CodeGenFunction::hasAggregateLLVMType(T) ||
41 T->isMemberFunctionPointerType();
44 ABIInfo::~ABIInfo() {}
46 ASTContext &ABIInfo::getContext() const {
47 return CGT.getContext();
50 llvm::LLVMContext &ABIInfo::getVMContext() const {
51 return CGT.getLLVMContext();
54 const llvm::TargetData &ABIInfo::getTargetData() const {
55 return CGT.getTargetData();
59 void ABIArgInfo::dump() const {
60 raw_ostream &OS = llvm::errs();
61 OS << "(ABIArgInfo Kind=";
65 if (llvm::Type *Ty = getCoerceToType())
77 OS << "Indirect Align=" << getIndirectAlign()
78 << " ByVal=" << getIndirectByVal()
79 << " Realign=" << getIndirectRealign();
88 TargetCodeGenInfo::~TargetCodeGenInfo() { delete Info; }
90 // If someone can figure out a general rule for this, that would be great.
91 // It's probably just doomed to be platform-dependent, though.
92 unsigned TargetCodeGenInfo::getSizeOfUnwindException() const {
94 // x86-64 FreeBSD, Linux, Darwin
95 // x86-32 FreeBSD, Linux, Darwin
96 // PowerPC Linux, Darwin
97 // ARM Darwin (*not* EABI)
101 bool TargetCodeGenInfo::isNoProtoCallVariadic(const CallArgList &args,
102 const FunctionNoProtoType *fnType) const {
103 // The following conventions are known to require this to be false:
106 // For everything else, we just prefer false unless we opt out.
110 static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays);
112 /// isEmptyField - Return true iff a the field is "empty", that is it
113 /// is an unnamed bit-field or an (array of) empty record(s).
114 static bool isEmptyField(ASTContext &Context, const FieldDecl *FD,
116 if (FD->isUnnamedBitfield())
119 QualType FT = FD->getType();
121 // Constant arrays of empty records count as empty, strip them off.
122 // Constant arrays of zero length always count as empty.
124 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) {
125 if (AT->getSize() == 0)
127 FT = AT->getElementType();
130 const RecordType *RT = FT->getAs<RecordType>();
134 // C++ record fields are never empty, at least in the Itanium ABI.
136 // FIXME: We should use a predicate for whether this behavior is true in the
138 if (isa<CXXRecordDecl>(RT->getDecl()))
141 return isEmptyRecord(Context, FT, AllowArrays);
144 /// isEmptyRecord - Return true iff a structure contains only empty
145 /// fields. Note that a structure with a flexible array member is not
146 /// considered empty.
147 static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays) {
148 const RecordType *RT = T->getAs<RecordType>();
151 const RecordDecl *RD = RT->getDecl();
152 if (RD->hasFlexibleArrayMember())
155 // If this is a C++ record, check the bases first.
156 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD))
157 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(),
158 e = CXXRD->bases_end(); i != e; ++i)
159 if (!isEmptyRecord(Context, i->getType(), true))
162 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end();
164 if (!isEmptyField(Context, *i, AllowArrays))
169 /// hasNonTrivialDestructorOrCopyConstructor - Determine if a type has either
170 /// a non-trivial destructor or a non-trivial copy constructor.
171 static bool hasNonTrivialDestructorOrCopyConstructor(const RecordType *RT) {
172 const CXXRecordDecl *RD = dyn_cast<CXXRecordDecl>(RT->getDecl());
176 return !RD->hasTrivialDestructor() || !RD->hasTrivialCopyConstructor();
179 /// isRecordWithNonTrivialDestructorOrCopyConstructor - Determine if a type is
180 /// a record type with either a non-trivial destructor or a non-trivial copy
182 static bool isRecordWithNonTrivialDestructorOrCopyConstructor(QualType T) {
183 const RecordType *RT = T->getAs<RecordType>();
187 return hasNonTrivialDestructorOrCopyConstructor(RT);
190 /// isSingleElementStruct - Determine if a structure is a "single
191 /// element struct", i.e. it has exactly one non-empty field or
192 /// exactly one field which is itself a single element
193 /// struct. Structures with flexible array members are never
194 /// considered single element structs.
196 /// \return The field declaration for the single non-empty field, if
198 static const Type *isSingleElementStruct(QualType T, ASTContext &Context) {
199 const RecordType *RT = T->getAsStructureType();
203 const RecordDecl *RD = RT->getDecl();
204 if (RD->hasFlexibleArrayMember())
207 const Type *Found = 0;
209 // If this is a C++ record, check the bases first.
210 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) {
211 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(),
212 e = CXXRD->bases_end(); i != e; ++i) {
213 // Ignore empty records.
214 if (isEmptyRecord(Context, i->getType(), true))
217 // If we already found an element then this isn't a single-element struct.
221 // If this is non-empty and not a single element struct, the composite
222 // cannot be a single element struct.
223 Found = isSingleElementStruct(i->getType(), Context);
229 // Check for single element.
230 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end();
232 const FieldDecl *FD = *i;
233 QualType FT = FD->getType();
235 // Ignore empty fields.
236 if (isEmptyField(Context, FD, true))
239 // If we already found an element then this isn't a single-element
244 // Treat single element arrays as the element.
245 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) {
246 if (AT->getSize().getZExtValue() != 1)
248 FT = AT->getElementType();
251 if (!isAggregateTypeForABI(FT)) {
252 Found = FT.getTypePtr();
254 Found = isSingleElementStruct(FT, Context);
260 // We don't consider a struct a single-element struct if it has
261 // padding beyond the element type.
262 if (Found && Context.getTypeSize(Found) != Context.getTypeSize(T))
268 static bool is32Or64BitBasicType(QualType Ty, ASTContext &Context) {
269 if (!Ty->getAs<BuiltinType>() && !Ty->hasPointerRepresentation() &&
270 !Ty->isAnyComplexType() && !Ty->isEnumeralType() &&
271 !Ty->isBlockPointerType())
274 uint64_t Size = Context.getTypeSize(Ty);
275 return Size == 32 || Size == 64;
278 /// canExpandIndirectArgument - Test whether an argument type which is to be
279 /// passed indirectly (on the stack) would have the equivalent layout if it was
280 /// expanded into separate arguments. If so, we prefer to do the latter to avoid
281 /// inhibiting optimizations.
283 // FIXME: This predicate is missing many cases, currently it just follows
284 // llvm-gcc (checks that all fields are 32-bit or 64-bit primitive types). We
285 // should probably make this smarter, or better yet make the LLVM backend
286 // capable of handling it.
287 static bool canExpandIndirectArgument(QualType Ty, ASTContext &Context) {
288 // We can only expand structure types.
289 const RecordType *RT = Ty->getAs<RecordType>();
293 // We can only expand (C) structures.
295 // FIXME: This needs to be generalized to handle classes as well.
296 const RecordDecl *RD = RT->getDecl();
297 if (!RD->isStruct() || isa<CXXRecordDecl>(RD))
302 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end();
304 const FieldDecl *FD = *i;
306 if (!is32Or64BitBasicType(FD->getType(), Context))
309 // FIXME: Reject bit-fields wholesale; there are two problems, we don't know
310 // how to expand them yet, and the predicate for telling if a bitfield still
311 // counts as "basic" is more complicated than what we were doing previously.
312 if (FD->isBitField())
315 Size += Context.getTypeSize(FD->getType());
318 // Make sure there are not any holes in the struct.
319 if (Size != Context.getTypeSize(Ty))
326 /// DefaultABIInfo - The default implementation for ABI specific
327 /// details. This implementation provides information which results in
328 /// self-consistent and sensible LLVM IR generation, but does not
329 /// conform to any particular ABI.
330 class DefaultABIInfo : public ABIInfo {
332 DefaultABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {}
334 ABIArgInfo classifyReturnType(QualType RetTy) const;
335 ABIArgInfo classifyArgumentType(QualType RetTy) const;
337 virtual void computeInfo(CGFunctionInfo &FI) const {
338 FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
339 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end();
341 it->info = classifyArgumentType(it->type);
344 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
345 CodeGenFunction &CGF) const;
348 class DefaultTargetCodeGenInfo : public TargetCodeGenInfo {
350 DefaultTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT)
351 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {}
354 llvm::Value *DefaultABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
355 CodeGenFunction &CGF) const {
359 ABIArgInfo DefaultABIInfo::classifyArgumentType(QualType Ty) const {
360 if (isAggregateTypeForABI(Ty)) {
361 // Records with non trivial destructors/constructors should not be passed
363 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty))
364 return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
366 return ABIArgInfo::getIndirect(0);
369 // Treat an enum type as its underlying type.
370 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
371 Ty = EnumTy->getDecl()->getIntegerType();
373 return (Ty->isPromotableIntegerType() ?
374 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
377 ABIArgInfo DefaultABIInfo::classifyReturnType(QualType RetTy) const {
378 if (RetTy->isVoidType())
379 return ABIArgInfo::getIgnore();
381 if (isAggregateTypeForABI(RetTy))
382 return ABIArgInfo::getIndirect(0);
384 // Treat an enum type as its underlying type.
385 if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
386 RetTy = EnumTy->getDecl()->getIntegerType();
388 return (RetTy->isPromotableIntegerType() ?
389 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
392 /// UseX86_MMXType - Return true if this is an MMX type that should use the
393 /// special x86_mmx type.
394 bool UseX86_MMXType(llvm::Type *IRType) {
395 // If the type is an MMX type <2 x i32>, <4 x i16>, or <8 x i8>, use the
396 // special x86_mmx type.
397 return IRType->isVectorTy() && IRType->getPrimitiveSizeInBits() == 64 &&
398 cast<llvm::VectorType>(IRType)->getElementType()->isIntegerTy() &&
399 IRType->getScalarSizeInBits() != 64;
402 static llvm::Type* X86AdjustInlineAsmType(CodeGen::CodeGenFunction &CGF,
403 StringRef Constraint,
405 if ((Constraint == "y" || Constraint == "&y") && Ty->isVectorTy())
406 return llvm::Type::getX86_MMXTy(CGF.getLLVMContext());
410 //===----------------------------------------------------------------------===//
411 // X86-32 ABI Implementation
412 //===----------------------------------------------------------------------===//
414 /// X86_32ABIInfo - The X86-32 ABI information.
415 class X86_32ABIInfo : public ABIInfo {
416 static const unsigned MinABIStackAlignInBytes = 4;
418 bool IsDarwinVectorABI;
419 bool IsSmallStructInRegABI;
421 bool IsWin32FloatStructABI;
423 static bool isRegisterSize(unsigned Size) {
424 return (Size == 8 || Size == 16 || Size == 32 || Size == 64);
427 static bool shouldReturnTypeInRegister(QualType Ty, ASTContext &Context,
428 unsigned callingConvention);
430 /// getIndirectResult - Give a source type \arg Ty, return a suitable result
431 /// such that the argument will be passed in memory.
432 ABIArgInfo getIndirectResult(QualType Ty, bool ByVal = true) const;
434 /// \brief Return the alignment to use for the given type on the stack.
435 unsigned getTypeStackAlignInBytes(QualType Ty, unsigned Align) const;
439 ABIArgInfo classifyReturnType(QualType RetTy,
440 unsigned callingConvention) const;
441 ABIArgInfo classifyArgumentType(QualType RetTy) const;
443 virtual void computeInfo(CGFunctionInfo &FI) const {
444 FI.getReturnInfo() = classifyReturnType(FI.getReturnType(),
445 FI.getCallingConvention());
446 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end();
448 it->info = classifyArgumentType(it->type);
451 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
452 CodeGenFunction &CGF) const;
454 X86_32ABIInfo(CodeGen::CodeGenTypes &CGT, bool d, bool p, bool m, bool w)
455 : ABIInfo(CGT), IsDarwinVectorABI(d), IsSmallStructInRegABI(p),
456 IsMMXDisabled(m), IsWin32FloatStructABI(w) {}
459 class X86_32TargetCodeGenInfo : public TargetCodeGenInfo {
461 X86_32TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT,
462 bool d, bool p, bool m, bool w)
463 :TargetCodeGenInfo(new X86_32ABIInfo(CGT, d, p, m, w)) {}
465 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
466 CodeGen::CodeGenModule &CGM) const;
468 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const {
469 // Darwin uses different dwarf register numbers for EH.
470 if (CGM.isTargetDarwin()) return 5;
475 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
476 llvm::Value *Address) const;
478 llvm::Type* adjustInlineAsmType(CodeGen::CodeGenFunction &CGF,
479 StringRef Constraint,
480 llvm::Type* Ty) const {
481 return X86AdjustInlineAsmType(CGF, Constraint, Ty);
488 /// shouldReturnTypeInRegister - Determine if the given type should be
489 /// passed in a register (for the Darwin ABI).
490 bool X86_32ABIInfo::shouldReturnTypeInRegister(QualType Ty,
492 unsigned callingConvention) {
493 uint64_t Size = Context.getTypeSize(Ty);
495 // Type must be register sized.
496 if (!isRegisterSize(Size))
499 if (Ty->isVectorType()) {
500 // 64- and 128- bit vectors inside structures are not returned in
502 if (Size == 64 || Size == 128)
508 // If this is a builtin, pointer, enum, complex type, member pointer, or
509 // member function pointer it is ok.
510 if (Ty->getAs<BuiltinType>() || Ty->hasPointerRepresentation() ||
511 Ty->isAnyComplexType() || Ty->isEnumeralType() ||
512 Ty->isBlockPointerType() || Ty->isMemberPointerType())
515 // Arrays are treated like records.
516 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty))
517 return shouldReturnTypeInRegister(AT->getElementType(), Context,
520 // Otherwise, it must be a record type.
521 const RecordType *RT = Ty->getAs<RecordType>();
522 if (!RT) return false;
524 // FIXME: Traverse bases here too.
526 // For thiscall conventions, structures will never be returned in
527 // a register. This is for compatibility with the MSVC ABI
528 if (callingConvention == llvm::CallingConv::X86_ThisCall &&
529 RT->isStructureType()) {
533 // Structure types are passed in register if all fields would be
534 // passed in a register.
535 for (RecordDecl::field_iterator i = RT->getDecl()->field_begin(),
536 e = RT->getDecl()->field_end(); i != e; ++i) {
537 const FieldDecl *FD = *i;
539 // Empty fields are ignored.
540 if (isEmptyField(Context, FD, true))
543 // Check fields recursively.
544 if (!shouldReturnTypeInRegister(FD->getType(), Context,
551 ABIArgInfo X86_32ABIInfo::classifyReturnType(QualType RetTy,
552 unsigned callingConvention) const {
553 if (RetTy->isVoidType())
554 return ABIArgInfo::getIgnore();
556 if (const VectorType *VT = RetTy->getAs<VectorType>()) {
557 // On Darwin, some vectors are returned in registers.
558 if (IsDarwinVectorABI) {
559 uint64_t Size = getContext().getTypeSize(RetTy);
561 // 128-bit vectors are a special case; they are returned in
562 // registers and we need to make sure to pick a type the LLVM
563 // backend will like.
565 return ABIArgInfo::getDirect(llvm::VectorType::get(
566 llvm::Type::getInt64Ty(getVMContext()), 2));
568 // Always return in register if it fits in a general purpose
569 // register, or if it is 64 bits and has a single element.
570 if ((Size == 8 || Size == 16 || Size == 32) ||
571 (Size == 64 && VT->getNumElements() == 1))
572 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),
575 return ABIArgInfo::getIndirect(0);
578 return ABIArgInfo::getDirect();
581 if (isAggregateTypeForABI(RetTy)) {
582 if (const RecordType *RT = RetTy->getAs<RecordType>()) {
583 // Structures with either a non-trivial destructor or a non-trivial
584 // copy constructor are always indirect.
585 if (hasNonTrivialDestructorOrCopyConstructor(RT))
586 return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
588 // Structures with flexible arrays are always indirect.
589 if (RT->getDecl()->hasFlexibleArrayMember())
590 return ABIArgInfo::getIndirect(0);
593 // If specified, structs and unions are always indirect.
594 if (!IsSmallStructInRegABI && !RetTy->isAnyComplexType())
595 return ABIArgInfo::getIndirect(0);
597 // Small structures which are register sized are generally returned
599 if (X86_32ABIInfo::shouldReturnTypeInRegister(RetTy, getContext(),
600 callingConvention)) {
601 uint64_t Size = getContext().getTypeSize(RetTy);
603 // As a special-case, if the struct is a "single-element" struct, and
604 // the field is of type "float" or "double", return it in a
605 // floating-point register. (MSVC does not apply this special case.)
606 // We apply a similar transformation for pointer types to improve the
607 // quality of the generated IR.
608 if (const Type *SeltTy = isSingleElementStruct(RetTy, getContext()))
609 if ((!IsWin32FloatStructABI && SeltTy->isRealFloatingType())
610 || SeltTy->hasPointerRepresentation())
611 return ABIArgInfo::getDirect(CGT.ConvertType(QualType(SeltTy, 0)));
613 // FIXME: We should be able to narrow this integer in cases with dead
615 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),Size));
618 return ABIArgInfo::getIndirect(0);
621 // Treat an enum type as its underlying type.
622 if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
623 RetTy = EnumTy->getDecl()->getIntegerType();
625 return (RetTy->isPromotableIntegerType() ?
626 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
629 static bool isRecordWithSSEVectorType(ASTContext &Context, QualType Ty) {
630 const RecordType *RT = Ty->getAs<RecordType>();
633 const RecordDecl *RD = RT->getDecl();
635 // If this is a C++ record, check the bases first.
636 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD))
637 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(),
638 e = CXXRD->bases_end(); i != e; ++i)
639 if (!isRecordWithSSEVectorType(Context, i->getType()))
642 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end();
644 QualType FT = i->getType();
646 if (FT->getAs<VectorType>() && Context.getTypeSize(FT) == 128)
649 if (isRecordWithSSEVectorType(Context, FT))
656 unsigned X86_32ABIInfo::getTypeStackAlignInBytes(QualType Ty,
657 unsigned Align) const {
658 // Otherwise, if the alignment is less than or equal to the minimum ABI
659 // alignment, just use the default; the backend will handle this.
660 if (Align <= MinABIStackAlignInBytes)
661 return 0; // Use default alignment.
663 // On non-Darwin, the stack type alignment is always 4.
664 if (!IsDarwinVectorABI) {
665 // Set explicit alignment, since we may need to realign the top.
666 return MinABIStackAlignInBytes;
669 // Otherwise, if the type contains an SSE vector type, the alignment is 16.
670 if (Align >= 16 && isRecordWithSSEVectorType(getContext(), Ty))
673 return MinABIStackAlignInBytes;
676 ABIArgInfo X86_32ABIInfo::getIndirectResult(QualType Ty, bool ByVal) const {
678 return ABIArgInfo::getIndirect(0, false);
680 // Compute the byval alignment.
681 unsigned TypeAlign = getContext().getTypeAlign(Ty) / 8;
682 unsigned StackAlign = getTypeStackAlignInBytes(Ty, TypeAlign);
684 return ABIArgInfo::getIndirect(4);
686 // If the stack alignment is less than the type alignment, realign the
688 if (StackAlign < TypeAlign)
689 return ABIArgInfo::getIndirect(StackAlign, /*ByVal=*/true,
692 return ABIArgInfo::getIndirect(StackAlign);
695 ABIArgInfo X86_32ABIInfo::classifyArgumentType(QualType Ty) const {
696 // FIXME: Set alignment on indirect arguments.
697 if (isAggregateTypeForABI(Ty)) {
698 // Structures with flexible arrays are always indirect.
699 if (const RecordType *RT = Ty->getAs<RecordType>()) {
700 // Structures with either a non-trivial destructor or a non-trivial
701 // copy constructor are always indirect.
702 if (hasNonTrivialDestructorOrCopyConstructor(RT))
703 return getIndirectResult(Ty, /*ByVal=*/false);
705 if (RT->getDecl()->hasFlexibleArrayMember())
706 return getIndirectResult(Ty);
709 // Ignore empty structs/unions.
710 if (isEmptyRecord(getContext(), Ty, true))
711 return ABIArgInfo::getIgnore();
713 // Expand small (<= 128-bit) record types when we know that the stack layout
714 // of those arguments will match the struct. This is important because the
715 // LLVM backend isn't smart enough to remove byval, which inhibits many
717 if (getContext().getTypeSize(Ty) <= 4*32 &&
718 canExpandIndirectArgument(Ty, getContext()))
719 return ABIArgInfo::getExpand();
721 return getIndirectResult(Ty);
724 if (const VectorType *VT = Ty->getAs<VectorType>()) {
725 // On Darwin, some vectors are passed in memory, we handle this by passing
726 // it as an i8/i16/i32/i64.
727 if (IsDarwinVectorABI) {
728 uint64_t Size = getContext().getTypeSize(Ty);
729 if ((Size == 8 || Size == 16 || Size == 32) ||
730 (Size == 64 && VT->getNumElements() == 1))
731 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),
735 llvm::Type *IRType = CGT.ConvertType(Ty);
736 if (UseX86_MMXType(IRType)) {
738 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),
740 ABIArgInfo AAI = ABIArgInfo::getDirect(IRType);
741 AAI.setCoerceToType(llvm::Type::getX86_MMXTy(getVMContext()));
745 return ABIArgInfo::getDirect();
749 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
750 Ty = EnumTy->getDecl()->getIntegerType();
752 return (Ty->isPromotableIntegerType() ?
753 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
756 llvm::Value *X86_32ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
757 CodeGenFunction &CGF) const {
758 llvm::Type *BPP = CGF.Int8PtrPtrTy;
760 CGBuilderTy &Builder = CGF.Builder;
761 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP,
763 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur");
765 // Compute if the address needs to be aligned
766 unsigned Align = CGF.getContext().getTypeAlignInChars(Ty).getQuantity();
767 Align = getTypeStackAlignInBytes(Ty, Align);
768 Align = std::max(Align, 4U);
770 // addr = (addr + align - 1) & -align;
771 llvm::Value *Offset =
772 llvm::ConstantInt::get(CGF.Int32Ty, Align - 1);
773 Addr = CGF.Builder.CreateGEP(Addr, Offset);
774 llvm::Value *AsInt = CGF.Builder.CreatePtrToInt(Addr,
776 llvm::Value *Mask = llvm::ConstantInt::get(CGF.Int32Ty, -Align);
777 Addr = CGF.Builder.CreateIntToPtr(CGF.Builder.CreateAnd(AsInt, Mask),
783 llvm::PointerType::getUnqual(CGF.ConvertType(Ty));
784 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy);
787 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, Align);
788 llvm::Value *NextAddr =
789 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset),
791 Builder.CreateStore(NextAddr, VAListAddrAsBPP);
796 void X86_32TargetCodeGenInfo::SetTargetAttributes(const Decl *D,
797 llvm::GlobalValue *GV,
798 CodeGen::CodeGenModule &CGM) const {
799 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) {
800 if (FD->hasAttr<X86ForceAlignArgPointerAttr>()) {
801 // Get the LLVM function.
802 llvm::Function *Fn = cast<llvm::Function>(GV);
804 // Now add the 'alignstack' attribute with a value of 16.
805 Fn->addFnAttr(llvm::Attribute::constructStackAlignmentFromInt(16));
810 bool X86_32TargetCodeGenInfo::initDwarfEHRegSizeTable(
811 CodeGen::CodeGenFunction &CGF,
812 llvm::Value *Address) const {
813 CodeGen::CGBuilderTy &Builder = CGF.Builder;
815 llvm::Value *Four8 = llvm::ConstantInt::get(CGF.Int8Ty, 4);
817 // 0-7 are the eight integer registers; the order is different
818 // on Darwin (for EH), but the range is the same.
820 AssignToArrayRange(Builder, Address, Four8, 0, 8);
822 if (CGF.CGM.isTargetDarwin()) {
823 // 12-16 are st(0..4). Not sure why we stop at 4.
824 // These have size 16, which is sizeof(long double) on
825 // platforms with 8-byte alignment for that type.
826 llvm::Value *Sixteen8 = llvm::ConstantInt::get(CGF.Int8Ty, 16);
827 AssignToArrayRange(Builder, Address, Sixteen8, 12, 16);
830 // 9 is %eflags, which doesn't get a size on Darwin for some
832 Builder.CreateStore(Four8, Builder.CreateConstInBoundsGEP1_32(Address, 9));
834 // 11-16 are st(0..5). Not sure why we stop at 5.
835 // These have size 12, which is sizeof(long double) on
836 // platforms with 4-byte alignment for that type.
837 llvm::Value *Twelve8 = llvm::ConstantInt::get(CGF.Int8Ty, 12);
838 AssignToArrayRange(Builder, Address, Twelve8, 11, 16);
844 //===----------------------------------------------------------------------===//
845 // X86-64 ABI Implementation
846 //===----------------------------------------------------------------------===//
850 /// X86_64ABIInfo - The X86_64 ABI information.
851 class X86_64ABIInfo : public ABIInfo {
863 /// merge - Implement the X86_64 ABI merging algorithm.
865 /// Merge an accumulating classification \arg Accum with a field
866 /// classification \arg Field.
868 /// \param Accum - The accumulating classification. This should
869 /// always be either NoClass or the result of a previous merge
870 /// call. In addition, this should never be Memory (the caller
871 /// should just return Memory for the aggregate).
872 static Class merge(Class Accum, Class Field);
874 /// postMerge - Implement the X86_64 ABI post merging algorithm.
876 /// Post merger cleanup, reduces a malformed Hi and Lo pair to
877 /// final MEMORY or SSE classes when necessary.
879 /// \param AggregateSize - The size of the current aggregate in
880 /// the classification process.
882 /// \param Lo - The classification for the parts of the type
883 /// residing in the low word of the containing object.
885 /// \param Hi - The classification for the parts of the type
886 /// residing in the higher words of the containing object.
888 void postMerge(unsigned AggregateSize, Class &Lo, Class &Hi) const;
890 /// classify - Determine the x86_64 register classes in which the
891 /// given type T should be passed.
893 /// \param Lo - The classification for the parts of the type
894 /// residing in the low word of the containing object.
896 /// \param Hi - The classification for the parts of the type
897 /// residing in the high word of the containing object.
899 /// \param OffsetBase - The bit offset of this type in the
900 /// containing object. Some parameters are classified different
901 /// depending on whether they straddle an eightbyte boundary.
903 /// If a word is unused its result will be NoClass; if a type should
904 /// be passed in Memory then at least the classification of \arg Lo
907 /// The \arg Lo class will be NoClass iff the argument is ignored.
909 /// If the \arg Lo class is ComplexX87, then the \arg Hi class will
910 /// also be ComplexX87.
911 void classify(QualType T, uint64_t OffsetBase, Class &Lo, Class &Hi) const;
913 llvm::Type *GetByteVectorType(QualType Ty) const;
914 llvm::Type *GetSSETypeAtOffset(llvm::Type *IRType,
915 unsigned IROffset, QualType SourceTy,
916 unsigned SourceOffset) const;
917 llvm::Type *GetINTEGERTypeAtOffset(llvm::Type *IRType,
918 unsigned IROffset, QualType SourceTy,
919 unsigned SourceOffset) const;
921 /// getIndirectResult - Give a source type \arg Ty, return a suitable result
922 /// such that the argument will be returned in memory.
923 ABIArgInfo getIndirectReturnResult(QualType Ty) const;
925 /// getIndirectResult - Give a source type \arg Ty, return a suitable result
926 /// such that the argument will be passed in memory.
928 /// \param freeIntRegs - The number of free integer registers remaining
930 ABIArgInfo getIndirectResult(QualType Ty, unsigned freeIntRegs) const;
932 ABIArgInfo classifyReturnType(QualType RetTy) const;
934 ABIArgInfo classifyArgumentType(QualType Ty,
935 unsigned freeIntRegs,
937 unsigned &neededSSE) const;
939 bool IsIllegalVectorType(QualType Ty) const;
941 /// The 0.98 ABI revision clarified a lot of ambiguities,
942 /// unfortunately in ways that were not always consistent with
943 /// certain previous compilers. In particular, platforms which
944 /// required strict binary compatibility with older versions of GCC
945 /// may need to exempt themselves.
946 bool honorsRevision0_98() const {
947 return !getContext().getTargetInfo().getTriple().isOSDarwin();
953 X86_64ABIInfo(CodeGen::CodeGenTypes &CGT, bool hasavx) :
954 ABIInfo(CGT), HasAVX(hasavx) {}
956 bool isPassedUsingAVXType(QualType type) const {
957 unsigned neededInt, neededSSE;
958 // The freeIntRegs argument doesn't matter here.
959 ABIArgInfo info = classifyArgumentType(type, 0, neededInt, neededSSE);
960 if (info.isDirect()) {
961 llvm::Type *ty = info.getCoerceToType();
962 if (llvm::VectorType *vectorTy = dyn_cast_or_null<llvm::VectorType>(ty))
963 return (vectorTy->getBitWidth() > 128);
968 virtual void computeInfo(CGFunctionInfo &FI) const;
970 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
971 CodeGenFunction &CGF) const;
974 /// WinX86_64ABIInfo - The Windows X86_64 ABI information.
975 class WinX86_64ABIInfo : public ABIInfo {
977 ABIArgInfo classify(QualType Ty) const;
980 WinX86_64ABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {}
982 virtual void computeInfo(CGFunctionInfo &FI) const;
984 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
985 CodeGenFunction &CGF) const;
988 class X86_64TargetCodeGenInfo : public TargetCodeGenInfo {
990 X86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, bool HasAVX)
991 : TargetCodeGenInfo(new X86_64ABIInfo(CGT, HasAVX)) {}
993 const X86_64ABIInfo &getABIInfo() const {
994 return static_cast<const X86_64ABIInfo&>(TargetCodeGenInfo::getABIInfo());
997 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const {
1001 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
1002 llvm::Value *Address) const {
1003 llvm::Value *Eight8 = llvm::ConstantInt::get(CGF.Int8Ty, 8);
1005 // 0-15 are the 16 integer registers.
1007 AssignToArrayRange(CGF.Builder, Address, Eight8, 0, 16);
1011 llvm::Type* adjustInlineAsmType(CodeGen::CodeGenFunction &CGF,
1012 StringRef Constraint,
1013 llvm::Type* Ty) const {
1014 return X86AdjustInlineAsmType(CGF, Constraint, Ty);
1017 bool isNoProtoCallVariadic(const CallArgList &args,
1018 const FunctionNoProtoType *fnType) const {
1019 // The default CC on x86-64 sets %al to the number of SSA
1020 // registers used, and GCC sets this when calling an unprototyped
1021 // function, so we override the default behavior. However, don't do
1022 // that when AVX types are involved: the ABI explicitly states it is
1023 // undefined, and it doesn't work in practice because of how the ABI
1024 // defines varargs anyway.
1025 if (fnType->getCallConv() == CC_Default || fnType->getCallConv() == CC_C) {
1026 bool HasAVXType = false;
1027 for (CallArgList::const_iterator
1028 it = args.begin(), ie = args.end(); it != ie; ++it) {
1029 if (getABIInfo().isPassedUsingAVXType(it->Ty)) {
1039 return TargetCodeGenInfo::isNoProtoCallVariadic(args, fnType);
1044 class WinX86_64TargetCodeGenInfo : public TargetCodeGenInfo {
1046 WinX86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT)
1047 : TargetCodeGenInfo(new WinX86_64ABIInfo(CGT)) {}
1049 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const {
1053 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
1054 llvm::Value *Address) const {
1055 llvm::Value *Eight8 = llvm::ConstantInt::get(CGF.Int8Ty, 8);
1057 // 0-15 are the 16 integer registers.
1059 AssignToArrayRange(CGF.Builder, Address, Eight8, 0, 16);
1066 void X86_64ABIInfo::postMerge(unsigned AggregateSize, Class &Lo,
1068 // AMD64-ABI 3.2.3p2: Rule 5. Then a post merger cleanup is done:
1070 // (a) If one of the classes is Memory, the whole argument is passed in
1073 // (b) If X87UP is not preceded by X87, the whole argument is passed in
1076 // (c) If the size of the aggregate exceeds two eightbytes and the first
1077 // eightbyte isn't SSE or any other eightbyte isn't SSEUP, the whole
1078 // argument is passed in memory. NOTE: This is necessary to keep the
1079 // ABI working for processors that don't support the __m256 type.
1081 // (d) If SSEUP is not preceded by SSE or SSEUP, it is converted to SSE.
1083 // Some of these are enforced by the merging logic. Others can arise
1084 // only with unions; for example:
1085 // union { _Complex double; unsigned; }
1087 // Note that clauses (b) and (c) were added in 0.98.
1091 if (Hi == X87Up && Lo != X87 && honorsRevision0_98())
1093 if (AggregateSize > 128 && (Lo != SSE || Hi != SSEUp))
1095 if (Hi == SSEUp && Lo != SSE)
1099 X86_64ABIInfo::Class X86_64ABIInfo::merge(Class Accum, Class Field) {
1100 // AMD64-ABI 3.2.3p2: Rule 4. Each field of an object is
1101 // classified recursively so that always two fields are
1102 // considered. The resulting class is calculated according to
1103 // the classes of the fields in the eightbyte:
1105 // (a) If both classes are equal, this is the resulting class.
1107 // (b) If one of the classes is NO_CLASS, the resulting class is
1110 // (c) If one of the classes is MEMORY, the result is the MEMORY
1113 // (d) If one of the classes is INTEGER, the result is the
1116 // (e) If one of the classes is X87, X87UP, COMPLEX_X87 class,
1117 // MEMORY is used as class.
1119 // (f) Otherwise class SSE is used.
1121 // Accum should never be memory (we should have returned) or
1122 // ComplexX87 (because this cannot be passed in a structure).
1123 assert((Accum != Memory && Accum != ComplexX87) &&
1124 "Invalid accumulated classification during merge.");
1125 if (Accum == Field || Field == NoClass)
1127 if (Field == Memory)
1129 if (Accum == NoClass)
1131 if (Accum == Integer || Field == Integer)
1133 if (Field == X87 || Field == X87Up || Field == ComplexX87 ||
1134 Accum == X87 || Accum == X87Up)
1139 void X86_64ABIInfo::classify(QualType Ty, uint64_t OffsetBase,
1140 Class &Lo, Class &Hi) const {
1141 // FIXME: This code can be simplified by introducing a simple value class for
1142 // Class pairs with appropriate constructor methods for the various
1145 // FIXME: Some of the split computations are wrong; unaligned vectors
1146 // shouldn't be passed in registers for example, so there is no chance they
1147 // can straddle an eightbyte. Verify & simplify.
1151 Class &Current = OffsetBase < 64 ? Lo : Hi;
1154 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) {
1155 BuiltinType::Kind k = BT->getKind();
1157 if (k == BuiltinType::Void) {
1159 } else if (k == BuiltinType::Int128 || k == BuiltinType::UInt128) {
1162 } else if (k >= BuiltinType::Bool && k <= BuiltinType::LongLong) {
1164 } else if (k == BuiltinType::Float || k == BuiltinType::Double) {
1166 } else if (k == BuiltinType::LongDouble) {
1170 // FIXME: _Decimal32 and _Decimal64 are SSE.
1171 // FIXME: _float128 and _Decimal128 are (SSE, SSEUp).
1175 if (const EnumType *ET = Ty->getAs<EnumType>()) {
1176 // Classify the underlying integer type.
1177 classify(ET->getDecl()->getIntegerType(), OffsetBase, Lo, Hi);
1181 if (Ty->hasPointerRepresentation()) {
1186 if (Ty->isMemberPointerType()) {
1187 if (Ty->isMemberFunctionPointerType())
1194 if (const VectorType *VT = Ty->getAs<VectorType>()) {
1195 uint64_t Size = getContext().getTypeSize(VT);
1197 // gcc passes all <4 x char>, <2 x short>, <1 x int>, <1 x
1198 // float> as integer.
1201 // If this type crosses an eightbyte boundary, it should be
1203 uint64_t EB_Real = (OffsetBase) / 64;
1204 uint64_t EB_Imag = (OffsetBase + Size - 1) / 64;
1205 if (EB_Real != EB_Imag)
1207 } else if (Size == 64) {
1208 // gcc passes <1 x double> in memory. :(
1209 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::Double))
1212 // gcc passes <1 x long long> as INTEGER.
1213 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::LongLong) ||
1214 VT->getElementType()->isSpecificBuiltinType(BuiltinType::ULongLong) ||
1215 VT->getElementType()->isSpecificBuiltinType(BuiltinType::Long) ||
1216 VT->getElementType()->isSpecificBuiltinType(BuiltinType::ULong))
1221 // If this type crosses an eightbyte boundary, it should be
1223 if (OffsetBase && OffsetBase != 64)
1225 } else if (Size == 128 || (HasAVX && Size == 256)) {
1226 // Arguments of 256-bits are split into four eightbyte chunks. The
1227 // least significant one belongs to class SSE and all the others to class
1228 // SSEUP. The original Lo and Hi design considers that types can't be
1229 // greater than 128-bits, so a 64-bit split in Hi and Lo makes sense.
1230 // This design isn't correct for 256-bits, but since there're no cases
1231 // where the upper parts would need to be inspected, avoid adding
1232 // complexity and just consider Hi to match the 64-256 part.
1239 if (const ComplexType *CT = Ty->getAs<ComplexType>()) {
1240 QualType ET = getContext().getCanonicalType(CT->getElementType());
1242 uint64_t Size = getContext().getTypeSize(Ty);
1243 if (ET->isIntegralOrEnumerationType()) {
1246 else if (Size <= 128)
1248 } else if (ET == getContext().FloatTy)
1250 else if (ET == getContext().DoubleTy)
1252 else if (ET == getContext().LongDoubleTy)
1253 Current = ComplexX87;
1255 // If this complex type crosses an eightbyte boundary then it
1257 uint64_t EB_Real = (OffsetBase) / 64;
1258 uint64_t EB_Imag = (OffsetBase + getContext().getTypeSize(ET)) / 64;
1259 if (Hi == NoClass && EB_Real != EB_Imag)
1265 if (const ConstantArrayType *AT = getContext().getAsConstantArrayType(Ty)) {
1266 // Arrays are treated like structures.
1268 uint64_t Size = getContext().getTypeSize(Ty);
1270 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger
1271 // than four eightbytes, ..., it has class MEMORY.
1275 // AMD64-ABI 3.2.3p2: Rule 1. If ..., or it contains unaligned
1276 // fields, it has class MEMORY.
1278 // Only need to check alignment of array base.
1279 if (OffsetBase % getContext().getTypeAlign(AT->getElementType()))
1282 // Otherwise implement simplified merge. We could be smarter about
1283 // this, but it isn't worth it and would be harder to verify.
1285 uint64_t EltSize = getContext().getTypeSize(AT->getElementType());
1286 uint64_t ArraySize = AT->getSize().getZExtValue();
1288 // The only case a 256-bit wide vector could be used is when the array
1289 // contains a single 256-bit element. Since Lo and Hi logic isn't extended
1290 // to work for sizes wider than 128, early check and fallback to memory.
1291 if (Size > 128 && EltSize != 256)
1294 for (uint64_t i=0, Offset=OffsetBase; i<ArraySize; ++i, Offset += EltSize) {
1295 Class FieldLo, FieldHi;
1296 classify(AT->getElementType(), Offset, FieldLo, FieldHi);
1297 Lo = merge(Lo, FieldLo);
1298 Hi = merge(Hi, FieldHi);
1299 if (Lo == Memory || Hi == Memory)
1303 postMerge(Size, Lo, Hi);
1304 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp array classification.");
1308 if (const RecordType *RT = Ty->getAs<RecordType>()) {
1309 uint64_t Size = getContext().getTypeSize(Ty);
1311 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger
1312 // than four eightbytes, ..., it has class MEMORY.
1316 // AMD64-ABI 3.2.3p2: Rule 2. If a C++ object has either a non-trivial
1317 // copy constructor or a non-trivial destructor, it is passed by invisible
1319 if (hasNonTrivialDestructorOrCopyConstructor(RT))
1322 const RecordDecl *RD = RT->getDecl();
1324 // Assume variable sized types are passed in memory.
1325 if (RD->hasFlexibleArrayMember())
1328 const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD);
1330 // Reset Lo class, this will be recomputed.
1333 // If this is a C++ record, classify the bases first.
1334 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) {
1335 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(),
1336 e = CXXRD->bases_end(); i != e; ++i) {
1337 assert(!i->isVirtual() && !i->getType()->isDependentType() &&
1338 "Unexpected base class!");
1339 const CXXRecordDecl *Base =
1340 cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl());
1342 // Classify this field.
1344 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate exceeds a
1345 // single eightbyte, each is classified separately. Each eightbyte gets
1346 // initialized to class NO_CLASS.
1347 Class FieldLo, FieldHi;
1348 uint64_t Offset = OffsetBase + Layout.getBaseClassOffsetInBits(Base);
1349 classify(i->getType(), Offset, FieldLo, FieldHi);
1350 Lo = merge(Lo, FieldLo);
1351 Hi = merge(Hi, FieldHi);
1352 if (Lo == Memory || Hi == Memory)
1357 // Classify the fields one at a time, merging the results.
1359 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end();
1360 i != e; ++i, ++idx) {
1361 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx);
1362 bool BitField = i->isBitField();
1364 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger than
1365 // four eightbytes, or it contains unaligned fields, it has class MEMORY.
1367 // The only case a 256-bit wide vector could be used is when the struct
1368 // contains a single 256-bit element. Since Lo and Hi logic isn't extended
1369 // to work for sizes wider than 128, early check and fallback to memory.
1371 if (Size > 128 && getContext().getTypeSize(i->getType()) != 256) {
1375 // Note, skip this test for bit-fields, see below.
1376 if (!BitField && Offset % getContext().getTypeAlign(i->getType())) {
1381 // Classify this field.
1383 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate
1384 // exceeds a single eightbyte, each is classified
1385 // separately. Each eightbyte gets initialized to class
1387 Class FieldLo, FieldHi;
1389 // Bit-fields require special handling, they do not force the
1390 // structure to be passed in memory even if unaligned, and
1391 // therefore they can straddle an eightbyte.
1393 // Ignore padding bit-fields.
1394 if (i->isUnnamedBitfield())
1397 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx);
1398 uint64_t Size = i->getBitWidthValue(getContext());
1400 uint64_t EB_Lo = Offset / 64;
1401 uint64_t EB_Hi = (Offset + Size - 1) / 64;
1402 FieldLo = FieldHi = NoClass;
1404 assert(EB_Hi == EB_Lo && "Invalid classification, type > 16 bytes.");
1409 FieldHi = EB_Hi ? Integer : NoClass;
1412 classify(i->getType(), Offset, FieldLo, FieldHi);
1413 Lo = merge(Lo, FieldLo);
1414 Hi = merge(Hi, FieldHi);
1415 if (Lo == Memory || Hi == Memory)
1419 postMerge(Size, Lo, Hi);
1423 ABIArgInfo X86_64ABIInfo::getIndirectReturnResult(QualType Ty) const {
1424 // If this is a scalar LLVM value then assume LLVM will pass it in the right
1426 if (!isAggregateTypeForABI(Ty)) {
1427 // Treat an enum type as its underlying type.
1428 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
1429 Ty = EnumTy->getDecl()->getIntegerType();
1431 return (Ty->isPromotableIntegerType() ?
1432 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
1435 return ABIArgInfo::getIndirect(0);
1438 bool X86_64ABIInfo::IsIllegalVectorType(QualType Ty) const {
1439 if (const VectorType *VecTy = Ty->getAs<VectorType>()) {
1440 uint64_t Size = getContext().getTypeSize(VecTy);
1441 unsigned LargestVector = HasAVX ? 256 : 128;
1442 if (Size <= 64 || Size > LargestVector)
1449 ABIArgInfo X86_64ABIInfo::getIndirectResult(QualType Ty,
1450 unsigned freeIntRegs) const {
1451 // If this is a scalar LLVM value then assume LLVM will pass it in the right
1454 // This assumption is optimistic, as there could be free registers available
1455 // when we need to pass this argument in memory, and LLVM could try to pass
1456 // the argument in the free register. This does not seem to happen currently,
1457 // but this code would be much safer if we could mark the argument with
1458 // 'onstack'. See PR12193.
1459 if (!isAggregateTypeForABI(Ty) && !IsIllegalVectorType(Ty)) {
1460 // Treat an enum type as its underlying type.
1461 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
1462 Ty = EnumTy->getDecl()->getIntegerType();
1464 return (Ty->isPromotableIntegerType() ?
1465 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
1468 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty))
1469 return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
1471 // Compute the byval alignment. We specify the alignment of the byval in all
1472 // cases so that the mid-level optimizer knows the alignment of the byval.
1473 unsigned Align = std::max(getContext().getTypeAlign(Ty) / 8, 8U);
1475 // Attempt to avoid passing indirect results using byval when possible. This
1476 // is important for good codegen.
1478 // We do this by coercing the value into a scalar type which the backend can
1479 // handle naturally (i.e., without using byval).
1481 // For simplicity, we currently only do this when we have exhausted all of the
1482 // free integer registers. Doing this when there are free integer registers
1483 // would require more care, as we would have to ensure that the coerced value
1484 // did not claim the unused register. That would require either reording the
1485 // arguments to the function (so that any subsequent inreg values came first),
1486 // or only doing this optimization when there were no following arguments that
1489 // We currently expect it to be rare (particularly in well written code) for
1490 // arguments to be passed on the stack when there are still free integer
1491 // registers available (this would typically imply large structs being passed
1492 // by value), so this seems like a fair tradeoff for now.
1494 // We can revisit this if the backend grows support for 'onstack' parameter
1495 // attributes. See PR12193.
1496 if (freeIntRegs == 0) {
1497 uint64_t Size = getContext().getTypeSize(Ty);
1499 // If this type fits in an eightbyte, coerce it into the matching integral
1500 // type, which will end up on the stack (with alignment 8).
1501 if (Align == 8 && Size <= 64)
1502 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),
1506 return ABIArgInfo::getIndirect(Align);
1509 /// GetByteVectorType - The ABI specifies that a value should be passed in an
1510 /// full vector XMM/YMM register. Pick an LLVM IR type that will be passed as a
1511 /// vector register.
1512 llvm::Type *X86_64ABIInfo::GetByteVectorType(QualType Ty) const {
1513 llvm::Type *IRType = CGT.ConvertType(Ty);
1515 // Wrapper structs that just contain vectors are passed just like vectors,
1516 // strip them off if present.
1517 llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType);
1518 while (STy && STy->getNumElements() == 1) {
1519 IRType = STy->getElementType(0);
1520 STy = dyn_cast<llvm::StructType>(IRType);
1523 // If the preferred type is a 16-byte vector, prefer to pass it.
1524 if (llvm::VectorType *VT = dyn_cast<llvm::VectorType>(IRType)){
1525 llvm::Type *EltTy = VT->getElementType();
1526 unsigned BitWidth = VT->getBitWidth();
1527 if ((BitWidth >= 128 && BitWidth <= 256) &&
1528 (EltTy->isFloatTy() || EltTy->isDoubleTy() ||
1529 EltTy->isIntegerTy(8) || EltTy->isIntegerTy(16) ||
1530 EltTy->isIntegerTy(32) || EltTy->isIntegerTy(64) ||
1531 EltTy->isIntegerTy(128)))
1535 return llvm::VectorType::get(llvm::Type::getDoubleTy(getVMContext()), 2);
1538 /// BitsContainNoUserData - Return true if the specified [start,end) bit range
1539 /// is known to either be off the end of the specified type or being in
1540 /// alignment padding. The user type specified is known to be at most 128 bits
1541 /// in size, and have passed through X86_64ABIInfo::classify with a successful
1542 /// classification that put one of the two halves in the INTEGER class.
1544 /// It is conservatively correct to return false.
1545 static bool BitsContainNoUserData(QualType Ty, unsigned StartBit,
1546 unsigned EndBit, ASTContext &Context) {
1547 // If the bytes being queried are off the end of the type, there is no user
1548 // data hiding here. This handles analysis of builtins, vectors and other
1549 // types that don't contain interesting padding.
1550 unsigned TySize = (unsigned)Context.getTypeSize(Ty);
1551 if (TySize <= StartBit)
1554 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) {
1555 unsigned EltSize = (unsigned)Context.getTypeSize(AT->getElementType());
1556 unsigned NumElts = (unsigned)AT->getSize().getZExtValue();
1558 // Check each element to see if the element overlaps with the queried range.
1559 for (unsigned i = 0; i != NumElts; ++i) {
1560 // If the element is after the span we care about, then we're done..
1561 unsigned EltOffset = i*EltSize;
1562 if (EltOffset >= EndBit) break;
1564 unsigned EltStart = EltOffset < StartBit ? StartBit-EltOffset :0;
1565 if (!BitsContainNoUserData(AT->getElementType(), EltStart,
1566 EndBit-EltOffset, Context))
1569 // If it overlaps no elements, then it is safe to process as padding.
1573 if (const RecordType *RT = Ty->getAs<RecordType>()) {
1574 const RecordDecl *RD = RT->getDecl();
1575 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD);
1577 // If this is a C++ record, check the bases first.
1578 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) {
1579 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(),
1580 e = CXXRD->bases_end(); i != e; ++i) {
1581 assert(!i->isVirtual() && !i->getType()->isDependentType() &&
1582 "Unexpected base class!");
1583 const CXXRecordDecl *Base =
1584 cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl());
1586 // If the base is after the span we care about, ignore it.
1587 unsigned BaseOffset = (unsigned)Layout.getBaseClassOffsetInBits(Base);
1588 if (BaseOffset >= EndBit) continue;
1590 unsigned BaseStart = BaseOffset < StartBit ? StartBit-BaseOffset :0;
1591 if (!BitsContainNoUserData(i->getType(), BaseStart,
1592 EndBit-BaseOffset, Context))
1597 // Verify that no field has data that overlaps the region of interest. Yes
1598 // this could be sped up a lot by being smarter about queried fields,
1599 // however we're only looking at structs up to 16 bytes, so we don't care
1602 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end();
1603 i != e; ++i, ++idx) {
1604 unsigned FieldOffset = (unsigned)Layout.getFieldOffset(idx);
1606 // If we found a field after the region we care about, then we're done.
1607 if (FieldOffset >= EndBit) break;
1609 unsigned FieldStart = FieldOffset < StartBit ? StartBit-FieldOffset :0;
1610 if (!BitsContainNoUserData(i->getType(), FieldStart, EndBit-FieldOffset,
1615 // If nothing in this record overlapped the area of interest, then we're
1623 /// ContainsFloatAtOffset - Return true if the specified LLVM IR type has a
1624 /// float member at the specified offset. For example, {int,{float}} has a
1625 /// float at offset 4. It is conservatively correct for this routine to return
1627 static bool ContainsFloatAtOffset(llvm::Type *IRType, unsigned IROffset,
1628 const llvm::TargetData &TD) {
1629 // Base case if we find a float.
1630 if (IROffset == 0 && IRType->isFloatTy())
1633 // If this is a struct, recurse into the field at the specified offset.
1634 if (llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) {
1635 const llvm::StructLayout *SL = TD.getStructLayout(STy);
1636 unsigned Elt = SL->getElementContainingOffset(IROffset);
1637 IROffset -= SL->getElementOffset(Elt);
1638 return ContainsFloatAtOffset(STy->getElementType(Elt), IROffset, TD);
1641 // If this is an array, recurse into the field at the specified offset.
1642 if (llvm::ArrayType *ATy = dyn_cast<llvm::ArrayType>(IRType)) {
1643 llvm::Type *EltTy = ATy->getElementType();
1644 unsigned EltSize = TD.getTypeAllocSize(EltTy);
1645 IROffset -= IROffset/EltSize*EltSize;
1646 return ContainsFloatAtOffset(EltTy, IROffset, TD);
1653 /// GetSSETypeAtOffset - Return a type that will be passed by the backend in the
1654 /// low 8 bytes of an XMM register, corresponding to the SSE class.
1655 llvm::Type *X86_64ABIInfo::
1656 GetSSETypeAtOffset(llvm::Type *IRType, unsigned IROffset,
1657 QualType SourceTy, unsigned SourceOffset) const {
1658 // The only three choices we have are either double, <2 x float>, or float. We
1659 // pass as float if the last 4 bytes is just padding. This happens for
1660 // structs that contain 3 floats.
1661 if (BitsContainNoUserData(SourceTy, SourceOffset*8+32,
1662 SourceOffset*8+64, getContext()))
1663 return llvm::Type::getFloatTy(getVMContext());
1665 // We want to pass as <2 x float> if the LLVM IR type contains a float at
1666 // offset+0 and offset+4. Walk the LLVM IR type to find out if this is the
1668 if (ContainsFloatAtOffset(IRType, IROffset, getTargetData()) &&
1669 ContainsFloatAtOffset(IRType, IROffset+4, getTargetData()))
1670 return llvm::VectorType::get(llvm::Type::getFloatTy(getVMContext()), 2);
1672 return llvm::Type::getDoubleTy(getVMContext());
1676 /// GetINTEGERTypeAtOffset - The ABI specifies that a value should be passed in
1677 /// an 8-byte GPR. This means that we either have a scalar or we are talking
1678 /// about the high or low part of an up-to-16-byte struct. This routine picks
1679 /// the best LLVM IR type to represent this, which may be i64 or may be anything
1680 /// else that the backend will pass in a GPR that works better (e.g. i8, %foo*,
1683 /// PrefType is an LLVM IR type that corresponds to (part of) the IR type for
1684 /// the source type. IROffset is an offset in bytes into the LLVM IR type that
1685 /// the 8-byte value references. PrefType may be null.
1687 /// SourceTy is the source level type for the entire argument. SourceOffset is
1688 /// an offset into this that we're processing (which is always either 0 or 8).
1690 llvm::Type *X86_64ABIInfo::
1691 GetINTEGERTypeAtOffset(llvm::Type *IRType, unsigned IROffset,
1692 QualType SourceTy, unsigned SourceOffset) const {
1693 // If we're dealing with an un-offset LLVM IR type, then it means that we're
1694 // returning an 8-byte unit starting with it. See if we can safely use it.
1695 if (IROffset == 0) {
1696 // Pointers and int64's always fill the 8-byte unit.
1697 if (isa<llvm::PointerType>(IRType) || IRType->isIntegerTy(64))
1700 // If we have a 1/2/4-byte integer, we can use it only if the rest of the
1701 // goodness in the source type is just tail padding. This is allowed to
1702 // kick in for struct {double,int} on the int, but not on
1703 // struct{double,int,int} because we wouldn't return the second int. We
1704 // have to do this analysis on the source type because we can't depend on
1705 // unions being lowered a specific way etc.
1706 if (IRType->isIntegerTy(8) || IRType->isIntegerTy(16) ||
1707 IRType->isIntegerTy(32)) {
1708 unsigned BitWidth = cast<llvm::IntegerType>(IRType)->getBitWidth();
1710 if (BitsContainNoUserData(SourceTy, SourceOffset*8+BitWidth,
1711 SourceOffset*8+64, getContext()))
1716 if (llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) {
1717 // If this is a struct, recurse into the field at the specified offset.
1718 const llvm::StructLayout *SL = getTargetData().getStructLayout(STy);
1719 if (IROffset < SL->getSizeInBytes()) {
1720 unsigned FieldIdx = SL->getElementContainingOffset(IROffset);
1721 IROffset -= SL->getElementOffset(FieldIdx);
1723 return GetINTEGERTypeAtOffset(STy->getElementType(FieldIdx), IROffset,
1724 SourceTy, SourceOffset);
1728 if (llvm::ArrayType *ATy = dyn_cast<llvm::ArrayType>(IRType)) {
1729 llvm::Type *EltTy = ATy->getElementType();
1730 unsigned EltSize = getTargetData().getTypeAllocSize(EltTy);
1731 unsigned EltOffset = IROffset/EltSize*EltSize;
1732 return GetINTEGERTypeAtOffset(EltTy, IROffset-EltOffset, SourceTy,
1736 // Okay, we don't have any better idea of what to pass, so we pass this in an
1737 // integer register that isn't too big to fit the rest of the struct.
1738 unsigned TySizeInBytes =
1739 (unsigned)getContext().getTypeSizeInChars(SourceTy).getQuantity();
1741 assert(TySizeInBytes != SourceOffset && "Empty field?");
1743 // It is always safe to classify this as an integer type up to i64 that
1744 // isn't larger than the structure.
1745 return llvm::IntegerType::get(getVMContext(),
1746 std::min(TySizeInBytes-SourceOffset, 8U)*8);
1750 /// GetX86_64ByValArgumentPair - Given a high and low type that can ideally
1751 /// be used as elements of a two register pair to pass or return, return a
1752 /// first class aggregate to represent them. For example, if the low part of
1753 /// a by-value argument should be passed as i32* and the high part as float,
1754 /// return {i32*, float}.
1756 GetX86_64ByValArgumentPair(llvm::Type *Lo, llvm::Type *Hi,
1757 const llvm::TargetData &TD) {
1758 // In order to correctly satisfy the ABI, we need to the high part to start
1759 // at offset 8. If the high and low parts we inferred are both 4-byte types
1760 // (e.g. i32 and i32) then the resultant struct type ({i32,i32}) won't have
1761 // the second element at offset 8. Check for this:
1762 unsigned LoSize = (unsigned)TD.getTypeAllocSize(Lo);
1763 unsigned HiAlign = TD.getABITypeAlignment(Hi);
1764 unsigned HiStart = llvm::TargetData::RoundUpAlignment(LoSize, HiAlign);
1765 assert(HiStart != 0 && HiStart <= 8 && "Invalid x86-64 argument pair!");
1767 // To handle this, we have to increase the size of the low part so that the
1768 // second element will start at an 8 byte offset. We can't increase the size
1769 // of the second element because it might make us access off the end of the
1772 // There are only two sorts of types the ABI generation code can produce for
1773 // the low part of a pair that aren't 8 bytes in size: float or i8/i16/i32.
1774 // Promote these to a larger type.
1775 if (Lo->isFloatTy())
1776 Lo = llvm::Type::getDoubleTy(Lo->getContext());
1778 assert(Lo->isIntegerTy() && "Invalid/unknown lo type");
1779 Lo = llvm::Type::getInt64Ty(Lo->getContext());
1783 llvm::StructType *Result = llvm::StructType::get(Lo, Hi, NULL);
1786 // Verify that the second element is at an 8-byte offset.
1787 assert(TD.getStructLayout(Result)->getElementOffset(1) == 8 &&
1788 "Invalid x86-64 argument pair!");
1792 ABIArgInfo X86_64ABIInfo::
1793 classifyReturnType(QualType RetTy) const {
1794 // AMD64-ABI 3.2.3p4: Rule 1. Classify the return type with the
1795 // classification algorithm.
1796 X86_64ABIInfo::Class Lo, Hi;
1797 classify(RetTy, 0, Lo, Hi);
1799 // Check some invariants.
1800 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification.");
1801 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification.");
1803 llvm::Type *ResType = 0;
1807 return ABIArgInfo::getIgnore();
1808 // If the low part is just padding, it takes no register, leave ResType
1810 assert((Hi == SSE || Hi == Integer || Hi == X87Up) &&
1811 "Unknown missing lo part");
1816 llvm_unreachable("Invalid classification for lo word.");
1818 // AMD64-ABI 3.2.3p4: Rule 2. Types of class memory are returned via
1821 return getIndirectReturnResult(RetTy);
1823 // AMD64-ABI 3.2.3p4: Rule 3. If the class is INTEGER, the next
1824 // available register of the sequence %rax, %rdx is used.
1826 ResType = GetINTEGERTypeAtOffset(CGT.ConvertType(RetTy), 0, RetTy, 0);
1828 // If we have a sign or zero extended integer, make sure to return Extend
1829 // so that the parameter gets the right LLVM IR attributes.
1830 if (Hi == NoClass && isa<llvm::IntegerType>(ResType)) {
1831 // Treat an enum type as its underlying type.
1832 if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
1833 RetTy = EnumTy->getDecl()->getIntegerType();
1835 if (RetTy->isIntegralOrEnumerationType() &&
1836 RetTy->isPromotableIntegerType())
1837 return ABIArgInfo::getExtend();
1841 // AMD64-ABI 3.2.3p4: Rule 4. If the class is SSE, the next
1842 // available SSE register of the sequence %xmm0, %xmm1 is used.
1844 ResType = GetSSETypeAtOffset(CGT.ConvertType(RetTy), 0, RetTy, 0);
1847 // AMD64-ABI 3.2.3p4: Rule 6. If the class is X87, the value is
1848 // returned on the X87 stack in %st0 as 80-bit x87 number.
1850 ResType = llvm::Type::getX86_FP80Ty(getVMContext());
1853 // AMD64-ABI 3.2.3p4: Rule 8. If the class is COMPLEX_X87, the real
1854 // part of the value is returned in %st0 and the imaginary part in
1857 assert(Hi == ComplexX87 && "Unexpected ComplexX87 classification.");
1858 ResType = llvm::StructType::get(llvm::Type::getX86_FP80Ty(getVMContext()),
1859 llvm::Type::getX86_FP80Ty(getVMContext()),
1864 llvm::Type *HighPart = 0;
1866 // Memory was handled previously and X87 should
1867 // never occur as a hi class.
1870 llvm_unreachable("Invalid classification for hi word.");
1872 case ComplexX87: // Previously handled.
1877 HighPart = GetINTEGERTypeAtOffset(CGT.ConvertType(RetTy), 8, RetTy, 8);
1878 if (Lo == NoClass) // Return HighPart at offset 8 in memory.
1879 return ABIArgInfo::getDirect(HighPart, 8);
1882 HighPart = GetSSETypeAtOffset(CGT.ConvertType(RetTy), 8, RetTy, 8);
1883 if (Lo == NoClass) // Return HighPart at offset 8 in memory.
1884 return ABIArgInfo::getDirect(HighPart, 8);
1887 // AMD64-ABI 3.2.3p4: Rule 5. If the class is SSEUP, the eightbyte
1888 // is passed in the next available eightbyte chunk if the last used
1891 // SSEUP should always be preceded by SSE, just widen.
1893 assert(Lo == SSE && "Unexpected SSEUp classification.");
1894 ResType = GetByteVectorType(RetTy);
1897 // AMD64-ABI 3.2.3p4: Rule 7. If the class is X87UP, the value is
1898 // returned together with the previous X87 value in %st0.
1900 // If X87Up is preceded by X87, we don't need to do
1901 // anything. However, in some cases with unions it may not be
1902 // preceded by X87. In such situations we follow gcc and pass the
1903 // extra bits in an SSE reg.
1905 HighPart = GetSSETypeAtOffset(CGT.ConvertType(RetTy), 8, RetTy, 8);
1906 if (Lo == NoClass) // Return HighPart at offset 8 in memory.
1907 return ABIArgInfo::getDirect(HighPart, 8);
1912 // If a high part was specified, merge it together with the low part. It is
1913 // known to pass in the high eightbyte of the result. We do this by forming a
1914 // first class struct aggregate with the high and low part: {low, high}
1916 ResType = GetX86_64ByValArgumentPair(ResType, HighPart, getTargetData());
1918 return ABIArgInfo::getDirect(ResType);
1921 ABIArgInfo X86_64ABIInfo::classifyArgumentType(
1922 QualType Ty, unsigned freeIntRegs, unsigned &neededInt, unsigned &neededSSE)
1925 X86_64ABIInfo::Class Lo, Hi;
1926 classify(Ty, 0, Lo, Hi);
1928 // Check some invariants.
1929 // FIXME: Enforce these by construction.
1930 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification.");
1931 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification.");
1935 llvm::Type *ResType = 0;
1939 return ABIArgInfo::getIgnore();
1940 // If the low part is just padding, it takes no register, leave ResType
1942 assert((Hi == SSE || Hi == Integer || Hi == X87Up) &&
1943 "Unknown missing lo part");
1946 // AMD64-ABI 3.2.3p3: Rule 1. If the class is MEMORY, pass the argument
1950 // AMD64-ABI 3.2.3p3: Rule 5. If the class is X87, X87UP or
1951 // COMPLEX_X87, it is passed in memory.
1954 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty))
1956 return getIndirectResult(Ty, freeIntRegs);
1960 llvm_unreachable("Invalid classification for lo word.");
1962 // AMD64-ABI 3.2.3p3: Rule 2. If the class is INTEGER, the next
1963 // available register of the sequence %rdi, %rsi, %rdx, %rcx, %r8
1968 // Pick an 8-byte type based on the preferred type.
1969 ResType = GetINTEGERTypeAtOffset(CGT.ConvertType(Ty), 0, Ty, 0);
1971 // If we have a sign or zero extended integer, make sure to return Extend
1972 // so that the parameter gets the right LLVM IR attributes.
1973 if (Hi == NoClass && isa<llvm::IntegerType>(ResType)) {
1974 // Treat an enum type as its underlying type.
1975 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
1976 Ty = EnumTy->getDecl()->getIntegerType();
1978 if (Ty->isIntegralOrEnumerationType() &&
1979 Ty->isPromotableIntegerType())
1980 return ABIArgInfo::getExtend();
1985 // AMD64-ABI 3.2.3p3: Rule 3. If the class is SSE, the next
1986 // available SSE register is used, the registers are taken in the
1987 // order from %xmm0 to %xmm7.
1989 llvm::Type *IRType = CGT.ConvertType(Ty);
1990 ResType = GetSSETypeAtOffset(IRType, 0, Ty, 0);
1996 llvm::Type *HighPart = 0;
1998 // Memory was handled previously, ComplexX87 and X87 should
1999 // never occur as hi classes, and X87Up must be preceded by X87,
2000 // which is passed in memory.
2004 llvm_unreachable("Invalid classification for hi word.");
2006 case NoClass: break;
2010 // Pick an 8-byte type based on the preferred type.
2011 HighPart = GetINTEGERTypeAtOffset(CGT.ConvertType(Ty), 8, Ty, 8);
2013 if (Lo == NoClass) // Pass HighPart at offset 8 in memory.
2014 return ABIArgInfo::getDirect(HighPart, 8);
2017 // X87Up generally doesn't occur here (long double is passed in
2018 // memory), except in situations involving unions.
2021 HighPart = GetSSETypeAtOffset(CGT.ConvertType(Ty), 8, Ty, 8);
2023 if (Lo == NoClass) // Pass HighPart at offset 8 in memory.
2024 return ABIArgInfo::getDirect(HighPart, 8);
2029 // AMD64-ABI 3.2.3p3: Rule 4. If the class is SSEUP, the
2030 // eightbyte is passed in the upper half of the last used SSE
2031 // register. This only happens when 128-bit vectors are passed.
2033 assert(Lo == SSE && "Unexpected SSEUp classification");
2034 ResType = GetByteVectorType(Ty);
2038 // If a high part was specified, merge it together with the low part. It is
2039 // known to pass in the high eightbyte of the result. We do this by forming a
2040 // first class struct aggregate with the high and low part: {low, high}
2042 ResType = GetX86_64ByValArgumentPair(ResType, HighPart, getTargetData());
2044 return ABIArgInfo::getDirect(ResType);
2047 void X86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const {
2049 FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
2051 // Keep track of the number of assigned registers.
2052 unsigned freeIntRegs = 6, freeSSERegs = 8;
2054 // If the return value is indirect, then the hidden argument is consuming one
2055 // integer register.
2056 if (FI.getReturnInfo().isIndirect())
2059 // AMD64-ABI 3.2.3p3: Once arguments are classified, the registers
2060 // get assigned (in left-to-right order) for passing as follows...
2061 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end();
2063 unsigned neededInt, neededSSE;
2064 it->info = classifyArgumentType(it->type, freeIntRegs, neededInt,
2067 // AMD64-ABI 3.2.3p3: If there are no registers available for any
2068 // eightbyte of an argument, the whole argument is passed on the
2069 // stack. If registers have already been assigned for some
2070 // eightbytes of such an argument, the assignments get reverted.
2071 if (freeIntRegs >= neededInt && freeSSERegs >= neededSSE) {
2072 freeIntRegs -= neededInt;
2073 freeSSERegs -= neededSSE;
2075 it->info = getIndirectResult(it->type, freeIntRegs);
2080 static llvm::Value *EmitVAArgFromMemory(llvm::Value *VAListAddr,
2082 CodeGenFunction &CGF) {
2083 llvm::Value *overflow_arg_area_p =
2084 CGF.Builder.CreateStructGEP(VAListAddr, 2, "overflow_arg_area_p");
2085 llvm::Value *overflow_arg_area =
2086 CGF.Builder.CreateLoad(overflow_arg_area_p, "overflow_arg_area");
2088 // AMD64-ABI 3.5.7p5: Step 7. Align l->overflow_arg_area upwards to a 16
2089 // byte boundary if alignment needed by type exceeds 8 byte boundary.
2090 // It isn't stated explicitly in the standard, but in practice we use
2091 // alignment greater than 16 where necessary.
2092 uint64_t Align = CGF.getContext().getTypeAlign(Ty) / 8;
2094 // overflow_arg_area = (overflow_arg_area + align - 1) & -align;
2095 llvm::Value *Offset =
2096 llvm::ConstantInt::get(CGF.Int64Ty, Align - 1);
2097 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset);
2098 llvm::Value *AsInt = CGF.Builder.CreatePtrToInt(overflow_arg_area,
2100 llvm::Value *Mask = llvm::ConstantInt::get(CGF.Int64Ty, -(uint64_t)Align);
2102 CGF.Builder.CreateIntToPtr(CGF.Builder.CreateAnd(AsInt, Mask),
2103 overflow_arg_area->getType(),
2104 "overflow_arg_area.align");
2107 // AMD64-ABI 3.5.7p5: Step 8. Fetch type from l->overflow_arg_area.
2108 llvm::Type *LTy = CGF.ConvertTypeForMem(Ty);
2110 CGF.Builder.CreateBitCast(overflow_arg_area,
2111 llvm::PointerType::getUnqual(LTy));
2113 // AMD64-ABI 3.5.7p5: Step 9. Set l->overflow_arg_area to:
2114 // l->overflow_arg_area + sizeof(type).
2115 // AMD64-ABI 3.5.7p5: Step 10. Align l->overflow_arg_area upwards to
2116 // an 8 byte boundary.
2118 uint64_t SizeInBytes = (CGF.getContext().getTypeSize(Ty) + 7) / 8;
2119 llvm::Value *Offset =
2120 llvm::ConstantInt::get(CGF.Int32Ty, (SizeInBytes + 7) & ~7);
2121 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset,
2122 "overflow_arg_area.next");
2123 CGF.Builder.CreateStore(overflow_arg_area, overflow_arg_area_p);
2125 // AMD64-ABI 3.5.7p5: Step 11. Return the fetched type.
2129 llvm::Value *X86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
2130 CodeGenFunction &CGF) const {
2131 // Assume that va_list type is correct; should be pointer to LLVM type:
2135 // i8* overflow_arg_area;
2136 // i8* reg_save_area;
2138 unsigned neededInt, neededSSE;
2140 Ty = CGF.getContext().getCanonicalType(Ty);
2141 ABIArgInfo AI = classifyArgumentType(Ty, 0, neededInt, neededSSE);
2143 // AMD64-ABI 3.5.7p5: Step 1. Determine whether type may be passed
2144 // in the registers. If not go to step 7.
2145 if (!neededInt && !neededSSE)
2146 return EmitVAArgFromMemory(VAListAddr, Ty, CGF);
2148 // AMD64-ABI 3.5.7p5: Step 2. Compute num_gp to hold the number of
2149 // general purpose registers needed to pass type and num_fp to hold
2150 // the number of floating point registers needed.
2152 // AMD64-ABI 3.5.7p5: Step 3. Verify whether arguments fit into
2153 // registers. In the case: l->gp_offset > 48 - num_gp * 8 or
2154 // l->fp_offset > 304 - num_fp * 16 go to step 7.
2156 // NOTE: 304 is a typo, there are (6 * 8 + 8 * 16) = 176 bytes of
2157 // register save space).
2159 llvm::Value *InRegs = 0;
2160 llvm::Value *gp_offset_p = 0, *gp_offset = 0;
2161 llvm::Value *fp_offset_p = 0, *fp_offset = 0;
2163 gp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 0, "gp_offset_p");
2164 gp_offset = CGF.Builder.CreateLoad(gp_offset_p, "gp_offset");
2165 InRegs = llvm::ConstantInt::get(CGF.Int32Ty, 48 - neededInt * 8);
2166 InRegs = CGF.Builder.CreateICmpULE(gp_offset, InRegs, "fits_in_gp");
2170 fp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 1, "fp_offset_p");
2171 fp_offset = CGF.Builder.CreateLoad(fp_offset_p, "fp_offset");
2172 llvm::Value *FitsInFP =
2173 llvm::ConstantInt::get(CGF.Int32Ty, 176 - neededSSE * 16);
2174 FitsInFP = CGF.Builder.CreateICmpULE(fp_offset, FitsInFP, "fits_in_fp");
2175 InRegs = InRegs ? CGF.Builder.CreateAnd(InRegs, FitsInFP) : FitsInFP;
2178 llvm::BasicBlock *InRegBlock = CGF.createBasicBlock("vaarg.in_reg");
2179 llvm::BasicBlock *InMemBlock = CGF.createBasicBlock("vaarg.in_mem");
2180 llvm::BasicBlock *ContBlock = CGF.createBasicBlock("vaarg.end");
2181 CGF.Builder.CreateCondBr(InRegs, InRegBlock, InMemBlock);
2183 // Emit code to load the value if it was passed in registers.
2185 CGF.EmitBlock(InRegBlock);
2187 // AMD64-ABI 3.5.7p5: Step 4. Fetch type from l->reg_save_area with
2188 // an offset of l->gp_offset and/or l->fp_offset. This may require
2189 // copying to a temporary location in case the parameter is passed
2190 // in different register classes or requires an alignment greater
2191 // than 8 for general purpose registers and 16 for XMM registers.
2193 // FIXME: This really results in shameful code when we end up needing to
2194 // collect arguments from different places; often what should result in a
2195 // simple assembling of a structure from scattered addresses has many more
2196 // loads than necessary. Can we clean this up?
2197 llvm::Type *LTy = CGF.ConvertTypeForMem(Ty);
2198 llvm::Value *RegAddr =
2199 CGF.Builder.CreateLoad(CGF.Builder.CreateStructGEP(VAListAddr, 3),
2201 if (neededInt && neededSSE) {
2203 assert(AI.isDirect() && "Unexpected ABI info for mixed regs");
2204 llvm::StructType *ST = cast<llvm::StructType>(AI.getCoerceToType());
2205 llvm::Value *Tmp = CGF.CreateTempAlloca(ST);
2206 assert(ST->getNumElements() == 2 && "Unexpected ABI info for mixed regs");
2207 llvm::Type *TyLo = ST->getElementType(0);
2208 llvm::Type *TyHi = ST->getElementType(1);
2209 assert((TyLo->isFPOrFPVectorTy() ^ TyHi->isFPOrFPVectorTy()) &&
2210 "Unexpected ABI info for mixed regs");
2211 llvm::Type *PTyLo = llvm::PointerType::getUnqual(TyLo);
2212 llvm::Type *PTyHi = llvm::PointerType::getUnqual(TyHi);
2213 llvm::Value *GPAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset);
2214 llvm::Value *FPAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset);
2215 llvm::Value *RegLoAddr = TyLo->isFloatingPointTy() ? FPAddr : GPAddr;
2216 llvm::Value *RegHiAddr = TyLo->isFloatingPointTy() ? GPAddr : FPAddr;
2218 CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegLoAddr, PTyLo));
2219 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0));
2220 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegHiAddr, PTyHi));
2221 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1));
2223 RegAddr = CGF.Builder.CreateBitCast(Tmp,
2224 llvm::PointerType::getUnqual(LTy));
2225 } else if (neededInt) {
2226 RegAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset);
2227 RegAddr = CGF.Builder.CreateBitCast(RegAddr,
2228 llvm::PointerType::getUnqual(LTy));
2229 } else if (neededSSE == 1) {
2230 RegAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset);
2231 RegAddr = CGF.Builder.CreateBitCast(RegAddr,
2232 llvm::PointerType::getUnqual(LTy));
2234 assert(neededSSE == 2 && "Invalid number of needed registers!");
2235 // SSE registers are spaced 16 bytes apart in the register save
2236 // area, we need to collect the two eightbytes together.
2237 llvm::Value *RegAddrLo = CGF.Builder.CreateGEP(RegAddr, fp_offset);
2238 llvm::Value *RegAddrHi = CGF.Builder.CreateConstGEP1_32(RegAddrLo, 16);
2239 llvm::Type *DoubleTy = CGF.DoubleTy;
2240 llvm::Type *DblPtrTy =
2241 llvm::PointerType::getUnqual(DoubleTy);
2242 llvm::StructType *ST = llvm::StructType::get(DoubleTy,
2244 llvm::Value *V, *Tmp = CGF.CreateTempAlloca(ST);
2245 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrLo,
2247 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0));
2248 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrHi,
2250 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1));
2251 RegAddr = CGF.Builder.CreateBitCast(Tmp,
2252 llvm::PointerType::getUnqual(LTy));
2255 // AMD64-ABI 3.5.7p5: Step 5. Set:
2256 // l->gp_offset = l->gp_offset + num_gp * 8
2257 // l->fp_offset = l->fp_offset + num_fp * 16.
2259 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededInt * 8);
2260 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(gp_offset, Offset),
2264 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededSSE * 16);
2265 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(fp_offset, Offset),
2268 CGF.EmitBranch(ContBlock);
2270 // Emit code to load the value if it was passed in memory.
2272 CGF.EmitBlock(InMemBlock);
2273 llvm::Value *MemAddr = EmitVAArgFromMemory(VAListAddr, Ty, CGF);
2275 // Return the appropriate result.
2277 CGF.EmitBlock(ContBlock);
2278 llvm::PHINode *ResAddr = CGF.Builder.CreatePHI(RegAddr->getType(), 2,
2280 ResAddr->addIncoming(RegAddr, InRegBlock);
2281 ResAddr->addIncoming(MemAddr, InMemBlock);
2285 ABIArgInfo WinX86_64ABIInfo::classify(QualType Ty) const {
2287 if (Ty->isVoidType())
2288 return ABIArgInfo::getIgnore();
2290 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
2291 Ty = EnumTy->getDecl()->getIntegerType();
2293 uint64_t Size = getContext().getTypeSize(Ty);
2295 if (const RecordType *RT = Ty->getAs<RecordType>()) {
2296 if (hasNonTrivialDestructorOrCopyConstructor(RT) ||
2297 RT->getDecl()->hasFlexibleArrayMember())
2298 return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
2300 // FIXME: mingw-w64-gcc emits 128-bit struct as i128
2302 getContext().getTargetInfo().getTriple().getOS()
2303 == llvm::Triple::MinGW32)
2304 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),
2307 // MS x64 ABI requirement: "Any argument that doesn't fit in 8 bytes, or is
2308 // not 1, 2, 4, or 8 bytes, must be passed by reference."
2310 (Size & (Size - 1)) == 0)
2311 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),
2314 return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
2317 if (Ty->isPromotableIntegerType())
2318 return ABIArgInfo::getExtend();
2320 return ABIArgInfo::getDirect();
2323 void WinX86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const {
2325 QualType RetTy = FI.getReturnType();
2326 FI.getReturnInfo() = classify(RetTy);
2328 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end();
2330 it->info = classify(it->type);
2333 llvm::Value *WinX86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
2334 CodeGenFunction &CGF) const {
2335 llvm::Type *BPP = CGF.Int8PtrPtrTy;
2337 CGBuilderTy &Builder = CGF.Builder;
2338 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP,
2340 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur");
2342 llvm::PointerType::getUnqual(CGF.ConvertType(Ty));
2343 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy);
2346 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 8);
2347 llvm::Value *NextAddr =
2348 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset),
2350 Builder.CreateStore(NextAddr, VAListAddrAsBPP);
2358 class PPC32TargetCodeGenInfo : public DefaultTargetCodeGenInfo {
2360 PPC32TargetCodeGenInfo(CodeGenTypes &CGT) : DefaultTargetCodeGenInfo(CGT) {}
2362 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const {
2363 // This is recovered from gcc output.
2364 return 1; // r1 is the dedicated stack pointer
2367 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
2368 llvm::Value *Address) const;
2374 PPC32TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
2375 llvm::Value *Address) const {
2376 // This is calculated from the LLVM and GCC tables and verified
2377 // against gcc output. AFAIK all ABIs use the same encoding.
2379 CodeGen::CGBuilderTy &Builder = CGF.Builder;
2381 llvm::IntegerType *i8 = CGF.Int8Ty;
2382 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4);
2383 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8);
2384 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16);
2386 // 0-31: r0-31, the 4-byte general-purpose registers
2387 AssignToArrayRange(Builder, Address, Four8, 0, 31);
2389 // 32-63: fp0-31, the 8-byte floating-point registers
2390 AssignToArrayRange(Builder, Address, Eight8, 32, 63);
2392 // 64-76 are various 4-byte special-purpose registers:
2399 AssignToArrayRange(Builder, Address, Four8, 64, 76);
2401 // 77-108: v0-31, the 16-byte vector registers
2402 AssignToArrayRange(Builder, Address, Sixteen8, 77, 108);
2409 AssignToArrayRange(Builder, Address, Four8, 109, 113);
2415 //===----------------------------------------------------------------------===//
2416 // ARM ABI Implementation
2417 //===----------------------------------------------------------------------===//
2421 class ARMABIInfo : public ABIInfo {
2433 ARMABIInfo(CodeGenTypes &CGT, ABIKind _Kind) : ABIInfo(CGT), Kind(_Kind) {}
2435 bool isEABI() const {
2437 getContext().getTargetInfo().getTriple().getEnvironmentName();
2438 return (Env == "gnueabi" || Env == "eabi" || Env == "androideabi");
2442 ABIKind getABIKind() const { return Kind; }
2444 ABIArgInfo classifyReturnType(QualType RetTy) const;
2445 ABIArgInfo classifyArgumentType(QualType RetTy) const;
2447 virtual void computeInfo(CGFunctionInfo &FI) const;
2449 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
2450 CodeGenFunction &CGF) const;
2453 class ARMTargetCodeGenInfo : public TargetCodeGenInfo {
2455 ARMTargetCodeGenInfo(CodeGenTypes &CGT, ARMABIInfo::ABIKind K)
2456 :TargetCodeGenInfo(new ARMABIInfo(CGT, K)) {}
2458 const ARMABIInfo &getABIInfo() const {
2459 return static_cast<const ARMABIInfo&>(TargetCodeGenInfo::getABIInfo());
2462 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const {
2466 StringRef getARCRetainAutoreleasedReturnValueMarker() const {
2467 return "mov\tr7, r7\t\t@ marker for objc_retainAutoreleaseReturnValue";
2470 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
2471 llvm::Value *Address) const {
2472 llvm::Value *Four8 = llvm::ConstantInt::get(CGF.Int8Ty, 4);
2474 // 0-15 are the 16 integer registers.
2475 AssignToArrayRange(CGF.Builder, Address, Four8, 0, 15);
2479 unsigned getSizeOfUnwindException() const {
2480 if (getABIInfo().isEABI()) return 88;
2481 return TargetCodeGenInfo::getSizeOfUnwindException();
2487 void ARMABIInfo::computeInfo(CGFunctionInfo &FI) const {
2488 FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
2489 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end();
2491 it->info = classifyArgumentType(it->type);
2493 // Always honor user-specified calling convention.
2494 if (FI.getCallingConvention() != llvm::CallingConv::C)
2497 // Calling convention as default by an ABI.
2498 llvm::CallingConv::ID DefaultCC;
2500 DefaultCC = llvm::CallingConv::ARM_AAPCS;
2502 DefaultCC = llvm::CallingConv::ARM_APCS;
2504 // If user did not ask for specific calling convention explicitly (e.g. via
2505 // pcs attribute), set effective calling convention if it's different than ABI
2507 switch (getABIKind()) {
2509 if (DefaultCC != llvm::CallingConv::ARM_APCS)
2510 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_APCS);
2513 if (DefaultCC != llvm::CallingConv::ARM_AAPCS)
2514 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_AAPCS);
2517 if (DefaultCC != llvm::CallingConv::ARM_AAPCS_VFP)
2518 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_AAPCS_VFP);
2523 /// isHomogeneousAggregate - Return true if a type is an AAPCS-VFP homogeneous
2524 /// aggregate. If HAMembers is non-null, the number of base elements
2525 /// contained in the type is returned through it; this is used for the
2526 /// recursive calls that check aggregate component types.
2527 static bool isHomogeneousAggregate(QualType Ty, const Type *&Base,
2528 ASTContext &Context,
2529 uint64_t *HAMembers = 0) {
2530 uint64_t Members = 0;
2531 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) {
2532 if (!isHomogeneousAggregate(AT->getElementType(), Base, Context, &Members))
2534 Members *= AT->getSize().getZExtValue();
2535 } else if (const RecordType *RT = Ty->getAs<RecordType>()) {
2536 const RecordDecl *RD = RT->getDecl();
2537 if (RD->hasFlexibleArrayMember())
2541 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end();
2543 const FieldDecl *FD = *i;
2544 uint64_t FldMembers;
2545 if (!isHomogeneousAggregate(FD->getType(), Base, Context, &FldMembers))
2548 Members = (RD->isUnion() ?
2549 std::max(Members, FldMembers) : Members + FldMembers);
2553 if (const ComplexType *CT = Ty->getAs<ComplexType>()) {
2555 Ty = CT->getElementType();
2558 // Homogeneous aggregates for AAPCS-VFP must have base types of float,
2559 // double, or 64-bit or 128-bit vectors.
2560 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) {
2561 if (BT->getKind() != BuiltinType::Float &&
2562 BT->getKind() != BuiltinType::Double)
2564 } else if (const VectorType *VT = Ty->getAs<VectorType>()) {
2565 unsigned VecSize = Context.getTypeSize(VT);
2566 if (VecSize != 64 && VecSize != 128)
2572 // The base type must be the same for all members. Vector types of the
2573 // same total size are treated as being equivalent here.
2574 const Type *TyPtr = Ty.getTypePtr();
2577 if (Base != TyPtr &&
2578 (!Base->isVectorType() || !TyPtr->isVectorType() ||
2579 Context.getTypeSize(Base) != Context.getTypeSize(TyPtr)))
2583 // Homogeneous Aggregates can have at most 4 members of the base type.
2585 *HAMembers = Members;
2587 return (Members > 0 && Members <= 4);
2590 ABIArgInfo ARMABIInfo::classifyArgumentType(QualType Ty) const {
2591 if (!isAggregateTypeForABI(Ty)) {
2592 // Treat an enum type as its underlying type.
2593 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
2594 Ty = EnumTy->getDecl()->getIntegerType();
2596 return (Ty->isPromotableIntegerType() ?
2597 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
2600 // Ignore empty records.
2601 if (isEmptyRecord(getContext(), Ty, true))
2602 return ABIArgInfo::getIgnore();
2604 // Structures with either a non-trivial destructor or a non-trivial
2605 // copy constructor are always indirect.
2606 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty))
2607 return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
2609 if (getABIKind() == ARMABIInfo::AAPCS_VFP) {
2610 // Homogeneous Aggregates need to be expanded.
2611 const Type *Base = 0;
2612 if (isHomogeneousAggregate(Ty, Base, getContext())) {
2613 assert(Base && "Base class should be set for homogeneous aggregate");
2614 return ABIArgInfo::getExpand();
2618 // Otherwise, pass by coercing to a structure of the appropriate size.
2620 // FIXME: This is kind of nasty... but there isn't much choice because the ARM
2621 // backend doesn't support byval.
2622 // FIXME: This doesn't handle alignment > 64 bits.
2625 if (getContext().getTypeAlign(Ty) > 32) {
2626 ElemTy = llvm::Type::getInt64Ty(getVMContext());
2627 SizeRegs = (getContext().getTypeSize(Ty) + 63) / 64;
2629 ElemTy = llvm::Type::getInt32Ty(getVMContext());
2630 SizeRegs = (getContext().getTypeSize(Ty) + 31) / 32;
2634 llvm::StructType::get(llvm::ArrayType::get(ElemTy, SizeRegs), NULL);
2635 return ABIArgInfo::getDirect(STy);
2638 static bool isIntegerLikeType(QualType Ty, ASTContext &Context,
2639 llvm::LLVMContext &VMContext) {
2640 // APCS, C Language Calling Conventions, Non-Simple Return Values: A structure
2641 // is called integer-like if its size is less than or equal to one word, and
2642 // the offset of each of its addressable sub-fields is zero.
2644 uint64_t Size = Context.getTypeSize(Ty);
2646 // Check that the type fits in a word.
2650 // FIXME: Handle vector types!
2651 if (Ty->isVectorType())
2654 // Float types are never treated as "integer like".
2655 if (Ty->isRealFloatingType())
2658 // If this is a builtin or pointer type then it is ok.
2659 if (Ty->getAs<BuiltinType>() || Ty->isPointerType())
2662 // Small complex integer types are "integer like".
2663 if (const ComplexType *CT = Ty->getAs<ComplexType>())
2664 return isIntegerLikeType(CT->getElementType(), Context, VMContext);
2666 // Single element and zero sized arrays should be allowed, by the definition
2667 // above, but they are not.
2669 // Otherwise, it must be a record type.
2670 const RecordType *RT = Ty->getAs<RecordType>();
2671 if (!RT) return false;
2673 // Ignore records with flexible arrays.
2674 const RecordDecl *RD = RT->getDecl();
2675 if (RD->hasFlexibleArrayMember())
2678 // Check that all sub-fields are at offset 0, and are themselves "integer
2680 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD);
2682 bool HadField = false;
2684 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end();
2685 i != e; ++i, ++idx) {
2686 const FieldDecl *FD = *i;
2688 // Bit-fields are not addressable, we only need to verify they are "integer
2689 // like". We still have to disallow a subsequent non-bitfield, for example:
2690 // struct { int : 0; int x }
2691 // is non-integer like according to gcc.
2692 if (FD->isBitField()) {
2696 if (!isIntegerLikeType(FD->getType(), Context, VMContext))
2702 // Check if this field is at offset 0.
2703 if (Layout.getFieldOffset(idx) != 0)
2706 if (!isIntegerLikeType(FD->getType(), Context, VMContext))
2709 // Only allow at most one field in a structure. This doesn't match the
2710 // wording above, but follows gcc in situations with a field following an
2712 if (!RD->isUnion()) {
2723 ABIArgInfo ARMABIInfo::classifyReturnType(QualType RetTy) const {
2724 if (RetTy->isVoidType())
2725 return ABIArgInfo::getIgnore();
2727 // Large vector types should be returned via memory.
2728 if (RetTy->isVectorType() && getContext().getTypeSize(RetTy) > 128)
2729 return ABIArgInfo::getIndirect(0);
2731 if (!isAggregateTypeForABI(RetTy)) {
2732 // Treat an enum type as its underlying type.
2733 if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
2734 RetTy = EnumTy->getDecl()->getIntegerType();
2736 return (RetTy->isPromotableIntegerType() ?
2737 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
2740 // Structures with either a non-trivial destructor or a non-trivial
2741 // copy constructor are always indirect.
2742 if (isRecordWithNonTrivialDestructorOrCopyConstructor(RetTy))
2743 return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
2745 // Are we following APCS?
2746 if (getABIKind() == APCS) {
2747 if (isEmptyRecord(getContext(), RetTy, false))
2748 return ABIArgInfo::getIgnore();
2750 // Complex types are all returned as packed integers.
2752 // FIXME: Consider using 2 x vector types if the back end handles them
2754 if (RetTy->isAnyComplexType())
2755 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),
2756 getContext().getTypeSize(RetTy)));
2758 // Integer like structures are returned in r0.
2759 if (isIntegerLikeType(RetTy, getContext(), getVMContext())) {
2760 // Return in the smallest viable integer type.
2761 uint64_t Size = getContext().getTypeSize(RetTy);
2763 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext()));
2765 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext()));
2766 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext()));
2769 // Otherwise return in memory.
2770 return ABIArgInfo::getIndirect(0);
2773 // Otherwise this is an AAPCS variant.
2775 if (isEmptyRecord(getContext(), RetTy, true))
2776 return ABIArgInfo::getIgnore();
2778 // Check for homogeneous aggregates with AAPCS-VFP.
2779 if (getABIKind() == AAPCS_VFP) {
2780 const Type *Base = 0;
2781 if (isHomogeneousAggregate(RetTy, Base, getContext())) {
2782 assert(Base && "Base class should be set for homogeneous aggregate");
2783 // Homogeneous Aggregates are returned directly.
2784 return ABIArgInfo::getDirect();
2788 // Aggregates <= 4 bytes are returned in r0; other aggregates
2789 // are returned indirectly.
2790 uint64_t Size = getContext().getTypeSize(RetTy);
2792 // Return in the smallest viable integer type.
2794 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext()));
2796 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext()));
2797 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext()));
2800 return ABIArgInfo::getIndirect(0);
2803 llvm::Value *ARMABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
2804 CodeGenFunction &CGF) const {
2805 llvm::Type *BP = CGF.Int8PtrTy;
2806 llvm::Type *BPP = CGF.Int8PtrPtrTy;
2808 CGBuilderTy &Builder = CGF.Builder;
2809 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, "ap");
2810 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur");
2811 // Handle address alignment for type alignment > 32 bits
2812 uint64_t TyAlign = CGF.getContext().getTypeAlign(Ty) / 8;
2814 assert((TyAlign & (TyAlign - 1)) == 0 &&
2815 "Alignment is not power of 2!");
2816 llvm::Value *AddrAsInt = Builder.CreatePtrToInt(Addr, CGF.Int32Ty);
2817 AddrAsInt = Builder.CreateAdd(AddrAsInt, Builder.getInt32(TyAlign - 1));
2818 AddrAsInt = Builder.CreateAnd(AddrAsInt, Builder.getInt32(~(TyAlign - 1)));
2819 Addr = Builder.CreateIntToPtr(AddrAsInt, BP);
2822 llvm::PointerType::getUnqual(CGF.ConvertType(Ty));
2823 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy);
2826 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4);
2827 llvm::Value *NextAddr =
2828 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset),
2830 Builder.CreateStore(NextAddr, VAListAddrAsBPP);
2835 //===----------------------------------------------------------------------===//
2836 // PTX ABI Implementation
2837 //===----------------------------------------------------------------------===//
2841 class PTXABIInfo : public ABIInfo {
2843 PTXABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {}
2845 ABIArgInfo classifyReturnType(QualType RetTy) const;
2846 ABIArgInfo classifyArgumentType(QualType Ty) const;
2848 virtual void computeInfo(CGFunctionInfo &FI) const;
2849 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
2850 CodeGenFunction &CFG) const;
2853 class PTXTargetCodeGenInfo : public TargetCodeGenInfo {
2855 PTXTargetCodeGenInfo(CodeGenTypes &CGT)
2856 : TargetCodeGenInfo(new PTXABIInfo(CGT)) {}
2858 virtual void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
2859 CodeGen::CodeGenModule &M) const;
2862 ABIArgInfo PTXABIInfo::classifyReturnType(QualType RetTy) const {
2863 if (RetTy->isVoidType())
2864 return ABIArgInfo::getIgnore();
2865 if (isAggregateTypeForABI(RetTy))
2866 return ABIArgInfo::getIndirect(0);
2867 return ABIArgInfo::getDirect();
2870 ABIArgInfo PTXABIInfo::classifyArgumentType(QualType Ty) const {
2871 if (isAggregateTypeForABI(Ty))
2872 return ABIArgInfo::getIndirect(0);
2874 return ABIArgInfo::getDirect();
2877 void PTXABIInfo::computeInfo(CGFunctionInfo &FI) const {
2878 FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
2879 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end();
2881 it->info = classifyArgumentType(it->type);
2883 // Always honor user-specified calling convention.
2884 if (FI.getCallingConvention() != llvm::CallingConv::C)
2887 // Calling convention as default by an ABI.
2888 llvm::CallingConv::ID DefaultCC;
2889 const LangOptions &LangOpts = getContext().getLangOpts();
2890 if (LangOpts.OpenCL || LangOpts.CUDA) {
2891 // If we are in OpenCL or CUDA mode, then default to device functions
2892 DefaultCC = llvm::CallingConv::PTX_Device;
2894 // If we are in standard C/C++ mode, use the triple to decide on the default
2896 getContext().getTargetInfo().getTriple().getEnvironmentName();
2897 if (Env == "device")
2898 DefaultCC = llvm::CallingConv::PTX_Device;
2900 DefaultCC = llvm::CallingConv::PTX_Kernel;
2902 FI.setEffectiveCallingConvention(DefaultCC);
2906 llvm::Value *PTXABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
2907 CodeGenFunction &CFG) const {
2908 llvm_unreachable("PTX does not support varargs");
2911 void PTXTargetCodeGenInfo::SetTargetAttributes(const Decl *D,
2912 llvm::GlobalValue *GV,
2913 CodeGen::CodeGenModule &M) const{
2914 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D);
2917 llvm::Function *F = cast<llvm::Function>(GV);
2919 // Perform special handling in OpenCL mode
2920 if (M.getLangOpts().OpenCL) {
2921 // Use OpenCL function attributes to set proper calling conventions
2922 // By default, all functions are device functions
2923 if (FD->hasAttr<OpenCLKernelAttr>()) {
2924 // OpenCL __kernel functions get a kernel calling convention
2925 F->setCallingConv(llvm::CallingConv::PTX_Kernel);
2926 // And kernel functions are not subject to inlining
2927 F->addFnAttr(llvm::Attribute::NoInline);
2931 // Perform special handling in CUDA mode.
2932 if (M.getLangOpts().CUDA) {
2933 // CUDA __global__ functions get a kernel calling convention. Since
2934 // __global__ functions cannot be called from the device, we do not
2935 // need to set the noinline attribute.
2936 if (FD->getAttr<CUDAGlobalAttr>())
2937 F->setCallingConv(llvm::CallingConv::PTX_Kernel);
2943 //===----------------------------------------------------------------------===//
2944 // MBlaze ABI Implementation
2945 //===----------------------------------------------------------------------===//
2949 class MBlazeABIInfo : public ABIInfo {
2951 MBlazeABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {}
2953 bool isPromotableIntegerType(QualType Ty) const;
2955 ABIArgInfo classifyReturnType(QualType RetTy) const;
2956 ABIArgInfo classifyArgumentType(QualType RetTy) const;
2958 virtual void computeInfo(CGFunctionInfo &FI) const {
2959 FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
2960 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end();
2962 it->info = classifyArgumentType(it->type);
2965 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
2966 CodeGenFunction &CGF) const;
2969 class MBlazeTargetCodeGenInfo : public TargetCodeGenInfo {
2971 MBlazeTargetCodeGenInfo(CodeGenTypes &CGT)
2972 : TargetCodeGenInfo(new MBlazeABIInfo(CGT)) {}
2973 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
2974 CodeGen::CodeGenModule &M) const;
2979 bool MBlazeABIInfo::isPromotableIntegerType(QualType Ty) const {
2980 // MBlaze ABI requires all 8 and 16 bit quantities to be extended.
2981 if (const BuiltinType *BT = Ty->getAs<BuiltinType>())
2982 switch (BT->getKind()) {
2983 case BuiltinType::Bool:
2984 case BuiltinType::Char_S:
2985 case BuiltinType::Char_U:
2986 case BuiltinType::SChar:
2987 case BuiltinType::UChar:
2988 case BuiltinType::Short:
2989 case BuiltinType::UShort:
2997 llvm::Value *MBlazeABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
2998 CodeGenFunction &CGF) const {
3004 ABIArgInfo MBlazeABIInfo::classifyReturnType(QualType RetTy) const {
3005 if (RetTy->isVoidType())
3006 return ABIArgInfo::getIgnore();
3007 if (isAggregateTypeForABI(RetTy))
3008 return ABIArgInfo::getIndirect(0);
3010 return (isPromotableIntegerType(RetTy) ?
3011 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
3014 ABIArgInfo MBlazeABIInfo::classifyArgumentType(QualType Ty) const {
3015 if (isAggregateTypeForABI(Ty))
3016 return ABIArgInfo::getIndirect(0);
3018 return (isPromotableIntegerType(Ty) ?
3019 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
3022 void MBlazeTargetCodeGenInfo::SetTargetAttributes(const Decl *D,
3023 llvm::GlobalValue *GV,
3024 CodeGen::CodeGenModule &M)
3026 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D);
3029 llvm::CallingConv::ID CC = llvm::CallingConv::C;
3030 if (FD->hasAttr<MBlazeInterruptHandlerAttr>())
3031 CC = llvm::CallingConv::MBLAZE_INTR;
3032 else if (FD->hasAttr<MBlazeSaveVolatilesAttr>())
3033 CC = llvm::CallingConv::MBLAZE_SVOL;
3035 if (CC != llvm::CallingConv::C) {
3036 // Handle 'interrupt_handler' attribute:
3037 llvm::Function *F = cast<llvm::Function>(GV);
3039 // Step 1: Set ISR calling convention.
3040 F->setCallingConv(CC);
3042 // Step 2: Add attributes goodness.
3043 F->addFnAttr(llvm::Attribute::NoInline);
3046 // Step 3: Emit _interrupt_handler alias.
3047 if (CC == llvm::CallingConv::MBLAZE_INTR)
3048 new llvm::GlobalAlias(GV->getType(), llvm::Function::ExternalLinkage,
3049 "_interrupt_handler", GV, &M.getModule());
3053 //===----------------------------------------------------------------------===//
3054 // MSP430 ABI Implementation
3055 //===----------------------------------------------------------------------===//
3059 class MSP430TargetCodeGenInfo : public TargetCodeGenInfo {
3061 MSP430TargetCodeGenInfo(CodeGenTypes &CGT)
3062 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {}
3063 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
3064 CodeGen::CodeGenModule &M) const;
3069 void MSP430TargetCodeGenInfo::SetTargetAttributes(const Decl *D,
3070 llvm::GlobalValue *GV,
3071 CodeGen::CodeGenModule &M) const {
3072 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) {
3073 if (const MSP430InterruptAttr *attr = FD->getAttr<MSP430InterruptAttr>()) {
3074 // Handle 'interrupt' attribute:
3075 llvm::Function *F = cast<llvm::Function>(GV);
3077 // Step 1: Set ISR calling convention.
3078 F->setCallingConv(llvm::CallingConv::MSP430_INTR);
3080 // Step 2: Add attributes goodness.
3081 F->addFnAttr(llvm::Attribute::NoInline);
3083 // Step 3: Emit ISR vector alias.
3084 unsigned Num = attr->getNumber() + 0xffe0;
3085 new llvm::GlobalAlias(GV->getType(), llvm::Function::ExternalLinkage,
3086 "vector_" + Twine::utohexstr(Num),
3087 GV, &M.getModule());
3092 //===----------------------------------------------------------------------===//
3093 // MIPS ABI Implementation. This works for both little-endian and
3094 // big-endian variants.
3095 //===----------------------------------------------------------------------===//
3098 class MipsABIInfo : public ABIInfo {
3100 unsigned MinABIStackAlignInBytes;
3101 llvm::Type* HandleAggregates(QualType Ty) const;
3102 llvm::Type* returnAggregateInRegs(QualType RetTy, uint64_t Size) const;
3103 llvm::Type* getPaddingType(uint64_t Align, uint64_t Offset) const;
3105 MipsABIInfo(CodeGenTypes &CGT, bool _IsO32) :
3106 ABIInfo(CGT), IsO32(_IsO32), MinABIStackAlignInBytes(IsO32 ? 4 : 8) {}
3108 ABIArgInfo classifyReturnType(QualType RetTy) const;
3109 ABIArgInfo classifyArgumentType(QualType RetTy, uint64_t &Offset) const;
3110 virtual void computeInfo(CGFunctionInfo &FI) const;
3111 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
3112 CodeGenFunction &CGF) const;
3115 class MIPSTargetCodeGenInfo : public TargetCodeGenInfo {
3116 unsigned SizeOfUnwindException;
3118 MIPSTargetCodeGenInfo(CodeGenTypes &CGT, bool IsO32)
3119 : TargetCodeGenInfo(new MipsABIInfo(CGT, IsO32)),
3120 SizeOfUnwindException(IsO32 ? 24 : 32) {}
3122 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const {
3126 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
3127 llvm::Value *Address) const;
3129 unsigned getSizeOfUnwindException() const {
3130 return SizeOfUnwindException;
3135 // In N32/64, an aligned double precision floating point field is passed in
3137 llvm::Type* MipsABIInfo::HandleAggregates(QualType Ty) const {
3141 if (Ty->isComplexType())
3142 return CGT.ConvertType(Ty);
3144 const RecordType *RT = Ty->getAs<RecordType>();
3146 // Unions are passed in integer registers.
3147 if (!RT || !RT->isStructureOrClassType())
3150 const RecordDecl *RD = RT->getDecl();
3151 const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD);
3152 uint64_t StructSize = getContext().getTypeSize(Ty);
3153 assert(!(StructSize % 8) && "Size of structure must be multiple of 8.");
3155 uint64_t LastOffset = 0;
3157 llvm::IntegerType *I64 = llvm::IntegerType::get(getVMContext(), 64);
3158 SmallVector<llvm::Type*, 8> ArgList;
3160 // Iterate over fields in the struct/class and check if there are any aligned
3162 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end();
3163 i != e; ++i, ++idx) {
3164 const QualType Ty = (*i)->getType();
3165 const BuiltinType *BT = Ty->getAs<BuiltinType>();
3167 if (!BT || BT->getKind() != BuiltinType::Double)
3170 uint64_t Offset = Layout.getFieldOffset(idx);
3171 if (Offset % 64) // Ignore doubles that are not aligned.
3174 // Add ((Offset - LastOffset) / 64) args of type i64.
3175 for (unsigned j = (Offset - LastOffset) / 64; j > 0; --j)
3176 ArgList.push_back(I64);
3179 ArgList.push_back(llvm::Type::getDoubleTy(getVMContext()));
3180 LastOffset = Offset + 64;
3183 // This struct/class doesn't have an aligned double field.
3187 // Add ((StructSize - LastOffset) / 64) args of type i64.
3188 for (unsigned N = (StructSize - LastOffset) / 64; N; --N)
3189 ArgList.push_back(I64);
3191 // If the size of the remainder is not zero, add one more integer type to
3193 unsigned R = (StructSize - LastOffset) % 64;
3195 ArgList.push_back(llvm::IntegerType::get(getVMContext(), R));
3197 return llvm::StructType::get(getVMContext(), ArgList);
3200 llvm::Type *MipsABIInfo::getPaddingType(uint64_t Align, uint64_t Offset) const {
3201 // Padding is inserted only for N32/64.
3205 assert(Align <= 16 && "Alignment larger than 16 not handled.");
3206 return (Align == 16 && Offset & 0xf) ?
3207 llvm::IntegerType::get(getVMContext(), 64) : 0;
3211 MipsABIInfo::classifyArgumentType(QualType Ty, uint64_t &Offset) const {
3212 uint64_t OrigOffset = Offset;
3214 llvm::RoundUpToAlignment(getContext().getTypeSize(Ty), 64) / 8;
3215 uint64_t Align = getContext().getTypeAlign(Ty) / 8;
3216 Offset = llvm::RoundUpToAlignment(Offset, std::max(Align, (uint64_t)8));
3219 if (isAggregateTypeForABI(Ty)) {
3220 // Ignore empty aggregates.
3222 return ABIArgInfo::getIgnore();
3224 // Records with non trivial destructors/constructors should not be passed
3226 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) {
3227 Offset = OrigOffset + 8;
3228 return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
3231 // If we have reached here, aggregates are passed either indirectly via a
3232 // byval pointer or directly by coercing to another structure type. In the
3233 // latter case, padding is inserted if the offset of the aggregate is
3235 llvm::Type *ResType = HandleAggregates(Ty);
3238 return ABIArgInfo::getIndirect(0);
3240 return ABIArgInfo::getDirect(ResType, 0, getPaddingType(Align, OrigOffset));
3243 // Treat an enum type as its underlying type.
3244 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
3245 Ty = EnumTy->getDecl()->getIntegerType();
3247 if (Ty->isPromotableIntegerType())
3248 return ABIArgInfo::getExtend();
3250 return ABIArgInfo::getDirect(0, 0, getPaddingType(Align, OrigOffset));
3254 MipsABIInfo::returnAggregateInRegs(QualType RetTy, uint64_t Size) const {
3255 const RecordType *RT = RetTy->getAs<RecordType>();
3256 SmallVector<llvm::Type*, 2> RTList;
3258 if (RT && RT->isStructureOrClassType()) {
3259 const RecordDecl *RD = RT->getDecl();
3260 const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD);
3261 unsigned FieldCnt = Layout.getFieldCount();
3263 // N32/64 returns struct/classes in floating point registers if the
3264 // following conditions are met:
3265 // 1. The size of the struct/class is no larger than 128-bit.
3266 // 2. The struct/class has one or two fields all of which are floating
3268 // 3. The offset of the first field is zero (this follows what gcc does).
3270 // Any other composite results are returned in integer registers.
3272 if (FieldCnt && (FieldCnt <= 2) && !Layout.getFieldOffset(0)) {
3273 RecordDecl::field_iterator b = RD->field_begin(), e = RD->field_end();
3274 for (; b != e; ++b) {
3275 const BuiltinType *BT = (*b)->getType()->getAs<BuiltinType>();
3277 if (!BT || !BT->isFloatingPoint())
3280 RTList.push_back(CGT.ConvertType((*b)->getType()));
3284 return llvm::StructType::get(getVMContext(), RTList,
3285 RD->hasAttr<PackedAttr>());
3291 RTList.push_back(llvm::IntegerType::get(getVMContext(),
3292 std::min(Size, (uint64_t)64)));
3294 RTList.push_back(llvm::IntegerType::get(getVMContext(), Size - 64));
3296 return llvm::StructType::get(getVMContext(), RTList);
3299 ABIArgInfo MipsABIInfo::classifyReturnType(QualType RetTy) const {
3300 uint64_t Size = getContext().getTypeSize(RetTy);
3302 if (RetTy->isVoidType() || Size == 0)
3303 return ABIArgInfo::getIgnore();
3305 if (isAggregateTypeForABI(RetTy)) {
3307 if (RetTy->isAnyComplexType())
3308 return ABIArgInfo::getDirect();
3310 if (!IsO32 && !isRecordWithNonTrivialDestructorOrCopyConstructor(RetTy))
3311 return ABIArgInfo::getDirect(returnAggregateInRegs(RetTy, Size));
3314 return ABIArgInfo::getIndirect(0);
3317 // Treat an enum type as its underlying type.
3318 if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
3319 RetTy = EnumTy->getDecl()->getIntegerType();
3321 return (RetTy->isPromotableIntegerType() ?
3322 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
3325 void MipsABIInfo::computeInfo(CGFunctionInfo &FI) const {
3326 ABIArgInfo &RetInfo = FI.getReturnInfo();
3327 RetInfo = classifyReturnType(FI.getReturnType());
3329 // Check if a pointer to an aggregate is passed as a hidden argument.
3330 uint64_t Offset = RetInfo.isIndirect() ? 8 : 0;
3332 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end();
3334 it->info = classifyArgumentType(it->type, Offset);
3337 llvm::Value* MipsABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
3338 CodeGenFunction &CGF) const {
3339 llvm::Type *BP = CGF.Int8PtrTy;
3340 llvm::Type *BPP = CGF.Int8PtrPtrTy;
3342 CGBuilderTy &Builder = CGF.Builder;
3343 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, "ap");
3344 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur");
3345 int64_t TypeAlign = getContext().getTypeAlign(Ty) / 8;
3346 llvm::Type *PTy = llvm::PointerType::getUnqual(CGF.ConvertType(Ty));
3347 llvm::Value *AddrTyped;
3348 unsigned PtrWidth = getContext().getTargetInfo().getPointerWidth(0);
3349 llvm::IntegerType *IntTy = (PtrWidth == 32) ? CGF.Int32Ty : CGF.Int64Ty;
3351 if (TypeAlign > MinABIStackAlignInBytes) {
3352 llvm::Value *AddrAsInt = CGF.Builder.CreatePtrToInt(Addr, IntTy);
3353 llvm::Value *Inc = llvm::ConstantInt::get(IntTy, TypeAlign - 1);
3354 llvm::Value *Mask = llvm::ConstantInt::get(IntTy, -TypeAlign);
3355 llvm::Value *Add = CGF.Builder.CreateAdd(AddrAsInt, Inc);
3356 llvm::Value *And = CGF.Builder.CreateAnd(Add, Mask);
3357 AddrTyped = CGF.Builder.CreateIntToPtr(And, PTy);
3360 AddrTyped = Builder.CreateBitCast(Addr, PTy);
3362 llvm::Value *AlignedAddr = Builder.CreateBitCast(AddrTyped, BP);
3363 TypeAlign = std::max((unsigned)TypeAlign, MinABIStackAlignInBytes);
3365 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, TypeAlign);
3366 llvm::Value *NextAddr =
3367 Builder.CreateGEP(AlignedAddr, llvm::ConstantInt::get(IntTy, Offset),
3369 Builder.CreateStore(NextAddr, VAListAddrAsBPP);
3375 MIPSTargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
3376 llvm::Value *Address) const {
3377 // This information comes from gcc's implementation, which seems to
3378 // as canonical as it gets.
3380 // Everything on MIPS is 4 bytes. Double-precision FP registers
3381 // are aliased to pairs of single-precision FP registers.
3382 llvm::Value *Four8 = llvm::ConstantInt::get(CGF.Int8Ty, 4);
3384 // 0-31 are the general purpose registers, $0 - $31.
3385 // 32-63 are the floating-point registers, $f0 - $f31.
3386 // 64 and 65 are the multiply/divide registers, $hi and $lo.
3387 // 66 is the (notional, I think) register for signal-handler return.
3388 AssignToArrayRange(CGF.Builder, Address, Four8, 0, 65);
3390 // 67-74 are the floating-point status registers, $fcc0 - $fcc7.
3391 // They are one bit wide and ignored here.
3393 // 80-111 are the coprocessor 0 registers, $c0r0 - $c0r31.
3394 // (coprocessor 1 is the FP unit)
3395 // 112-143 are the coprocessor 2 registers, $c2r0 - $c2r31.
3396 // 144-175 are the coprocessor 3 registers, $c3r0 - $c3r31.
3397 // 176-181 are the DSP accumulator registers.
3398 AssignToArrayRange(CGF.Builder, Address, Four8, 80, 181);
3402 //===----------------------------------------------------------------------===//
3403 // TCE ABI Implementation (see http://tce.cs.tut.fi). Uses mostly the defaults.
3404 // Currently subclassed only to implement custom OpenCL C function attribute
3406 //===----------------------------------------------------------------------===//
3410 class TCETargetCodeGenInfo : public DefaultTargetCodeGenInfo {
3412 TCETargetCodeGenInfo(CodeGenTypes &CGT)
3413 : DefaultTargetCodeGenInfo(CGT) {}
3415 virtual void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
3416 CodeGen::CodeGenModule &M) const;
3419 void TCETargetCodeGenInfo::SetTargetAttributes(const Decl *D,
3420 llvm::GlobalValue *GV,
3421 CodeGen::CodeGenModule &M) const {
3422 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D);
3425 llvm::Function *F = cast<llvm::Function>(GV);
3427 if (M.getLangOpts().OpenCL) {
3428 if (FD->hasAttr<OpenCLKernelAttr>()) {
3429 // OpenCL C Kernel functions are not subject to inlining
3430 F->addFnAttr(llvm::Attribute::NoInline);
3432 if (FD->hasAttr<ReqdWorkGroupSizeAttr>()) {
3434 // Convert the reqd_work_group_size() attributes to metadata.
3435 llvm::LLVMContext &Context = F->getContext();
3436 llvm::NamedMDNode *OpenCLMetadata =
3437 M.getModule().getOrInsertNamedMetadata("opencl.kernel_wg_size_info");
3439 SmallVector<llvm::Value*, 5> Operands;
3440 Operands.push_back(F);
3442 Operands.push_back(llvm::Constant::getIntegerValue(M.Int32Ty,
3444 FD->getAttr<ReqdWorkGroupSizeAttr>()->getXDim())));
3445 Operands.push_back(llvm::Constant::getIntegerValue(M.Int32Ty,
3447 FD->getAttr<ReqdWorkGroupSizeAttr>()->getYDim())));
3448 Operands.push_back(llvm::Constant::getIntegerValue(M.Int32Ty,
3450 FD->getAttr<ReqdWorkGroupSizeAttr>()->getZDim())));
3452 // Add a boolean constant operand for "required" (true) or "hint" (false)
3453 // for implementing the work_group_size_hint attr later. Currently
3454 // always true as the hint is not yet implemented.
3455 Operands.push_back(llvm::ConstantInt::getTrue(Context));
3456 OpenCLMetadata->addOperand(llvm::MDNode::get(Context, Operands));
3464 //===----------------------------------------------------------------------===//
3465 // Hexagon ABI Implementation
3466 //===----------------------------------------------------------------------===//
3470 class HexagonABIInfo : public ABIInfo {
3474 HexagonABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {}
3478 ABIArgInfo classifyReturnType(QualType RetTy) const;
3479 ABIArgInfo classifyArgumentType(QualType RetTy) const;
3481 virtual void computeInfo(CGFunctionInfo &FI) const;
3483 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
3484 CodeGenFunction &CGF) const;
3487 class HexagonTargetCodeGenInfo : public TargetCodeGenInfo {
3489 HexagonTargetCodeGenInfo(CodeGenTypes &CGT)
3490 :TargetCodeGenInfo(new HexagonABIInfo(CGT)) {}
3492 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const {
3499 void HexagonABIInfo::computeInfo(CGFunctionInfo &FI) const {
3500 FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
3501 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end();
3503 it->info = classifyArgumentType(it->type);
3506 ABIArgInfo HexagonABIInfo::classifyArgumentType(QualType Ty) const {
3507 if (!isAggregateTypeForABI(Ty)) {
3508 // Treat an enum type as its underlying type.
3509 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
3510 Ty = EnumTy->getDecl()->getIntegerType();
3512 return (Ty->isPromotableIntegerType() ?
3513 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
3516 // Ignore empty records.
3517 if (isEmptyRecord(getContext(), Ty, true))
3518 return ABIArgInfo::getIgnore();
3520 // Structures with either a non-trivial destructor or a non-trivial
3521 // copy constructor are always indirect.
3522 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty))
3523 return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
3525 uint64_t Size = getContext().getTypeSize(Ty);
3527 return ABIArgInfo::getIndirect(0, /*ByVal=*/true);
3528 // Pass in the smallest viable integer type.
3530 return ABIArgInfo::getDirect(llvm::Type::getInt64Ty(getVMContext()));
3532 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext()));
3534 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext()));
3536 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext()));
3539 ABIArgInfo HexagonABIInfo::classifyReturnType(QualType RetTy) const {
3540 if (RetTy->isVoidType())
3541 return ABIArgInfo::getIgnore();
3543 // Large vector types should be returned via memory.
3544 if (RetTy->isVectorType() && getContext().getTypeSize(RetTy) > 64)
3545 return ABIArgInfo::getIndirect(0);
3547 if (!isAggregateTypeForABI(RetTy)) {
3548 // Treat an enum type as its underlying type.
3549 if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
3550 RetTy = EnumTy->getDecl()->getIntegerType();
3552 return (RetTy->isPromotableIntegerType() ?
3553 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
3556 // Structures with either a non-trivial destructor or a non-trivial
3557 // copy constructor are always indirect.
3558 if (isRecordWithNonTrivialDestructorOrCopyConstructor(RetTy))
3559 return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
3561 if (isEmptyRecord(getContext(), RetTy, true))
3562 return ABIArgInfo::getIgnore();
3564 // Aggregates <= 8 bytes are returned in r0; other aggregates
3565 // are returned indirectly.
3566 uint64_t Size = getContext().getTypeSize(RetTy);
3568 // Return in the smallest viable integer type.
3570 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext()));
3572 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext()));
3574 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext()));
3575 return ABIArgInfo::getDirect(llvm::Type::getInt64Ty(getVMContext()));
3578 return ABIArgInfo::getIndirect(0, /*ByVal=*/true);
3581 llvm::Value *HexagonABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
3582 CodeGenFunction &CGF) const {
3583 // FIXME: Need to handle alignment
3584 llvm::Type *BPP = CGF.Int8PtrPtrTy;
3586 CGBuilderTy &Builder = CGF.Builder;
3587 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP,
3589 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur");
3591 llvm::PointerType::getUnqual(CGF.ConvertType(Ty));
3592 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy);
3595 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4);
3596 llvm::Value *NextAddr =
3597 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset),
3599 Builder.CreateStore(NextAddr, VAListAddrAsBPP);
3605 const TargetCodeGenInfo &CodeGenModule::getTargetCodeGenInfo() {
3606 if (TheTargetCodeGenInfo)
3607 return *TheTargetCodeGenInfo;
3609 const llvm::Triple &Triple = getContext().getTargetInfo().getTriple();
3610 switch (Triple.getArch()) {
3612 return *(TheTargetCodeGenInfo = new DefaultTargetCodeGenInfo(Types));
3614 case llvm::Triple::mips:
3615 case llvm::Triple::mipsel:
3616 return *(TheTargetCodeGenInfo = new MIPSTargetCodeGenInfo(Types, true));
3618 case llvm::Triple::mips64:
3619 case llvm::Triple::mips64el:
3620 return *(TheTargetCodeGenInfo = new MIPSTargetCodeGenInfo(Types, false));
3622 case llvm::Triple::arm:
3623 case llvm::Triple::thumb:
3625 ARMABIInfo::ABIKind Kind = ARMABIInfo::AAPCS;
3627 if (strcmp(getContext().getTargetInfo().getABI(), "apcs-gnu") == 0)
3628 Kind = ARMABIInfo::APCS;
3629 else if (CodeGenOpts.FloatABI == "hard")
3630 Kind = ARMABIInfo::AAPCS_VFP;
3632 return *(TheTargetCodeGenInfo = new ARMTargetCodeGenInfo(Types, Kind));
3635 case llvm::Triple::ppc:
3636 return *(TheTargetCodeGenInfo = new PPC32TargetCodeGenInfo(Types));
3638 case llvm::Triple::ptx32:
3639 case llvm::Triple::ptx64:
3640 return *(TheTargetCodeGenInfo = new PTXTargetCodeGenInfo(Types));
3642 case llvm::Triple::mblaze:
3643 return *(TheTargetCodeGenInfo = new MBlazeTargetCodeGenInfo(Types));
3645 case llvm::Triple::msp430:
3646 return *(TheTargetCodeGenInfo = new MSP430TargetCodeGenInfo(Types));
3648 case llvm::Triple::tce:
3649 return *(TheTargetCodeGenInfo = new TCETargetCodeGenInfo(Types));
3651 case llvm::Triple::x86: {
3652 bool DisableMMX = strcmp(getContext().getTargetInfo().getABI(), "no-mmx") == 0;
3654 if (Triple.isOSDarwin())
3655 return *(TheTargetCodeGenInfo =
3656 new X86_32TargetCodeGenInfo(
3657 Types, true, true, DisableMMX, false));
3659 switch (Triple.getOS()) {
3660 case llvm::Triple::Cygwin:
3661 case llvm::Triple::MinGW32:
3662 case llvm::Triple::AuroraUX:
3663 case llvm::Triple::DragonFly:
3664 case llvm::Triple::FreeBSD:
3665 case llvm::Triple::OpenBSD:
3666 return *(TheTargetCodeGenInfo =
3667 new X86_32TargetCodeGenInfo(
3668 Types, false, true, DisableMMX, false));
3670 case llvm::Triple::Win32:
3671 return *(TheTargetCodeGenInfo =
3672 new X86_32TargetCodeGenInfo(
3673 Types, false, true, DisableMMX, true));
3676 return *(TheTargetCodeGenInfo =
3677 new X86_32TargetCodeGenInfo(
3678 Types, false, false, DisableMMX, false));
3682 case llvm::Triple::x86_64: {
3683 bool HasAVX = strcmp(getContext().getTargetInfo().getABI(), "avx") == 0;
3685 switch (Triple.getOS()) {
3686 case llvm::Triple::Win32:
3687 case llvm::Triple::MinGW32:
3688 case llvm::Triple::Cygwin:
3689 return *(TheTargetCodeGenInfo = new WinX86_64TargetCodeGenInfo(Types));
3691 return *(TheTargetCodeGenInfo = new X86_64TargetCodeGenInfo(Types,
3695 case llvm::Triple::hexagon:
3696 return *(TheTargetCodeGenInfo = new HexagonTargetCodeGenInfo(Types));