2 * SPDX-License-Identifier: BSD-4-Clause
4 * Copyright (c) 1991 Regents of the University of California.
6 * Copyright (c) 1994 John S. Dyson
8 * Copyright (c) 1994 David Greenman
10 * Copyright (c) 2003 Peter Wemm
11 * All rights reserved.
12 * Copyright (c) 2005-2010 Alan L. Cox <alc@cs.rice.edu>
13 * All rights reserved.
14 * Copyright (c) 2014 Andrew Turner
15 * All rights reserved.
16 * Copyright (c) 2014 The FreeBSD Foundation
17 * All rights reserved.
18 * Copyright (c) 2015-2018 Ruslan Bukin <br@bsdpad.com>
19 * All rights reserved.
21 * This code is derived from software contributed to Berkeley by
22 * the Systems Programming Group of the University of Utah Computer
23 * Science Department and William Jolitz of UUNET Technologies Inc.
25 * Portions of this software were developed by Andrew Turner under
26 * sponsorship from The FreeBSD Foundation.
28 * Portions of this software were developed by SRI International and the
29 * University of Cambridge Computer Laboratory under DARPA/AFRL contract
30 * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
32 * Portions of this software were developed by the University of Cambridge
33 * Computer Laboratory as part of the CTSRD Project, with support from the
34 * UK Higher Education Innovation Fund (HEIF).
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
39 * 1. Redistributions of source code must retain the above copyright
40 * notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce the above copyright
42 * notice, this list of conditions and the following disclaimer in the
43 * documentation and/or other materials provided with the distribution.
44 * 3. All advertising materials mentioning features or use of this software
45 * must display the following acknowledgement:
46 * This product includes software developed by the University of
47 * California, Berkeley and its contributors.
48 * 4. Neither the name of the University nor the names of its contributors
49 * may be used to endorse or promote products derived from this software
50 * without specific prior written permission.
52 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
53 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
54 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
55 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
56 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
57 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
58 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
59 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
60 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
61 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
64 * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91
67 * Copyright (c) 2003 Networks Associates Technology, Inc.
68 * All rights reserved.
70 * This software was developed for the FreeBSD Project by Jake Burkholder,
71 * Safeport Network Services, and Network Associates Laboratories, the
72 * Security Research Division of Network Associates, Inc. under
73 * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA
74 * CHATS research program.
76 * Redistribution and use in source and binary forms, with or without
77 * modification, are permitted provided that the following conditions
79 * 1. Redistributions of source code must retain the above copyright
80 * notice, this list of conditions and the following disclaimer.
81 * 2. Redistributions in binary form must reproduce the above copyright
82 * notice, this list of conditions and the following disclaimer in the
83 * documentation and/or other materials provided with the distribution.
85 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
86 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
87 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
88 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
89 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
90 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
91 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
92 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
93 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
94 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
98 #include <sys/cdefs.h>
99 __FBSDID("$FreeBSD$");
102 * Manages physical address maps.
104 * Since the information managed by this module is
105 * also stored by the logical address mapping module,
106 * this module may throw away valid virtual-to-physical
107 * mappings at almost any time. However, invalidations
108 * of virtual-to-physical mappings must be done as
111 * In order to cope with hardware architectures which
112 * make virtual-to-physical map invalidates expensive,
113 * this module may delay invalidate or reduced protection
114 * operations until such time as they are actually
115 * necessary. This module is given full information as
116 * to which processors are currently using which maps,
117 * and to when physical maps must be made correct.
120 #include <sys/param.h>
121 #include <sys/systm.h>
122 #include <sys/bitstring.h>
124 #include <sys/cpuset.h>
125 #include <sys/kernel.h>
127 #include <sys/lock.h>
128 #include <sys/malloc.h>
129 #include <sys/mman.h>
130 #include <sys/msgbuf.h>
131 #include <sys/mutex.h>
132 #include <sys/physmem.h>
133 #include <sys/proc.h>
134 #include <sys/rwlock.h>
135 #include <sys/sbuf.h>
137 #include <sys/vmem.h>
138 #include <sys/vmmeter.h>
139 #include <sys/sched.h>
140 #include <sys/sysctl.h>
144 #include <vm/vm_param.h>
145 #include <vm/vm_kern.h>
146 #include <vm/vm_page.h>
147 #include <vm/vm_map.h>
148 #include <vm/vm_object.h>
149 #include <vm/vm_extern.h>
150 #include <vm/vm_pageout.h>
151 #include <vm/vm_pager.h>
152 #include <vm/vm_phys.h>
153 #include <vm/vm_radix.h>
154 #include <vm/vm_reserv.h>
155 #include <vm/vm_dumpset.h>
158 #include <machine/machdep.h>
159 #include <machine/md_var.h>
160 #include <machine/pcb.h>
161 #include <machine/sbi.h>
163 #define NUL1E (Ln_ENTRIES * Ln_ENTRIES)
164 #define NUL2E (Ln_ENTRIES * NUL1E)
166 #if !defined(DIAGNOSTIC)
167 #ifdef __GNUC_GNU_INLINE__
168 #define PMAP_INLINE __attribute__((__gnu_inline__)) inline
170 #define PMAP_INLINE extern inline
177 #define PV_STAT(x) do { x ; } while (0)
179 #define PV_STAT(x) do { } while (0)
182 #define pmap_l2_pindex(v) ((v) >> L2_SHIFT)
183 #define pa_to_pvh(pa) (&pv_table[pa_index(pa)])
185 #define NPV_LIST_LOCKS MAXCPU
187 #define PHYS_TO_PV_LIST_LOCK(pa) \
188 (&pv_list_locks[pmap_l2_pindex(pa) % NPV_LIST_LOCKS])
190 #define CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa) do { \
191 struct rwlock **_lockp = (lockp); \
192 struct rwlock *_new_lock; \
194 _new_lock = PHYS_TO_PV_LIST_LOCK(pa); \
195 if (_new_lock != *_lockp) { \
196 if (*_lockp != NULL) \
197 rw_wunlock(*_lockp); \
198 *_lockp = _new_lock; \
203 #define CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m) \
204 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, VM_PAGE_TO_PHYS(m))
206 #define RELEASE_PV_LIST_LOCK(lockp) do { \
207 struct rwlock **_lockp = (lockp); \
209 if (*_lockp != NULL) { \
210 rw_wunlock(*_lockp); \
215 #define VM_PAGE_TO_PV_LIST_LOCK(m) \
216 PHYS_TO_PV_LIST_LOCK(VM_PAGE_TO_PHYS(m))
218 /* The list of all the user pmaps */
219 LIST_HEAD(pmaplist, pmap);
220 static struct pmaplist allpmaps = LIST_HEAD_INITIALIZER();
222 struct pmap kernel_pmap_store;
224 vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */
225 vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */
226 vm_offset_t kernel_vm_end = 0;
228 vm_paddr_t dmap_phys_base; /* The start of the dmap region */
229 vm_paddr_t dmap_phys_max; /* The limit of the dmap region */
230 vm_offset_t dmap_max_addr; /* The virtual address limit of the dmap */
232 /* This code assumes all L1 DMAP entries will be used */
233 CTASSERT((DMAP_MIN_ADDRESS & ~L1_OFFSET) == DMAP_MIN_ADDRESS);
234 CTASSERT((DMAP_MAX_ADDRESS & ~L1_OFFSET) == DMAP_MAX_ADDRESS);
236 static struct rwlock_padalign pvh_global_lock;
237 static struct mtx_padalign allpmaps_lock;
239 static SYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD | CTLFLAG_MPSAFE, 0,
240 "VM/pmap parameters");
242 static int superpages_enabled = 1;
243 SYSCTL_INT(_vm_pmap, OID_AUTO, superpages_enabled,
244 CTLFLAG_RDTUN, &superpages_enabled, 0,
245 "Enable support for transparent superpages");
247 static SYSCTL_NODE(_vm_pmap, OID_AUTO, l2, CTLFLAG_RD | CTLFLAG_MPSAFE, 0,
248 "2MB page mapping counters");
250 static u_long pmap_l2_demotions;
251 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, demotions, CTLFLAG_RD,
252 &pmap_l2_demotions, 0,
253 "2MB page demotions");
255 static u_long pmap_l2_mappings;
256 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, mappings, CTLFLAG_RD,
257 &pmap_l2_mappings, 0,
258 "2MB page mappings");
260 static u_long pmap_l2_p_failures;
261 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, p_failures, CTLFLAG_RD,
262 &pmap_l2_p_failures, 0,
263 "2MB page promotion failures");
265 static u_long pmap_l2_promotions;
266 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, promotions, CTLFLAG_RD,
267 &pmap_l2_promotions, 0,
268 "2MB page promotions");
271 * Data for the pv entry allocation mechanism
273 static TAILQ_HEAD(pch, pv_chunk) pv_chunks = TAILQ_HEAD_INITIALIZER(pv_chunks);
274 static struct mtx pv_chunks_mutex;
275 static struct rwlock pv_list_locks[NPV_LIST_LOCKS];
276 static struct md_page *pv_table;
277 static struct md_page pv_dummy;
279 extern cpuset_t all_harts;
282 * Internal flags for pmap_enter()'s helper functions.
284 #define PMAP_ENTER_NORECLAIM 0x1000000 /* Don't reclaim PV entries. */
285 #define PMAP_ENTER_NOREPLACE 0x2000000 /* Don't replace mappings. */
287 static void free_pv_chunk(struct pv_chunk *pc);
288 static void free_pv_entry(pmap_t pmap, pv_entry_t pv);
289 static pv_entry_t get_pv_entry(pmap_t pmap, struct rwlock **lockp);
290 static vm_page_t reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp);
291 static void pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va);
292 static pv_entry_t pmap_pvh_remove(struct md_page *pvh, pmap_t pmap,
294 static bool pmap_demote_l2(pmap_t pmap, pd_entry_t *l2, vm_offset_t va);
295 static bool pmap_demote_l2_locked(pmap_t pmap, pd_entry_t *l2,
296 vm_offset_t va, struct rwlock **lockp);
297 static int pmap_enter_l2(pmap_t pmap, vm_offset_t va, pd_entry_t new_l2,
298 u_int flags, vm_page_t m, struct rwlock **lockp);
299 static vm_page_t pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va,
300 vm_page_t m, vm_prot_t prot, vm_page_t mpte, struct rwlock **lockp);
301 static int pmap_remove_l3(pmap_t pmap, pt_entry_t *l3, vm_offset_t sva,
302 pd_entry_t ptepde, struct spglist *free, struct rwlock **lockp);
303 static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va,
304 vm_page_t m, struct rwlock **lockp);
306 static vm_page_t _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex,
307 struct rwlock **lockp);
309 static void _pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m,
310 struct spglist *free);
311 static int pmap_unuse_pt(pmap_t, vm_offset_t, pd_entry_t, struct spglist *);
313 #define pmap_clear(pte) pmap_store(pte, 0)
314 #define pmap_clear_bits(pte, bits) atomic_clear_64(pte, bits)
315 #define pmap_load_store(pte, entry) atomic_swap_64(pte, entry)
316 #define pmap_load_clear(pte) pmap_load_store(pte, 0)
317 #define pmap_load(pte) atomic_load_64(pte)
318 #define pmap_store(pte, entry) atomic_store_64(pte, entry)
319 #define pmap_store_bits(pte, bits) atomic_set_64(pte, bits)
321 /********************/
322 /* Inline functions */
323 /********************/
326 pagecopy(void *s, void *d)
329 memcpy(d, s, PAGE_SIZE);
339 #define pmap_l1_index(va) (((va) >> L1_SHIFT) & Ln_ADDR_MASK)
340 #define pmap_l2_index(va) (((va) >> L2_SHIFT) & Ln_ADDR_MASK)
341 #define pmap_l3_index(va) (((va) >> L3_SHIFT) & Ln_ADDR_MASK)
343 #define PTE_TO_PHYS(pte) \
344 ((((pte) & ~PTE_HI_MASK) >> PTE_PPN0_S) * PAGE_SIZE)
346 static __inline pd_entry_t *
347 pmap_l1(pmap_t pmap, vm_offset_t va)
350 return (&pmap->pm_l1[pmap_l1_index(va)]);
353 static __inline pd_entry_t *
354 pmap_l1_to_l2(pd_entry_t *l1, vm_offset_t va)
359 phys = PTE_TO_PHYS(pmap_load(l1));
360 l2 = (pd_entry_t *)PHYS_TO_DMAP(phys);
362 return (&l2[pmap_l2_index(va)]);
365 static __inline pd_entry_t *
366 pmap_l2(pmap_t pmap, vm_offset_t va)
370 l1 = pmap_l1(pmap, va);
371 if ((pmap_load(l1) & PTE_V) == 0)
373 if ((pmap_load(l1) & PTE_RX) != 0)
376 return (pmap_l1_to_l2(l1, va));
379 static __inline pt_entry_t *
380 pmap_l2_to_l3(pd_entry_t *l2, vm_offset_t va)
385 phys = PTE_TO_PHYS(pmap_load(l2));
386 l3 = (pd_entry_t *)PHYS_TO_DMAP(phys);
388 return (&l3[pmap_l3_index(va)]);
391 static __inline pt_entry_t *
392 pmap_l3(pmap_t pmap, vm_offset_t va)
396 l2 = pmap_l2(pmap, va);
399 if ((pmap_load(l2) & PTE_V) == 0)
401 if ((pmap_load(l2) & PTE_RX) != 0)
404 return (pmap_l2_to_l3(l2, va));
408 pmap_resident_count_inc(pmap_t pmap, int count)
411 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
412 pmap->pm_stats.resident_count += count;
416 pmap_resident_count_dec(pmap_t pmap, int count)
419 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
420 KASSERT(pmap->pm_stats.resident_count >= count,
421 ("pmap %p resident count underflow %ld %d", pmap,
422 pmap->pm_stats.resident_count, count));
423 pmap->pm_stats.resident_count -= count;
427 pmap_distribute_l1(struct pmap *pmap, vm_pindex_t l1index,
430 struct pmap *user_pmap;
433 /* Distribute new kernel L1 entry to all the user pmaps */
434 if (pmap != kernel_pmap)
437 mtx_lock(&allpmaps_lock);
438 LIST_FOREACH(user_pmap, &allpmaps, pm_list) {
439 l1 = &user_pmap->pm_l1[l1index];
440 pmap_store(l1, entry);
442 mtx_unlock(&allpmaps_lock);
446 pmap_early_page_idx(vm_offset_t l1pt, vm_offset_t va, u_int *l1_slot,
452 l1 = (pd_entry_t *)l1pt;
453 *l1_slot = (va >> L1_SHIFT) & Ln_ADDR_MASK;
455 /* Check locore has used a table L1 map */
456 KASSERT((l1[*l1_slot] & PTE_RX) == 0,
457 ("Invalid bootstrap L1 table"));
459 /* Find the address of the L2 table */
460 l2 = (pt_entry_t *)init_pt_va;
461 *l2_slot = pmap_l2_index(va);
467 pmap_early_vtophys(vm_offset_t l1pt, vm_offset_t va)
469 u_int l1_slot, l2_slot;
473 l2 = pmap_early_page_idx(l1pt, va, &l1_slot, &l2_slot);
475 /* Check locore has used L2 superpages */
476 KASSERT((l2[l2_slot] & PTE_RX) != 0,
477 ("Invalid bootstrap L2 table"));
479 /* L2 is superpages */
480 ret = (l2[l2_slot] >> PTE_PPN1_S) << L2_SHIFT;
481 ret += (va & L2_OFFSET);
487 pmap_bootstrap_dmap(vm_offset_t kern_l1, vm_paddr_t min_pa, vm_paddr_t max_pa)
496 pa = dmap_phys_base = min_pa & ~L1_OFFSET;
497 va = DMAP_MIN_ADDRESS;
498 l1 = (pd_entry_t *)kern_l1;
499 l1_slot = pmap_l1_index(DMAP_MIN_ADDRESS);
501 for (; va < DMAP_MAX_ADDRESS && pa < max_pa;
502 pa += L1_SIZE, va += L1_SIZE, l1_slot++) {
503 KASSERT(l1_slot < Ln_ENTRIES, ("Invalid L1 index"));
506 pn = (pa / PAGE_SIZE);
508 entry |= (pn << PTE_PPN0_S);
509 pmap_store(&l1[l1_slot], entry);
512 /* Set the upper limit of the DMAP region */
520 pmap_bootstrap_l3(vm_offset_t l1pt, vm_offset_t va, vm_offset_t l3_start)
529 KASSERT((va & L2_OFFSET) == 0, ("Invalid virtual address"));
531 l2 = pmap_l2(kernel_pmap, va);
532 l2 = (pd_entry_t *)((uintptr_t)l2 & ~(PAGE_SIZE - 1));
533 l2_slot = pmap_l2_index(va);
536 for (; va < VM_MAX_KERNEL_ADDRESS; l2_slot++, va += L2_SIZE) {
537 KASSERT(l2_slot < Ln_ENTRIES, ("Invalid L2 index"));
539 pa = pmap_early_vtophys(l1pt, l3pt);
540 pn = (pa / PAGE_SIZE);
542 entry |= (pn << PTE_PPN0_S);
543 pmap_store(&l2[l2_slot], entry);
547 /* Clean the L2 page table */
548 memset((void *)l3_start, 0, l3pt - l3_start);
554 * Bootstrap the system enough to run with virtual memory.
557 pmap_bootstrap(vm_offset_t l1pt, vm_paddr_t kernstart, vm_size_t kernlen)
559 u_int l1_slot, l2_slot;
560 vm_offset_t freemempos;
561 vm_offset_t dpcpu, msgbufpv;
562 vm_paddr_t max_pa, min_pa, pa;
566 printf("pmap_bootstrap %lx %lx %lx\n", l1pt, kernstart, kernlen);
568 /* Set this early so we can use the pagetable walking functions */
569 kernel_pmap_store.pm_l1 = (pd_entry_t *)l1pt;
570 PMAP_LOCK_INIT(kernel_pmap);
572 rw_init(&pvh_global_lock, "pmap pv global");
574 CPU_FILL(&kernel_pmap->pm_active);
576 /* Assume the address we were loaded to is a valid physical address. */
577 min_pa = max_pa = kernstart;
579 physmap_idx = physmem_avail(physmap, nitems(physmap));
583 * Find the minimum physical address. physmap is sorted,
584 * but may contain empty ranges.
586 for (i = 0; i < physmap_idx * 2; i += 2) {
587 if (physmap[i] == physmap[i + 1])
589 if (physmap[i] <= min_pa)
591 if (physmap[i + 1] > max_pa)
592 max_pa = physmap[i + 1];
594 printf("physmap_idx %u\n", physmap_idx);
595 printf("min_pa %lx\n", min_pa);
596 printf("max_pa %lx\n", max_pa);
598 /* Create a direct map region early so we can use it for pa -> va */
599 pmap_bootstrap_dmap(l1pt, min_pa, max_pa);
602 * Read the page table to find out what is already mapped.
603 * This assumes we have mapped a block of memory from KERNBASE
604 * using a single L1 entry.
606 (void)pmap_early_page_idx(l1pt, KERNBASE, &l1_slot, &l2_slot);
608 /* Sanity check the index, KERNBASE should be the first VA */
609 KASSERT(l2_slot == 0, ("The L2 index is non-zero"));
611 freemempos = roundup2(KERNBASE + kernlen, PAGE_SIZE);
613 /* Create the l3 tables for the early devmap */
614 freemempos = pmap_bootstrap_l3(l1pt,
615 VM_MAX_KERNEL_ADDRESS - L2_SIZE, freemempos);
618 * Invalidate the mapping we created for the DTB. At this point a copy
619 * has been created, and we no longer need it. We want to avoid the
620 * possibility of an aliased mapping in the future.
622 l2p = pmap_l2(kernel_pmap, VM_EARLY_DTB_ADDRESS);
623 if ((pmap_load(l2p) & PTE_V) != 0)
628 #define alloc_pages(var, np) \
629 (var) = freemempos; \
630 freemempos += (np * PAGE_SIZE); \
631 memset((char *)(var), 0, ((np) * PAGE_SIZE));
633 /* Allocate dynamic per-cpu area. */
634 alloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
635 dpcpu_init((void *)dpcpu, 0);
637 /* Allocate memory for the msgbuf, e.g. for /sbin/dmesg */
638 alloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
639 msgbufp = (void *)msgbufpv;
641 virtual_avail = roundup2(freemempos, L2_SIZE);
642 virtual_end = VM_MAX_KERNEL_ADDRESS - L2_SIZE;
643 kernel_vm_end = virtual_avail;
645 pa = pmap_early_vtophys(l1pt, freemempos);
647 physmem_exclude_region(kernstart, pa - kernstart, EXFLAG_NOALLOC);
651 * Initialize a vm_page's machine-dependent fields.
654 pmap_page_init(vm_page_t m)
657 TAILQ_INIT(&m->md.pv_list);
658 m->md.pv_memattr = VM_MEMATTR_WRITE_BACK;
662 * Initialize the pmap module.
663 * Called by vm_init, to initialize any structures that the pmap
664 * system needs to map virtual memory.
673 * Initialize the pv chunk and pmap list mutexes.
675 mtx_init(&pv_chunks_mutex, "pmap pv chunk list", NULL, MTX_DEF);
676 mtx_init(&allpmaps_lock, "allpmaps", NULL, MTX_DEF);
679 * Initialize the pool of pv list locks.
681 for (i = 0; i < NPV_LIST_LOCKS; i++)
682 rw_init(&pv_list_locks[i], "pmap pv list");
685 * Calculate the size of the pv head table for superpages.
687 pv_npg = howmany(vm_phys_segs[vm_phys_nsegs - 1].end, L2_SIZE);
690 * Allocate memory for the pv head table for superpages.
692 s = (vm_size_t)(pv_npg * sizeof(struct md_page));
694 pv_table = (struct md_page *)kmem_malloc(s, M_WAITOK | M_ZERO);
695 for (i = 0; i < pv_npg; i++)
696 TAILQ_INIT(&pv_table[i].pv_list);
697 TAILQ_INIT(&pv_dummy.pv_list);
699 if (superpages_enabled)
700 pagesizes[1] = L2_SIZE;
705 * For SMP, these functions have to use IPIs for coherence.
707 * In general, the calling thread uses a plain fence to order the
708 * writes to the page tables before invoking an SBI callback to invoke
709 * sfence_vma() on remote CPUs.
712 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
717 mask = pmap->pm_active;
718 CPU_CLR(PCPU_GET(hart), &mask);
720 if (!CPU_EMPTY(&mask) && smp_started)
721 sbi_remote_sfence_vma(mask.__bits, va, 1);
727 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
732 mask = pmap->pm_active;
733 CPU_CLR(PCPU_GET(hart), &mask);
735 if (!CPU_EMPTY(&mask) && smp_started)
736 sbi_remote_sfence_vma(mask.__bits, sva, eva - sva + 1);
739 * Might consider a loop of sfence_vma_page() for a small
740 * number of pages in the future.
747 pmap_invalidate_all(pmap_t pmap)
752 mask = pmap->pm_active;
753 CPU_CLR(PCPU_GET(hart), &mask);
756 * XXX: The SBI doc doesn't detail how to specify x0 as the
757 * address to perform a global fence. BBL currently treats
758 * all sfence_vma requests as global however.
761 if (!CPU_EMPTY(&mask) && smp_started)
762 sbi_remote_sfence_vma(mask.__bits, 0, 0);
768 * Normal, non-SMP, invalidation functions.
769 * We inline these within pmap.c for speed.
772 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
779 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
783 * Might consider a loop of sfence_vma_page() for a small
784 * number of pages in the future.
790 pmap_invalidate_all(pmap_t pmap)
798 * Routine: pmap_extract
800 * Extract the physical page address associated
801 * with the given map/virtual_address pair.
804 pmap_extract(pmap_t pmap, vm_offset_t va)
813 * Start with the l2 tabel. We are unable to allocate
814 * pages in the l1 table.
816 l2p = pmap_l2(pmap, va);
819 if ((l2 & PTE_RX) == 0) {
820 l3p = pmap_l2_to_l3(l2p, va);
823 pa = PTE_TO_PHYS(l3);
824 pa |= (va & L3_OFFSET);
827 /* L2 is superpages */
828 pa = (l2 >> PTE_PPN1_S) << L2_SHIFT;
829 pa |= (va & L2_OFFSET);
837 * Routine: pmap_extract_and_hold
839 * Atomically extract and hold the physical page
840 * with the given pmap and virtual address pair
841 * if that mapping permits the given protection.
844 pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
852 l3p = pmap_l3(pmap, va);
853 if (l3p != NULL && (l3 = pmap_load(l3p)) != 0) {
854 if ((l3 & PTE_W) != 0 || (prot & VM_PROT_WRITE) == 0) {
855 phys = PTE_TO_PHYS(l3);
856 m = PHYS_TO_VM_PAGE(phys);
857 if (!vm_page_wire_mapped(m))
866 pmap_kextract(vm_offset_t va)
872 if (va >= DMAP_MIN_ADDRESS && va < DMAP_MAX_ADDRESS) {
873 pa = DMAP_TO_PHYS(va);
875 l2 = pmap_l2(kernel_pmap, va);
877 panic("pmap_kextract: No l2");
878 if ((pmap_load(l2) & PTE_RX) != 0) {
880 pa = (pmap_load(l2) >> PTE_PPN1_S) << L2_SHIFT;
881 pa |= (va & L2_OFFSET);
885 l3 = pmap_l2_to_l3(l2, va);
887 panic("pmap_kextract: No l3...");
888 pa = PTE_TO_PHYS(pmap_load(l3));
889 pa |= (va & PAGE_MASK);
894 /***************************************************
895 * Low level mapping routines.....
896 ***************************************************/
899 pmap_kenter_device(vm_offset_t sva, vm_size_t size, vm_paddr_t pa)
906 KASSERT((pa & L3_OFFSET) == 0,
907 ("pmap_kenter_device: Invalid physical address"));
908 KASSERT((sva & L3_OFFSET) == 0,
909 ("pmap_kenter_device: Invalid virtual address"));
910 KASSERT((size & PAGE_MASK) == 0,
911 ("pmap_kenter_device: Mapping is not page-sized"));
915 l3 = pmap_l3(kernel_pmap, va);
916 KASSERT(l3 != NULL, ("Invalid page table, va: 0x%lx", va));
918 pn = (pa / PAGE_SIZE);
920 entry |= (pn << PTE_PPN0_S);
921 pmap_store(l3, entry);
927 pmap_invalidate_range(kernel_pmap, sva, va);
931 * Remove a page from the kernel pagetables.
932 * Note: not SMP coherent.
935 pmap_kremove(vm_offset_t va)
939 l3 = pmap_l3(kernel_pmap, va);
940 KASSERT(l3 != NULL, ("pmap_kremove: Invalid address"));
947 pmap_kremove_device(vm_offset_t sva, vm_size_t size)
952 KASSERT((sva & L3_OFFSET) == 0,
953 ("pmap_kremove_device: Invalid virtual address"));
954 KASSERT((size & PAGE_MASK) == 0,
955 ("pmap_kremove_device: Mapping is not page-sized"));
959 l3 = pmap_l3(kernel_pmap, va);
960 KASSERT(l3 != NULL, ("Invalid page table, va: 0x%lx", va));
967 pmap_invalidate_range(kernel_pmap, sva, va);
971 * Used to map a range of physical addresses into kernel
972 * virtual address space.
974 * The value passed in '*virt' is a suggested virtual address for
975 * the mapping. Architectures which can support a direct-mapped
976 * physical to virtual region can return the appropriate address
977 * within that region, leaving '*virt' unchanged. Other
978 * architectures should map the pages starting at '*virt' and
979 * update '*virt' with the first usable address after the mapped
983 pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot)
986 return PHYS_TO_DMAP(start);
990 * Add a list of wired pages to the kva
991 * this routine is only used for temporary
992 * kernel mappings that do not need to have
993 * page modification or references recorded.
994 * Note that old mappings are simply written
995 * over. The page *must* be wired.
996 * Note: SMP coherent. Uses a ranged shootdown IPI.
999 pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count)
1009 for (i = 0; i < count; i++) {
1011 pa = VM_PAGE_TO_PHYS(m);
1012 pn = (pa / PAGE_SIZE);
1013 l3 = pmap_l3(kernel_pmap, va);
1016 entry |= (pn << PTE_PPN0_S);
1017 pmap_store(l3, entry);
1021 pmap_invalidate_range(kernel_pmap, sva, va);
1025 * This routine tears out page mappings from the
1026 * kernel -- it is meant only for temporary mappings.
1027 * Note: SMP coherent. Uses a ranged shootdown IPI.
1030 pmap_qremove(vm_offset_t sva, int count)
1035 KASSERT(sva >= VM_MIN_KERNEL_ADDRESS, ("usermode va %lx", sva));
1037 for (va = sva; count-- > 0; va += PAGE_SIZE) {
1038 l3 = pmap_l3(kernel_pmap, va);
1039 KASSERT(l3 != NULL, ("pmap_kremove: Invalid address"));
1042 pmap_invalidate_range(kernel_pmap, sva, va);
1046 pmap_ps_enabled(pmap_t pmap __unused)
1049 return (superpages_enabled);
1052 /***************************************************
1053 * Page table page management routines.....
1054 ***************************************************/
1056 * Schedule the specified unused page table page to be freed. Specifically,
1057 * add the page to the specified list of pages that will be released to the
1058 * physical memory manager after the TLB has been updated.
1060 static __inline void
1061 pmap_add_delayed_free_list(vm_page_t m, struct spglist *free,
1062 boolean_t set_PG_ZERO)
1066 m->flags |= PG_ZERO;
1068 m->flags &= ~PG_ZERO;
1069 SLIST_INSERT_HEAD(free, m, plinks.s.ss);
1073 * Inserts the specified page table page into the specified pmap's collection
1074 * of idle page table pages. Each of a pmap's page table pages is responsible
1075 * for mapping a distinct range of virtual addresses. The pmap's collection is
1076 * ordered by this virtual address range.
1078 * If "promoted" is false, then the page table page "ml3" must be zero filled.
1081 pmap_insert_pt_page(pmap_t pmap, vm_page_t ml3, bool promoted)
1084 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1085 ml3->valid = promoted ? VM_PAGE_BITS_ALL : 0;
1086 return (vm_radix_insert(&pmap->pm_root, ml3));
1090 * Removes the page table page mapping the specified virtual address from the
1091 * specified pmap's collection of idle page table pages, and returns it.
1092 * Otherwise, returns NULL if there is no page table page corresponding to the
1093 * specified virtual address.
1095 static __inline vm_page_t
1096 pmap_remove_pt_page(pmap_t pmap, vm_offset_t va)
1099 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1100 return (vm_radix_remove(&pmap->pm_root, pmap_l2_pindex(va)));
1104 * Decrements a page table page's reference count, which is used to record the
1105 * number of valid page table entries within the page. If the reference count
1106 * drops to zero, then the page table page is unmapped. Returns TRUE if the
1107 * page table page was unmapped and FALSE otherwise.
1109 static inline boolean_t
1110 pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m, struct spglist *free)
1114 if (m->ref_count == 0) {
1115 _pmap_unwire_ptp(pmap, va, m, free);
1123 _pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m, struct spglist *free)
1127 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1128 if (m->pindex >= NUL1E) {
1130 l1 = pmap_l1(pmap, va);
1132 pmap_distribute_l1(pmap, pmap_l1_index(va), 0);
1135 l2 = pmap_l2(pmap, va);
1138 pmap_resident_count_dec(pmap, 1);
1139 if (m->pindex < NUL1E) {
1143 l1 = pmap_l1(pmap, va);
1144 phys = PTE_TO_PHYS(pmap_load(l1));
1145 pdpg = PHYS_TO_VM_PAGE(phys);
1146 pmap_unwire_ptp(pmap, va, pdpg, free);
1148 pmap_invalidate_page(pmap, va);
1153 * Put page on a list so that it is released after
1154 * *ALL* TLB shootdown is done
1156 pmap_add_delayed_free_list(m, free, TRUE);
1160 * After removing a page table entry, this routine is used to
1161 * conditionally free the page, and manage the reference count.
1164 pmap_unuse_pt(pmap_t pmap, vm_offset_t va, pd_entry_t ptepde,
1165 struct spglist *free)
1169 if (va >= VM_MAXUSER_ADDRESS)
1171 KASSERT(ptepde != 0, ("pmap_unuse_pt: ptepde != 0"));
1172 mpte = PHYS_TO_VM_PAGE(PTE_TO_PHYS(ptepde));
1173 return (pmap_unwire_ptp(pmap, va, mpte, free));
1177 pmap_pinit0(pmap_t pmap)
1180 PMAP_LOCK_INIT(pmap);
1181 bzero(&pmap->pm_stats, sizeof(pmap->pm_stats));
1182 pmap->pm_l1 = kernel_pmap->pm_l1;
1183 pmap->pm_satp = SATP_MODE_SV39 | (vtophys(pmap->pm_l1) >> PAGE_SHIFT);
1184 CPU_ZERO(&pmap->pm_active);
1185 pmap_activate_boot(pmap);
1189 pmap_pinit(pmap_t pmap)
1195 * allocate the l1 page
1197 while ((l1pt = vm_page_alloc(NULL, 0xdeadbeef, VM_ALLOC_NORMAL |
1198 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL)
1201 l1phys = VM_PAGE_TO_PHYS(l1pt);
1202 pmap->pm_l1 = (pd_entry_t *)PHYS_TO_DMAP(l1phys);
1203 pmap->pm_satp = SATP_MODE_SV39 | (l1phys >> PAGE_SHIFT);
1205 if ((l1pt->flags & PG_ZERO) == 0)
1206 pagezero(pmap->pm_l1);
1208 bzero(&pmap->pm_stats, sizeof(pmap->pm_stats));
1210 CPU_ZERO(&pmap->pm_active);
1212 /* Install kernel pagetables */
1213 memcpy(pmap->pm_l1, kernel_pmap->pm_l1, PAGE_SIZE);
1215 /* Add to the list of all user pmaps */
1216 mtx_lock(&allpmaps_lock);
1217 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list);
1218 mtx_unlock(&allpmaps_lock);
1220 vm_radix_init(&pmap->pm_root);
1226 * This routine is called if the desired page table page does not exist.
1228 * If page table page allocation fails, this routine may sleep before
1229 * returning NULL. It sleeps only if a lock pointer was given.
1231 * Note: If a page allocation fails at page table level two or three,
1232 * one or two pages may be held during the wait, only to be released
1233 * afterwards. This conservative approach is easily argued to avoid
1237 _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex, struct rwlock **lockp)
1239 vm_page_t m, /*pdppg, */pdpg;
1244 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1247 * Allocate a page table page.
1249 if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ |
1250 VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) {
1251 if (lockp != NULL) {
1252 RELEASE_PV_LIST_LOCK(lockp);
1254 rw_runlock(&pvh_global_lock);
1256 rw_rlock(&pvh_global_lock);
1261 * Indicate the need to retry. While waiting, the page table
1262 * page may have been allocated.
1267 if ((m->flags & PG_ZERO) == 0)
1271 * Map the pagetable page into the process address space, if
1272 * it isn't already there.
1275 if (ptepindex >= NUL1E) {
1277 vm_pindex_t l1index;
1279 l1index = ptepindex - NUL1E;
1280 l1 = &pmap->pm_l1[l1index];
1282 pn = (VM_PAGE_TO_PHYS(m) / PAGE_SIZE);
1284 entry |= (pn << PTE_PPN0_S);
1285 pmap_store(l1, entry);
1286 pmap_distribute_l1(pmap, l1index, entry);
1288 vm_pindex_t l1index;
1289 pd_entry_t *l1, *l2;
1291 l1index = ptepindex >> (L1_SHIFT - L2_SHIFT);
1292 l1 = &pmap->pm_l1[l1index];
1293 if (pmap_load(l1) == 0) {
1294 /* recurse for allocating page dir */
1295 if (_pmap_alloc_l3(pmap, NUL1E + l1index,
1297 vm_page_unwire_noq(m);
1298 vm_page_free_zero(m);
1302 phys = PTE_TO_PHYS(pmap_load(l1));
1303 pdpg = PHYS_TO_VM_PAGE(phys);
1307 phys = PTE_TO_PHYS(pmap_load(l1));
1308 l2 = (pd_entry_t *)PHYS_TO_DMAP(phys);
1309 l2 = &l2[ptepindex & Ln_ADDR_MASK];
1311 pn = (VM_PAGE_TO_PHYS(m) / PAGE_SIZE);
1313 entry |= (pn << PTE_PPN0_S);
1314 pmap_store(l2, entry);
1317 pmap_resident_count_inc(pmap, 1);
1323 pmap_alloc_l2(pmap_t pmap, vm_offset_t va, struct rwlock **lockp)
1327 vm_pindex_t l2pindex;
1330 l1 = pmap_l1(pmap, va);
1331 if (l1 != NULL && (pmap_load(l1) & PTE_RWX) == 0) {
1332 /* Add a reference to the L2 page. */
1333 l2pg = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l1)));
1336 /* Allocate a L2 page. */
1337 l2pindex = pmap_l2_pindex(va) >> Ln_ENTRIES_SHIFT;
1338 l2pg = _pmap_alloc_l3(pmap, NUL2E + l2pindex, lockp);
1339 if (l2pg == NULL && lockp != NULL)
1346 pmap_alloc_l3(pmap_t pmap, vm_offset_t va, struct rwlock **lockp)
1348 vm_pindex_t ptepindex;
1354 * Calculate pagetable page index
1356 ptepindex = pmap_l2_pindex(va);
1359 * Get the page directory entry
1361 l2 = pmap_l2(pmap, va);
1364 * If the page table page is mapped, we just increment the
1365 * hold count, and activate it.
1367 if (l2 != NULL && pmap_load(l2) != 0) {
1368 phys = PTE_TO_PHYS(pmap_load(l2));
1369 m = PHYS_TO_VM_PAGE(phys);
1373 * Here if the pte page isn't mapped, or if it has been
1376 m = _pmap_alloc_l3(pmap, ptepindex, lockp);
1377 if (m == NULL && lockp != NULL)
1383 /***************************************************
1384 * Pmap allocation/deallocation routines.
1385 ***************************************************/
1388 * Release any resources held by the given physical map.
1389 * Called when a pmap initialized by pmap_pinit is being released.
1390 * Should only be called if the map contains no valid mappings.
1393 pmap_release(pmap_t pmap)
1397 KASSERT(pmap->pm_stats.resident_count == 0,
1398 ("pmap_release: pmap resident count %ld != 0",
1399 pmap->pm_stats.resident_count));
1400 KASSERT(CPU_EMPTY(&pmap->pm_active),
1401 ("releasing active pmap %p", pmap));
1403 mtx_lock(&allpmaps_lock);
1404 LIST_REMOVE(pmap, pm_list);
1405 mtx_unlock(&allpmaps_lock);
1407 m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pmap->pm_l1));
1408 vm_page_unwire_noq(m);
1413 kvm_size(SYSCTL_HANDLER_ARGS)
1415 unsigned long ksize = VM_MAX_KERNEL_ADDRESS - VM_MIN_KERNEL_ADDRESS;
1417 return sysctl_handle_long(oidp, &ksize, 0, req);
1419 SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG | CTLFLAG_RD | CTLFLAG_MPSAFE,
1420 0, 0, kvm_size, "LU",
1424 kvm_free(SYSCTL_HANDLER_ARGS)
1426 unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end;
1428 return sysctl_handle_long(oidp, &kfree, 0, req);
1430 SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG | CTLFLAG_RD | CTLFLAG_MPSAFE,
1431 0, 0, kvm_free, "LU",
1432 "Amount of KVM free");
1435 * grow the number of kernel page table entries, if needed
1438 pmap_growkernel(vm_offset_t addr)
1442 pd_entry_t *l1, *l2;
1446 mtx_assert(&kernel_map->system_mtx, MA_OWNED);
1448 addr = roundup2(addr, L2_SIZE);
1449 if (addr - 1 >= vm_map_max(kernel_map))
1450 addr = vm_map_max(kernel_map);
1451 while (kernel_vm_end < addr) {
1452 l1 = pmap_l1(kernel_pmap, kernel_vm_end);
1453 if (pmap_load(l1) == 0) {
1454 /* We need a new PDP entry */
1455 nkpg = vm_page_alloc(NULL, kernel_vm_end >> L1_SHIFT,
1456 VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ |
1457 VM_ALLOC_WIRED | VM_ALLOC_ZERO);
1459 panic("pmap_growkernel: no memory to grow kernel");
1460 if ((nkpg->flags & PG_ZERO) == 0)
1461 pmap_zero_page(nkpg);
1462 paddr = VM_PAGE_TO_PHYS(nkpg);
1464 pn = (paddr / PAGE_SIZE);
1466 entry |= (pn << PTE_PPN0_S);
1467 pmap_store(l1, entry);
1468 pmap_distribute_l1(kernel_pmap,
1469 pmap_l1_index(kernel_vm_end), entry);
1470 continue; /* try again */
1472 l2 = pmap_l1_to_l2(l1, kernel_vm_end);
1473 if ((pmap_load(l2) & PTE_V) != 0 &&
1474 (pmap_load(l2) & PTE_RWX) == 0) {
1475 kernel_vm_end = (kernel_vm_end + L2_SIZE) & ~L2_OFFSET;
1476 if (kernel_vm_end - 1 >= vm_map_max(kernel_map)) {
1477 kernel_vm_end = vm_map_max(kernel_map);
1483 nkpg = vm_page_alloc(NULL, kernel_vm_end >> L2_SHIFT,
1484 VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
1487 panic("pmap_growkernel: no memory to grow kernel");
1488 if ((nkpg->flags & PG_ZERO) == 0) {
1489 pmap_zero_page(nkpg);
1491 paddr = VM_PAGE_TO_PHYS(nkpg);
1493 pn = (paddr / PAGE_SIZE);
1495 entry |= (pn << PTE_PPN0_S);
1496 pmap_store(l2, entry);
1498 pmap_invalidate_page(kernel_pmap, kernel_vm_end);
1500 kernel_vm_end = (kernel_vm_end + L2_SIZE) & ~L2_OFFSET;
1501 if (kernel_vm_end - 1 >= vm_map_max(kernel_map)) {
1502 kernel_vm_end = vm_map_max(kernel_map);
1508 /***************************************************
1509 * page management routines.
1510 ***************************************************/
1512 CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE);
1513 CTASSERT(_NPCM == 3);
1514 CTASSERT(_NPCPV == 168);
1516 static __inline struct pv_chunk *
1517 pv_to_chunk(pv_entry_t pv)
1520 return ((struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK));
1523 #define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap)
1525 #define PC_FREE0 0xfffffffffffffffful
1526 #define PC_FREE1 0xfffffffffffffffful
1527 #define PC_FREE2 0x000000fffffffffful
1529 static const uint64_t pc_freemask[_NPCM] = { PC_FREE0, PC_FREE1, PC_FREE2 };
1533 static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail;
1535 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0,
1536 "Current number of pv entry chunks");
1537 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0,
1538 "Current number of pv entry chunks allocated");
1539 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0,
1540 "Current number of pv entry chunks frees");
1541 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0,
1542 "Number of times tried to get a chunk page but failed.");
1544 static long pv_entry_frees, pv_entry_allocs, pv_entry_count;
1545 static int pv_entry_spare;
1547 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0,
1548 "Current number of pv entry frees");
1549 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0,
1550 "Current number of pv entry allocs");
1551 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0,
1552 "Current number of pv entries");
1553 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0,
1554 "Current number of spare pv entries");
1559 * We are in a serious low memory condition. Resort to
1560 * drastic measures to free some pages so we can allocate
1561 * another pv entry chunk.
1563 * Returns NULL if PV entries were reclaimed from the specified pmap.
1565 * We do not, however, unmap 2mpages because subsequent accesses will
1566 * allocate per-page pv entries until repromotion occurs, thereby
1567 * exacerbating the shortage of free pv entries.
1570 reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp)
1573 panic("RISCVTODO: reclaim_pv_chunk");
1577 * free the pv_entry back to the free list
1580 free_pv_entry(pmap_t pmap, pv_entry_t pv)
1582 struct pv_chunk *pc;
1583 int idx, field, bit;
1585 rw_assert(&pvh_global_lock, RA_LOCKED);
1586 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1587 PV_STAT(atomic_add_long(&pv_entry_frees, 1));
1588 PV_STAT(atomic_add_int(&pv_entry_spare, 1));
1589 PV_STAT(atomic_subtract_long(&pv_entry_count, 1));
1590 pc = pv_to_chunk(pv);
1591 idx = pv - &pc->pc_pventry[0];
1594 pc->pc_map[field] |= 1ul << bit;
1595 if (pc->pc_map[0] != PC_FREE0 || pc->pc_map[1] != PC_FREE1 ||
1596 pc->pc_map[2] != PC_FREE2) {
1597 /* 98% of the time, pc is already at the head of the list. */
1598 if (__predict_false(pc != TAILQ_FIRST(&pmap->pm_pvchunk))) {
1599 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1600 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1604 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1609 free_pv_chunk(struct pv_chunk *pc)
1613 mtx_lock(&pv_chunks_mutex);
1614 TAILQ_REMOVE(&pv_chunks, pc, pc_lru);
1615 mtx_unlock(&pv_chunks_mutex);
1616 PV_STAT(atomic_subtract_int(&pv_entry_spare, _NPCPV));
1617 PV_STAT(atomic_subtract_int(&pc_chunk_count, 1));
1618 PV_STAT(atomic_add_int(&pc_chunk_frees, 1));
1619 /* entire chunk is free, return it */
1620 m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pc));
1621 dump_drop_page(m->phys_addr);
1622 vm_page_unwire_noq(m);
1627 * Returns a new PV entry, allocating a new PV chunk from the system when
1628 * needed. If this PV chunk allocation fails and a PV list lock pointer was
1629 * given, a PV chunk is reclaimed from an arbitrary pmap. Otherwise, NULL is
1632 * The given PV list lock may be released.
1635 get_pv_entry(pmap_t pmap, struct rwlock **lockp)
1639 struct pv_chunk *pc;
1642 rw_assert(&pvh_global_lock, RA_LOCKED);
1643 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1644 PV_STAT(atomic_add_long(&pv_entry_allocs, 1));
1646 pc = TAILQ_FIRST(&pmap->pm_pvchunk);
1648 for (field = 0; field < _NPCM; field++) {
1649 if (pc->pc_map[field]) {
1650 bit = ffsl(pc->pc_map[field]) - 1;
1654 if (field < _NPCM) {
1655 pv = &pc->pc_pventry[field * 64 + bit];
1656 pc->pc_map[field] &= ~(1ul << bit);
1657 /* If this was the last item, move it to tail */
1658 if (pc->pc_map[0] == 0 && pc->pc_map[1] == 0 &&
1659 pc->pc_map[2] == 0) {
1660 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1661 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc,
1664 PV_STAT(atomic_add_long(&pv_entry_count, 1));
1665 PV_STAT(atomic_subtract_int(&pv_entry_spare, 1));
1669 /* No free items, allocate another chunk */
1670 m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ |
1673 if (lockp == NULL) {
1674 PV_STAT(pc_chunk_tryfail++);
1677 m = reclaim_pv_chunk(pmap, lockp);
1681 PV_STAT(atomic_add_int(&pc_chunk_count, 1));
1682 PV_STAT(atomic_add_int(&pc_chunk_allocs, 1));
1683 dump_add_page(m->phys_addr);
1684 pc = (void *)PHYS_TO_DMAP(m->phys_addr);
1686 pc->pc_map[0] = PC_FREE0 & ~1ul; /* preallocated bit 0 */
1687 pc->pc_map[1] = PC_FREE1;
1688 pc->pc_map[2] = PC_FREE2;
1689 mtx_lock(&pv_chunks_mutex);
1690 TAILQ_INSERT_TAIL(&pv_chunks, pc, pc_lru);
1691 mtx_unlock(&pv_chunks_mutex);
1692 pv = &pc->pc_pventry[0];
1693 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1694 PV_STAT(atomic_add_long(&pv_entry_count, 1));
1695 PV_STAT(atomic_add_int(&pv_entry_spare, _NPCPV - 1));
1700 * Ensure that the number of spare PV entries in the specified pmap meets or
1701 * exceeds the given count, "needed".
1703 * The given PV list lock may be released.
1706 reserve_pv_entries(pmap_t pmap, int needed, struct rwlock **lockp)
1708 struct pch new_tail;
1709 struct pv_chunk *pc;
1714 rw_assert(&pvh_global_lock, RA_LOCKED);
1715 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1716 KASSERT(lockp != NULL, ("reserve_pv_entries: lockp is NULL"));
1719 * Newly allocated PV chunks must be stored in a private list until
1720 * the required number of PV chunks have been allocated. Otherwise,
1721 * reclaim_pv_chunk() could recycle one of these chunks. In
1722 * contrast, these chunks must be added to the pmap upon allocation.
1724 TAILQ_INIT(&new_tail);
1727 TAILQ_FOREACH(pc, &pmap->pm_pvchunk, pc_list) {
1728 bit_count((bitstr_t *)pc->pc_map, 0,
1729 sizeof(pc->pc_map) * NBBY, &free);
1733 if (avail >= needed)
1736 for (reclaimed = false; avail < needed; avail += _NPCPV) {
1737 m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ |
1740 m = reclaim_pv_chunk(pmap, lockp);
1747 dump_add_page(m->phys_addr);
1749 pc = (void *)PHYS_TO_DMAP(m->phys_addr);
1751 pc->pc_map[0] = PC_FREE0;
1752 pc->pc_map[1] = PC_FREE1;
1753 pc->pc_map[2] = PC_FREE2;
1754 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1755 TAILQ_INSERT_TAIL(&new_tail, pc, pc_lru);
1758 * The reclaim might have freed a chunk from the current pmap.
1759 * If that chunk contained available entries, we need to
1760 * re-count the number of available entries.
1765 if (!TAILQ_EMPTY(&new_tail)) {
1766 mtx_lock(&pv_chunks_mutex);
1767 TAILQ_CONCAT(&pv_chunks, &new_tail, pc_lru);
1768 mtx_unlock(&pv_chunks_mutex);
1773 * First find and then remove the pv entry for the specified pmap and virtual
1774 * address from the specified pv list. Returns the pv entry if found and NULL
1775 * otherwise. This operation can be performed on pv lists for either 4KB or
1776 * 2MB page mappings.
1778 static __inline pv_entry_t
1779 pmap_pvh_remove(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
1783 rw_assert(&pvh_global_lock, RA_LOCKED);
1784 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
1785 if (pmap == PV_PMAP(pv) && va == pv->pv_va) {
1786 TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
1795 * First find and then destroy the pv entry for the specified pmap and virtual
1796 * address. This operation can be performed on pv lists for either 4KB or 2MB
1800 pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
1804 pv = pmap_pvh_remove(pvh, pmap, va);
1806 KASSERT(pv != NULL, ("pmap_pvh_free: pv not found for %#lx", va));
1807 free_pv_entry(pmap, pv);
1811 * Conditionally create the PV entry for a 4KB page mapping if the required
1812 * memory can be allocated without resorting to reclamation.
1815 pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m,
1816 struct rwlock **lockp)
1820 rw_assert(&pvh_global_lock, RA_LOCKED);
1821 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1822 /* Pass NULL instead of the lock pointer to disable reclamation. */
1823 if ((pv = get_pv_entry(pmap, NULL)) != NULL) {
1825 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m);
1826 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1834 * After demotion from a 2MB page mapping to 512 4KB page mappings,
1835 * destroy the pv entry for the 2MB page mapping and reinstantiate the pv
1836 * entries for each of the 4KB page mappings.
1838 static void __unused
1839 pmap_pv_demote_l2(pmap_t pmap, vm_offset_t va, vm_paddr_t pa,
1840 struct rwlock **lockp)
1842 struct md_page *pvh;
1843 struct pv_chunk *pc;
1846 vm_offset_t va_last;
1849 rw_assert(&pvh_global_lock, RA_LOCKED);
1850 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1851 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa);
1854 * Transfer the 2mpage's pv entry for this mapping to the first
1855 * page's pv list. Once this transfer begins, the pv list lock
1856 * must not be released until the last pv entry is reinstantiated.
1858 pvh = pa_to_pvh(pa);
1860 pv = pmap_pvh_remove(pvh, pmap, va);
1861 KASSERT(pv != NULL, ("pmap_pv_demote_l2: pv not found"));
1862 m = PHYS_TO_VM_PAGE(pa);
1863 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1865 /* Instantiate the remaining 511 pv entries. */
1866 va_last = va + L2_SIZE - PAGE_SIZE;
1868 pc = TAILQ_FIRST(&pmap->pm_pvchunk);
1869 KASSERT(pc->pc_map[0] != 0 || pc->pc_map[1] != 0 ||
1870 pc->pc_map[2] != 0, ("pmap_pv_demote_l2: missing spare"));
1871 for (field = 0; field < _NPCM; field++) {
1872 while (pc->pc_map[field] != 0) {
1873 bit = ffsl(pc->pc_map[field]) - 1;
1874 pc->pc_map[field] &= ~(1ul << bit);
1875 pv = &pc->pc_pventry[field * 64 + bit];
1879 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
1880 ("pmap_pv_demote_l2: page %p is not managed", m));
1881 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1887 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1888 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list);
1891 if (pc->pc_map[0] == 0 && pc->pc_map[1] == 0 && pc->pc_map[2] == 0) {
1892 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1893 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list);
1898 #if VM_NRESERVLEVEL > 0
1900 pmap_pv_promote_l2(pmap_t pmap, vm_offset_t va, vm_paddr_t pa,
1901 struct rwlock **lockp)
1903 struct md_page *pvh;
1906 vm_offset_t va_last;
1908 rw_assert(&pvh_global_lock, RA_LOCKED);
1909 KASSERT((va & L2_OFFSET) == 0,
1910 ("pmap_pv_promote_l2: misaligned va %#lx", va));
1912 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa);
1914 m = PHYS_TO_VM_PAGE(pa);
1915 pv = pmap_pvh_remove(&m->md, pmap, va);
1916 KASSERT(pv != NULL, ("pmap_pv_promote_l2: pv for %#lx not found", va));
1917 pvh = pa_to_pvh(pa);
1918 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_next);
1921 va_last = va + L2_SIZE - PAGE_SIZE;
1925 pmap_pvh_free(&m->md, pmap, va);
1926 } while (va < va_last);
1928 #endif /* VM_NRESERVLEVEL > 0 */
1931 * Create the PV entry for a 2MB page mapping. Always returns true unless the
1932 * flag PMAP_ENTER_NORECLAIM is specified. If that flag is specified, returns
1933 * false if the PV entry cannot be allocated without resorting to reclamation.
1936 pmap_pv_insert_l2(pmap_t pmap, vm_offset_t va, pd_entry_t l2e, u_int flags,
1937 struct rwlock **lockp)
1939 struct md_page *pvh;
1943 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1944 /* Pass NULL instead of the lock pointer to disable reclamation. */
1945 if ((pv = get_pv_entry(pmap, (flags & PMAP_ENTER_NORECLAIM) != 0 ?
1946 NULL : lockp)) == NULL)
1949 pa = PTE_TO_PHYS(l2e);
1950 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa);
1951 pvh = pa_to_pvh(pa);
1952 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_next);
1958 pmap_remove_kernel_l2(pmap_t pmap, pt_entry_t *l2, vm_offset_t va)
1960 pt_entry_t newl2, oldl2;
1964 KASSERT(!VIRT_IN_DMAP(va), ("removing direct mapping of %#lx", va));
1965 KASSERT(pmap == kernel_pmap, ("pmap %p is not kernel_pmap", pmap));
1966 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1968 ml3 = pmap_remove_pt_page(pmap, va);
1970 panic("pmap_remove_kernel_l2: Missing pt page");
1972 ml3pa = VM_PAGE_TO_PHYS(ml3);
1973 newl2 = ml3pa | PTE_V;
1976 * If this page table page was unmapped by a promotion, then it
1977 * contains valid mappings. Zero it to invalidate those mappings.
1979 if (ml3->valid != 0)
1980 pagezero((void *)PHYS_TO_DMAP(ml3pa));
1983 * Demote the mapping.
1985 oldl2 = pmap_load_store(l2, newl2);
1986 KASSERT(oldl2 == 0, ("%s: found existing mapping at %p: %#lx",
1987 __func__, l2, oldl2));
1991 * pmap_remove_l2: Do the things to unmap a level 2 superpage.
1994 pmap_remove_l2(pmap_t pmap, pt_entry_t *l2, vm_offset_t sva,
1995 pd_entry_t l1e, struct spglist *free, struct rwlock **lockp)
1997 struct md_page *pvh;
1999 vm_offset_t eva, va;
2002 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2003 KASSERT((sva & L2_OFFSET) == 0, ("pmap_remove_l2: sva is not aligned"));
2004 oldl2 = pmap_load_clear(l2);
2005 KASSERT((oldl2 & PTE_RWX) != 0,
2006 ("pmap_remove_l2: L2e %lx is not a superpage mapping", oldl2));
2009 * The sfence.vma documentation states that it is sufficient to specify
2010 * a single address within a superpage mapping. However, since we do
2011 * not perform any invalidation upon promotion, TLBs may still be
2012 * caching 4KB mappings within the superpage, so we must invalidate the
2015 pmap_invalidate_range(pmap, sva, sva + L2_SIZE);
2016 if ((oldl2 & PTE_SW_WIRED) != 0)
2017 pmap->pm_stats.wired_count -= L2_SIZE / PAGE_SIZE;
2018 pmap_resident_count_dec(pmap, L2_SIZE / PAGE_SIZE);
2019 if ((oldl2 & PTE_SW_MANAGED) != 0) {
2020 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, PTE_TO_PHYS(oldl2));
2021 pvh = pa_to_pvh(PTE_TO_PHYS(oldl2));
2022 pmap_pvh_free(pvh, pmap, sva);
2023 eva = sva + L2_SIZE;
2024 for (va = sva, m = PHYS_TO_VM_PAGE(PTE_TO_PHYS(oldl2));
2025 va < eva; va += PAGE_SIZE, m++) {
2026 if ((oldl2 & PTE_D) != 0)
2028 if ((oldl2 & PTE_A) != 0)
2029 vm_page_aflag_set(m, PGA_REFERENCED);
2030 if (TAILQ_EMPTY(&m->md.pv_list) &&
2031 TAILQ_EMPTY(&pvh->pv_list))
2032 vm_page_aflag_clear(m, PGA_WRITEABLE);
2035 if (pmap == kernel_pmap) {
2036 pmap_remove_kernel_l2(pmap, l2, sva);
2038 ml3 = pmap_remove_pt_page(pmap, sva);
2040 KASSERT(ml3->valid == VM_PAGE_BITS_ALL,
2041 ("pmap_remove_l2: l3 page not promoted"));
2042 pmap_resident_count_dec(pmap, 1);
2043 KASSERT(ml3->ref_count == Ln_ENTRIES,
2044 ("pmap_remove_l2: l3 page ref count error"));
2046 vm_page_unwire_noq(ml3);
2047 pmap_add_delayed_free_list(ml3, free, FALSE);
2050 return (pmap_unuse_pt(pmap, sva, l1e, free));
2054 * pmap_remove_l3: do the things to unmap a page in a process
2057 pmap_remove_l3(pmap_t pmap, pt_entry_t *l3, vm_offset_t va,
2058 pd_entry_t l2e, struct spglist *free, struct rwlock **lockp)
2060 struct md_page *pvh;
2065 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2066 old_l3 = pmap_load_clear(l3);
2067 pmap_invalidate_page(pmap, va);
2068 if (old_l3 & PTE_SW_WIRED)
2069 pmap->pm_stats.wired_count -= 1;
2070 pmap_resident_count_dec(pmap, 1);
2071 if (old_l3 & PTE_SW_MANAGED) {
2072 phys = PTE_TO_PHYS(old_l3);
2073 m = PHYS_TO_VM_PAGE(phys);
2074 if ((old_l3 & PTE_D) != 0)
2077 vm_page_aflag_set(m, PGA_REFERENCED);
2078 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m);
2079 pmap_pvh_free(&m->md, pmap, va);
2080 if (TAILQ_EMPTY(&m->md.pv_list) &&
2081 (m->flags & PG_FICTITIOUS) == 0) {
2082 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
2083 if (TAILQ_EMPTY(&pvh->pv_list))
2084 vm_page_aflag_clear(m, PGA_WRITEABLE);
2088 return (pmap_unuse_pt(pmap, va, l2e, free));
2092 * Remove the given range of addresses from the specified map.
2094 * It is assumed that the start and end are properly
2095 * rounded to the page size.
2098 pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
2100 struct spglist free;
2101 struct rwlock *lock;
2102 vm_offset_t va, va_next;
2103 pd_entry_t *l1, *l2, l2e;
2107 * Perform an unsynchronized read. This is, however, safe.
2109 if (pmap->pm_stats.resident_count == 0)
2114 rw_rlock(&pvh_global_lock);
2118 for (; sva < eva; sva = va_next) {
2119 if (pmap->pm_stats.resident_count == 0)
2122 l1 = pmap_l1(pmap, sva);
2123 if (pmap_load(l1) == 0) {
2124 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
2131 * Calculate index for next page table.
2133 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
2137 l2 = pmap_l1_to_l2(l1, sva);
2140 if ((l2e = pmap_load(l2)) == 0)
2142 if ((l2e & PTE_RWX) != 0) {
2143 if (sva + L2_SIZE == va_next && eva >= va_next) {
2144 (void)pmap_remove_l2(pmap, l2, sva,
2145 pmap_load(l1), &free, &lock);
2147 } else if (!pmap_demote_l2_locked(pmap, l2, sva,
2150 * The large page mapping was destroyed.
2154 l2e = pmap_load(l2);
2158 * Limit our scan to either the end of the va represented
2159 * by the current page table page, or to the end of the
2160 * range being removed.
2166 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
2168 if (pmap_load(l3) == 0) {
2169 if (va != va_next) {
2170 pmap_invalidate_range(pmap, va, sva);
2177 if (pmap_remove_l3(pmap, l3, sva, l2e, &free, &lock)) {
2183 pmap_invalidate_range(pmap, va, sva);
2187 rw_runlock(&pvh_global_lock);
2189 vm_page_free_pages_toq(&free, false);
2193 * Routine: pmap_remove_all
2195 * Removes this physical page from
2196 * all physical maps in which it resides.
2197 * Reflects back modify bits to the pager.
2200 * Original versions of this routine were very
2201 * inefficient because they iteratively called
2202 * pmap_remove (slow...)
2206 pmap_remove_all(vm_page_t m)
2208 struct spglist free;
2209 struct md_page *pvh;
2211 pt_entry_t *l3, l3e;
2212 pd_entry_t *l2, l2e;
2216 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2217 ("pmap_remove_all: page %p is not managed", m));
2219 pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy :
2220 pa_to_pvh(VM_PAGE_TO_PHYS(m));
2222 rw_wlock(&pvh_global_lock);
2223 while ((pv = TAILQ_FIRST(&pvh->pv_list)) != NULL) {
2227 l2 = pmap_l2(pmap, va);
2228 (void)pmap_demote_l2(pmap, l2, va);
2231 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
2234 pmap_resident_count_dec(pmap, 1);
2235 l2 = pmap_l2(pmap, pv->pv_va);
2236 KASSERT(l2 != NULL, ("pmap_remove_all: no l2 table found"));
2237 l2e = pmap_load(l2);
2239 KASSERT((l2e & PTE_RX) == 0,
2240 ("pmap_remove_all: found a superpage in %p's pv list", m));
2242 l3 = pmap_l2_to_l3(l2, pv->pv_va);
2243 l3e = pmap_load_clear(l3);
2244 pmap_invalidate_page(pmap, pv->pv_va);
2245 if (l3e & PTE_SW_WIRED)
2246 pmap->pm_stats.wired_count--;
2247 if ((l3e & PTE_A) != 0)
2248 vm_page_aflag_set(m, PGA_REFERENCED);
2251 * Update the vm_page_t clean and reference bits.
2253 if ((l3e & PTE_D) != 0)
2255 pmap_unuse_pt(pmap, pv->pv_va, pmap_load(l2), &free);
2256 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
2258 free_pv_entry(pmap, pv);
2261 vm_page_aflag_clear(m, PGA_WRITEABLE);
2262 rw_wunlock(&pvh_global_lock);
2263 vm_page_free_pages_toq(&free, false);
2267 * Set the physical protection on the
2268 * specified range of this map as requested.
2271 pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
2273 pd_entry_t *l1, *l2, l2e;
2274 pt_entry_t *l3, l3e, mask;
2277 vm_offset_t va_next;
2278 bool anychanged, pv_lists_locked;
2280 if ((prot & VM_PROT_READ) == VM_PROT_NONE) {
2281 pmap_remove(pmap, sva, eva);
2285 if ((prot & (VM_PROT_WRITE | VM_PROT_EXECUTE)) ==
2286 (VM_PROT_WRITE | VM_PROT_EXECUTE))
2290 pv_lists_locked = false;
2292 if ((prot & VM_PROT_WRITE) == 0)
2293 mask |= PTE_W | PTE_D;
2294 if ((prot & VM_PROT_EXECUTE) == 0)
2298 for (; sva < eva; sva = va_next) {
2299 l1 = pmap_l1(pmap, sva);
2300 if (pmap_load(l1) == 0) {
2301 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
2307 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
2311 l2 = pmap_l1_to_l2(l1, sva);
2312 if (l2 == NULL || (l2e = pmap_load(l2)) == 0)
2314 if ((l2e & PTE_RWX) != 0) {
2315 if (sva + L2_SIZE == va_next && eva >= va_next) {
2317 if ((prot & VM_PROT_WRITE) == 0 &&
2318 (l2e & (PTE_SW_MANAGED | PTE_D)) ==
2319 (PTE_SW_MANAGED | PTE_D)) {
2320 pa = PTE_TO_PHYS(l2e);
2321 m = PHYS_TO_VM_PAGE(pa);
2322 for (mt = m; mt < &m[Ln_ENTRIES]; mt++)
2325 if (!atomic_fcmpset_long(l2, &l2e, l2e & ~mask))
2330 if (!pv_lists_locked) {
2331 pv_lists_locked = true;
2332 if (!rw_try_rlock(&pvh_global_lock)) {
2334 pmap_invalidate_all(
2337 rw_rlock(&pvh_global_lock);
2341 if (!pmap_demote_l2(pmap, l2, sva)) {
2343 * The large page mapping was destroyed.
2353 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
2355 l3e = pmap_load(l3);
2357 if ((l3e & PTE_V) == 0)
2359 if ((prot & VM_PROT_WRITE) == 0 &&
2360 (l3e & (PTE_SW_MANAGED | PTE_D)) ==
2361 (PTE_SW_MANAGED | PTE_D)) {
2362 m = PHYS_TO_VM_PAGE(PTE_TO_PHYS(l3e));
2365 if (!atomic_fcmpset_long(l3, &l3e, l3e & ~mask))
2371 pmap_invalidate_all(pmap);
2372 if (pv_lists_locked)
2373 rw_runlock(&pvh_global_lock);
2378 pmap_fault_fixup(pmap_t pmap, vm_offset_t va, vm_prot_t ftype)
2380 pd_entry_t *l2, l2e;
2381 pt_entry_t bits, *pte, oldpte;
2386 l2 = pmap_l2(pmap, va);
2387 if (l2 == NULL || ((l2e = pmap_load(l2)) & PTE_V) == 0)
2389 if ((l2e & PTE_RWX) == 0) {
2390 pte = pmap_l2_to_l3(l2, va);
2391 if (pte == NULL || ((oldpte = pmap_load(pte)) & PTE_V) == 0)
2398 if ((pmap != kernel_pmap && (oldpte & PTE_U) == 0) ||
2399 (ftype == VM_PROT_WRITE && (oldpte & PTE_W) == 0) ||
2400 (ftype == VM_PROT_EXECUTE && (oldpte & PTE_X) == 0) ||
2401 (ftype == VM_PROT_READ && (oldpte & PTE_R) == 0))
2405 if (ftype == VM_PROT_WRITE)
2409 * Spurious faults can occur if the implementation caches invalid
2410 * entries in the TLB, or if simultaneous accesses on multiple CPUs
2411 * race with each other.
2413 if ((oldpte & bits) != bits)
2414 pmap_store_bits(pte, bits);
2423 pmap_demote_l2(pmap_t pmap, pd_entry_t *l2, vm_offset_t va)
2425 struct rwlock *lock;
2429 rv = pmap_demote_l2_locked(pmap, l2, va, &lock);
2436 * Tries to demote a 2MB page mapping. If demotion fails, the 2MB page
2437 * mapping is invalidated.
2440 pmap_demote_l2_locked(pmap_t pmap, pd_entry_t *l2, vm_offset_t va,
2441 struct rwlock **lockp)
2443 struct spglist free;
2445 pd_entry_t newl2, oldl2;
2446 pt_entry_t *firstl3, newl3;
2450 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2452 oldl2 = pmap_load(l2);
2453 KASSERT((oldl2 & PTE_RWX) != 0,
2454 ("pmap_demote_l2_locked: oldl2 is not a leaf entry"));
2455 if ((oldl2 & PTE_A) == 0 || (mpte = pmap_remove_pt_page(pmap, va)) ==
2457 if ((oldl2 & PTE_A) == 0 || (mpte = vm_page_alloc(NULL,
2458 pmap_l2_pindex(va), (VIRT_IN_DMAP(va) ? VM_ALLOC_INTERRUPT :
2459 VM_ALLOC_NORMAL) | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED)) ==
2462 (void)pmap_remove_l2(pmap, l2, va & ~L2_OFFSET,
2463 pmap_load(pmap_l1(pmap, va)), &free, lockp);
2464 vm_page_free_pages_toq(&free, true);
2465 CTR2(KTR_PMAP, "pmap_demote_l2_locked: "
2466 "failure for va %#lx in pmap %p", va, pmap);
2469 if (va < VM_MAXUSER_ADDRESS) {
2470 mpte->ref_count = Ln_ENTRIES;
2471 pmap_resident_count_inc(pmap, 1);
2474 mptepa = VM_PAGE_TO_PHYS(mpte);
2475 firstl3 = (pt_entry_t *)PHYS_TO_DMAP(mptepa);
2476 newl2 = ((mptepa / PAGE_SIZE) << PTE_PPN0_S) | PTE_V;
2477 KASSERT((oldl2 & PTE_A) != 0,
2478 ("pmap_demote_l2_locked: oldl2 is missing PTE_A"));
2479 KASSERT((oldl2 & (PTE_D | PTE_W)) != PTE_W,
2480 ("pmap_demote_l2_locked: oldl2 is missing PTE_D"));
2484 * If the page table page is not leftover from an earlier promotion,
2487 if (mpte->valid == 0) {
2488 for (i = 0; i < Ln_ENTRIES; i++)
2489 pmap_store(firstl3 + i, newl3 + (i << PTE_PPN0_S));
2491 KASSERT(PTE_TO_PHYS(pmap_load(firstl3)) == PTE_TO_PHYS(newl3),
2492 ("pmap_demote_l2_locked: firstl3 and newl3 map different physical "
2496 * If the mapping has changed attributes, update the page table
2499 if ((pmap_load(firstl3) & PTE_PROMOTE) != (newl3 & PTE_PROMOTE))
2500 for (i = 0; i < Ln_ENTRIES; i++)
2501 pmap_store(firstl3 + i, newl3 + (i << PTE_PPN0_S));
2504 * The spare PV entries must be reserved prior to demoting the
2505 * mapping, that is, prior to changing the L2 entry. Otherwise, the
2506 * state of the L2 entry and the PV lists will be inconsistent, which
2507 * can result in reclaim_pv_chunk() attempting to remove a PV entry from
2508 * the wrong PV list and pmap_pv_demote_l2() failing to find the
2509 * expected PV entry for the 2MB page mapping that is being demoted.
2511 if ((oldl2 & PTE_SW_MANAGED) != 0)
2512 reserve_pv_entries(pmap, Ln_ENTRIES - 1, lockp);
2515 * Demote the mapping.
2517 pmap_store(l2, newl2);
2520 * Demote the PV entry.
2522 if ((oldl2 & PTE_SW_MANAGED) != 0)
2523 pmap_pv_demote_l2(pmap, va, PTE_TO_PHYS(oldl2), lockp);
2525 atomic_add_long(&pmap_l2_demotions, 1);
2526 CTR2(KTR_PMAP, "pmap_demote_l2_locked: success for va %#lx in pmap %p",
2531 #if VM_NRESERVLEVEL > 0
2533 pmap_promote_l2(pmap_t pmap, pd_entry_t *l2, vm_offset_t va,
2534 struct rwlock **lockp)
2536 pt_entry_t *firstl3, *l3;
2540 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2543 KASSERT((pmap_load(l2) & PTE_RWX) == 0,
2544 ("pmap_promote_l2: invalid l2 entry %p", l2));
2546 firstl3 = (pt_entry_t *)PHYS_TO_DMAP(PTE_TO_PHYS(pmap_load(l2)));
2547 pa = PTE_TO_PHYS(pmap_load(firstl3));
2548 if ((pa & L2_OFFSET) != 0) {
2549 CTR2(KTR_PMAP, "pmap_promote_l2: failure for va %#lx pmap %p",
2551 atomic_add_long(&pmap_l2_p_failures, 1);
2556 for (l3 = firstl3 + 1; l3 < firstl3 + Ln_ENTRIES; l3++) {
2557 if (PTE_TO_PHYS(pmap_load(l3)) != pa) {
2559 "pmap_promote_l2: failure for va %#lx pmap %p",
2561 atomic_add_long(&pmap_l2_p_failures, 1);
2564 if ((pmap_load(l3) & PTE_PROMOTE) !=
2565 (pmap_load(firstl3) & PTE_PROMOTE)) {
2567 "pmap_promote_l2: failure for va %#lx pmap %p",
2569 atomic_add_long(&pmap_l2_p_failures, 1);
2575 ml3 = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l2)));
2576 KASSERT(ml3->pindex == pmap_l2_pindex(va),
2577 ("pmap_promote_l2: page table page's pindex is wrong"));
2578 if (pmap_insert_pt_page(pmap, ml3, true)) {
2579 CTR2(KTR_PMAP, "pmap_promote_l2: failure for va %#lx pmap %p",
2581 atomic_add_long(&pmap_l2_p_failures, 1);
2585 if ((pmap_load(firstl3) & PTE_SW_MANAGED) != 0)
2586 pmap_pv_promote_l2(pmap, va, PTE_TO_PHYS(pmap_load(firstl3)),
2589 pmap_store(l2, pmap_load(firstl3));
2591 atomic_add_long(&pmap_l2_promotions, 1);
2592 CTR2(KTR_PMAP, "pmap_promote_l2: success for va %#lx in pmap %p", va,
2598 * Insert the given physical page (p) at
2599 * the specified virtual address (v) in the
2600 * target physical map with the protection requested.
2602 * If specified, the page will be wired down, meaning
2603 * that the related pte can not be reclaimed.
2605 * NB: This is the only routine which MAY NOT lazy-evaluate
2606 * or lose information. That is, this routine must actually
2607 * insert this page into the given map NOW.
2610 pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
2611 u_int flags, int8_t psind)
2613 struct rwlock *lock;
2614 pd_entry_t *l1, *l2, l2e;
2615 pt_entry_t new_l3, orig_l3;
2618 vm_paddr_t opa, pa, l2_pa, l3_pa;
2619 vm_page_t mpte, om, l2_m, l3_m;
2621 pn_t l2_pn, l3_pn, pn;
2625 va = trunc_page(va);
2626 if ((m->oflags & VPO_UNMANAGED) == 0)
2627 VM_PAGE_OBJECT_BUSY_ASSERT(m);
2628 pa = VM_PAGE_TO_PHYS(m);
2629 pn = (pa / PAGE_SIZE);
2631 new_l3 = PTE_V | PTE_R | PTE_A;
2632 if (prot & VM_PROT_EXECUTE)
2634 if (flags & VM_PROT_WRITE)
2636 if (prot & VM_PROT_WRITE)
2638 if (va < VM_MAX_USER_ADDRESS)
2641 new_l3 |= (pn << PTE_PPN0_S);
2642 if ((flags & PMAP_ENTER_WIRED) != 0)
2643 new_l3 |= PTE_SW_WIRED;
2646 * Set modified bit gratuitously for writeable mappings if
2647 * the page is unmanaged. We do not want to take a fault
2648 * to do the dirty bit accounting for these mappings.
2650 if ((m->oflags & VPO_UNMANAGED) != 0) {
2651 if (prot & VM_PROT_WRITE)
2654 new_l3 |= PTE_SW_MANAGED;
2656 CTR2(KTR_PMAP, "pmap_enter: %.16lx -> %.16lx", va, pa);
2660 rw_rlock(&pvh_global_lock);
2663 /* Assert the required virtual and physical alignment. */
2664 KASSERT((va & L2_OFFSET) == 0,
2665 ("pmap_enter: va %#lx unaligned", va));
2666 KASSERT(m->psind > 0, ("pmap_enter: m->psind < psind"));
2667 rv = pmap_enter_l2(pmap, va, new_l3, flags, m, &lock);
2671 l2 = pmap_l2(pmap, va);
2672 if (l2 != NULL && ((l2e = pmap_load(l2)) & PTE_V) != 0 &&
2673 ((l2e & PTE_RWX) == 0 || pmap_demote_l2_locked(pmap, l2,
2675 l3 = pmap_l2_to_l3(l2, va);
2676 if (va < VM_MAXUSER_ADDRESS) {
2677 mpte = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l2)));
2680 } else if (va < VM_MAXUSER_ADDRESS) {
2681 nosleep = (flags & PMAP_ENTER_NOSLEEP) != 0;
2682 mpte = pmap_alloc_l3(pmap, va, nosleep ? NULL : &lock);
2683 if (mpte == NULL && nosleep) {
2684 CTR0(KTR_PMAP, "pmap_enter: mpte == NULL");
2687 rw_runlock(&pvh_global_lock);
2689 return (KERN_RESOURCE_SHORTAGE);
2691 l3 = pmap_l3(pmap, va);
2693 l3 = pmap_l3(pmap, va);
2694 /* TODO: This is not optimal, but should mostly work */
2697 l2_m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
2698 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
2701 panic("pmap_enter: l2 pte_m == NULL");
2702 if ((l2_m->flags & PG_ZERO) == 0)
2703 pmap_zero_page(l2_m);
2705 l2_pa = VM_PAGE_TO_PHYS(l2_m);
2706 l2_pn = (l2_pa / PAGE_SIZE);
2708 l1 = pmap_l1(pmap, va);
2710 entry |= (l2_pn << PTE_PPN0_S);
2711 pmap_store(l1, entry);
2712 pmap_distribute_l1(pmap, pmap_l1_index(va), entry);
2713 l2 = pmap_l1_to_l2(l1, va);
2716 l3_m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
2717 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | VM_ALLOC_ZERO);
2719 panic("pmap_enter: l3 pte_m == NULL");
2720 if ((l3_m->flags & PG_ZERO) == 0)
2721 pmap_zero_page(l3_m);
2723 l3_pa = VM_PAGE_TO_PHYS(l3_m);
2724 l3_pn = (l3_pa / PAGE_SIZE);
2726 entry |= (l3_pn << PTE_PPN0_S);
2727 pmap_store(l2, entry);
2728 l3 = pmap_l2_to_l3(l2, va);
2730 pmap_invalidate_page(pmap, va);
2733 orig_l3 = pmap_load(l3);
2734 opa = PTE_TO_PHYS(orig_l3);
2738 * Is the specified virtual address already mapped?
2740 if ((orig_l3 & PTE_V) != 0) {
2742 * Wiring change, just update stats. We don't worry about
2743 * wiring PT pages as they remain resident as long as there
2744 * are valid mappings in them. Hence, if a user page is wired,
2745 * the PT page will be also.
2747 if ((flags & PMAP_ENTER_WIRED) != 0 &&
2748 (orig_l3 & PTE_SW_WIRED) == 0)
2749 pmap->pm_stats.wired_count++;
2750 else if ((flags & PMAP_ENTER_WIRED) == 0 &&
2751 (orig_l3 & PTE_SW_WIRED) != 0)
2752 pmap->pm_stats.wired_count--;
2755 * Remove the extra PT page reference.
2759 KASSERT(mpte->ref_count > 0,
2760 ("pmap_enter: missing reference to page table page,"
2765 * Has the physical page changed?
2769 * No, might be a protection or wiring change.
2771 if ((orig_l3 & PTE_SW_MANAGED) != 0 &&
2772 (new_l3 & PTE_W) != 0)
2773 vm_page_aflag_set(m, PGA_WRITEABLE);
2778 * The physical page has changed. Temporarily invalidate
2779 * the mapping. This ensures that all threads sharing the
2780 * pmap keep a consistent view of the mapping, which is
2781 * necessary for the correct handling of COW faults. It
2782 * also permits reuse of the old mapping's PV entry,
2783 * avoiding an allocation.
2785 * For consistency, handle unmanaged mappings the same way.
2787 orig_l3 = pmap_load_clear(l3);
2788 KASSERT(PTE_TO_PHYS(orig_l3) == opa,
2789 ("pmap_enter: unexpected pa update for %#lx", va));
2790 if ((orig_l3 & PTE_SW_MANAGED) != 0) {
2791 om = PHYS_TO_VM_PAGE(opa);
2794 * The pmap lock is sufficient to synchronize with
2795 * concurrent calls to pmap_page_test_mappings() and
2796 * pmap_ts_referenced().
2798 if ((orig_l3 & PTE_D) != 0)
2800 if ((orig_l3 & PTE_A) != 0)
2801 vm_page_aflag_set(om, PGA_REFERENCED);
2802 CHANGE_PV_LIST_LOCK_TO_PHYS(&lock, opa);
2803 pv = pmap_pvh_remove(&om->md, pmap, va);
2805 ("pmap_enter: no PV entry for %#lx", va));
2806 if ((new_l3 & PTE_SW_MANAGED) == 0)
2807 free_pv_entry(pmap, pv);
2808 if ((om->a.flags & PGA_WRITEABLE) != 0 &&
2809 TAILQ_EMPTY(&om->md.pv_list) &&
2810 ((om->flags & PG_FICTITIOUS) != 0 ||
2811 TAILQ_EMPTY(&pa_to_pvh(opa)->pv_list)))
2812 vm_page_aflag_clear(om, PGA_WRITEABLE);
2814 pmap_invalidate_page(pmap, va);
2818 * Increment the counters.
2820 if ((new_l3 & PTE_SW_WIRED) != 0)
2821 pmap->pm_stats.wired_count++;
2822 pmap_resident_count_inc(pmap, 1);
2825 * Enter on the PV list if part of our managed memory.
2827 if ((new_l3 & PTE_SW_MANAGED) != 0) {
2829 pv = get_pv_entry(pmap, &lock);
2832 CHANGE_PV_LIST_LOCK_TO_PHYS(&lock, pa);
2833 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
2835 if ((new_l3 & PTE_W) != 0)
2836 vm_page_aflag_set(m, PGA_WRITEABLE);
2841 * Sync the i-cache on all harts before updating the PTE
2842 * if the new PTE is executable.
2844 if (prot & VM_PROT_EXECUTE)
2845 pmap_sync_icache(pmap, va, PAGE_SIZE);
2848 * Update the L3 entry.
2851 orig_l3 = pmap_load_store(l3, new_l3);
2852 pmap_invalidate_page(pmap, va);
2853 KASSERT(PTE_TO_PHYS(orig_l3) == pa,
2854 ("pmap_enter: invalid update"));
2855 if ((orig_l3 & (PTE_D | PTE_SW_MANAGED)) ==
2856 (PTE_D | PTE_SW_MANAGED))
2859 pmap_store(l3, new_l3);
2862 #if VM_NRESERVLEVEL > 0
2863 if (mpte != NULL && mpte->ref_count == Ln_ENTRIES &&
2864 pmap_ps_enabled(pmap) &&
2865 (m->flags & PG_FICTITIOUS) == 0 &&
2866 vm_reserv_level_iffullpop(m) == 0)
2867 pmap_promote_l2(pmap, l2, va, &lock);
2874 rw_runlock(&pvh_global_lock);
2880 * Tries to create a read- and/or execute-only 2MB page mapping. Returns true
2881 * if successful. Returns false if (1) a page table page cannot be allocated
2882 * without sleeping, (2) a mapping already exists at the specified virtual
2883 * address, or (3) a PV entry cannot be allocated without reclaiming another
2887 pmap_enter_2mpage(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
2888 struct rwlock **lockp)
2893 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2895 pn = VM_PAGE_TO_PHYS(m) / PAGE_SIZE;
2896 new_l2 = (pd_entry_t)((pn << PTE_PPN0_S) | PTE_R | PTE_V);
2897 if ((m->oflags & VPO_UNMANAGED) == 0)
2898 new_l2 |= PTE_SW_MANAGED;
2899 if ((prot & VM_PROT_EXECUTE) != 0)
2901 if (va < VM_MAXUSER_ADDRESS)
2903 return (pmap_enter_l2(pmap, va, new_l2, PMAP_ENTER_NOSLEEP |
2904 PMAP_ENTER_NOREPLACE | PMAP_ENTER_NORECLAIM, NULL, lockp) ==
2909 * Tries to create the specified 2MB page mapping. Returns KERN_SUCCESS if
2910 * the mapping was created, and either KERN_FAILURE or KERN_RESOURCE_SHORTAGE
2911 * otherwise. Returns KERN_FAILURE if PMAP_ENTER_NOREPLACE was specified and
2912 * a mapping already exists at the specified virtual address. Returns
2913 * KERN_RESOURCE_SHORTAGE if PMAP_ENTER_NOSLEEP was specified and a page table
2914 * page allocation failed. Returns KERN_RESOURCE_SHORTAGE if
2915 * PMAP_ENTER_NORECLAIM was specified and a PV entry allocation failed.
2917 * The parameter "m" is only used when creating a managed, writeable mapping.
2920 pmap_enter_l2(pmap_t pmap, vm_offset_t va, pd_entry_t new_l2, u_int flags,
2921 vm_page_t m, struct rwlock **lockp)
2923 struct spglist free;
2924 pd_entry_t *l2, *l3, oldl2;
2928 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2930 if ((l2pg = pmap_alloc_l2(pmap, va, (flags & PMAP_ENTER_NOSLEEP) != 0 ?
2931 NULL : lockp)) == NULL) {
2932 CTR2(KTR_PMAP, "pmap_enter_l2: failure for va %#lx in pmap %p",
2934 return (KERN_RESOURCE_SHORTAGE);
2937 l2 = (pd_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(l2pg));
2938 l2 = &l2[pmap_l2_index(va)];
2939 if ((oldl2 = pmap_load(l2)) != 0) {
2940 KASSERT(l2pg->ref_count > 1,
2941 ("pmap_enter_l2: l2pg's ref count is too low"));
2942 if ((flags & PMAP_ENTER_NOREPLACE) != 0) {
2945 "pmap_enter_l2: failure for va %#lx in pmap %p",
2947 return (KERN_FAILURE);
2950 if ((oldl2 & PTE_RWX) != 0)
2951 (void)pmap_remove_l2(pmap, l2, va,
2952 pmap_load(pmap_l1(pmap, va)), &free, lockp);
2954 for (sva = va; sva < va + L2_SIZE; sva += PAGE_SIZE) {
2955 l3 = pmap_l2_to_l3(l2, sva);
2956 if ((pmap_load(l3) & PTE_V) != 0 &&
2957 pmap_remove_l3(pmap, l3, sva, oldl2, &free,
2961 vm_page_free_pages_toq(&free, true);
2962 if (va >= VM_MAXUSER_ADDRESS) {
2964 * Both pmap_remove_l2() and pmap_remove_l3() will
2965 * leave the kernel page table page zero filled.
2967 mt = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l2)));
2968 if (pmap_insert_pt_page(pmap, mt, false))
2969 panic("pmap_enter_l2: trie insert failed");
2971 KASSERT(pmap_load(l2) == 0,
2972 ("pmap_enter_l2: non-zero L2 entry %p", l2));
2975 if ((new_l2 & PTE_SW_MANAGED) != 0) {
2977 * Abort this mapping if its PV entry could not be created.
2979 if (!pmap_pv_insert_l2(pmap, va, new_l2, flags, lockp)) {
2981 if (pmap_unwire_ptp(pmap, va, l2pg, &free)) {
2983 * Although "va" is not mapped, paging-structure
2984 * caches could nonetheless have entries that
2985 * refer to the freed page table pages.
2986 * Invalidate those entries.
2988 pmap_invalidate_page(pmap, va);
2989 vm_page_free_pages_toq(&free, true);
2992 "pmap_enter_l2: failure for va %#lx in pmap %p",
2994 return (KERN_RESOURCE_SHORTAGE);
2996 if ((new_l2 & PTE_W) != 0)
2997 for (mt = m; mt < &m[L2_SIZE / PAGE_SIZE]; mt++)
2998 vm_page_aflag_set(mt, PGA_WRITEABLE);
3002 * Increment counters.
3004 if ((new_l2 & PTE_SW_WIRED) != 0)
3005 pmap->pm_stats.wired_count += L2_SIZE / PAGE_SIZE;
3006 pmap->pm_stats.resident_count += L2_SIZE / PAGE_SIZE;
3009 * Map the superpage.
3011 pmap_store(l2, new_l2);
3013 atomic_add_long(&pmap_l2_mappings, 1);
3014 CTR2(KTR_PMAP, "pmap_enter_l2: success for va %#lx in pmap %p",
3017 return (KERN_SUCCESS);
3021 * Maps a sequence of resident pages belonging to the same object.
3022 * The sequence begins with the given page m_start. This page is
3023 * mapped at the given virtual address start. Each subsequent page is
3024 * mapped at a virtual address that is offset from start by the same
3025 * amount as the page is offset from m_start within the object. The
3026 * last page in the sequence is the page with the largest offset from
3027 * m_start that can be mapped at a virtual address less than the given
3028 * virtual address end. Not every virtual page between start and end
3029 * is mapped; only those for which a resident page exists with the
3030 * corresponding offset from m_start are mapped.
3033 pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end,
3034 vm_page_t m_start, vm_prot_t prot)
3036 struct rwlock *lock;
3039 vm_pindex_t diff, psize;
3041 VM_OBJECT_ASSERT_LOCKED(m_start->object);
3043 psize = atop(end - start);
3047 rw_rlock(&pvh_global_lock);
3049 while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) {
3050 va = start + ptoa(diff);
3051 if ((va & L2_OFFSET) == 0 && va + L2_SIZE <= end &&
3052 m->psind == 1 && pmap_ps_enabled(pmap) &&
3053 pmap_enter_2mpage(pmap, va, m, prot, &lock))
3054 m = &m[L2_SIZE / PAGE_SIZE - 1];
3056 mpte = pmap_enter_quick_locked(pmap, va, m, prot, mpte,
3058 m = TAILQ_NEXT(m, listq);
3062 rw_runlock(&pvh_global_lock);
3067 * this code makes some *MAJOR* assumptions:
3068 * 1. Current pmap & pmap exists.
3071 * 4. No page table pages.
3072 * but is *MUCH* faster than pmap_enter...
3076 pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
3078 struct rwlock *lock;
3081 rw_rlock(&pvh_global_lock);
3083 (void)pmap_enter_quick_locked(pmap, va, m, prot, NULL, &lock);
3086 rw_runlock(&pvh_global_lock);
3091 pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m,
3092 vm_prot_t prot, vm_page_t mpte, struct rwlock **lockp)
3094 struct spglist free;
3097 pt_entry_t *l3, newl3;
3099 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva ||
3100 (m->oflags & VPO_UNMANAGED) != 0,
3101 ("pmap_enter_quick_locked: managed mapping within the clean submap"));
3102 rw_assert(&pvh_global_lock, RA_LOCKED);
3103 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
3105 CTR2(KTR_PMAP, "pmap_enter_quick_locked: %p %lx", pmap, va);
3107 * In the case that a page table page is not
3108 * resident, we are creating it here.
3110 if (va < VM_MAXUSER_ADDRESS) {
3111 vm_pindex_t l2pindex;
3114 * Calculate pagetable page index
3116 l2pindex = pmap_l2_pindex(va);
3117 if (mpte && (mpte->pindex == l2pindex)) {
3123 l2 = pmap_l2(pmap, va);
3126 * If the page table page is mapped, we just increment
3127 * the hold count, and activate it. Otherwise, we
3128 * attempt to allocate a page table page. If this
3129 * attempt fails, we don't retry. Instead, we give up.
3131 if (l2 != NULL && pmap_load(l2) != 0) {
3132 phys = PTE_TO_PHYS(pmap_load(l2));
3133 mpte = PHYS_TO_VM_PAGE(phys);
3137 * Pass NULL instead of the PV list lock
3138 * pointer, because we don't intend to sleep.
3140 mpte = _pmap_alloc_l3(pmap, l2pindex, NULL);
3145 l3 = (pt_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mpte));
3146 l3 = &l3[pmap_l3_index(va)];
3149 l3 = pmap_l3(kernel_pmap, va);
3152 panic("pmap_enter_quick_locked: No l3");
3153 if (pmap_load(l3) != 0) {
3162 * Enter on the PV list if part of our managed memory.
3164 if ((m->oflags & VPO_UNMANAGED) == 0 &&
3165 !pmap_try_insert_pv_entry(pmap, va, m, lockp)) {
3168 if (pmap_unwire_ptp(pmap, va, mpte, &free)) {
3169 pmap_invalidate_page(pmap, va);
3170 vm_page_free_pages_toq(&free, false);
3178 * Increment counters
3180 pmap_resident_count_inc(pmap, 1);
3182 newl3 = ((VM_PAGE_TO_PHYS(m) / PAGE_SIZE) << PTE_PPN0_S) |
3184 if ((prot & VM_PROT_EXECUTE) != 0)
3186 if ((m->oflags & VPO_UNMANAGED) == 0)
3187 newl3 |= PTE_SW_MANAGED;
3188 if (va < VM_MAX_USER_ADDRESS)
3192 * Sync the i-cache on all harts before updating the PTE
3193 * if the new PTE is executable.
3195 if (prot & VM_PROT_EXECUTE)
3196 pmap_sync_icache(pmap, va, PAGE_SIZE);
3198 pmap_store(l3, newl3);
3200 pmap_invalidate_page(pmap, va);
3205 * This code maps large physical mmap regions into the
3206 * processor address space. Note that some shortcuts
3207 * are taken, but the code works.
3210 pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, vm_object_t object,
3211 vm_pindex_t pindex, vm_size_t size)
3214 VM_OBJECT_ASSERT_WLOCKED(object);
3215 KASSERT(object->type == OBJT_DEVICE || object->type == OBJT_SG,
3216 ("pmap_object_init_pt: non-device object"));
3220 * Clear the wired attribute from the mappings for the specified range of
3221 * addresses in the given pmap. Every valid mapping within that range
3222 * must have the wired attribute set. In contrast, invalid mappings
3223 * cannot have the wired attribute set, so they are ignored.
3225 * The wired attribute of the page table entry is not a hardware feature,
3226 * so there is no need to invalidate any TLB entries.
3229 pmap_unwire(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
3231 vm_offset_t va_next;
3232 pd_entry_t *l1, *l2, l2e;
3233 pt_entry_t *l3, l3e;
3234 bool pv_lists_locked;
3236 pv_lists_locked = false;
3239 for (; sva < eva; sva = va_next) {
3240 l1 = pmap_l1(pmap, sva);
3241 if (pmap_load(l1) == 0) {
3242 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
3248 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
3252 l2 = pmap_l1_to_l2(l1, sva);
3253 if ((l2e = pmap_load(l2)) == 0)
3255 if ((l2e & PTE_RWX) != 0) {
3256 if (sva + L2_SIZE == va_next && eva >= va_next) {
3257 if ((l2e & PTE_SW_WIRED) == 0)
3258 panic("pmap_unwire: l2 %#jx is missing "
3259 "PTE_SW_WIRED", (uintmax_t)l2e);
3260 pmap_clear_bits(l2, PTE_SW_WIRED);
3263 if (!pv_lists_locked) {
3264 pv_lists_locked = true;
3265 if (!rw_try_rlock(&pvh_global_lock)) {
3267 rw_rlock(&pvh_global_lock);
3272 if (!pmap_demote_l2(pmap, l2, sva))
3273 panic("pmap_unwire: demotion failed");
3279 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
3281 if ((l3e = pmap_load(l3)) == 0)
3283 if ((l3e & PTE_SW_WIRED) == 0)
3284 panic("pmap_unwire: l3 %#jx is missing "
3285 "PTE_SW_WIRED", (uintmax_t)l3e);
3288 * PG_W must be cleared atomically. Although the pmap
3289 * lock synchronizes access to PG_W, another processor
3290 * could be setting PG_M and/or PG_A concurrently.
3292 pmap_clear_bits(l3, PTE_SW_WIRED);
3293 pmap->pm_stats.wired_count--;
3296 if (pv_lists_locked)
3297 rw_runlock(&pvh_global_lock);
3302 * Copy the range specified by src_addr/len
3303 * from the source map to the range dst_addr/len
3304 * in the destination map.
3306 * This routine is only advisory and need not do anything.
3310 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len,
3311 vm_offset_t src_addr)
3317 * pmap_zero_page zeros the specified hardware page by mapping
3318 * the page into KVM and using bzero to clear its contents.
3321 pmap_zero_page(vm_page_t m)
3323 vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
3325 pagezero((void *)va);
3329 * pmap_zero_page_area zeros the specified hardware page by mapping
3330 * the page into KVM and using bzero to clear its contents.
3332 * off and size may not cover an area beyond a single hardware page.
3335 pmap_zero_page_area(vm_page_t m, int off, int size)
3337 vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
3339 if (off == 0 && size == PAGE_SIZE)
3340 pagezero((void *)va);
3342 bzero((char *)va + off, size);
3346 * pmap_copy_page copies the specified (machine independent)
3347 * page by mapping the page into virtual memory and using
3348 * bcopy to copy the page, one machine dependent page at a
3352 pmap_copy_page(vm_page_t msrc, vm_page_t mdst)
3354 vm_offset_t src = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(msrc));
3355 vm_offset_t dst = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mdst));
3357 pagecopy((void *)src, (void *)dst);
3360 int unmapped_buf_allowed = 1;
3363 pmap_copy_pages(vm_page_t ma[], vm_offset_t a_offset, vm_page_t mb[],
3364 vm_offset_t b_offset, int xfersize)
3368 vm_paddr_t p_a, p_b;
3369 vm_offset_t a_pg_offset, b_pg_offset;
3372 while (xfersize > 0) {
3373 a_pg_offset = a_offset & PAGE_MASK;
3374 m_a = ma[a_offset >> PAGE_SHIFT];
3375 p_a = m_a->phys_addr;
3376 b_pg_offset = b_offset & PAGE_MASK;
3377 m_b = mb[b_offset >> PAGE_SHIFT];
3378 p_b = m_b->phys_addr;
3379 cnt = min(xfersize, PAGE_SIZE - a_pg_offset);
3380 cnt = min(cnt, PAGE_SIZE - b_pg_offset);
3381 if (__predict_false(!PHYS_IN_DMAP(p_a))) {
3382 panic("!DMAP a %lx", p_a);
3384 a_cp = (char *)PHYS_TO_DMAP(p_a) + a_pg_offset;
3386 if (__predict_false(!PHYS_IN_DMAP(p_b))) {
3387 panic("!DMAP b %lx", p_b);
3389 b_cp = (char *)PHYS_TO_DMAP(p_b) + b_pg_offset;
3391 bcopy(a_cp, b_cp, cnt);
3399 pmap_quick_enter_page(vm_page_t m)
3402 return (PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m)));
3406 pmap_quick_remove_page(vm_offset_t addr)
3411 * Returns true if the pmap's pv is one of the first
3412 * 16 pvs linked to from this page. This count may
3413 * be changed upwards or downwards in the future; it
3414 * is only necessary that true be returned for a small
3415 * subset of pmaps for proper page aging.
3418 pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
3420 struct md_page *pvh;
3421 struct rwlock *lock;
3426 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3427 ("pmap_page_exists_quick: page %p is not managed", m));
3429 rw_rlock(&pvh_global_lock);
3430 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3432 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3433 if (PV_PMAP(pv) == pmap) {
3441 if (!rv && loops < 16 && (m->flags & PG_FICTITIOUS) == 0) {
3442 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
3443 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
3444 if (PV_PMAP(pv) == pmap) {
3454 rw_runlock(&pvh_global_lock);
3459 * pmap_page_wired_mappings:
3461 * Return the number of managed mappings to the given physical page
3465 pmap_page_wired_mappings(vm_page_t m)
3467 struct md_page *pvh;
3468 struct rwlock *lock;
3473 int count, md_gen, pvh_gen;
3475 if ((m->oflags & VPO_UNMANAGED) != 0)
3477 rw_rlock(&pvh_global_lock);
3478 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3482 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3484 if (!PMAP_TRYLOCK(pmap)) {
3485 md_gen = m->md.pv_gen;
3489 if (md_gen != m->md.pv_gen) {
3494 l3 = pmap_l3(pmap, pv->pv_va);
3495 if ((pmap_load(l3) & PTE_SW_WIRED) != 0)
3499 if ((m->flags & PG_FICTITIOUS) == 0) {
3500 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
3501 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
3503 if (!PMAP_TRYLOCK(pmap)) {
3504 md_gen = m->md.pv_gen;
3505 pvh_gen = pvh->pv_gen;
3509 if (md_gen != m->md.pv_gen ||
3510 pvh_gen != pvh->pv_gen) {
3515 l2 = pmap_l2(pmap, pv->pv_va);
3516 if ((pmap_load(l2) & PTE_SW_WIRED) != 0)
3522 rw_runlock(&pvh_global_lock);
3527 * Returns true if the given page is mapped individually or as part of
3528 * a 2mpage. Otherwise, returns false.
3531 pmap_page_is_mapped(vm_page_t m)
3533 struct rwlock *lock;
3536 if ((m->oflags & VPO_UNMANAGED) != 0)
3538 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3540 rv = !TAILQ_EMPTY(&m->md.pv_list) ||
3541 ((m->flags & PG_FICTITIOUS) == 0 &&
3542 !TAILQ_EMPTY(&pa_to_pvh(VM_PAGE_TO_PHYS(m))->pv_list));
3548 pmap_remove_pages_pv(pmap_t pmap, vm_page_t m, pv_entry_t pv,
3549 struct spglist *free, bool superpage)
3551 struct md_page *pvh;
3555 pmap_resident_count_dec(pmap, Ln_ENTRIES);
3556 pvh = pa_to_pvh(m->phys_addr);
3557 TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
3559 if (TAILQ_EMPTY(&pvh->pv_list)) {
3560 for (mt = m; mt < &m[Ln_ENTRIES]; mt++)
3561 if (TAILQ_EMPTY(&mt->md.pv_list) &&
3562 (mt->a.flags & PGA_WRITEABLE) != 0)
3563 vm_page_aflag_clear(mt, PGA_WRITEABLE);
3565 mpte = pmap_remove_pt_page(pmap, pv->pv_va);
3567 KASSERT(mpte->valid == VM_PAGE_BITS_ALL,
3568 ("pmap_remove_pages: pte page not promoted"));
3569 pmap_resident_count_dec(pmap, 1);
3570 KASSERT(mpte->ref_count == Ln_ENTRIES,
3571 ("pmap_remove_pages: pte page ref count error"));
3572 mpte->ref_count = 0;
3573 pmap_add_delayed_free_list(mpte, free, FALSE);
3576 pmap_resident_count_dec(pmap, 1);
3577 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
3579 if (TAILQ_EMPTY(&m->md.pv_list) &&
3580 (m->a.flags & PGA_WRITEABLE) != 0) {
3581 pvh = pa_to_pvh(m->phys_addr);
3582 if (TAILQ_EMPTY(&pvh->pv_list))
3583 vm_page_aflag_clear(m, PGA_WRITEABLE);
3589 * Destroy all managed, non-wired mappings in the given user-space
3590 * pmap. This pmap cannot be active on any processor besides the
3593 * This function cannot be applied to the kernel pmap. Moreover, it
3594 * is not intended for general use. It is only to be used during
3595 * process termination. Consequently, it can be implemented in ways
3596 * that make it faster than pmap_remove(). First, it can more quickly
3597 * destroy mappings by iterating over the pmap's collection of PV
3598 * entries, rather than searching the page table. Second, it doesn't
3599 * have to test and clear the page table entries atomically, because
3600 * no processor is currently accessing the user address space. In
3601 * particular, a page table entry's dirty bit won't change state once
3602 * this function starts.
3605 pmap_remove_pages(pmap_t pmap)
3607 struct spglist free;
3609 pt_entry_t *pte, tpte;
3612 struct pv_chunk *pc, *npc;
3613 struct rwlock *lock;
3615 uint64_t inuse, bitmask;
3616 int allfree, field, freed, idx;
3622 rw_rlock(&pvh_global_lock);
3624 TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) {
3627 for (field = 0; field < _NPCM; field++) {
3628 inuse = ~pc->pc_map[field] & pc_freemask[field];
3629 while (inuse != 0) {
3630 bit = ffsl(inuse) - 1;
3631 bitmask = 1UL << bit;
3632 idx = field * 64 + bit;
3633 pv = &pc->pc_pventry[idx];
3636 pte = pmap_l1(pmap, pv->pv_va);
3637 ptepde = pmap_load(pte);
3638 pte = pmap_l1_to_l2(pte, pv->pv_va);
3639 tpte = pmap_load(pte);
3640 if ((tpte & PTE_RWX) != 0) {
3644 pte = pmap_l2_to_l3(pte, pv->pv_va);
3645 tpte = pmap_load(pte);
3650 * We cannot remove wired pages from a
3651 * process' mapping at this time.
3653 if (tpte & PTE_SW_WIRED) {
3658 m = PHYS_TO_VM_PAGE(PTE_TO_PHYS(tpte));
3659 KASSERT((m->flags & PG_FICTITIOUS) != 0 ||
3660 m < &vm_page_array[vm_page_array_size],
3661 ("pmap_remove_pages: bad pte %#jx",
3667 * Update the vm_page_t clean/reference bits.
3669 if ((tpte & (PTE_D | PTE_W)) ==
3673 mt < &m[Ln_ENTRIES]; mt++)
3679 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(&lock, m);
3682 pc->pc_map[field] |= bitmask;
3684 pmap_remove_pages_pv(pmap, m, pv, &free,
3686 pmap_unuse_pt(pmap, pv->pv_va, ptepde, &free);
3690 PV_STAT(atomic_add_long(&pv_entry_frees, freed));
3691 PV_STAT(atomic_add_int(&pv_entry_spare, freed));
3692 PV_STAT(atomic_subtract_long(&pv_entry_count, freed));
3694 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
3700 pmap_invalidate_all(pmap);
3701 rw_runlock(&pvh_global_lock);
3703 vm_page_free_pages_toq(&free, false);
3707 pmap_page_test_mappings(vm_page_t m, boolean_t accessed, boolean_t modified)
3709 struct md_page *pvh;
3710 struct rwlock *lock;
3712 pt_entry_t *l3, mask;
3715 int md_gen, pvh_gen;
3725 rw_rlock(&pvh_global_lock);
3726 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3729 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3731 if (!PMAP_TRYLOCK(pmap)) {
3732 md_gen = m->md.pv_gen;
3736 if (md_gen != m->md.pv_gen) {
3741 l3 = pmap_l3(pmap, pv->pv_va);
3742 rv = (pmap_load(l3) & mask) == mask;
3747 if ((m->flags & PG_FICTITIOUS) == 0) {
3748 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
3749 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
3751 if (!PMAP_TRYLOCK(pmap)) {
3752 md_gen = m->md.pv_gen;
3753 pvh_gen = pvh->pv_gen;
3757 if (md_gen != m->md.pv_gen ||
3758 pvh_gen != pvh->pv_gen) {
3763 l2 = pmap_l2(pmap, pv->pv_va);
3764 rv = (pmap_load(l2) & mask) == mask;
3772 rw_runlock(&pvh_global_lock);
3779 * Return whether or not the specified physical page was modified
3780 * in any physical maps.
3783 pmap_is_modified(vm_page_t m)
3786 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3787 ("pmap_is_modified: page %p is not managed", m));
3790 * If the page is not busied then this check is racy.
3792 if (!pmap_page_is_write_mapped(m))
3794 return (pmap_page_test_mappings(m, FALSE, TRUE));
3798 * pmap_is_prefaultable:
3800 * Return whether or not the specified virtual address is eligible
3804 pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr)
3811 l3 = pmap_l3(pmap, addr);
3812 if (l3 != NULL && pmap_load(l3) != 0) {
3820 * pmap_is_referenced:
3822 * Return whether or not the specified physical page was referenced
3823 * in any physical maps.
3826 pmap_is_referenced(vm_page_t m)
3829 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3830 ("pmap_is_referenced: page %p is not managed", m));
3831 return (pmap_page_test_mappings(m, TRUE, FALSE));
3835 * Clear the write and modified bits in each of the given page's mappings.
3838 pmap_remove_write(vm_page_t m)
3840 struct md_page *pvh;
3841 struct rwlock *lock;
3844 pt_entry_t *l3, oldl3, newl3;
3845 pv_entry_t next_pv, pv;
3847 int md_gen, pvh_gen;
3849 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3850 ("pmap_remove_write: page %p is not managed", m));
3851 vm_page_assert_busied(m);
3853 if (!pmap_page_is_write_mapped(m))
3855 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3856 pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy :
3857 pa_to_pvh(VM_PAGE_TO_PHYS(m));
3858 rw_rlock(&pvh_global_lock);
3861 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_next, next_pv) {
3863 if (!PMAP_TRYLOCK(pmap)) {
3864 pvh_gen = pvh->pv_gen;
3868 if (pvh_gen != pvh->pv_gen) {
3875 l2 = pmap_l2(pmap, va);
3876 if ((pmap_load(l2) & PTE_W) != 0)
3877 (void)pmap_demote_l2_locked(pmap, l2, va, &lock);
3878 KASSERT(lock == VM_PAGE_TO_PV_LIST_LOCK(m),
3879 ("inconsistent pv lock %p %p for page %p",
3880 lock, VM_PAGE_TO_PV_LIST_LOCK(m), m));
3883 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3885 if (!PMAP_TRYLOCK(pmap)) {
3886 pvh_gen = pvh->pv_gen;
3887 md_gen = m->md.pv_gen;
3891 if (pvh_gen != pvh->pv_gen || md_gen != m->md.pv_gen) {
3897 l3 = pmap_l3(pmap, pv->pv_va);
3898 oldl3 = pmap_load(l3);
3900 if ((oldl3 & PTE_W) != 0) {
3901 newl3 = oldl3 & ~(PTE_D | PTE_W);
3902 if (!atomic_fcmpset_long(l3, &oldl3, newl3))
3904 if ((oldl3 & PTE_D) != 0)
3906 pmap_invalidate_page(pmap, pv->pv_va);
3911 vm_page_aflag_clear(m, PGA_WRITEABLE);
3912 rw_runlock(&pvh_global_lock);
3916 * pmap_ts_referenced:
3918 * Return a count of reference bits for a page, clearing those bits.
3919 * It is not necessary for every reference bit to be cleared, but it
3920 * is necessary that 0 only be returned when there are truly no
3921 * reference bits set.
3923 * As an optimization, update the page's dirty field if a modified bit is
3924 * found while counting reference bits. This opportunistic update can be
3925 * performed at low cost and can eliminate the need for some future calls
3926 * to pmap_is_modified(). However, since this function stops after
3927 * finding PMAP_TS_REFERENCED_MAX reference bits, it may not detect some
3928 * dirty pages. Those dirty pages will only be detected by a future call
3929 * to pmap_is_modified().
3932 pmap_ts_referenced(vm_page_t m)
3934 struct spglist free;
3935 struct md_page *pvh;
3936 struct rwlock *lock;
3939 pd_entry_t *l2, l2e;
3940 pt_entry_t *l3, l3e;
3943 int cleared, md_gen, not_cleared, pvh_gen;
3945 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3946 ("pmap_ts_referenced: page %p is not managed", m));
3949 pa = VM_PAGE_TO_PHYS(m);
3950 pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy : pa_to_pvh(pa);
3952 lock = PHYS_TO_PV_LIST_LOCK(pa);
3953 rw_rlock(&pvh_global_lock);
3957 if ((pvf = TAILQ_FIRST(&pvh->pv_list)) == NULL)
3958 goto small_mappings;
3962 if (!PMAP_TRYLOCK(pmap)) {
3963 pvh_gen = pvh->pv_gen;
3967 if (pvh_gen != pvh->pv_gen) {
3973 l2 = pmap_l2(pmap, va);
3974 l2e = pmap_load(l2);
3975 if ((l2e & (PTE_W | PTE_D)) == (PTE_W | PTE_D)) {
3977 * Although l2e is mapping a 2MB page, because
3978 * this function is called at a 4KB page granularity,
3979 * we only update the 4KB page under test.
3983 if ((l2e & PTE_A) != 0) {
3985 * Since this reference bit is shared by 512 4KB
3986 * pages, it should not be cleared every time it is
3987 * tested. Apply a simple "hash" function on the
3988 * physical page number, the virtual superpage number,
3989 * and the pmap address to select one 4KB page out of
3990 * the 512 on which testing the reference bit will
3991 * result in clearing that reference bit. This
3992 * function is designed to avoid the selection of the
3993 * same 4KB page for every 2MB page mapping.
3995 * On demotion, a mapping that hasn't been referenced
3996 * is simply destroyed. To avoid the possibility of a
3997 * subsequent page fault on a demoted wired mapping,
3998 * always leave its reference bit set. Moreover,
3999 * since the superpage is wired, the current state of
4000 * its reference bit won't affect page replacement.
4002 if ((((pa >> PAGE_SHIFT) ^ (pv->pv_va >> L2_SHIFT) ^
4003 (uintptr_t)pmap) & (Ln_ENTRIES - 1)) == 0 &&
4004 (l2e & PTE_SW_WIRED) == 0) {
4005 pmap_clear_bits(l2, PTE_A);
4006 pmap_invalidate_page(pmap, va);
4012 /* Rotate the PV list if it has more than one entry. */
4013 if (pv != NULL && TAILQ_NEXT(pv, pv_next) != NULL) {
4014 TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
4015 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_next);
4018 if (cleared + not_cleared >= PMAP_TS_REFERENCED_MAX)
4020 } while ((pv = TAILQ_FIRST(&pvh->pv_list)) != pvf);
4022 if ((pvf = TAILQ_FIRST(&m->md.pv_list)) == NULL)
4027 if (!PMAP_TRYLOCK(pmap)) {
4028 pvh_gen = pvh->pv_gen;
4029 md_gen = m->md.pv_gen;
4033 if (pvh_gen != pvh->pv_gen || md_gen != m->md.pv_gen) {
4038 l2 = pmap_l2(pmap, pv->pv_va);
4040 KASSERT((pmap_load(l2) & PTE_RX) == 0,
4041 ("pmap_ts_referenced: found an invalid l2 table"));
4043 l3 = pmap_l2_to_l3(l2, pv->pv_va);
4044 l3e = pmap_load(l3);
4045 if ((l3e & PTE_D) != 0)
4047 if ((l3e & PTE_A) != 0) {
4048 if ((l3e & PTE_SW_WIRED) == 0) {
4050 * Wired pages cannot be paged out so
4051 * doing accessed bit emulation for
4052 * them is wasted effort. We do the
4053 * hard work for unwired pages only.
4055 pmap_clear_bits(l3, PTE_A);
4056 pmap_invalidate_page(pmap, pv->pv_va);
4062 /* Rotate the PV list if it has more than one entry. */
4063 if (pv != NULL && TAILQ_NEXT(pv, pv_next) != NULL) {
4064 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
4065 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
4068 } while ((pv = TAILQ_FIRST(&m->md.pv_list)) != pvf && cleared +
4069 not_cleared < PMAP_TS_REFERENCED_MAX);
4072 rw_runlock(&pvh_global_lock);
4073 vm_page_free_pages_toq(&free, false);
4074 return (cleared + not_cleared);
4078 * Apply the given advice to the specified range of addresses within the
4079 * given pmap. Depending on the advice, clear the referenced and/or
4080 * modified flags in each mapping and set the mapped page's dirty field.
4083 pmap_advise(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, int advice)
4088 * Clear the modify bits on the specified physical page.
4091 pmap_clear_modify(vm_page_t m)
4093 struct md_page *pvh;
4094 struct rwlock *lock;
4096 pv_entry_t next_pv, pv;
4097 pd_entry_t *l2, oldl2;
4100 int md_gen, pvh_gen;
4102 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
4103 ("pmap_clear_modify: page %p is not managed", m));
4104 vm_page_assert_busied(m);
4106 if (!pmap_page_is_write_mapped(m))
4110 * If the page is not PGA_WRITEABLE, then no PTEs can have PG_M set.
4111 * If the object containing the page is locked and the page is not
4112 * exclusive busied, then PGA_WRITEABLE cannot be concurrently set.
4114 if ((m->a.flags & PGA_WRITEABLE) == 0)
4116 pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy :
4117 pa_to_pvh(VM_PAGE_TO_PHYS(m));
4118 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
4119 rw_rlock(&pvh_global_lock);
4122 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_next, next_pv) {
4124 if (!PMAP_TRYLOCK(pmap)) {
4125 pvh_gen = pvh->pv_gen;
4129 if (pvh_gen != pvh->pv_gen) {
4135 l2 = pmap_l2(pmap, va);
4136 oldl2 = pmap_load(l2);
4137 /* If oldl2 has PTE_W set, then it also has PTE_D set. */
4138 if ((oldl2 & PTE_W) != 0 &&
4139 pmap_demote_l2_locked(pmap, l2, va, &lock) &&
4140 (oldl2 & PTE_SW_WIRED) == 0) {
4142 * Write protect the mapping to a single page so that
4143 * a subsequent write access may repromote.
4145 va += VM_PAGE_TO_PHYS(m) - PTE_TO_PHYS(oldl2);
4146 l3 = pmap_l2_to_l3(l2, va);
4147 pmap_clear_bits(l3, PTE_D | PTE_W);
4149 pmap_invalidate_page(pmap, va);
4153 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
4155 if (!PMAP_TRYLOCK(pmap)) {
4156 md_gen = m->md.pv_gen;
4157 pvh_gen = pvh->pv_gen;
4161 if (pvh_gen != pvh->pv_gen || md_gen != m->md.pv_gen) {
4166 l2 = pmap_l2(pmap, pv->pv_va);
4167 KASSERT((pmap_load(l2) & PTE_RWX) == 0,
4168 ("pmap_clear_modify: found a 2mpage in page %p's pv list",
4170 l3 = pmap_l2_to_l3(l2, pv->pv_va);
4171 if ((pmap_load(l3) & (PTE_D | PTE_W)) == (PTE_D | PTE_W)) {
4172 pmap_clear_bits(l3, PTE_D | PTE_W);
4173 pmap_invalidate_page(pmap, pv->pv_va);
4178 rw_runlock(&pvh_global_lock);
4182 pmap_mapbios(vm_paddr_t pa, vm_size_t size)
4185 return ((void *)PHYS_TO_DMAP(pa));
4189 pmap_unmapbios(vm_paddr_t pa, vm_size_t size)
4194 * Sets the memory attribute for the specified page.
4197 pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma)
4200 m->md.pv_memattr = ma;
4204 * Perform the pmap work for mincore(2). If the page is not both referenced and
4205 * modified by this pmap, returns its physical address so that the caller can
4206 * find other mappings.
4209 pmap_mincore(pmap_t pmap, vm_offset_t addr, vm_paddr_t *pap)
4211 pt_entry_t *l2, *l3, tpte;
4217 l2 = pmap_l2(pmap, addr);
4218 if (l2 != NULL && ((tpte = pmap_load(l2)) & PTE_V) != 0) {
4219 if ((tpte & PTE_RWX) != 0) {
4220 pa = PTE_TO_PHYS(tpte) | (addr & L2_OFFSET);
4221 val = MINCORE_INCORE | MINCORE_PSIND(1);
4223 l3 = pmap_l2_to_l3(l2, addr);
4224 tpte = pmap_load(l3);
4225 if ((tpte & PTE_V) == 0) {
4229 pa = PTE_TO_PHYS(tpte) | (addr & L3_OFFSET);
4230 val = MINCORE_INCORE;
4233 if ((tpte & PTE_D) != 0)
4234 val |= MINCORE_MODIFIED | MINCORE_MODIFIED_OTHER;
4235 if ((tpte & PTE_A) != 0)
4236 val |= MINCORE_REFERENCED | MINCORE_REFERENCED_OTHER;
4237 managed = (tpte & PTE_SW_MANAGED) == PTE_SW_MANAGED;
4242 if ((val & (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER)) !=
4243 (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER) && managed) {
4251 pmap_activate_sw(struct thread *td)
4253 pmap_t oldpmap, pmap;
4256 oldpmap = PCPU_GET(curpmap);
4257 pmap = vmspace_pmap(td->td_proc->p_vmspace);
4258 if (pmap == oldpmap)
4260 load_satp(pmap->pm_satp);
4262 hart = PCPU_GET(hart);
4264 CPU_SET_ATOMIC(hart, &pmap->pm_active);
4265 CPU_CLR_ATOMIC(hart, &oldpmap->pm_active);
4267 CPU_SET(hart, &pmap->pm_active);
4268 CPU_CLR(hart, &oldpmap->pm_active);
4270 PCPU_SET(curpmap, pmap);
4276 pmap_activate(struct thread *td)
4280 pmap_activate_sw(td);
4285 pmap_activate_boot(pmap_t pmap)
4289 hart = PCPU_GET(hart);
4291 CPU_SET_ATOMIC(hart, &pmap->pm_active);
4293 CPU_SET(hart, &pmap->pm_active);
4295 PCPU_SET(curpmap, pmap);
4299 pmap_sync_icache(pmap_t pmap, vm_offset_t va, vm_size_t sz)
4304 * From the RISC-V User-Level ISA V2.2:
4306 * "To make a store to instruction memory visible to all
4307 * RISC-V harts, the writing hart has to execute a data FENCE
4308 * before requesting that all remote RISC-V harts execute a
4311 * However, this is slightly misleading; we still need to
4312 * perform a FENCE.I for the local hart, as FENCE does nothing
4313 * for its icache. FENCE.I alone is also sufficient for the
4318 CPU_CLR(PCPU_GET(hart), &mask);
4320 if (!CPU_EMPTY(&mask) && smp_started) {
4322 sbi_remote_fence_i(mask.__bits);
4328 * Increase the starting virtual address of the given mapping if a
4329 * different alignment might result in more superpage mappings.
4332 pmap_align_superpage(vm_object_t object, vm_ooffset_t offset,
4333 vm_offset_t *addr, vm_size_t size)
4335 vm_offset_t superpage_offset;
4339 if (object != NULL && (object->flags & OBJ_COLORED) != 0)
4340 offset += ptoa(object->pg_color);
4341 superpage_offset = offset & L2_OFFSET;
4342 if (size - ((L2_SIZE - superpage_offset) & L2_OFFSET) < L2_SIZE ||
4343 (*addr & L2_OFFSET) == superpage_offset)
4345 if ((*addr & L2_OFFSET) < superpage_offset)
4346 *addr = (*addr & ~L2_OFFSET) + superpage_offset;
4348 *addr = ((*addr + L2_OFFSET) & ~L2_OFFSET) + superpage_offset;
4352 * Get the kernel virtual address of a set of physical pages. If there are
4353 * physical addresses not covered by the DMAP perform a transient mapping
4354 * that will be removed when calling pmap_unmap_io_transient.
4356 * \param page The pages the caller wishes to obtain the virtual
4357 * address on the kernel memory map.
4358 * \param vaddr On return contains the kernel virtual memory address
4359 * of the pages passed in the page parameter.
4360 * \param count Number of pages passed in.
4361 * \param can_fault TRUE if the thread using the mapped pages can take
4362 * page faults, FALSE otherwise.
4364 * \returns TRUE if the caller must call pmap_unmap_io_transient when
4365 * finished or FALSE otherwise.
4369 pmap_map_io_transient(vm_page_t page[], vm_offset_t vaddr[], int count,
4370 boolean_t can_fault)
4373 boolean_t needs_mapping;
4377 * Allocate any KVA space that we need, this is done in a separate
4378 * loop to prevent calling vmem_alloc while pinned.
4380 needs_mapping = FALSE;
4381 for (i = 0; i < count; i++) {
4382 paddr = VM_PAGE_TO_PHYS(page[i]);
4383 if (__predict_false(paddr >= DMAP_MAX_PHYSADDR)) {
4384 error = vmem_alloc(kernel_arena, PAGE_SIZE,
4385 M_BESTFIT | M_WAITOK, &vaddr[i]);
4386 KASSERT(error == 0, ("vmem_alloc failed: %d", error));
4387 needs_mapping = TRUE;
4389 vaddr[i] = PHYS_TO_DMAP(paddr);
4393 /* Exit early if everything is covered by the DMAP */
4399 for (i = 0; i < count; i++) {
4400 paddr = VM_PAGE_TO_PHYS(page[i]);
4401 if (paddr >= DMAP_MAX_PHYSADDR) {
4403 "pmap_map_io_transient: TODO: Map out of DMAP data");
4407 return (needs_mapping);
4411 pmap_unmap_io_transient(vm_page_t page[], vm_offset_t vaddr[], int count,
4412 boolean_t can_fault)
4419 for (i = 0; i < count; i++) {
4420 paddr = VM_PAGE_TO_PHYS(page[i]);
4421 if (paddr >= DMAP_MAX_PHYSADDR) {
4422 panic("RISCVTODO: pmap_unmap_io_transient: Unmap data");
4428 pmap_is_valid_memattr(pmap_t pmap __unused, vm_memattr_t mode)
4431 return (mode >= VM_MEMATTR_DEVICE && mode <= VM_MEMATTR_WRITE_BACK);
4435 pmap_get_tables(pmap_t pmap, vm_offset_t va, pd_entry_t **l1, pd_entry_t **l2,
4438 pd_entry_t *l1p, *l2p;
4440 /* Get l1 directory entry. */
4441 l1p = pmap_l1(pmap, va);
4444 if (l1p == NULL || (pmap_load(l1p) & PTE_V) == 0)
4447 if ((pmap_load(l1p) & PTE_RX) != 0) {
4453 /* Get l2 directory entry. */
4454 l2p = pmap_l1_to_l2(l1p, va);
4457 if (l2p == NULL || (pmap_load(l2p) & PTE_V) == 0)
4460 if ((pmap_load(l2p) & PTE_RX) != 0) {
4465 /* Get l3 page table entry. */
4466 *l3 = pmap_l2_to_l3(l2p, va);
4472 * Track a range of the kernel's virtual address space that is contiguous
4473 * in various mapping attributes.
4475 struct pmap_kernel_map_range {
4484 sysctl_kmaps_dump(struct sbuf *sb, struct pmap_kernel_map_range *range,
4488 if (eva <= range->sva)
4491 sbuf_printf(sb, "0x%016lx-0x%016lx r%c%c%c%c %d %d %d\n",
4493 (range->attrs & PTE_W) == PTE_W ? 'w' : '-',
4494 (range->attrs & PTE_X) == PTE_X ? 'x' : '-',
4495 (range->attrs & PTE_U) == PTE_U ? 'u' : 's',
4496 (range->attrs & PTE_G) == PTE_G ? 'g' : '-',
4497 range->l1pages, range->l2pages, range->l3pages);
4499 /* Reset to sentinel value. */
4500 range->sva = 0xfffffffffffffffful;
4504 * Determine whether the attributes specified by a page table entry match those
4505 * being tracked by the current range.
4508 sysctl_kmaps_match(struct pmap_kernel_map_range *range, pt_entry_t attrs)
4511 return (range->attrs == attrs);
4515 sysctl_kmaps_reinit(struct pmap_kernel_map_range *range, vm_offset_t va,
4519 memset(range, 0, sizeof(*range));
4521 range->attrs = attrs;
4525 * Given a leaf PTE, derive the mapping's attributes. If they do not match
4526 * those of the current run, dump the address range and its attributes, and
4530 sysctl_kmaps_check(struct sbuf *sb, struct pmap_kernel_map_range *range,
4531 vm_offset_t va, pd_entry_t l1e, pd_entry_t l2e, pt_entry_t l3e)
4535 /* The PTE global bit is inherited by lower levels. */
4536 attrs = l1e & PTE_G;
4537 if ((l1e & PTE_RWX) != 0)
4538 attrs |= l1e & (PTE_RWX | PTE_U);
4540 attrs |= l2e & PTE_G;
4541 if ((l2e & PTE_RWX) != 0)
4542 attrs |= l2e & (PTE_RWX | PTE_U);
4544 attrs |= l3e & (PTE_RWX | PTE_U | PTE_G);
4546 if (range->sva > va || !sysctl_kmaps_match(range, attrs)) {
4547 sysctl_kmaps_dump(sb, range, va);
4548 sysctl_kmaps_reinit(range, va, attrs);
4553 sysctl_kmaps(SYSCTL_HANDLER_ARGS)
4555 struct pmap_kernel_map_range range;
4556 struct sbuf sbuf, *sb;
4557 pd_entry_t l1e, *l2, l2e;
4558 pt_entry_t *l3, l3e;
4563 error = sysctl_wire_old_buffer(req, 0);
4567 sbuf_new_for_sysctl(sb, NULL, PAGE_SIZE, req);
4569 /* Sentinel value. */
4570 range.sva = 0xfffffffffffffffful;
4573 * Iterate over the kernel page tables without holding the kernel pmap
4574 * lock. Kernel page table pages are never freed, so at worst we will
4575 * observe inconsistencies in the output.
4577 sva = VM_MIN_KERNEL_ADDRESS;
4578 for (i = pmap_l1_index(sva); i < Ln_ENTRIES; i++) {
4579 if (i == pmap_l1_index(DMAP_MIN_ADDRESS))
4580 sbuf_printf(sb, "\nDirect map:\n");
4581 else if (i == pmap_l1_index(VM_MIN_KERNEL_ADDRESS))
4582 sbuf_printf(sb, "\nKernel map:\n");
4584 l1e = kernel_pmap->pm_l1[i];
4585 if ((l1e & PTE_V) == 0) {
4586 sysctl_kmaps_dump(sb, &range, sva);
4590 if ((l1e & PTE_RWX) != 0) {
4591 sysctl_kmaps_check(sb, &range, sva, l1e, 0, 0);
4596 pa = PTE_TO_PHYS(l1e);
4597 l2 = (pd_entry_t *)PHYS_TO_DMAP(pa);
4599 for (j = pmap_l2_index(sva); j < Ln_ENTRIES; j++) {
4601 if ((l2e & PTE_V) == 0) {
4602 sysctl_kmaps_dump(sb, &range, sva);
4606 if ((l2e & PTE_RWX) != 0) {
4607 sysctl_kmaps_check(sb, &range, sva, l1e, l2e, 0);
4612 pa = PTE_TO_PHYS(l2e);
4613 l3 = (pd_entry_t *)PHYS_TO_DMAP(pa);
4615 for (k = pmap_l3_index(sva); k < Ln_ENTRIES; k++,
4618 if ((l3e & PTE_V) == 0) {
4619 sysctl_kmaps_dump(sb, &range, sva);
4622 sysctl_kmaps_check(sb, &range, sva,
4629 error = sbuf_finish(sb);
4633 SYSCTL_OID(_vm_pmap, OID_AUTO, kernel_maps,
4634 CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_MPSAFE,
4635 NULL, 0, sysctl_kmaps, "A",
4636 "Dump kernel address layout");