2 * SPDX-License-Identifier: BSD-4-Clause
4 * Copyright (c) 1991 Regents of the University of California.
6 * Copyright (c) 1994 John S. Dyson
8 * Copyright (c) 1994 David Greenman
10 * Copyright (c) 2003 Peter Wemm
11 * All rights reserved.
12 * Copyright (c) 2005-2010 Alan L. Cox <alc@cs.rice.edu>
13 * All rights reserved.
14 * Copyright (c) 2014 Andrew Turner
15 * All rights reserved.
16 * Copyright (c) 2014 The FreeBSD Foundation
17 * All rights reserved.
18 * Copyright (c) 2015-2018 Ruslan Bukin <br@bsdpad.com>
19 * All rights reserved.
21 * This code is derived from software contributed to Berkeley by
22 * the Systems Programming Group of the University of Utah Computer
23 * Science Department and William Jolitz of UUNET Technologies Inc.
25 * Portions of this software were developed by Andrew Turner under
26 * sponsorship from The FreeBSD Foundation.
28 * Portions of this software were developed by SRI International and the
29 * University of Cambridge Computer Laboratory under DARPA/AFRL contract
30 * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
32 * Portions of this software were developed by the University of Cambridge
33 * Computer Laboratory as part of the CTSRD Project, with support from the
34 * UK Higher Education Innovation Fund (HEIF).
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
39 * 1. Redistributions of source code must retain the above copyright
40 * notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce the above copyright
42 * notice, this list of conditions and the following disclaimer in the
43 * documentation and/or other materials provided with the distribution.
44 * 3. All advertising materials mentioning features or use of this software
45 * must display the following acknowledgement:
46 * This product includes software developed by the University of
47 * California, Berkeley and its contributors.
48 * 4. Neither the name of the University nor the names of its contributors
49 * may be used to endorse or promote products derived from this software
50 * without specific prior written permission.
52 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
53 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
54 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
55 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
56 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
57 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
58 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
59 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
60 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
61 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
64 * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91
67 * Copyright (c) 2003 Networks Associates Technology, Inc.
68 * All rights reserved.
70 * This software was developed for the FreeBSD Project by Jake Burkholder,
71 * Safeport Network Services, and Network Associates Laboratories, the
72 * Security Research Division of Network Associates, Inc. under
73 * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA
74 * CHATS research program.
76 * Redistribution and use in source and binary forms, with or without
77 * modification, are permitted provided that the following conditions
79 * 1. Redistributions of source code must retain the above copyright
80 * notice, this list of conditions and the following disclaimer.
81 * 2. Redistributions in binary form must reproduce the above copyright
82 * notice, this list of conditions and the following disclaimer in the
83 * documentation and/or other materials provided with the distribution.
85 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
86 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
87 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
88 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
89 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
90 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
91 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
92 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
93 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
94 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
98 #include <sys/cdefs.h>
99 __FBSDID("$FreeBSD$");
102 * Manages physical address maps.
104 * Since the information managed by this module is
105 * also stored by the logical address mapping module,
106 * this module may throw away valid virtual-to-physical
107 * mappings at almost any time. However, invalidations
108 * of virtual-to-physical mappings must be done as
111 * In order to cope with hardware architectures which
112 * make virtual-to-physical map invalidates expensive,
113 * this module may delay invalidate or reduced protection
114 * operations until such time as they are actually
115 * necessary. This module is given full information as
116 * to which processors are currently using which maps,
117 * and to when physical maps must be made correct.
120 #include <sys/param.h>
121 #include <sys/systm.h>
122 #include <sys/bitstring.h>
124 #include <sys/cpuset.h>
125 #include <sys/kernel.h>
127 #include <sys/lock.h>
128 #include <sys/malloc.h>
129 #include <sys/mman.h>
130 #include <sys/msgbuf.h>
131 #include <sys/mutex.h>
132 #include <sys/physmem.h>
133 #include <sys/proc.h>
134 #include <sys/rwlock.h>
135 #include <sys/sbuf.h>
137 #include <sys/vmem.h>
138 #include <sys/vmmeter.h>
139 #include <sys/sched.h>
140 #include <sys/sysctl.h>
144 #include <vm/vm_param.h>
145 #include <vm/vm_kern.h>
146 #include <vm/vm_page.h>
147 #include <vm/vm_map.h>
148 #include <vm/vm_object.h>
149 #include <vm/vm_extern.h>
150 #include <vm/vm_pageout.h>
151 #include <vm/vm_pager.h>
152 #include <vm/vm_phys.h>
153 #include <vm/vm_radix.h>
154 #include <vm/vm_reserv.h>
157 #include <machine/machdep.h>
158 #include <machine/md_var.h>
159 #include <machine/pcb.h>
160 #include <machine/sbi.h>
162 #define NUL1E (Ln_ENTRIES * Ln_ENTRIES)
163 #define NUL2E (Ln_ENTRIES * NUL1E)
165 #if !defined(DIAGNOSTIC)
166 #ifdef __GNUC_GNU_INLINE__
167 #define PMAP_INLINE __attribute__((__gnu_inline__)) inline
169 #define PMAP_INLINE extern inline
176 #define PV_STAT(x) do { x ; } while (0)
178 #define PV_STAT(x) do { } while (0)
181 #define pmap_l2_pindex(v) ((v) >> L2_SHIFT)
182 #define pa_to_pvh(pa) (&pv_table[pa_index(pa)])
184 #define NPV_LIST_LOCKS MAXCPU
186 #define PHYS_TO_PV_LIST_LOCK(pa) \
187 (&pv_list_locks[pmap_l2_pindex(pa) % NPV_LIST_LOCKS])
189 #define CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa) do { \
190 struct rwlock **_lockp = (lockp); \
191 struct rwlock *_new_lock; \
193 _new_lock = PHYS_TO_PV_LIST_LOCK(pa); \
194 if (_new_lock != *_lockp) { \
195 if (*_lockp != NULL) \
196 rw_wunlock(*_lockp); \
197 *_lockp = _new_lock; \
202 #define CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m) \
203 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, VM_PAGE_TO_PHYS(m))
205 #define RELEASE_PV_LIST_LOCK(lockp) do { \
206 struct rwlock **_lockp = (lockp); \
208 if (*_lockp != NULL) { \
209 rw_wunlock(*_lockp); \
214 #define VM_PAGE_TO_PV_LIST_LOCK(m) \
215 PHYS_TO_PV_LIST_LOCK(VM_PAGE_TO_PHYS(m))
217 /* The list of all the user pmaps */
218 LIST_HEAD(pmaplist, pmap);
219 static struct pmaplist allpmaps = LIST_HEAD_INITIALIZER();
221 struct pmap kernel_pmap_store;
223 vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */
224 vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */
225 vm_offset_t kernel_vm_end = 0;
227 vm_paddr_t dmap_phys_base; /* The start of the dmap region */
228 vm_paddr_t dmap_phys_max; /* The limit of the dmap region */
229 vm_offset_t dmap_max_addr; /* The virtual address limit of the dmap */
231 /* This code assumes all L1 DMAP entries will be used */
232 CTASSERT((DMAP_MIN_ADDRESS & ~L1_OFFSET) == DMAP_MIN_ADDRESS);
233 CTASSERT((DMAP_MAX_ADDRESS & ~L1_OFFSET) == DMAP_MAX_ADDRESS);
235 static struct rwlock_padalign pvh_global_lock;
236 static struct mtx_padalign allpmaps_lock;
238 static SYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD | CTLFLAG_MPSAFE, 0,
239 "VM/pmap parameters");
241 static int superpages_enabled = 1;
242 SYSCTL_INT(_vm_pmap, OID_AUTO, superpages_enabled,
243 CTLFLAG_RDTUN, &superpages_enabled, 0,
244 "Enable support for transparent superpages");
246 static SYSCTL_NODE(_vm_pmap, OID_AUTO, l2, CTLFLAG_RD | CTLFLAG_MPSAFE, 0,
247 "2MB page mapping counters");
249 static u_long pmap_l2_demotions;
250 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, demotions, CTLFLAG_RD,
251 &pmap_l2_demotions, 0,
252 "2MB page demotions");
254 static u_long pmap_l2_mappings;
255 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, mappings, CTLFLAG_RD,
256 &pmap_l2_mappings, 0,
257 "2MB page mappings");
259 static u_long pmap_l2_p_failures;
260 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, p_failures, CTLFLAG_RD,
261 &pmap_l2_p_failures, 0,
262 "2MB page promotion failures");
264 static u_long pmap_l2_promotions;
265 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, promotions, CTLFLAG_RD,
266 &pmap_l2_promotions, 0,
267 "2MB page promotions");
270 * Data for the pv entry allocation mechanism
272 static TAILQ_HEAD(pch, pv_chunk) pv_chunks = TAILQ_HEAD_INITIALIZER(pv_chunks);
273 static struct mtx pv_chunks_mutex;
274 static struct rwlock pv_list_locks[NPV_LIST_LOCKS];
275 static struct md_page *pv_table;
276 static struct md_page pv_dummy;
278 extern cpuset_t all_harts;
281 * Internal flags for pmap_enter()'s helper functions.
283 #define PMAP_ENTER_NORECLAIM 0x1000000 /* Don't reclaim PV entries. */
284 #define PMAP_ENTER_NOREPLACE 0x2000000 /* Don't replace mappings. */
286 static void free_pv_chunk(struct pv_chunk *pc);
287 static void free_pv_entry(pmap_t pmap, pv_entry_t pv);
288 static pv_entry_t get_pv_entry(pmap_t pmap, struct rwlock **lockp);
289 static vm_page_t reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp);
290 static void pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va);
291 static pv_entry_t pmap_pvh_remove(struct md_page *pvh, pmap_t pmap,
293 static bool pmap_demote_l2(pmap_t pmap, pd_entry_t *l2, vm_offset_t va);
294 static bool pmap_demote_l2_locked(pmap_t pmap, pd_entry_t *l2,
295 vm_offset_t va, struct rwlock **lockp);
296 static int pmap_enter_l2(pmap_t pmap, vm_offset_t va, pd_entry_t new_l2,
297 u_int flags, vm_page_t m, struct rwlock **lockp);
298 static vm_page_t pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va,
299 vm_page_t m, vm_prot_t prot, vm_page_t mpte, struct rwlock **lockp);
300 static int pmap_remove_l3(pmap_t pmap, pt_entry_t *l3, vm_offset_t sva,
301 pd_entry_t ptepde, struct spglist *free, struct rwlock **lockp);
302 static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va,
303 vm_page_t m, struct rwlock **lockp);
305 static vm_page_t _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex,
306 struct rwlock **lockp);
308 static void _pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m,
309 struct spglist *free);
310 static int pmap_unuse_pt(pmap_t, vm_offset_t, pd_entry_t, struct spglist *);
312 #define pmap_clear(pte) pmap_store(pte, 0)
313 #define pmap_clear_bits(pte, bits) atomic_clear_64(pte, bits)
314 #define pmap_load_store(pte, entry) atomic_swap_64(pte, entry)
315 #define pmap_load_clear(pte) pmap_load_store(pte, 0)
316 #define pmap_load(pte) atomic_load_64(pte)
317 #define pmap_store(pte, entry) atomic_store_64(pte, entry)
318 #define pmap_store_bits(pte, bits) atomic_set_64(pte, bits)
320 /********************/
321 /* Inline functions */
322 /********************/
325 pagecopy(void *s, void *d)
328 memcpy(d, s, PAGE_SIZE);
338 #define pmap_l1_index(va) (((va) >> L1_SHIFT) & Ln_ADDR_MASK)
339 #define pmap_l2_index(va) (((va) >> L2_SHIFT) & Ln_ADDR_MASK)
340 #define pmap_l3_index(va) (((va) >> L3_SHIFT) & Ln_ADDR_MASK)
342 #define PTE_TO_PHYS(pte) ((pte >> PTE_PPN0_S) * PAGE_SIZE)
344 static __inline pd_entry_t *
345 pmap_l1(pmap_t pmap, vm_offset_t va)
348 return (&pmap->pm_l1[pmap_l1_index(va)]);
351 static __inline pd_entry_t *
352 pmap_l1_to_l2(pd_entry_t *l1, vm_offset_t va)
357 phys = PTE_TO_PHYS(pmap_load(l1));
358 l2 = (pd_entry_t *)PHYS_TO_DMAP(phys);
360 return (&l2[pmap_l2_index(va)]);
363 static __inline pd_entry_t *
364 pmap_l2(pmap_t pmap, vm_offset_t va)
368 l1 = pmap_l1(pmap, va);
369 if ((pmap_load(l1) & PTE_V) == 0)
371 if ((pmap_load(l1) & PTE_RX) != 0)
374 return (pmap_l1_to_l2(l1, va));
377 static __inline pt_entry_t *
378 pmap_l2_to_l3(pd_entry_t *l2, vm_offset_t va)
383 phys = PTE_TO_PHYS(pmap_load(l2));
384 l3 = (pd_entry_t *)PHYS_TO_DMAP(phys);
386 return (&l3[pmap_l3_index(va)]);
389 static __inline pt_entry_t *
390 pmap_l3(pmap_t pmap, vm_offset_t va)
394 l2 = pmap_l2(pmap, va);
397 if ((pmap_load(l2) & PTE_V) == 0)
399 if ((pmap_load(l2) & PTE_RX) != 0)
402 return (pmap_l2_to_l3(l2, va));
406 pmap_resident_count_inc(pmap_t pmap, int count)
409 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
410 pmap->pm_stats.resident_count += count;
414 pmap_resident_count_dec(pmap_t pmap, int count)
417 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
418 KASSERT(pmap->pm_stats.resident_count >= count,
419 ("pmap %p resident count underflow %ld %d", pmap,
420 pmap->pm_stats.resident_count, count));
421 pmap->pm_stats.resident_count -= count;
425 pmap_distribute_l1(struct pmap *pmap, vm_pindex_t l1index,
428 struct pmap *user_pmap;
431 /* Distribute new kernel L1 entry to all the user pmaps */
432 if (pmap != kernel_pmap)
435 mtx_lock(&allpmaps_lock);
436 LIST_FOREACH(user_pmap, &allpmaps, pm_list) {
437 l1 = &user_pmap->pm_l1[l1index];
438 pmap_store(l1, entry);
440 mtx_unlock(&allpmaps_lock);
444 pmap_early_page_idx(vm_offset_t l1pt, vm_offset_t va, u_int *l1_slot,
450 l1 = (pd_entry_t *)l1pt;
451 *l1_slot = (va >> L1_SHIFT) & Ln_ADDR_MASK;
453 /* Check locore has used a table L1 map */
454 KASSERT((l1[*l1_slot] & PTE_RX) == 0,
455 ("Invalid bootstrap L1 table"));
457 /* Find the address of the L2 table */
458 l2 = (pt_entry_t *)init_pt_va;
459 *l2_slot = pmap_l2_index(va);
465 pmap_early_vtophys(vm_offset_t l1pt, vm_offset_t va)
467 u_int l1_slot, l2_slot;
471 l2 = pmap_early_page_idx(l1pt, va, &l1_slot, &l2_slot);
473 /* Check locore has used L2 superpages */
474 KASSERT((l2[l2_slot] & PTE_RX) != 0,
475 ("Invalid bootstrap L2 table"));
477 /* L2 is superpages */
478 ret = (l2[l2_slot] >> PTE_PPN1_S) << L2_SHIFT;
479 ret += (va & L2_OFFSET);
485 pmap_bootstrap_dmap(vm_offset_t kern_l1, vm_paddr_t min_pa, vm_paddr_t max_pa)
494 pa = dmap_phys_base = min_pa & ~L1_OFFSET;
495 va = DMAP_MIN_ADDRESS;
496 l1 = (pd_entry_t *)kern_l1;
497 l1_slot = pmap_l1_index(DMAP_MIN_ADDRESS);
499 for (; va < DMAP_MAX_ADDRESS && pa < max_pa;
500 pa += L1_SIZE, va += L1_SIZE, l1_slot++) {
501 KASSERT(l1_slot < Ln_ENTRIES, ("Invalid L1 index"));
504 pn = (pa / PAGE_SIZE);
506 entry |= (pn << PTE_PPN0_S);
507 pmap_store(&l1[l1_slot], entry);
510 /* Set the upper limit of the DMAP region */
518 pmap_bootstrap_l3(vm_offset_t l1pt, vm_offset_t va, vm_offset_t l3_start)
527 KASSERT((va & L2_OFFSET) == 0, ("Invalid virtual address"));
529 l2 = pmap_l2(kernel_pmap, va);
530 l2 = (pd_entry_t *)((uintptr_t)l2 & ~(PAGE_SIZE - 1));
531 l2_slot = pmap_l2_index(va);
534 for (; va < VM_MAX_KERNEL_ADDRESS; l2_slot++, va += L2_SIZE) {
535 KASSERT(l2_slot < Ln_ENTRIES, ("Invalid L2 index"));
537 pa = pmap_early_vtophys(l1pt, l3pt);
538 pn = (pa / PAGE_SIZE);
540 entry |= (pn << PTE_PPN0_S);
541 pmap_store(&l2[l2_slot], entry);
546 /* Clean the L2 page table */
547 memset((void *)l3_start, 0, l3pt - l3_start);
553 * Bootstrap the system enough to run with virtual memory.
556 pmap_bootstrap(vm_offset_t l1pt, vm_paddr_t kernstart, vm_size_t kernlen)
558 u_int l1_slot, l2_slot;
559 vm_offset_t freemempos;
560 vm_offset_t dpcpu, msgbufpv;
561 vm_paddr_t max_pa, min_pa, pa;
565 printf("pmap_bootstrap %lx %lx %lx\n", l1pt, kernstart, kernlen);
566 printf("%lx\n", l1pt);
567 printf("%lx\n", (KERNBASE >> L1_SHIFT) & Ln_ADDR_MASK);
569 /* Set this early so we can use the pagetable walking functions */
570 kernel_pmap_store.pm_l1 = (pd_entry_t *)l1pt;
571 PMAP_LOCK_INIT(kernel_pmap);
573 rw_init(&pvh_global_lock, "pmap pv global");
575 CPU_FILL(&kernel_pmap->pm_active);
577 /* Assume the address we were loaded to is a valid physical address. */
578 min_pa = max_pa = kernstart;
580 physmap_idx = physmem_avail(physmap, nitems(physmap));
584 * Find the minimum physical address. physmap is sorted,
585 * but may contain empty ranges.
587 for (i = 0; i < physmap_idx * 2; i += 2) {
588 if (physmap[i] == physmap[i + 1])
590 if (physmap[i] <= min_pa)
592 if (physmap[i + 1] > max_pa)
593 max_pa = physmap[i + 1];
595 printf("physmap_idx %lx\n", physmap_idx);
596 printf("min_pa %lx\n", min_pa);
597 printf("max_pa %lx\n", max_pa);
599 /* Create a direct map region early so we can use it for pa -> va */
600 pmap_bootstrap_dmap(l1pt, min_pa, max_pa);
603 * Read the page table to find out what is already mapped.
604 * This assumes we have mapped a block of memory from KERNBASE
605 * using a single L1 entry.
607 (void)pmap_early_page_idx(l1pt, KERNBASE, &l1_slot, &l2_slot);
609 /* Sanity check the index, KERNBASE should be the first VA */
610 KASSERT(l2_slot == 0, ("The L2 index is non-zero"));
612 freemempos = roundup2(KERNBASE + kernlen, PAGE_SIZE);
614 /* Create the l3 tables for the early devmap */
615 freemempos = pmap_bootstrap_l3(l1pt,
616 VM_MAX_KERNEL_ADDRESS - L2_SIZE, freemempos);
619 * Invalidate the mapping we created for the DTB. At this point a copy
620 * has been created, and we no longer need it. We want to avoid the
621 * possibility of an aliased mapping in the future.
623 l2p = pmap_l2(kernel_pmap, VM_EARLY_DTB_ADDRESS);
624 KASSERT((pmap_load(l2p) & PTE_V) != 0, ("dtpb not mapped"));
629 #define alloc_pages(var, np) \
630 (var) = freemempos; \
631 freemempos += (np * PAGE_SIZE); \
632 memset((char *)(var), 0, ((np) * PAGE_SIZE));
634 /* Allocate dynamic per-cpu area. */
635 alloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
636 dpcpu_init((void *)dpcpu, 0);
638 /* Allocate memory for the msgbuf, e.g. for /sbin/dmesg */
639 alloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
640 msgbufp = (void *)msgbufpv;
642 virtual_avail = roundup2(freemempos, L2_SIZE);
643 virtual_end = VM_MAX_KERNEL_ADDRESS - L2_SIZE;
644 kernel_vm_end = virtual_avail;
646 pa = pmap_early_vtophys(l1pt, freemempos);
648 physmem_exclude_region(kernstart, pa - kernstart, EXFLAG_NOALLOC);
652 * Initialize a vm_page's machine-dependent fields.
655 pmap_page_init(vm_page_t m)
658 TAILQ_INIT(&m->md.pv_list);
659 m->md.pv_memattr = VM_MEMATTR_WRITE_BACK;
663 * Initialize the pmap module.
664 * Called by vm_init, to initialize any structures that the pmap
665 * system needs to map virtual memory.
674 * Initialize the pv chunk and pmap list mutexes.
676 mtx_init(&pv_chunks_mutex, "pmap pv chunk list", NULL, MTX_DEF);
677 mtx_init(&allpmaps_lock, "allpmaps", NULL, MTX_DEF);
680 * Initialize the pool of pv list locks.
682 for (i = 0; i < NPV_LIST_LOCKS; i++)
683 rw_init(&pv_list_locks[i], "pmap pv list");
686 * Calculate the size of the pv head table for superpages.
688 pv_npg = howmany(vm_phys_segs[vm_phys_nsegs - 1].end, L2_SIZE);
691 * Allocate memory for the pv head table for superpages.
693 s = (vm_size_t)(pv_npg * sizeof(struct md_page));
695 pv_table = (struct md_page *)kmem_malloc(s, M_WAITOK | M_ZERO);
696 for (i = 0; i < pv_npg; i++)
697 TAILQ_INIT(&pv_table[i].pv_list);
698 TAILQ_INIT(&pv_dummy.pv_list);
700 if (superpages_enabled)
701 pagesizes[1] = L2_SIZE;
706 * For SMP, these functions have to use IPIs for coherence.
708 * In general, the calling thread uses a plain fence to order the
709 * writes to the page tables before invoking an SBI callback to invoke
710 * sfence_vma() on remote CPUs.
713 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
718 mask = pmap->pm_active;
719 CPU_CLR(PCPU_GET(hart), &mask);
721 if (!CPU_EMPTY(&mask) && smp_started)
722 sbi_remote_sfence_vma(mask.__bits, va, 1);
728 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
733 mask = pmap->pm_active;
734 CPU_CLR(PCPU_GET(hart), &mask);
736 if (!CPU_EMPTY(&mask) && smp_started)
737 sbi_remote_sfence_vma(mask.__bits, sva, eva - sva + 1);
740 * Might consider a loop of sfence_vma_page() for a small
741 * number of pages in the future.
748 pmap_invalidate_all(pmap_t pmap)
753 mask = pmap->pm_active;
754 CPU_CLR(PCPU_GET(hart), &mask);
757 * XXX: The SBI doc doesn't detail how to specify x0 as the
758 * address to perform a global fence. BBL currently treats
759 * all sfence_vma requests as global however.
762 if (!CPU_EMPTY(&mask) && smp_started)
763 sbi_remote_sfence_vma(mask.__bits, 0, 0);
769 * Normal, non-SMP, invalidation functions.
770 * We inline these within pmap.c for speed.
773 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
780 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
784 * Might consider a loop of sfence_vma_page() for a small
785 * number of pages in the future.
791 pmap_invalidate_all(pmap_t pmap)
799 * Routine: pmap_extract
801 * Extract the physical page address associated
802 * with the given map/virtual_address pair.
805 pmap_extract(pmap_t pmap, vm_offset_t va)
814 * Start with the l2 tabel. We are unable to allocate
815 * pages in the l1 table.
817 l2p = pmap_l2(pmap, va);
820 if ((l2 & PTE_RX) == 0) {
821 l3p = pmap_l2_to_l3(l2p, va);
824 pa = PTE_TO_PHYS(l3);
825 pa |= (va & L3_OFFSET);
828 /* L2 is superpages */
829 pa = (l2 >> PTE_PPN1_S) << L2_SHIFT;
830 pa |= (va & L2_OFFSET);
838 * Routine: pmap_extract_and_hold
840 * Atomically extract and hold the physical page
841 * with the given pmap and virtual address pair
842 * if that mapping permits the given protection.
845 pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
853 l3p = pmap_l3(pmap, va);
854 if (l3p != NULL && (l3 = pmap_load(l3p)) != 0) {
855 if ((l3 & PTE_W) != 0 || (prot & VM_PROT_WRITE) == 0) {
856 phys = PTE_TO_PHYS(l3);
857 m = PHYS_TO_VM_PAGE(phys);
858 if (!vm_page_wire_mapped(m))
867 pmap_kextract(vm_offset_t va)
873 if (va >= DMAP_MIN_ADDRESS && va < DMAP_MAX_ADDRESS) {
874 pa = DMAP_TO_PHYS(va);
876 l2 = pmap_l2(kernel_pmap, va);
878 panic("pmap_kextract: No l2");
879 if ((pmap_load(l2) & PTE_RX) != 0) {
881 pa = (pmap_load(l2) >> PTE_PPN1_S) << L2_SHIFT;
882 pa |= (va & L2_OFFSET);
886 l3 = pmap_l2_to_l3(l2, va);
888 panic("pmap_kextract: No l3...");
889 pa = PTE_TO_PHYS(pmap_load(l3));
890 pa |= (va & PAGE_MASK);
895 /***************************************************
896 * Low level mapping routines.....
897 ***************************************************/
900 pmap_kenter_device(vm_offset_t sva, vm_size_t size, vm_paddr_t pa)
907 KASSERT((pa & L3_OFFSET) == 0,
908 ("pmap_kenter_device: Invalid physical address"));
909 KASSERT((sva & L3_OFFSET) == 0,
910 ("pmap_kenter_device: Invalid virtual address"));
911 KASSERT((size & PAGE_MASK) == 0,
912 ("pmap_kenter_device: Mapping is not page-sized"));
916 l3 = pmap_l3(kernel_pmap, va);
917 KASSERT(l3 != NULL, ("Invalid page table, va: 0x%lx", va));
919 pn = (pa / PAGE_SIZE);
921 entry |= (pn << PTE_PPN0_S);
922 pmap_store(l3, entry);
928 pmap_invalidate_range(kernel_pmap, sva, va);
932 * Remove a page from the kernel pagetables.
933 * Note: not SMP coherent.
936 pmap_kremove(vm_offset_t va)
940 l3 = pmap_l3(kernel_pmap, va);
941 KASSERT(l3 != NULL, ("pmap_kremove: Invalid address"));
948 pmap_kremove_device(vm_offset_t sva, vm_size_t size)
953 KASSERT((sva & L3_OFFSET) == 0,
954 ("pmap_kremove_device: Invalid virtual address"));
955 KASSERT((size & PAGE_MASK) == 0,
956 ("pmap_kremove_device: Mapping is not page-sized"));
960 l3 = pmap_l3(kernel_pmap, va);
961 KASSERT(l3 != NULL, ("Invalid page table, va: 0x%lx", va));
968 pmap_invalidate_range(kernel_pmap, sva, va);
972 * Used to map a range of physical addresses into kernel
973 * virtual address space.
975 * The value passed in '*virt' is a suggested virtual address for
976 * the mapping. Architectures which can support a direct-mapped
977 * physical to virtual region can return the appropriate address
978 * within that region, leaving '*virt' unchanged. Other
979 * architectures should map the pages starting at '*virt' and
980 * update '*virt' with the first usable address after the mapped
984 pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot)
987 return PHYS_TO_DMAP(start);
992 * Add a list of wired pages to the kva
993 * this routine is only used for temporary
994 * kernel mappings that do not need to have
995 * page modification or references recorded.
996 * Note that old mappings are simply written
997 * over. The page *must* be wired.
998 * Note: SMP coherent. Uses a ranged shootdown IPI.
1001 pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count)
1011 for (i = 0; i < count; i++) {
1013 pa = VM_PAGE_TO_PHYS(m);
1014 pn = (pa / PAGE_SIZE);
1015 l3 = pmap_l3(kernel_pmap, va);
1018 entry |= (pn << PTE_PPN0_S);
1019 pmap_store(l3, entry);
1023 pmap_invalidate_range(kernel_pmap, sva, va);
1027 * This routine tears out page mappings from the
1028 * kernel -- it is meant only for temporary mappings.
1029 * Note: SMP coherent. Uses a ranged shootdown IPI.
1032 pmap_qremove(vm_offset_t sva, int count)
1037 KASSERT(sva >= VM_MIN_KERNEL_ADDRESS, ("usermode va %lx", sva));
1039 for (va = sva; count-- > 0; va += PAGE_SIZE) {
1040 l3 = pmap_l3(kernel_pmap, va);
1041 KASSERT(l3 != NULL, ("pmap_kremove: Invalid address"));
1044 pmap_invalidate_range(kernel_pmap, sva, va);
1048 pmap_ps_enabled(pmap_t pmap __unused)
1051 return (superpages_enabled);
1054 /***************************************************
1055 * Page table page management routines.....
1056 ***************************************************/
1058 * Schedule the specified unused page table page to be freed. Specifically,
1059 * add the page to the specified list of pages that will be released to the
1060 * physical memory manager after the TLB has been updated.
1062 static __inline void
1063 pmap_add_delayed_free_list(vm_page_t m, struct spglist *free,
1064 boolean_t set_PG_ZERO)
1068 m->flags |= PG_ZERO;
1070 m->flags &= ~PG_ZERO;
1071 SLIST_INSERT_HEAD(free, m, plinks.s.ss);
1075 * Inserts the specified page table page into the specified pmap's collection
1076 * of idle page table pages. Each of a pmap's page table pages is responsible
1077 * for mapping a distinct range of virtual addresses. The pmap's collection is
1078 * ordered by this virtual address range.
1080 * If "promoted" is false, then the page table page "ml3" must be zero filled.
1083 pmap_insert_pt_page(pmap_t pmap, vm_page_t ml3, bool promoted)
1086 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1087 ml3->valid = promoted ? VM_PAGE_BITS_ALL : 0;
1088 return (vm_radix_insert(&pmap->pm_root, ml3));
1092 * Removes the page table page mapping the specified virtual address from the
1093 * specified pmap's collection of idle page table pages, and returns it.
1094 * Otherwise, returns NULL if there is no page table page corresponding to the
1095 * specified virtual address.
1097 static __inline vm_page_t
1098 pmap_remove_pt_page(pmap_t pmap, vm_offset_t va)
1101 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1102 return (vm_radix_remove(&pmap->pm_root, pmap_l2_pindex(va)));
1106 * Decrements a page table page's reference count, which is used to record the
1107 * number of valid page table entries within the page. If the reference count
1108 * drops to zero, then the page table page is unmapped. Returns TRUE if the
1109 * page table page was unmapped and FALSE otherwise.
1111 static inline boolean_t
1112 pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m, struct spglist *free)
1116 if (m->ref_count == 0) {
1117 _pmap_unwire_ptp(pmap, va, m, free);
1125 _pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m, struct spglist *free)
1129 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1130 if (m->pindex >= NUL1E) {
1132 l1 = pmap_l1(pmap, va);
1134 pmap_distribute_l1(pmap, pmap_l1_index(va), 0);
1137 l2 = pmap_l2(pmap, va);
1140 pmap_resident_count_dec(pmap, 1);
1141 if (m->pindex < NUL1E) {
1145 l1 = pmap_l1(pmap, va);
1146 phys = PTE_TO_PHYS(pmap_load(l1));
1147 pdpg = PHYS_TO_VM_PAGE(phys);
1148 pmap_unwire_ptp(pmap, va, pdpg, free);
1150 pmap_invalidate_page(pmap, va);
1155 * Put page on a list so that it is released after
1156 * *ALL* TLB shootdown is done
1158 pmap_add_delayed_free_list(m, free, TRUE);
1162 * After removing a page table entry, this routine is used to
1163 * conditionally free the page, and manage the reference count.
1166 pmap_unuse_pt(pmap_t pmap, vm_offset_t va, pd_entry_t ptepde,
1167 struct spglist *free)
1171 if (va >= VM_MAXUSER_ADDRESS)
1173 KASSERT(ptepde != 0, ("pmap_unuse_pt: ptepde != 0"));
1174 mpte = PHYS_TO_VM_PAGE(PTE_TO_PHYS(ptepde));
1175 return (pmap_unwire_ptp(pmap, va, mpte, free));
1179 pmap_pinit0(pmap_t pmap)
1182 PMAP_LOCK_INIT(pmap);
1183 bzero(&pmap->pm_stats, sizeof(pmap->pm_stats));
1184 pmap->pm_l1 = kernel_pmap->pm_l1;
1185 pmap->pm_satp = SATP_MODE_SV39 | (vtophys(pmap->pm_l1) >> PAGE_SHIFT);
1186 CPU_ZERO(&pmap->pm_active);
1187 pmap_activate_boot(pmap);
1191 pmap_pinit(pmap_t pmap)
1197 * allocate the l1 page
1199 while ((l1pt = vm_page_alloc(NULL, 0xdeadbeef, VM_ALLOC_NORMAL |
1200 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL)
1203 l1phys = VM_PAGE_TO_PHYS(l1pt);
1204 pmap->pm_l1 = (pd_entry_t *)PHYS_TO_DMAP(l1phys);
1205 pmap->pm_satp = SATP_MODE_SV39 | (l1phys >> PAGE_SHIFT);
1207 if ((l1pt->flags & PG_ZERO) == 0)
1208 pagezero(pmap->pm_l1);
1210 bzero(&pmap->pm_stats, sizeof(pmap->pm_stats));
1212 CPU_ZERO(&pmap->pm_active);
1214 /* Install kernel pagetables */
1215 memcpy(pmap->pm_l1, kernel_pmap->pm_l1, PAGE_SIZE);
1217 /* Add to the list of all user pmaps */
1218 mtx_lock(&allpmaps_lock);
1219 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list);
1220 mtx_unlock(&allpmaps_lock);
1222 vm_radix_init(&pmap->pm_root);
1228 * This routine is called if the desired page table page does not exist.
1230 * If page table page allocation fails, this routine may sleep before
1231 * returning NULL. It sleeps only if a lock pointer was given.
1233 * Note: If a page allocation fails at page table level two or three,
1234 * one or two pages may be held during the wait, only to be released
1235 * afterwards. This conservative approach is easily argued to avoid
1239 _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex, struct rwlock **lockp)
1241 vm_page_t m, /*pdppg, */pdpg;
1246 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1249 * Allocate a page table page.
1251 if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ |
1252 VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) {
1253 if (lockp != NULL) {
1254 RELEASE_PV_LIST_LOCK(lockp);
1256 rw_runlock(&pvh_global_lock);
1258 rw_rlock(&pvh_global_lock);
1263 * Indicate the need to retry. While waiting, the page table
1264 * page may have been allocated.
1269 if ((m->flags & PG_ZERO) == 0)
1273 * Map the pagetable page into the process address space, if
1274 * it isn't already there.
1277 if (ptepindex >= NUL1E) {
1279 vm_pindex_t l1index;
1281 l1index = ptepindex - NUL1E;
1282 l1 = &pmap->pm_l1[l1index];
1284 pn = (VM_PAGE_TO_PHYS(m) / PAGE_SIZE);
1286 entry |= (pn << PTE_PPN0_S);
1287 pmap_store(l1, entry);
1288 pmap_distribute_l1(pmap, l1index, entry);
1290 vm_pindex_t l1index;
1291 pd_entry_t *l1, *l2;
1293 l1index = ptepindex >> (L1_SHIFT - L2_SHIFT);
1294 l1 = &pmap->pm_l1[l1index];
1295 if (pmap_load(l1) == 0) {
1296 /* recurse for allocating page dir */
1297 if (_pmap_alloc_l3(pmap, NUL1E + l1index,
1299 vm_page_unwire_noq(m);
1300 vm_page_free_zero(m);
1304 phys = PTE_TO_PHYS(pmap_load(l1));
1305 pdpg = PHYS_TO_VM_PAGE(phys);
1309 phys = PTE_TO_PHYS(pmap_load(l1));
1310 l2 = (pd_entry_t *)PHYS_TO_DMAP(phys);
1311 l2 = &l2[ptepindex & Ln_ADDR_MASK];
1313 pn = (VM_PAGE_TO_PHYS(m) / PAGE_SIZE);
1315 entry |= (pn << PTE_PPN0_S);
1316 pmap_store(l2, entry);
1319 pmap_resident_count_inc(pmap, 1);
1325 pmap_alloc_l2(pmap_t pmap, vm_offset_t va, struct rwlock **lockp)
1329 vm_pindex_t l2pindex;
1332 l1 = pmap_l1(pmap, va);
1333 if (l1 != NULL && (pmap_load(l1) & PTE_RWX) == 0) {
1334 /* Add a reference to the L2 page. */
1335 l2pg = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l1)));
1338 /* Allocate a L2 page. */
1339 l2pindex = pmap_l2_pindex(va) >> Ln_ENTRIES_SHIFT;
1340 l2pg = _pmap_alloc_l3(pmap, NUL2E + l2pindex, lockp);
1341 if (l2pg == NULL && lockp != NULL)
1348 pmap_alloc_l3(pmap_t pmap, vm_offset_t va, struct rwlock **lockp)
1350 vm_pindex_t ptepindex;
1356 * Calculate pagetable page index
1358 ptepindex = pmap_l2_pindex(va);
1361 * Get the page directory entry
1363 l2 = pmap_l2(pmap, va);
1366 * If the page table page is mapped, we just increment the
1367 * hold count, and activate it.
1369 if (l2 != NULL && pmap_load(l2) != 0) {
1370 phys = PTE_TO_PHYS(pmap_load(l2));
1371 m = PHYS_TO_VM_PAGE(phys);
1375 * Here if the pte page isn't mapped, or if it has been
1378 m = _pmap_alloc_l3(pmap, ptepindex, lockp);
1379 if (m == NULL && lockp != NULL)
1386 /***************************************************
1387 * Pmap allocation/deallocation routines.
1388 ***************************************************/
1391 * Release any resources held by the given physical map.
1392 * Called when a pmap initialized by pmap_pinit is being released.
1393 * Should only be called if the map contains no valid mappings.
1396 pmap_release(pmap_t pmap)
1400 KASSERT(pmap->pm_stats.resident_count == 0,
1401 ("pmap_release: pmap resident count %ld != 0",
1402 pmap->pm_stats.resident_count));
1403 KASSERT(CPU_EMPTY(&pmap->pm_active),
1404 ("releasing active pmap %p", pmap));
1406 mtx_lock(&allpmaps_lock);
1407 LIST_REMOVE(pmap, pm_list);
1408 mtx_unlock(&allpmaps_lock);
1410 m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pmap->pm_l1));
1411 vm_page_unwire_noq(m);
1416 kvm_size(SYSCTL_HANDLER_ARGS)
1418 unsigned long ksize = VM_MAX_KERNEL_ADDRESS - VM_MIN_KERNEL_ADDRESS;
1420 return sysctl_handle_long(oidp, &ksize, 0, req);
1422 SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG | CTLFLAG_RD | CTLFLAG_MPSAFE,
1423 0, 0, kvm_size, "LU",
1427 kvm_free(SYSCTL_HANDLER_ARGS)
1429 unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end;
1431 return sysctl_handle_long(oidp, &kfree, 0, req);
1433 SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG | CTLFLAG_RD | CTLFLAG_MPSAFE,
1434 0, 0, kvm_free, "LU",
1435 "Amount of KVM free");
1438 * grow the number of kernel page table entries, if needed
1441 pmap_growkernel(vm_offset_t addr)
1445 pd_entry_t *l1, *l2;
1449 mtx_assert(&kernel_map->system_mtx, MA_OWNED);
1451 addr = roundup2(addr, L2_SIZE);
1452 if (addr - 1 >= vm_map_max(kernel_map))
1453 addr = vm_map_max(kernel_map);
1454 while (kernel_vm_end < addr) {
1455 l1 = pmap_l1(kernel_pmap, kernel_vm_end);
1456 if (pmap_load(l1) == 0) {
1457 /* We need a new PDP entry */
1458 nkpg = vm_page_alloc(NULL, kernel_vm_end >> L1_SHIFT,
1459 VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ |
1460 VM_ALLOC_WIRED | VM_ALLOC_ZERO);
1462 panic("pmap_growkernel: no memory to grow kernel");
1463 if ((nkpg->flags & PG_ZERO) == 0)
1464 pmap_zero_page(nkpg);
1465 paddr = VM_PAGE_TO_PHYS(nkpg);
1467 pn = (paddr / PAGE_SIZE);
1469 entry |= (pn << PTE_PPN0_S);
1470 pmap_store(l1, entry);
1471 pmap_distribute_l1(kernel_pmap,
1472 pmap_l1_index(kernel_vm_end), entry);
1473 continue; /* try again */
1475 l2 = pmap_l1_to_l2(l1, kernel_vm_end);
1476 if ((pmap_load(l2) & PTE_V) != 0 &&
1477 (pmap_load(l2) & PTE_RWX) == 0) {
1478 kernel_vm_end = (kernel_vm_end + L2_SIZE) & ~L2_OFFSET;
1479 if (kernel_vm_end - 1 >= vm_map_max(kernel_map)) {
1480 kernel_vm_end = vm_map_max(kernel_map);
1486 nkpg = vm_page_alloc(NULL, kernel_vm_end >> L2_SHIFT,
1487 VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
1490 panic("pmap_growkernel: no memory to grow kernel");
1491 if ((nkpg->flags & PG_ZERO) == 0) {
1492 pmap_zero_page(nkpg);
1494 paddr = VM_PAGE_TO_PHYS(nkpg);
1496 pn = (paddr / PAGE_SIZE);
1498 entry |= (pn << PTE_PPN0_S);
1499 pmap_store(l2, entry);
1501 pmap_invalidate_page(kernel_pmap, kernel_vm_end);
1503 kernel_vm_end = (kernel_vm_end + L2_SIZE) & ~L2_OFFSET;
1504 if (kernel_vm_end - 1 >= vm_map_max(kernel_map)) {
1505 kernel_vm_end = vm_map_max(kernel_map);
1512 /***************************************************
1513 * page management routines.
1514 ***************************************************/
1516 CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE);
1517 CTASSERT(_NPCM == 3);
1518 CTASSERT(_NPCPV == 168);
1520 static __inline struct pv_chunk *
1521 pv_to_chunk(pv_entry_t pv)
1524 return ((struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK));
1527 #define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap)
1529 #define PC_FREE0 0xfffffffffffffffful
1530 #define PC_FREE1 0xfffffffffffffffful
1531 #define PC_FREE2 0x000000fffffffffful
1533 static const uint64_t pc_freemask[_NPCM] = { PC_FREE0, PC_FREE1, PC_FREE2 };
1537 static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail;
1539 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0,
1540 "Current number of pv entry chunks");
1541 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0,
1542 "Current number of pv entry chunks allocated");
1543 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0,
1544 "Current number of pv entry chunks frees");
1545 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0,
1546 "Number of times tried to get a chunk page but failed.");
1548 static long pv_entry_frees, pv_entry_allocs, pv_entry_count;
1549 static int pv_entry_spare;
1551 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0,
1552 "Current number of pv entry frees");
1553 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0,
1554 "Current number of pv entry allocs");
1555 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0,
1556 "Current number of pv entries");
1557 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0,
1558 "Current number of spare pv entries");
1563 * We are in a serious low memory condition. Resort to
1564 * drastic measures to free some pages so we can allocate
1565 * another pv entry chunk.
1567 * Returns NULL if PV entries were reclaimed from the specified pmap.
1569 * We do not, however, unmap 2mpages because subsequent accesses will
1570 * allocate per-page pv entries until repromotion occurs, thereby
1571 * exacerbating the shortage of free pv entries.
1574 reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp)
1577 panic("RISCVTODO: reclaim_pv_chunk");
1581 * free the pv_entry back to the free list
1584 free_pv_entry(pmap_t pmap, pv_entry_t pv)
1586 struct pv_chunk *pc;
1587 int idx, field, bit;
1589 rw_assert(&pvh_global_lock, RA_LOCKED);
1590 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1591 PV_STAT(atomic_add_long(&pv_entry_frees, 1));
1592 PV_STAT(atomic_add_int(&pv_entry_spare, 1));
1593 PV_STAT(atomic_subtract_long(&pv_entry_count, 1));
1594 pc = pv_to_chunk(pv);
1595 idx = pv - &pc->pc_pventry[0];
1598 pc->pc_map[field] |= 1ul << bit;
1599 if (pc->pc_map[0] != PC_FREE0 || pc->pc_map[1] != PC_FREE1 ||
1600 pc->pc_map[2] != PC_FREE2) {
1601 /* 98% of the time, pc is already at the head of the list. */
1602 if (__predict_false(pc != TAILQ_FIRST(&pmap->pm_pvchunk))) {
1603 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1604 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1608 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1613 free_pv_chunk(struct pv_chunk *pc)
1617 mtx_lock(&pv_chunks_mutex);
1618 TAILQ_REMOVE(&pv_chunks, pc, pc_lru);
1619 mtx_unlock(&pv_chunks_mutex);
1620 PV_STAT(atomic_subtract_int(&pv_entry_spare, _NPCPV));
1621 PV_STAT(atomic_subtract_int(&pc_chunk_count, 1));
1622 PV_STAT(atomic_add_int(&pc_chunk_frees, 1));
1623 /* entire chunk is free, return it */
1624 m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pc));
1625 dump_drop_page(m->phys_addr);
1626 vm_page_unwire_noq(m);
1631 * Returns a new PV entry, allocating a new PV chunk from the system when
1632 * needed. If this PV chunk allocation fails and a PV list lock pointer was
1633 * given, a PV chunk is reclaimed from an arbitrary pmap. Otherwise, NULL is
1636 * The given PV list lock may be released.
1639 get_pv_entry(pmap_t pmap, struct rwlock **lockp)
1643 struct pv_chunk *pc;
1646 rw_assert(&pvh_global_lock, RA_LOCKED);
1647 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1648 PV_STAT(atomic_add_long(&pv_entry_allocs, 1));
1650 pc = TAILQ_FIRST(&pmap->pm_pvchunk);
1652 for (field = 0; field < _NPCM; field++) {
1653 if (pc->pc_map[field]) {
1654 bit = ffsl(pc->pc_map[field]) - 1;
1658 if (field < _NPCM) {
1659 pv = &pc->pc_pventry[field * 64 + bit];
1660 pc->pc_map[field] &= ~(1ul << bit);
1661 /* If this was the last item, move it to tail */
1662 if (pc->pc_map[0] == 0 && pc->pc_map[1] == 0 &&
1663 pc->pc_map[2] == 0) {
1664 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1665 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc,
1668 PV_STAT(atomic_add_long(&pv_entry_count, 1));
1669 PV_STAT(atomic_subtract_int(&pv_entry_spare, 1));
1673 /* No free items, allocate another chunk */
1674 m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ |
1677 if (lockp == NULL) {
1678 PV_STAT(pc_chunk_tryfail++);
1681 m = reclaim_pv_chunk(pmap, lockp);
1685 PV_STAT(atomic_add_int(&pc_chunk_count, 1));
1686 PV_STAT(atomic_add_int(&pc_chunk_allocs, 1));
1687 dump_add_page(m->phys_addr);
1688 pc = (void *)PHYS_TO_DMAP(m->phys_addr);
1690 pc->pc_map[0] = PC_FREE0 & ~1ul; /* preallocated bit 0 */
1691 pc->pc_map[1] = PC_FREE1;
1692 pc->pc_map[2] = PC_FREE2;
1693 mtx_lock(&pv_chunks_mutex);
1694 TAILQ_INSERT_TAIL(&pv_chunks, pc, pc_lru);
1695 mtx_unlock(&pv_chunks_mutex);
1696 pv = &pc->pc_pventry[0];
1697 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1698 PV_STAT(atomic_add_long(&pv_entry_count, 1));
1699 PV_STAT(atomic_add_int(&pv_entry_spare, _NPCPV - 1));
1704 * Ensure that the number of spare PV entries in the specified pmap meets or
1705 * exceeds the given count, "needed".
1707 * The given PV list lock may be released.
1710 reserve_pv_entries(pmap_t pmap, int needed, struct rwlock **lockp)
1712 struct pch new_tail;
1713 struct pv_chunk *pc;
1718 rw_assert(&pvh_global_lock, RA_LOCKED);
1719 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1720 KASSERT(lockp != NULL, ("reserve_pv_entries: lockp is NULL"));
1723 * Newly allocated PV chunks must be stored in a private list until
1724 * the required number of PV chunks have been allocated. Otherwise,
1725 * reclaim_pv_chunk() could recycle one of these chunks. In
1726 * contrast, these chunks must be added to the pmap upon allocation.
1728 TAILQ_INIT(&new_tail);
1731 TAILQ_FOREACH(pc, &pmap->pm_pvchunk, pc_list) {
1732 bit_count((bitstr_t *)pc->pc_map, 0,
1733 sizeof(pc->pc_map) * NBBY, &free);
1737 if (avail >= needed)
1740 for (reclaimed = false; avail < needed; avail += _NPCPV) {
1741 m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ |
1744 m = reclaim_pv_chunk(pmap, lockp);
1751 dump_add_page(m->phys_addr);
1753 pc = (void *)PHYS_TO_DMAP(m->phys_addr);
1755 pc->pc_map[0] = PC_FREE0;
1756 pc->pc_map[1] = PC_FREE1;
1757 pc->pc_map[2] = PC_FREE2;
1758 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1759 TAILQ_INSERT_TAIL(&new_tail, pc, pc_lru);
1762 * The reclaim might have freed a chunk from the current pmap.
1763 * If that chunk contained available entries, we need to
1764 * re-count the number of available entries.
1769 if (!TAILQ_EMPTY(&new_tail)) {
1770 mtx_lock(&pv_chunks_mutex);
1771 TAILQ_CONCAT(&pv_chunks, &new_tail, pc_lru);
1772 mtx_unlock(&pv_chunks_mutex);
1777 * First find and then remove the pv entry for the specified pmap and virtual
1778 * address from the specified pv list. Returns the pv entry if found and NULL
1779 * otherwise. This operation can be performed on pv lists for either 4KB or
1780 * 2MB page mappings.
1782 static __inline pv_entry_t
1783 pmap_pvh_remove(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
1787 rw_assert(&pvh_global_lock, RA_LOCKED);
1788 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
1789 if (pmap == PV_PMAP(pv) && va == pv->pv_va) {
1790 TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
1799 * First find and then destroy the pv entry for the specified pmap and virtual
1800 * address. This operation can be performed on pv lists for either 4KB or 2MB
1804 pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
1808 pv = pmap_pvh_remove(pvh, pmap, va);
1810 KASSERT(pv != NULL, ("pmap_pvh_free: pv not found for %#lx", va));
1811 free_pv_entry(pmap, pv);
1815 * Conditionally create the PV entry for a 4KB page mapping if the required
1816 * memory can be allocated without resorting to reclamation.
1819 pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m,
1820 struct rwlock **lockp)
1824 rw_assert(&pvh_global_lock, RA_LOCKED);
1825 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1826 /* Pass NULL instead of the lock pointer to disable reclamation. */
1827 if ((pv = get_pv_entry(pmap, NULL)) != NULL) {
1829 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m);
1830 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1838 * After demotion from a 2MB page mapping to 512 4KB page mappings,
1839 * destroy the pv entry for the 2MB page mapping and reinstantiate the pv
1840 * entries for each of the 4KB page mappings.
1842 static void __unused
1843 pmap_pv_demote_l2(pmap_t pmap, vm_offset_t va, vm_paddr_t pa,
1844 struct rwlock **lockp)
1846 struct md_page *pvh;
1847 struct pv_chunk *pc;
1850 vm_offset_t va_last;
1853 rw_assert(&pvh_global_lock, RA_LOCKED);
1854 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1855 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa);
1858 * Transfer the 2mpage's pv entry for this mapping to the first
1859 * page's pv list. Once this transfer begins, the pv list lock
1860 * must not be released until the last pv entry is reinstantiated.
1862 pvh = pa_to_pvh(pa);
1864 pv = pmap_pvh_remove(pvh, pmap, va);
1865 KASSERT(pv != NULL, ("pmap_pv_demote_l2: pv not found"));
1866 m = PHYS_TO_VM_PAGE(pa);
1867 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1869 /* Instantiate the remaining 511 pv entries. */
1870 va_last = va + L2_SIZE - PAGE_SIZE;
1872 pc = TAILQ_FIRST(&pmap->pm_pvchunk);
1873 KASSERT(pc->pc_map[0] != 0 || pc->pc_map[1] != 0 ||
1874 pc->pc_map[2] != 0, ("pmap_pv_demote_l2: missing spare"));
1875 for (field = 0; field < _NPCM; field++) {
1876 while (pc->pc_map[field] != 0) {
1877 bit = ffsl(pc->pc_map[field]) - 1;
1878 pc->pc_map[field] &= ~(1ul << bit);
1879 pv = &pc->pc_pventry[field * 64 + bit];
1883 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
1884 ("pmap_pv_demote_l2: page %p is not managed", m));
1885 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1891 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1892 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list);
1895 if (pc->pc_map[0] == 0 && pc->pc_map[1] == 0 && pc->pc_map[2] == 0) {
1896 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1897 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list);
1902 #if VM_NRESERVLEVEL > 0
1904 pmap_pv_promote_l2(pmap_t pmap, vm_offset_t va, vm_paddr_t pa,
1905 struct rwlock **lockp)
1907 struct md_page *pvh;
1910 vm_offset_t va_last;
1912 rw_assert(&pvh_global_lock, RA_LOCKED);
1913 KASSERT((va & L2_OFFSET) == 0,
1914 ("pmap_pv_promote_l2: misaligned va %#lx", va));
1916 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa);
1918 m = PHYS_TO_VM_PAGE(pa);
1919 pv = pmap_pvh_remove(&m->md, pmap, va);
1920 KASSERT(pv != NULL, ("pmap_pv_promote_l2: pv for %#lx not found", va));
1921 pvh = pa_to_pvh(pa);
1922 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_next);
1925 va_last = va + L2_SIZE - PAGE_SIZE;
1929 pmap_pvh_free(&m->md, pmap, va);
1930 } while (va < va_last);
1932 #endif /* VM_NRESERVLEVEL > 0 */
1935 * Create the PV entry for a 2MB page mapping. Always returns true unless the
1936 * flag PMAP_ENTER_NORECLAIM is specified. If that flag is specified, returns
1937 * false if the PV entry cannot be allocated without resorting to reclamation.
1940 pmap_pv_insert_l2(pmap_t pmap, vm_offset_t va, pd_entry_t l2e, u_int flags,
1941 struct rwlock **lockp)
1943 struct md_page *pvh;
1947 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1948 /* Pass NULL instead of the lock pointer to disable reclamation. */
1949 if ((pv = get_pv_entry(pmap, (flags & PMAP_ENTER_NORECLAIM) != 0 ?
1950 NULL : lockp)) == NULL)
1953 pa = PTE_TO_PHYS(l2e);
1954 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa);
1955 pvh = pa_to_pvh(pa);
1956 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_next);
1962 pmap_remove_kernel_l2(pmap_t pmap, pt_entry_t *l2, vm_offset_t va)
1964 pt_entry_t newl2, oldl2;
1968 KASSERT(!VIRT_IN_DMAP(va), ("removing direct mapping of %#lx", va));
1969 KASSERT(pmap == kernel_pmap, ("pmap %p is not kernel_pmap", pmap));
1970 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1972 ml3 = pmap_remove_pt_page(pmap, va);
1974 panic("pmap_remove_kernel_l2: Missing pt page");
1976 ml3pa = VM_PAGE_TO_PHYS(ml3);
1977 newl2 = ml3pa | PTE_V;
1980 * If this page table page was unmapped by a promotion, then it
1981 * contains valid mappings. Zero it to invalidate those mappings.
1983 if (ml3->valid != 0)
1984 pagezero((void *)PHYS_TO_DMAP(ml3pa));
1987 * Demote the mapping.
1989 oldl2 = pmap_load_store(l2, newl2);
1990 KASSERT(oldl2 == 0, ("%s: found existing mapping at %p: %#lx",
1991 __func__, l2, oldl2));
1995 * pmap_remove_l2: Do the things to unmap a level 2 superpage.
1998 pmap_remove_l2(pmap_t pmap, pt_entry_t *l2, vm_offset_t sva,
1999 pd_entry_t l1e, struct spglist *free, struct rwlock **lockp)
2001 struct md_page *pvh;
2003 vm_offset_t eva, va;
2006 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2007 KASSERT((sva & L2_OFFSET) == 0, ("pmap_remove_l2: sva is not aligned"));
2008 oldl2 = pmap_load_clear(l2);
2009 KASSERT((oldl2 & PTE_RWX) != 0,
2010 ("pmap_remove_l2: L2e %lx is not a superpage mapping", oldl2));
2013 * The sfence.vma documentation states that it is sufficient to specify
2014 * a single address within a superpage mapping. However, since we do
2015 * not perform any invalidation upon promotion, TLBs may still be
2016 * caching 4KB mappings within the superpage, so we must invalidate the
2019 pmap_invalidate_range(pmap, sva, sva + L2_SIZE);
2020 if ((oldl2 & PTE_SW_WIRED) != 0)
2021 pmap->pm_stats.wired_count -= L2_SIZE / PAGE_SIZE;
2022 pmap_resident_count_dec(pmap, L2_SIZE / PAGE_SIZE);
2023 if ((oldl2 & PTE_SW_MANAGED) != 0) {
2024 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, PTE_TO_PHYS(oldl2));
2025 pvh = pa_to_pvh(PTE_TO_PHYS(oldl2));
2026 pmap_pvh_free(pvh, pmap, sva);
2027 eva = sva + L2_SIZE;
2028 for (va = sva, m = PHYS_TO_VM_PAGE(PTE_TO_PHYS(oldl2));
2029 va < eva; va += PAGE_SIZE, m++) {
2030 if ((oldl2 & PTE_D) != 0)
2032 if ((oldl2 & PTE_A) != 0)
2033 vm_page_aflag_set(m, PGA_REFERENCED);
2034 if (TAILQ_EMPTY(&m->md.pv_list) &&
2035 TAILQ_EMPTY(&pvh->pv_list))
2036 vm_page_aflag_clear(m, PGA_WRITEABLE);
2039 if (pmap == kernel_pmap) {
2040 pmap_remove_kernel_l2(pmap, l2, sva);
2042 ml3 = pmap_remove_pt_page(pmap, sva);
2044 KASSERT(ml3->valid == VM_PAGE_BITS_ALL,
2045 ("pmap_remove_l2: l3 page not promoted"));
2046 pmap_resident_count_dec(pmap, 1);
2047 KASSERT(ml3->ref_count == Ln_ENTRIES,
2048 ("pmap_remove_l2: l3 page ref count error"));
2050 vm_page_unwire_noq(ml3);
2051 pmap_add_delayed_free_list(ml3, free, FALSE);
2054 return (pmap_unuse_pt(pmap, sva, l1e, free));
2058 * pmap_remove_l3: do the things to unmap a page in a process
2061 pmap_remove_l3(pmap_t pmap, pt_entry_t *l3, vm_offset_t va,
2062 pd_entry_t l2e, struct spglist *free, struct rwlock **lockp)
2064 struct md_page *pvh;
2069 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2070 old_l3 = pmap_load_clear(l3);
2071 pmap_invalidate_page(pmap, va);
2072 if (old_l3 & PTE_SW_WIRED)
2073 pmap->pm_stats.wired_count -= 1;
2074 pmap_resident_count_dec(pmap, 1);
2075 if (old_l3 & PTE_SW_MANAGED) {
2076 phys = PTE_TO_PHYS(old_l3);
2077 m = PHYS_TO_VM_PAGE(phys);
2078 if ((old_l3 & PTE_D) != 0)
2081 vm_page_aflag_set(m, PGA_REFERENCED);
2082 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m);
2083 pmap_pvh_free(&m->md, pmap, va);
2084 if (TAILQ_EMPTY(&m->md.pv_list) &&
2085 (m->flags & PG_FICTITIOUS) == 0) {
2086 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
2087 if (TAILQ_EMPTY(&pvh->pv_list))
2088 vm_page_aflag_clear(m, PGA_WRITEABLE);
2092 return (pmap_unuse_pt(pmap, va, l2e, free));
2096 * Remove the given range of addresses from the specified map.
2098 * It is assumed that the start and end are properly
2099 * rounded to the page size.
2102 pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
2104 struct spglist free;
2105 struct rwlock *lock;
2106 vm_offset_t va, va_next;
2107 pd_entry_t *l1, *l2, l2e;
2111 * Perform an unsynchronized read. This is, however, safe.
2113 if (pmap->pm_stats.resident_count == 0)
2118 rw_rlock(&pvh_global_lock);
2122 for (; sva < eva; sva = va_next) {
2123 if (pmap->pm_stats.resident_count == 0)
2126 l1 = pmap_l1(pmap, sva);
2127 if (pmap_load(l1) == 0) {
2128 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
2135 * Calculate index for next page table.
2137 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
2141 l2 = pmap_l1_to_l2(l1, sva);
2144 if ((l2e = pmap_load(l2)) == 0)
2146 if ((l2e & PTE_RWX) != 0) {
2147 if (sva + L2_SIZE == va_next && eva >= va_next) {
2148 (void)pmap_remove_l2(pmap, l2, sva,
2149 pmap_load(l1), &free, &lock);
2151 } else if (!pmap_demote_l2_locked(pmap, l2, sva,
2154 * The large page mapping was destroyed.
2158 l2e = pmap_load(l2);
2162 * Limit our scan to either the end of the va represented
2163 * by the current page table page, or to the end of the
2164 * range being removed.
2170 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
2172 if (pmap_load(l3) == 0) {
2173 if (va != va_next) {
2174 pmap_invalidate_range(pmap, va, sva);
2181 if (pmap_remove_l3(pmap, l3, sva, l2e, &free, &lock)) {
2187 pmap_invalidate_range(pmap, va, sva);
2191 rw_runlock(&pvh_global_lock);
2193 vm_page_free_pages_toq(&free, false);
2197 * Routine: pmap_remove_all
2199 * Removes this physical page from
2200 * all physical maps in which it resides.
2201 * Reflects back modify bits to the pager.
2204 * Original versions of this routine were very
2205 * inefficient because they iteratively called
2206 * pmap_remove (slow...)
2210 pmap_remove_all(vm_page_t m)
2212 struct spglist free;
2213 struct md_page *pvh;
2215 pt_entry_t *l3, l3e;
2216 pd_entry_t *l2, l2e;
2220 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2221 ("pmap_remove_all: page %p is not managed", m));
2223 pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy :
2224 pa_to_pvh(VM_PAGE_TO_PHYS(m));
2226 rw_wlock(&pvh_global_lock);
2227 while ((pv = TAILQ_FIRST(&pvh->pv_list)) != NULL) {
2231 l2 = pmap_l2(pmap, va);
2232 (void)pmap_demote_l2(pmap, l2, va);
2235 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
2238 pmap_resident_count_dec(pmap, 1);
2239 l2 = pmap_l2(pmap, pv->pv_va);
2240 KASSERT(l2 != NULL, ("pmap_remove_all: no l2 table found"));
2241 l2e = pmap_load(l2);
2243 KASSERT((l2e & PTE_RX) == 0,
2244 ("pmap_remove_all: found a superpage in %p's pv list", m));
2246 l3 = pmap_l2_to_l3(l2, pv->pv_va);
2247 l3e = pmap_load_clear(l3);
2248 pmap_invalidate_page(pmap, pv->pv_va);
2249 if (l3e & PTE_SW_WIRED)
2250 pmap->pm_stats.wired_count--;
2251 if ((l3e & PTE_A) != 0)
2252 vm_page_aflag_set(m, PGA_REFERENCED);
2255 * Update the vm_page_t clean and reference bits.
2257 if ((l3e & PTE_D) != 0)
2259 pmap_unuse_pt(pmap, pv->pv_va, pmap_load(l2), &free);
2260 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
2262 free_pv_entry(pmap, pv);
2265 vm_page_aflag_clear(m, PGA_WRITEABLE);
2266 rw_wunlock(&pvh_global_lock);
2267 vm_page_free_pages_toq(&free, false);
2271 * Set the physical protection on the
2272 * specified range of this map as requested.
2275 pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
2277 pd_entry_t *l1, *l2, l2e;
2278 pt_entry_t *l3, l3e, mask;
2281 vm_offset_t va_next;
2282 bool anychanged, pv_lists_locked;
2284 if ((prot & VM_PROT_READ) == VM_PROT_NONE) {
2285 pmap_remove(pmap, sva, eva);
2289 if ((prot & (VM_PROT_WRITE | VM_PROT_EXECUTE)) ==
2290 (VM_PROT_WRITE | VM_PROT_EXECUTE))
2294 pv_lists_locked = false;
2296 if ((prot & VM_PROT_WRITE) == 0)
2297 mask |= PTE_W | PTE_D;
2298 if ((prot & VM_PROT_EXECUTE) == 0)
2302 for (; sva < eva; sva = va_next) {
2303 l1 = pmap_l1(pmap, sva);
2304 if (pmap_load(l1) == 0) {
2305 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
2311 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
2315 l2 = pmap_l1_to_l2(l1, sva);
2316 if (l2 == NULL || (l2e = pmap_load(l2)) == 0)
2318 if ((l2e & PTE_RWX) != 0) {
2319 if (sva + L2_SIZE == va_next && eva >= va_next) {
2321 if ((prot & VM_PROT_WRITE) == 0 &&
2322 (l2e & (PTE_SW_MANAGED | PTE_D)) ==
2323 (PTE_SW_MANAGED | PTE_D)) {
2324 pa = PTE_TO_PHYS(l2e);
2325 m = PHYS_TO_VM_PAGE(pa);
2326 for (mt = m; mt < &m[Ln_ENTRIES]; mt++)
2329 if (!atomic_fcmpset_long(l2, &l2e, l2e & ~mask))
2333 if (!pv_lists_locked) {
2334 pv_lists_locked = true;
2335 if (!rw_try_rlock(&pvh_global_lock)) {
2337 pmap_invalidate_all(
2340 rw_rlock(&pvh_global_lock);
2344 if (!pmap_demote_l2(pmap, l2, sva)) {
2346 * The large page mapping was destroyed.
2356 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
2358 l3e = pmap_load(l3);
2360 if ((l3e & PTE_V) == 0)
2362 if ((prot & VM_PROT_WRITE) == 0 &&
2363 (l3e & (PTE_SW_MANAGED | PTE_D)) ==
2364 (PTE_SW_MANAGED | PTE_D)) {
2365 m = PHYS_TO_VM_PAGE(PTE_TO_PHYS(l3e));
2368 if (!atomic_fcmpset_long(l3, &l3e, l3e & ~mask))
2374 pmap_invalidate_all(pmap);
2375 if (pv_lists_locked)
2376 rw_runlock(&pvh_global_lock);
2381 pmap_fault_fixup(pmap_t pmap, vm_offset_t va, vm_prot_t ftype)
2383 pd_entry_t *l2, l2e;
2384 pt_entry_t bits, *pte, oldpte;
2389 l2 = pmap_l2(pmap, va);
2390 if (l2 == NULL || ((l2e = pmap_load(l2)) & PTE_V) == 0)
2392 if ((l2e & PTE_RWX) == 0) {
2393 pte = pmap_l2_to_l3(l2, va);
2394 if (pte == NULL || ((oldpte = pmap_load(pte)) & PTE_V) == 0)
2401 if ((pmap != kernel_pmap && (oldpte & PTE_U) == 0) ||
2402 (ftype == VM_PROT_WRITE && (oldpte & PTE_W) == 0) ||
2403 (ftype == VM_PROT_EXECUTE && (oldpte & PTE_X) == 0) ||
2404 (ftype == VM_PROT_READ && (oldpte & PTE_R) == 0))
2408 if (ftype == VM_PROT_WRITE)
2412 * Spurious faults can occur if the implementation caches invalid
2413 * entries in the TLB, or if simultaneous accesses on multiple CPUs
2414 * race with each other.
2416 if ((oldpte & bits) != bits)
2417 pmap_store_bits(pte, bits);
2426 pmap_demote_l2(pmap_t pmap, pd_entry_t *l2, vm_offset_t va)
2428 struct rwlock *lock;
2432 rv = pmap_demote_l2_locked(pmap, l2, va, &lock);
2439 * Tries to demote a 2MB page mapping. If demotion fails, the 2MB page
2440 * mapping is invalidated.
2443 pmap_demote_l2_locked(pmap_t pmap, pd_entry_t *l2, vm_offset_t va,
2444 struct rwlock **lockp)
2446 struct spglist free;
2448 pd_entry_t newl2, oldl2;
2449 pt_entry_t *firstl3, newl3;
2453 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2455 oldl2 = pmap_load(l2);
2456 KASSERT((oldl2 & PTE_RWX) != 0,
2457 ("pmap_demote_l2_locked: oldl2 is not a leaf entry"));
2458 if ((oldl2 & PTE_A) == 0 || (mpte = pmap_remove_pt_page(pmap, va)) ==
2460 if ((oldl2 & PTE_A) == 0 || (mpte = vm_page_alloc(NULL,
2461 pmap_l2_pindex(va), (VIRT_IN_DMAP(va) ? VM_ALLOC_INTERRUPT :
2462 VM_ALLOC_NORMAL) | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED)) ==
2465 (void)pmap_remove_l2(pmap, l2, va & ~L2_OFFSET,
2466 pmap_load(pmap_l1(pmap, va)), &free, lockp);
2467 vm_page_free_pages_toq(&free, true);
2468 CTR2(KTR_PMAP, "pmap_demote_l2_locked: "
2469 "failure for va %#lx in pmap %p", va, pmap);
2472 if (va < VM_MAXUSER_ADDRESS) {
2473 mpte->ref_count = Ln_ENTRIES;
2474 pmap_resident_count_inc(pmap, 1);
2477 mptepa = VM_PAGE_TO_PHYS(mpte);
2478 firstl3 = (pt_entry_t *)PHYS_TO_DMAP(mptepa);
2479 newl2 = ((mptepa / PAGE_SIZE) << PTE_PPN0_S) | PTE_V;
2480 KASSERT((oldl2 & PTE_A) != 0,
2481 ("pmap_demote_l2_locked: oldl2 is missing PTE_A"));
2482 KASSERT((oldl2 & (PTE_D | PTE_W)) != PTE_W,
2483 ("pmap_demote_l2_locked: oldl2 is missing PTE_D"));
2487 * If the page table page is not leftover from an earlier promotion,
2490 if (mpte->valid == 0) {
2491 for (i = 0; i < Ln_ENTRIES; i++)
2492 pmap_store(firstl3 + i, newl3 + (i << PTE_PPN0_S));
2494 KASSERT(PTE_TO_PHYS(pmap_load(firstl3)) == PTE_TO_PHYS(newl3),
2495 ("pmap_demote_l2_locked: firstl3 and newl3 map different physical "
2499 * If the mapping has changed attributes, update the page table
2502 if ((pmap_load(firstl3) & PTE_PROMOTE) != (newl3 & PTE_PROMOTE))
2503 for (i = 0; i < Ln_ENTRIES; i++)
2504 pmap_store(firstl3 + i, newl3 + (i << PTE_PPN0_S));
2507 * The spare PV entries must be reserved prior to demoting the
2508 * mapping, that is, prior to changing the L2 entry. Otherwise, the
2509 * state of the L2 entry and the PV lists will be inconsistent, which
2510 * can result in reclaim_pv_chunk() attempting to remove a PV entry from
2511 * the wrong PV list and pmap_pv_demote_l2() failing to find the
2512 * expected PV entry for the 2MB page mapping that is being demoted.
2514 if ((oldl2 & PTE_SW_MANAGED) != 0)
2515 reserve_pv_entries(pmap, Ln_ENTRIES - 1, lockp);
2518 * Demote the mapping.
2520 pmap_store(l2, newl2);
2523 * Demote the PV entry.
2525 if ((oldl2 & PTE_SW_MANAGED) != 0)
2526 pmap_pv_demote_l2(pmap, va, PTE_TO_PHYS(oldl2), lockp);
2528 atomic_add_long(&pmap_l2_demotions, 1);
2529 CTR2(KTR_PMAP, "pmap_demote_l2_locked: success for va %#lx in pmap %p",
2534 #if VM_NRESERVLEVEL > 0
2536 pmap_promote_l2(pmap_t pmap, pd_entry_t *l2, vm_offset_t va,
2537 struct rwlock **lockp)
2539 pt_entry_t *firstl3, *l3;
2543 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2546 KASSERT((pmap_load(l2) & PTE_RWX) == 0,
2547 ("pmap_promote_l2: invalid l2 entry %p", l2));
2549 firstl3 = (pt_entry_t *)PHYS_TO_DMAP(PTE_TO_PHYS(pmap_load(l2)));
2550 pa = PTE_TO_PHYS(pmap_load(firstl3));
2551 if ((pa & L2_OFFSET) != 0) {
2552 CTR2(KTR_PMAP, "pmap_promote_l2: failure for va %#lx pmap %p",
2554 atomic_add_long(&pmap_l2_p_failures, 1);
2559 for (l3 = firstl3 + 1; l3 < firstl3 + Ln_ENTRIES; l3++) {
2560 if (PTE_TO_PHYS(pmap_load(l3)) != pa) {
2562 "pmap_promote_l2: failure for va %#lx pmap %p",
2564 atomic_add_long(&pmap_l2_p_failures, 1);
2567 if ((pmap_load(l3) & PTE_PROMOTE) !=
2568 (pmap_load(firstl3) & PTE_PROMOTE)) {
2570 "pmap_promote_l2: failure for va %#lx pmap %p",
2572 atomic_add_long(&pmap_l2_p_failures, 1);
2578 ml3 = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l2)));
2579 KASSERT(ml3->pindex == pmap_l2_pindex(va),
2580 ("pmap_promote_l2: page table page's pindex is wrong"));
2581 if (pmap_insert_pt_page(pmap, ml3, true)) {
2582 CTR2(KTR_PMAP, "pmap_promote_l2: failure for va %#lx pmap %p",
2584 atomic_add_long(&pmap_l2_p_failures, 1);
2588 if ((pmap_load(firstl3) & PTE_SW_MANAGED) != 0)
2589 pmap_pv_promote_l2(pmap, va, PTE_TO_PHYS(pmap_load(firstl3)),
2592 pmap_store(l2, pmap_load(firstl3));
2594 atomic_add_long(&pmap_l2_promotions, 1);
2595 CTR2(KTR_PMAP, "pmap_promote_l2: success for va %#lx in pmap %p", va,
2601 * Insert the given physical page (p) at
2602 * the specified virtual address (v) in the
2603 * target physical map with the protection requested.
2605 * If specified, the page will be wired down, meaning
2606 * that the related pte can not be reclaimed.
2608 * NB: This is the only routine which MAY NOT lazy-evaluate
2609 * or lose information. That is, this routine must actually
2610 * insert this page into the given map NOW.
2613 pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
2614 u_int flags, int8_t psind)
2616 struct rwlock *lock;
2617 pd_entry_t *l1, *l2, l2e;
2618 pt_entry_t new_l3, orig_l3;
2621 vm_paddr_t opa, pa, l2_pa, l3_pa;
2622 vm_page_t mpte, om, l2_m, l3_m;
2624 pn_t l2_pn, l3_pn, pn;
2628 va = trunc_page(va);
2629 if ((m->oflags & VPO_UNMANAGED) == 0)
2630 VM_PAGE_OBJECT_BUSY_ASSERT(m);
2631 pa = VM_PAGE_TO_PHYS(m);
2632 pn = (pa / PAGE_SIZE);
2634 new_l3 = PTE_V | PTE_R | PTE_A;
2635 if (prot & VM_PROT_EXECUTE)
2637 if (flags & VM_PROT_WRITE)
2639 if (prot & VM_PROT_WRITE)
2641 if (va < VM_MAX_USER_ADDRESS)
2644 new_l3 |= (pn << PTE_PPN0_S);
2645 if ((flags & PMAP_ENTER_WIRED) != 0)
2646 new_l3 |= PTE_SW_WIRED;
2649 * Set modified bit gratuitously for writeable mappings if
2650 * the page is unmanaged. We do not want to take a fault
2651 * to do the dirty bit accounting for these mappings.
2653 if ((m->oflags & VPO_UNMANAGED) != 0) {
2654 if (prot & VM_PROT_WRITE)
2657 new_l3 |= PTE_SW_MANAGED;
2659 CTR2(KTR_PMAP, "pmap_enter: %.16lx -> %.16lx", va, pa);
2663 rw_rlock(&pvh_global_lock);
2666 /* Assert the required virtual and physical alignment. */
2667 KASSERT((va & L2_OFFSET) == 0,
2668 ("pmap_enter: va %#lx unaligned", va));
2669 KASSERT(m->psind > 0, ("pmap_enter: m->psind < psind"));
2670 rv = pmap_enter_l2(pmap, va, new_l3, flags, m, &lock);
2674 l2 = pmap_l2(pmap, va);
2675 if (l2 != NULL && ((l2e = pmap_load(l2)) & PTE_V) != 0 &&
2676 ((l2e & PTE_RWX) == 0 || pmap_demote_l2_locked(pmap, l2,
2678 l3 = pmap_l2_to_l3(l2, va);
2679 if (va < VM_MAXUSER_ADDRESS) {
2680 mpte = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l2)));
2683 } else if (va < VM_MAXUSER_ADDRESS) {
2684 nosleep = (flags & PMAP_ENTER_NOSLEEP) != 0;
2685 mpte = pmap_alloc_l3(pmap, va, nosleep ? NULL : &lock);
2686 if (mpte == NULL && nosleep) {
2687 CTR0(KTR_PMAP, "pmap_enter: mpte == NULL");
2690 rw_runlock(&pvh_global_lock);
2692 return (KERN_RESOURCE_SHORTAGE);
2694 l3 = pmap_l3(pmap, va);
2696 l3 = pmap_l3(pmap, va);
2697 /* TODO: This is not optimal, but should mostly work */
2700 l2_m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
2701 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
2704 panic("pmap_enter: l2 pte_m == NULL");
2705 if ((l2_m->flags & PG_ZERO) == 0)
2706 pmap_zero_page(l2_m);
2708 l2_pa = VM_PAGE_TO_PHYS(l2_m);
2709 l2_pn = (l2_pa / PAGE_SIZE);
2711 l1 = pmap_l1(pmap, va);
2713 entry |= (l2_pn << PTE_PPN0_S);
2714 pmap_store(l1, entry);
2715 pmap_distribute_l1(pmap, pmap_l1_index(va), entry);
2716 l2 = pmap_l1_to_l2(l1, va);
2719 l3_m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
2720 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | VM_ALLOC_ZERO);
2722 panic("pmap_enter: l3 pte_m == NULL");
2723 if ((l3_m->flags & PG_ZERO) == 0)
2724 pmap_zero_page(l3_m);
2726 l3_pa = VM_PAGE_TO_PHYS(l3_m);
2727 l3_pn = (l3_pa / PAGE_SIZE);
2729 entry |= (l3_pn << PTE_PPN0_S);
2730 pmap_store(l2, entry);
2731 l3 = pmap_l2_to_l3(l2, va);
2733 pmap_invalidate_page(pmap, va);
2736 orig_l3 = pmap_load(l3);
2737 opa = PTE_TO_PHYS(orig_l3);
2741 * Is the specified virtual address already mapped?
2743 if ((orig_l3 & PTE_V) != 0) {
2745 * Wiring change, just update stats. We don't worry about
2746 * wiring PT pages as they remain resident as long as there
2747 * are valid mappings in them. Hence, if a user page is wired,
2748 * the PT page will be also.
2750 if ((flags & PMAP_ENTER_WIRED) != 0 &&
2751 (orig_l3 & PTE_SW_WIRED) == 0)
2752 pmap->pm_stats.wired_count++;
2753 else if ((flags & PMAP_ENTER_WIRED) == 0 &&
2754 (orig_l3 & PTE_SW_WIRED) != 0)
2755 pmap->pm_stats.wired_count--;
2758 * Remove the extra PT page reference.
2762 KASSERT(mpte->ref_count > 0,
2763 ("pmap_enter: missing reference to page table page,"
2768 * Has the physical page changed?
2772 * No, might be a protection or wiring change.
2774 if ((orig_l3 & PTE_SW_MANAGED) != 0 &&
2775 (new_l3 & PTE_W) != 0)
2776 vm_page_aflag_set(m, PGA_WRITEABLE);
2781 * The physical page has changed. Temporarily invalidate
2782 * the mapping. This ensures that all threads sharing the
2783 * pmap keep a consistent view of the mapping, which is
2784 * necessary for the correct handling of COW faults. It
2785 * also permits reuse of the old mapping's PV entry,
2786 * avoiding an allocation.
2788 * For consistency, handle unmanaged mappings the same way.
2790 orig_l3 = pmap_load_clear(l3);
2791 KASSERT(PTE_TO_PHYS(orig_l3) == opa,
2792 ("pmap_enter: unexpected pa update for %#lx", va));
2793 if ((orig_l3 & PTE_SW_MANAGED) != 0) {
2794 om = PHYS_TO_VM_PAGE(opa);
2797 * The pmap lock is sufficient to synchronize with
2798 * concurrent calls to pmap_page_test_mappings() and
2799 * pmap_ts_referenced().
2801 if ((orig_l3 & PTE_D) != 0)
2803 if ((orig_l3 & PTE_A) != 0)
2804 vm_page_aflag_set(om, PGA_REFERENCED);
2805 CHANGE_PV_LIST_LOCK_TO_PHYS(&lock, opa);
2806 pv = pmap_pvh_remove(&om->md, pmap, va);
2808 ("pmap_enter: no PV entry for %#lx", va));
2809 if ((new_l3 & PTE_SW_MANAGED) == 0)
2810 free_pv_entry(pmap, pv);
2811 if ((om->a.flags & PGA_WRITEABLE) != 0 &&
2812 TAILQ_EMPTY(&om->md.pv_list) &&
2813 ((om->flags & PG_FICTITIOUS) != 0 ||
2814 TAILQ_EMPTY(&pa_to_pvh(opa)->pv_list)))
2815 vm_page_aflag_clear(om, PGA_WRITEABLE);
2817 pmap_invalidate_page(pmap, va);
2821 * Increment the counters.
2823 if ((new_l3 & PTE_SW_WIRED) != 0)
2824 pmap->pm_stats.wired_count++;
2825 pmap_resident_count_inc(pmap, 1);
2828 * Enter on the PV list if part of our managed memory.
2830 if ((new_l3 & PTE_SW_MANAGED) != 0) {
2832 pv = get_pv_entry(pmap, &lock);
2835 CHANGE_PV_LIST_LOCK_TO_PHYS(&lock, pa);
2836 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
2838 if ((new_l3 & PTE_W) != 0)
2839 vm_page_aflag_set(m, PGA_WRITEABLE);
2844 * Sync the i-cache on all harts before updating the PTE
2845 * if the new PTE is executable.
2847 if (prot & VM_PROT_EXECUTE)
2848 pmap_sync_icache(pmap, va, PAGE_SIZE);
2851 * Update the L3 entry.
2854 orig_l3 = pmap_load_store(l3, new_l3);
2855 pmap_invalidate_page(pmap, va);
2856 KASSERT(PTE_TO_PHYS(orig_l3) == pa,
2857 ("pmap_enter: invalid update"));
2858 if ((orig_l3 & (PTE_D | PTE_SW_MANAGED)) ==
2859 (PTE_D | PTE_SW_MANAGED))
2862 pmap_store(l3, new_l3);
2865 #if VM_NRESERVLEVEL > 0
2866 if (mpte != NULL && mpte->ref_count == Ln_ENTRIES &&
2867 pmap_ps_enabled(pmap) &&
2868 (m->flags & PG_FICTITIOUS) == 0 &&
2869 vm_reserv_level_iffullpop(m) == 0)
2870 pmap_promote_l2(pmap, l2, va, &lock);
2877 rw_runlock(&pvh_global_lock);
2883 * Tries to create a read- and/or execute-only 2MB page mapping. Returns true
2884 * if successful. Returns false if (1) a page table page cannot be allocated
2885 * without sleeping, (2) a mapping already exists at the specified virtual
2886 * address, or (3) a PV entry cannot be allocated without reclaiming another
2890 pmap_enter_2mpage(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
2891 struct rwlock **lockp)
2896 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2898 pn = VM_PAGE_TO_PHYS(m) / PAGE_SIZE;
2899 new_l2 = (pd_entry_t)((pn << PTE_PPN0_S) | PTE_R | PTE_V);
2900 if ((m->oflags & VPO_UNMANAGED) == 0)
2901 new_l2 |= PTE_SW_MANAGED;
2902 if ((prot & VM_PROT_EXECUTE) != 0)
2904 if (va < VM_MAXUSER_ADDRESS)
2906 return (pmap_enter_l2(pmap, va, new_l2, PMAP_ENTER_NOSLEEP |
2907 PMAP_ENTER_NOREPLACE | PMAP_ENTER_NORECLAIM, NULL, lockp) ==
2912 * Tries to create the specified 2MB page mapping. Returns KERN_SUCCESS if
2913 * the mapping was created, and either KERN_FAILURE or KERN_RESOURCE_SHORTAGE
2914 * otherwise. Returns KERN_FAILURE if PMAP_ENTER_NOREPLACE was specified and
2915 * a mapping already exists at the specified virtual address. Returns
2916 * KERN_RESOURCE_SHORTAGE if PMAP_ENTER_NOSLEEP was specified and a page table
2917 * page allocation failed. Returns KERN_RESOURCE_SHORTAGE if
2918 * PMAP_ENTER_NORECLAIM was specified and a PV entry allocation failed.
2920 * The parameter "m" is only used when creating a managed, writeable mapping.
2923 pmap_enter_l2(pmap_t pmap, vm_offset_t va, pd_entry_t new_l2, u_int flags,
2924 vm_page_t m, struct rwlock **lockp)
2926 struct spglist free;
2927 pd_entry_t *l2, *l3, oldl2;
2931 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2933 if ((l2pg = pmap_alloc_l2(pmap, va, (flags & PMAP_ENTER_NOSLEEP) != 0 ?
2934 NULL : lockp)) == NULL) {
2935 CTR2(KTR_PMAP, "pmap_enter_l2: failure for va %#lx in pmap %p",
2937 return (KERN_RESOURCE_SHORTAGE);
2940 l2 = (pd_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(l2pg));
2941 l2 = &l2[pmap_l2_index(va)];
2942 if ((oldl2 = pmap_load(l2)) != 0) {
2943 KASSERT(l2pg->ref_count > 1,
2944 ("pmap_enter_l2: l2pg's ref count is too low"));
2945 if ((flags & PMAP_ENTER_NOREPLACE) != 0) {
2948 "pmap_enter_l2: failure for va %#lx in pmap %p",
2950 return (KERN_FAILURE);
2953 if ((oldl2 & PTE_RWX) != 0)
2954 (void)pmap_remove_l2(pmap, l2, va,
2955 pmap_load(pmap_l1(pmap, va)), &free, lockp);
2957 for (sva = va; sva < va + L2_SIZE; sva += PAGE_SIZE) {
2958 l3 = pmap_l2_to_l3(l2, sva);
2959 if ((pmap_load(l3) & PTE_V) != 0 &&
2960 pmap_remove_l3(pmap, l3, sva, oldl2, &free,
2964 vm_page_free_pages_toq(&free, true);
2965 if (va >= VM_MAXUSER_ADDRESS) {
2967 * Both pmap_remove_l2() and pmap_remove_l3() will
2968 * leave the kernel page table page zero filled.
2970 mt = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l2)));
2971 if (pmap_insert_pt_page(pmap, mt, false))
2972 panic("pmap_enter_l2: trie insert failed");
2974 KASSERT(pmap_load(l2) == 0,
2975 ("pmap_enter_l2: non-zero L2 entry %p", l2));
2978 if ((new_l2 & PTE_SW_MANAGED) != 0) {
2980 * Abort this mapping if its PV entry could not be created.
2982 if (!pmap_pv_insert_l2(pmap, va, new_l2, flags, lockp)) {
2984 if (pmap_unwire_ptp(pmap, va, l2pg, &free)) {
2986 * Although "va" is not mapped, paging-structure
2987 * caches could nonetheless have entries that
2988 * refer to the freed page table pages.
2989 * Invalidate those entries.
2991 pmap_invalidate_page(pmap, va);
2992 vm_page_free_pages_toq(&free, true);
2995 "pmap_enter_l2: failure for va %#lx in pmap %p",
2997 return (KERN_RESOURCE_SHORTAGE);
2999 if ((new_l2 & PTE_W) != 0)
3000 for (mt = m; mt < &m[L2_SIZE / PAGE_SIZE]; mt++)
3001 vm_page_aflag_set(mt, PGA_WRITEABLE);
3005 * Increment counters.
3007 if ((new_l2 & PTE_SW_WIRED) != 0)
3008 pmap->pm_stats.wired_count += L2_SIZE / PAGE_SIZE;
3009 pmap->pm_stats.resident_count += L2_SIZE / PAGE_SIZE;
3012 * Map the superpage.
3014 pmap_store(l2, new_l2);
3016 atomic_add_long(&pmap_l2_mappings, 1);
3017 CTR2(KTR_PMAP, "pmap_enter_l2: success for va %#lx in pmap %p",
3020 return (KERN_SUCCESS);
3024 * Maps a sequence of resident pages belonging to the same object.
3025 * The sequence begins with the given page m_start. This page is
3026 * mapped at the given virtual address start. Each subsequent page is
3027 * mapped at a virtual address that is offset from start by the same
3028 * amount as the page is offset from m_start within the object. The
3029 * last page in the sequence is the page with the largest offset from
3030 * m_start that can be mapped at a virtual address less than the given
3031 * virtual address end. Not every virtual page between start and end
3032 * is mapped; only those for which a resident page exists with the
3033 * corresponding offset from m_start are mapped.
3036 pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end,
3037 vm_page_t m_start, vm_prot_t prot)
3039 struct rwlock *lock;
3042 vm_pindex_t diff, psize;
3044 VM_OBJECT_ASSERT_LOCKED(m_start->object);
3046 psize = atop(end - start);
3050 rw_rlock(&pvh_global_lock);
3052 while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) {
3053 va = start + ptoa(diff);
3054 if ((va & L2_OFFSET) == 0 && va + L2_SIZE <= end &&
3055 m->psind == 1 && pmap_ps_enabled(pmap) &&
3056 pmap_enter_2mpage(pmap, va, m, prot, &lock))
3057 m = &m[L2_SIZE / PAGE_SIZE - 1];
3059 mpte = pmap_enter_quick_locked(pmap, va, m, prot, mpte,
3061 m = TAILQ_NEXT(m, listq);
3065 rw_runlock(&pvh_global_lock);
3070 * this code makes some *MAJOR* assumptions:
3071 * 1. Current pmap & pmap exists.
3074 * 4. No page table pages.
3075 * but is *MUCH* faster than pmap_enter...
3079 pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
3081 struct rwlock *lock;
3084 rw_rlock(&pvh_global_lock);
3086 (void)pmap_enter_quick_locked(pmap, va, m, prot, NULL, &lock);
3089 rw_runlock(&pvh_global_lock);
3094 pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m,
3095 vm_prot_t prot, vm_page_t mpte, struct rwlock **lockp)
3097 struct spglist free;
3100 pt_entry_t *l3, newl3;
3102 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva ||
3103 (m->oflags & VPO_UNMANAGED) != 0,
3104 ("pmap_enter_quick_locked: managed mapping within the clean submap"));
3105 rw_assert(&pvh_global_lock, RA_LOCKED);
3106 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
3108 CTR2(KTR_PMAP, "pmap_enter_quick_locked: %p %lx", pmap, va);
3110 * In the case that a page table page is not
3111 * resident, we are creating it here.
3113 if (va < VM_MAXUSER_ADDRESS) {
3114 vm_pindex_t l2pindex;
3117 * Calculate pagetable page index
3119 l2pindex = pmap_l2_pindex(va);
3120 if (mpte && (mpte->pindex == l2pindex)) {
3126 l2 = pmap_l2(pmap, va);
3129 * If the page table page is mapped, we just increment
3130 * the hold count, and activate it. Otherwise, we
3131 * attempt to allocate a page table page. If this
3132 * attempt fails, we don't retry. Instead, we give up.
3134 if (l2 != NULL && pmap_load(l2) != 0) {
3135 phys = PTE_TO_PHYS(pmap_load(l2));
3136 mpte = PHYS_TO_VM_PAGE(phys);
3140 * Pass NULL instead of the PV list lock
3141 * pointer, because we don't intend to sleep.
3143 mpte = _pmap_alloc_l3(pmap, l2pindex, NULL);
3148 l3 = (pt_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mpte));
3149 l3 = &l3[pmap_l3_index(va)];
3152 l3 = pmap_l3(kernel_pmap, va);
3155 panic("pmap_enter_quick_locked: No l3");
3156 if (pmap_load(l3) != 0) {
3165 * Enter on the PV list if part of our managed memory.
3167 if ((m->oflags & VPO_UNMANAGED) == 0 &&
3168 !pmap_try_insert_pv_entry(pmap, va, m, lockp)) {
3171 if (pmap_unwire_ptp(pmap, va, mpte, &free)) {
3172 pmap_invalidate_page(pmap, va);
3173 vm_page_free_pages_toq(&free, false);
3181 * Increment counters
3183 pmap_resident_count_inc(pmap, 1);
3185 newl3 = ((VM_PAGE_TO_PHYS(m) / PAGE_SIZE) << PTE_PPN0_S) |
3187 if ((prot & VM_PROT_EXECUTE) != 0)
3189 if ((m->oflags & VPO_UNMANAGED) == 0)
3190 newl3 |= PTE_SW_MANAGED;
3191 if (va < VM_MAX_USER_ADDRESS)
3195 * Sync the i-cache on all harts before updating the PTE
3196 * if the new PTE is executable.
3198 if (prot & VM_PROT_EXECUTE)
3199 pmap_sync_icache(pmap, va, PAGE_SIZE);
3201 pmap_store(l3, newl3);
3203 pmap_invalidate_page(pmap, va);
3208 * This code maps large physical mmap regions into the
3209 * processor address space. Note that some shortcuts
3210 * are taken, but the code works.
3213 pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, vm_object_t object,
3214 vm_pindex_t pindex, vm_size_t size)
3217 VM_OBJECT_ASSERT_WLOCKED(object);
3218 KASSERT(object->type == OBJT_DEVICE || object->type == OBJT_SG,
3219 ("pmap_object_init_pt: non-device object"));
3223 * Clear the wired attribute from the mappings for the specified range of
3224 * addresses in the given pmap. Every valid mapping within that range
3225 * must have the wired attribute set. In contrast, invalid mappings
3226 * cannot have the wired attribute set, so they are ignored.
3228 * The wired attribute of the page table entry is not a hardware feature,
3229 * so there is no need to invalidate any TLB entries.
3232 pmap_unwire(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
3234 vm_offset_t va_next;
3235 pd_entry_t *l1, *l2, l2e;
3236 pt_entry_t *l3, l3e;
3237 bool pv_lists_locked;
3239 pv_lists_locked = false;
3242 for (; sva < eva; sva = va_next) {
3243 l1 = pmap_l1(pmap, sva);
3244 if (pmap_load(l1) == 0) {
3245 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
3251 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
3255 l2 = pmap_l1_to_l2(l1, sva);
3256 if ((l2e = pmap_load(l2)) == 0)
3258 if ((l2e & PTE_RWX) != 0) {
3259 if (sva + L2_SIZE == va_next && eva >= va_next) {
3260 if ((l2e & PTE_SW_WIRED) == 0)
3261 panic("pmap_unwire: l2 %#jx is missing "
3262 "PTE_SW_WIRED", (uintmax_t)l2e);
3263 pmap_clear_bits(l2, PTE_SW_WIRED);
3266 if (!pv_lists_locked) {
3267 pv_lists_locked = true;
3268 if (!rw_try_rlock(&pvh_global_lock)) {
3270 rw_rlock(&pvh_global_lock);
3275 if (!pmap_demote_l2(pmap, l2, sva))
3276 panic("pmap_unwire: demotion failed");
3282 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
3284 if ((l3e = pmap_load(l3)) == 0)
3286 if ((l3e & PTE_SW_WIRED) == 0)
3287 panic("pmap_unwire: l3 %#jx is missing "
3288 "PTE_SW_WIRED", (uintmax_t)l3e);
3291 * PG_W must be cleared atomically. Although the pmap
3292 * lock synchronizes access to PG_W, another processor
3293 * could be setting PG_M and/or PG_A concurrently.
3295 pmap_clear_bits(l3, PTE_SW_WIRED);
3296 pmap->pm_stats.wired_count--;
3299 if (pv_lists_locked)
3300 rw_runlock(&pvh_global_lock);
3305 * Copy the range specified by src_addr/len
3306 * from the source map to the range dst_addr/len
3307 * in the destination map.
3309 * This routine is only advisory and need not do anything.
3313 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len,
3314 vm_offset_t src_addr)
3320 * pmap_zero_page zeros the specified hardware page by mapping
3321 * the page into KVM and using bzero to clear its contents.
3324 pmap_zero_page(vm_page_t m)
3326 vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
3328 pagezero((void *)va);
3332 * pmap_zero_page_area zeros the specified hardware page by mapping
3333 * the page into KVM and using bzero to clear its contents.
3335 * off and size may not cover an area beyond a single hardware page.
3338 pmap_zero_page_area(vm_page_t m, int off, int size)
3340 vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
3342 if (off == 0 && size == PAGE_SIZE)
3343 pagezero((void *)va);
3345 bzero((char *)va + off, size);
3349 * pmap_copy_page copies the specified (machine independent)
3350 * page by mapping the page into virtual memory and using
3351 * bcopy to copy the page, one machine dependent page at a
3355 pmap_copy_page(vm_page_t msrc, vm_page_t mdst)
3357 vm_offset_t src = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(msrc));
3358 vm_offset_t dst = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mdst));
3360 pagecopy((void *)src, (void *)dst);
3363 int unmapped_buf_allowed = 1;
3366 pmap_copy_pages(vm_page_t ma[], vm_offset_t a_offset, vm_page_t mb[],
3367 vm_offset_t b_offset, int xfersize)
3371 vm_paddr_t p_a, p_b;
3372 vm_offset_t a_pg_offset, b_pg_offset;
3375 while (xfersize > 0) {
3376 a_pg_offset = a_offset & PAGE_MASK;
3377 m_a = ma[a_offset >> PAGE_SHIFT];
3378 p_a = m_a->phys_addr;
3379 b_pg_offset = b_offset & PAGE_MASK;
3380 m_b = mb[b_offset >> PAGE_SHIFT];
3381 p_b = m_b->phys_addr;
3382 cnt = min(xfersize, PAGE_SIZE - a_pg_offset);
3383 cnt = min(cnt, PAGE_SIZE - b_pg_offset);
3384 if (__predict_false(!PHYS_IN_DMAP(p_a))) {
3385 panic("!DMAP a %lx", p_a);
3387 a_cp = (char *)PHYS_TO_DMAP(p_a) + a_pg_offset;
3389 if (__predict_false(!PHYS_IN_DMAP(p_b))) {
3390 panic("!DMAP b %lx", p_b);
3392 b_cp = (char *)PHYS_TO_DMAP(p_b) + b_pg_offset;
3394 bcopy(a_cp, b_cp, cnt);
3402 pmap_quick_enter_page(vm_page_t m)
3405 return (PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m)));
3409 pmap_quick_remove_page(vm_offset_t addr)
3414 * Returns true if the pmap's pv is one of the first
3415 * 16 pvs linked to from this page. This count may
3416 * be changed upwards or downwards in the future; it
3417 * is only necessary that true be returned for a small
3418 * subset of pmaps for proper page aging.
3421 pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
3423 struct md_page *pvh;
3424 struct rwlock *lock;
3429 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3430 ("pmap_page_exists_quick: page %p is not managed", m));
3432 rw_rlock(&pvh_global_lock);
3433 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3435 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3436 if (PV_PMAP(pv) == pmap) {
3444 if (!rv && loops < 16 && (m->flags & PG_FICTITIOUS) == 0) {
3445 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
3446 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
3447 if (PV_PMAP(pv) == pmap) {
3457 rw_runlock(&pvh_global_lock);
3462 * pmap_page_wired_mappings:
3464 * Return the number of managed mappings to the given physical page
3468 pmap_page_wired_mappings(vm_page_t m)
3470 struct md_page *pvh;
3471 struct rwlock *lock;
3476 int count, md_gen, pvh_gen;
3478 if ((m->oflags & VPO_UNMANAGED) != 0)
3480 rw_rlock(&pvh_global_lock);
3481 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3485 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3487 if (!PMAP_TRYLOCK(pmap)) {
3488 md_gen = m->md.pv_gen;
3492 if (md_gen != m->md.pv_gen) {
3497 l3 = pmap_l3(pmap, pv->pv_va);
3498 if ((pmap_load(l3) & PTE_SW_WIRED) != 0)
3502 if ((m->flags & PG_FICTITIOUS) == 0) {
3503 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
3504 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
3506 if (!PMAP_TRYLOCK(pmap)) {
3507 md_gen = m->md.pv_gen;
3508 pvh_gen = pvh->pv_gen;
3512 if (md_gen != m->md.pv_gen ||
3513 pvh_gen != pvh->pv_gen) {
3518 l2 = pmap_l2(pmap, pv->pv_va);
3519 if ((pmap_load(l2) & PTE_SW_WIRED) != 0)
3525 rw_runlock(&pvh_global_lock);
3530 * Returns true if the given page is mapped individually or as part of
3531 * a 2mpage. Otherwise, returns false.
3534 pmap_page_is_mapped(vm_page_t m)
3536 struct rwlock *lock;
3539 if ((m->oflags & VPO_UNMANAGED) != 0)
3541 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3543 rv = !TAILQ_EMPTY(&m->md.pv_list) ||
3544 ((m->flags & PG_FICTITIOUS) == 0 &&
3545 !TAILQ_EMPTY(&pa_to_pvh(VM_PAGE_TO_PHYS(m))->pv_list));
3551 pmap_remove_pages_pv(pmap_t pmap, vm_page_t m, pv_entry_t pv,
3552 struct spglist *free, bool superpage)
3554 struct md_page *pvh;
3558 pmap_resident_count_dec(pmap, Ln_ENTRIES);
3559 pvh = pa_to_pvh(m->phys_addr);
3560 TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
3562 if (TAILQ_EMPTY(&pvh->pv_list)) {
3563 for (mt = m; mt < &m[Ln_ENTRIES]; mt++)
3564 if (TAILQ_EMPTY(&mt->md.pv_list) &&
3565 (mt->a.flags & PGA_WRITEABLE) != 0)
3566 vm_page_aflag_clear(mt, PGA_WRITEABLE);
3568 mpte = pmap_remove_pt_page(pmap, pv->pv_va);
3570 KASSERT(mpte->valid == VM_PAGE_BITS_ALL,
3571 ("pmap_remove_pages: pte page not promoted"));
3572 pmap_resident_count_dec(pmap, 1);
3573 KASSERT(mpte->ref_count == Ln_ENTRIES,
3574 ("pmap_remove_pages: pte page ref count error"));
3575 mpte->ref_count = 0;
3576 pmap_add_delayed_free_list(mpte, free, FALSE);
3579 pmap_resident_count_dec(pmap, 1);
3580 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
3582 if (TAILQ_EMPTY(&m->md.pv_list) &&
3583 (m->a.flags & PGA_WRITEABLE) != 0) {
3584 pvh = pa_to_pvh(m->phys_addr);
3585 if (TAILQ_EMPTY(&pvh->pv_list))
3586 vm_page_aflag_clear(m, PGA_WRITEABLE);
3592 * Destroy all managed, non-wired mappings in the given user-space
3593 * pmap. This pmap cannot be active on any processor besides the
3596 * This function cannot be applied to the kernel pmap. Moreover, it
3597 * is not intended for general use. It is only to be used during
3598 * process termination. Consequently, it can be implemented in ways
3599 * that make it faster than pmap_remove(). First, it can more quickly
3600 * destroy mappings by iterating over the pmap's collection of PV
3601 * entries, rather than searching the page table. Second, it doesn't
3602 * have to test and clear the page table entries atomically, because
3603 * no processor is currently accessing the user address space. In
3604 * particular, a page table entry's dirty bit won't change state once
3605 * this function starts.
3608 pmap_remove_pages(pmap_t pmap)
3610 struct spglist free;
3612 pt_entry_t *pte, tpte;
3615 struct pv_chunk *pc, *npc;
3616 struct rwlock *lock;
3618 uint64_t inuse, bitmask;
3619 int allfree, field, freed, idx;
3625 rw_rlock(&pvh_global_lock);
3627 TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) {
3630 for (field = 0; field < _NPCM; field++) {
3631 inuse = ~pc->pc_map[field] & pc_freemask[field];
3632 while (inuse != 0) {
3633 bit = ffsl(inuse) - 1;
3634 bitmask = 1UL << bit;
3635 idx = field * 64 + bit;
3636 pv = &pc->pc_pventry[idx];
3639 pte = pmap_l1(pmap, pv->pv_va);
3640 ptepde = pmap_load(pte);
3641 pte = pmap_l1_to_l2(pte, pv->pv_va);
3642 tpte = pmap_load(pte);
3643 if ((tpte & PTE_RWX) != 0) {
3647 pte = pmap_l2_to_l3(pte, pv->pv_va);
3648 tpte = pmap_load(pte);
3653 * We cannot remove wired pages from a
3654 * process' mapping at this time.
3656 if (tpte & PTE_SW_WIRED) {
3661 m = PHYS_TO_VM_PAGE(PTE_TO_PHYS(tpte));
3662 KASSERT((m->flags & PG_FICTITIOUS) != 0 ||
3663 m < &vm_page_array[vm_page_array_size],
3664 ("pmap_remove_pages: bad pte %#jx",
3670 * Update the vm_page_t clean/reference bits.
3672 if ((tpte & (PTE_D | PTE_W)) ==
3676 mt < &m[Ln_ENTRIES]; mt++)
3682 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(&lock, m);
3685 pc->pc_map[field] |= bitmask;
3687 pmap_remove_pages_pv(pmap, m, pv, &free,
3689 pmap_unuse_pt(pmap, pv->pv_va, ptepde, &free);
3693 PV_STAT(atomic_add_long(&pv_entry_frees, freed));
3694 PV_STAT(atomic_add_int(&pv_entry_spare, freed));
3695 PV_STAT(atomic_subtract_long(&pv_entry_count, freed));
3697 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
3703 pmap_invalidate_all(pmap);
3704 rw_runlock(&pvh_global_lock);
3706 vm_page_free_pages_toq(&free, false);
3710 pmap_page_test_mappings(vm_page_t m, boolean_t accessed, boolean_t modified)
3712 struct md_page *pvh;
3713 struct rwlock *lock;
3715 pt_entry_t *l3, mask;
3718 int md_gen, pvh_gen;
3728 rw_rlock(&pvh_global_lock);
3729 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3732 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3734 if (!PMAP_TRYLOCK(pmap)) {
3735 md_gen = m->md.pv_gen;
3739 if (md_gen != m->md.pv_gen) {
3744 l3 = pmap_l3(pmap, pv->pv_va);
3745 rv = (pmap_load(l3) & mask) == mask;
3750 if ((m->flags & PG_FICTITIOUS) == 0) {
3751 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
3752 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
3754 if (!PMAP_TRYLOCK(pmap)) {
3755 md_gen = m->md.pv_gen;
3756 pvh_gen = pvh->pv_gen;
3760 if (md_gen != m->md.pv_gen ||
3761 pvh_gen != pvh->pv_gen) {
3766 l2 = pmap_l2(pmap, pv->pv_va);
3767 rv = (pmap_load(l2) & mask) == mask;
3775 rw_runlock(&pvh_global_lock);
3782 * Return whether or not the specified physical page was modified
3783 * in any physical maps.
3786 pmap_is_modified(vm_page_t m)
3789 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3790 ("pmap_is_modified: page %p is not managed", m));
3793 * If the page is not busied then this check is racy.
3795 if (!pmap_page_is_write_mapped(m))
3797 return (pmap_page_test_mappings(m, FALSE, TRUE));
3801 * pmap_is_prefaultable:
3803 * Return whether or not the specified virtual address is eligible
3807 pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr)
3814 l3 = pmap_l3(pmap, addr);
3815 if (l3 != NULL && pmap_load(l3) != 0) {
3823 * pmap_is_referenced:
3825 * Return whether or not the specified physical page was referenced
3826 * in any physical maps.
3829 pmap_is_referenced(vm_page_t m)
3832 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3833 ("pmap_is_referenced: page %p is not managed", m));
3834 return (pmap_page_test_mappings(m, TRUE, FALSE));
3838 * Clear the write and modified bits in each of the given page's mappings.
3841 pmap_remove_write(vm_page_t m)
3843 struct md_page *pvh;
3844 struct rwlock *lock;
3847 pt_entry_t *l3, oldl3, newl3;
3848 pv_entry_t next_pv, pv;
3850 int md_gen, pvh_gen;
3852 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3853 ("pmap_remove_write: page %p is not managed", m));
3854 vm_page_assert_busied(m);
3856 if (!pmap_page_is_write_mapped(m))
3858 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3859 pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy :
3860 pa_to_pvh(VM_PAGE_TO_PHYS(m));
3861 rw_rlock(&pvh_global_lock);
3864 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_next, next_pv) {
3866 if (!PMAP_TRYLOCK(pmap)) {
3867 pvh_gen = pvh->pv_gen;
3871 if (pvh_gen != pvh->pv_gen) {
3878 l2 = pmap_l2(pmap, va);
3879 if ((pmap_load(l2) & PTE_W) != 0)
3880 (void)pmap_demote_l2_locked(pmap, l2, va, &lock);
3881 KASSERT(lock == VM_PAGE_TO_PV_LIST_LOCK(m),
3882 ("inconsistent pv lock %p %p for page %p",
3883 lock, VM_PAGE_TO_PV_LIST_LOCK(m), m));
3886 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3888 if (!PMAP_TRYLOCK(pmap)) {
3889 pvh_gen = pvh->pv_gen;
3890 md_gen = m->md.pv_gen;
3894 if (pvh_gen != pvh->pv_gen || md_gen != m->md.pv_gen) {
3900 l3 = pmap_l3(pmap, pv->pv_va);
3901 oldl3 = pmap_load(l3);
3903 if ((oldl3 & PTE_W) != 0) {
3904 newl3 = oldl3 & ~(PTE_D | PTE_W);
3905 if (!atomic_fcmpset_long(l3, &oldl3, newl3))
3907 if ((oldl3 & PTE_D) != 0)
3909 pmap_invalidate_page(pmap, pv->pv_va);
3914 vm_page_aflag_clear(m, PGA_WRITEABLE);
3915 rw_runlock(&pvh_global_lock);
3919 * pmap_ts_referenced:
3921 * Return a count of reference bits for a page, clearing those bits.
3922 * It is not necessary for every reference bit to be cleared, but it
3923 * is necessary that 0 only be returned when there are truly no
3924 * reference bits set.
3926 * As an optimization, update the page's dirty field if a modified bit is
3927 * found while counting reference bits. This opportunistic update can be
3928 * performed at low cost and can eliminate the need for some future calls
3929 * to pmap_is_modified(). However, since this function stops after
3930 * finding PMAP_TS_REFERENCED_MAX reference bits, it may not detect some
3931 * dirty pages. Those dirty pages will only be detected by a future call
3932 * to pmap_is_modified().
3935 pmap_ts_referenced(vm_page_t m)
3937 struct spglist free;
3938 struct md_page *pvh;
3939 struct rwlock *lock;
3942 pd_entry_t *l2, l2e;
3943 pt_entry_t *l3, l3e;
3946 int cleared, md_gen, not_cleared, pvh_gen;
3948 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3949 ("pmap_ts_referenced: page %p is not managed", m));
3952 pa = VM_PAGE_TO_PHYS(m);
3953 pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy : pa_to_pvh(pa);
3955 lock = PHYS_TO_PV_LIST_LOCK(pa);
3956 rw_rlock(&pvh_global_lock);
3960 if ((pvf = TAILQ_FIRST(&pvh->pv_list)) == NULL)
3961 goto small_mappings;
3965 if (!PMAP_TRYLOCK(pmap)) {
3966 pvh_gen = pvh->pv_gen;
3970 if (pvh_gen != pvh->pv_gen) {
3976 l2 = pmap_l2(pmap, va);
3977 l2e = pmap_load(l2);
3978 if ((l2e & (PTE_W | PTE_D)) == (PTE_W | PTE_D)) {
3980 * Although l2e is mapping a 2MB page, because
3981 * this function is called at a 4KB page granularity,
3982 * we only update the 4KB page under test.
3986 if ((l2e & PTE_A) != 0) {
3988 * Since this reference bit is shared by 512 4KB
3989 * pages, it should not be cleared every time it is
3990 * tested. Apply a simple "hash" function on the
3991 * physical page number, the virtual superpage number,
3992 * and the pmap address to select one 4KB page out of
3993 * the 512 on which testing the reference bit will
3994 * result in clearing that reference bit. This
3995 * function is designed to avoid the selection of the
3996 * same 4KB page for every 2MB page mapping.
3998 * On demotion, a mapping that hasn't been referenced
3999 * is simply destroyed. To avoid the possibility of a
4000 * subsequent page fault on a demoted wired mapping,
4001 * always leave its reference bit set. Moreover,
4002 * since the superpage is wired, the current state of
4003 * its reference bit won't affect page replacement.
4005 if ((((pa >> PAGE_SHIFT) ^ (pv->pv_va >> L2_SHIFT) ^
4006 (uintptr_t)pmap) & (Ln_ENTRIES - 1)) == 0 &&
4007 (l2e & PTE_SW_WIRED) == 0) {
4008 pmap_clear_bits(l2, PTE_A);
4009 pmap_invalidate_page(pmap, va);
4015 /* Rotate the PV list if it has more than one entry. */
4016 if (pv != NULL && TAILQ_NEXT(pv, pv_next) != NULL) {
4017 TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
4018 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_next);
4021 if (cleared + not_cleared >= PMAP_TS_REFERENCED_MAX)
4023 } while ((pv = TAILQ_FIRST(&pvh->pv_list)) != pvf);
4025 if ((pvf = TAILQ_FIRST(&m->md.pv_list)) == NULL)
4030 if (!PMAP_TRYLOCK(pmap)) {
4031 pvh_gen = pvh->pv_gen;
4032 md_gen = m->md.pv_gen;
4036 if (pvh_gen != pvh->pv_gen || md_gen != m->md.pv_gen) {
4041 l2 = pmap_l2(pmap, pv->pv_va);
4043 KASSERT((pmap_load(l2) & PTE_RX) == 0,
4044 ("pmap_ts_referenced: found an invalid l2 table"));
4046 l3 = pmap_l2_to_l3(l2, pv->pv_va);
4047 l3e = pmap_load(l3);
4048 if ((l3e & PTE_D) != 0)
4050 if ((l3e & PTE_A) != 0) {
4051 if ((l3e & PTE_SW_WIRED) == 0) {
4053 * Wired pages cannot be paged out so
4054 * doing accessed bit emulation for
4055 * them is wasted effort. We do the
4056 * hard work for unwired pages only.
4058 pmap_clear_bits(l3, PTE_A);
4059 pmap_invalidate_page(pmap, pv->pv_va);
4065 /* Rotate the PV list if it has more than one entry. */
4066 if (pv != NULL && TAILQ_NEXT(pv, pv_next) != NULL) {
4067 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
4068 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
4071 } while ((pv = TAILQ_FIRST(&m->md.pv_list)) != pvf && cleared +
4072 not_cleared < PMAP_TS_REFERENCED_MAX);
4075 rw_runlock(&pvh_global_lock);
4076 vm_page_free_pages_toq(&free, false);
4077 return (cleared + not_cleared);
4081 * Apply the given advice to the specified range of addresses within the
4082 * given pmap. Depending on the advice, clear the referenced and/or
4083 * modified flags in each mapping and set the mapped page's dirty field.
4086 pmap_advise(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, int advice)
4091 * Clear the modify bits on the specified physical page.
4094 pmap_clear_modify(vm_page_t m)
4096 struct md_page *pvh;
4097 struct rwlock *lock;
4099 pv_entry_t next_pv, pv;
4100 pd_entry_t *l2, oldl2;
4103 int md_gen, pvh_gen;
4105 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
4106 ("pmap_clear_modify: page %p is not managed", m));
4107 vm_page_assert_busied(m);
4109 if (!pmap_page_is_write_mapped(m))
4113 * If the page is not PGA_WRITEABLE, then no PTEs can have PG_M set.
4114 * If the object containing the page is locked and the page is not
4115 * exclusive busied, then PGA_WRITEABLE cannot be concurrently set.
4117 if ((m->a.flags & PGA_WRITEABLE) == 0)
4119 pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy :
4120 pa_to_pvh(VM_PAGE_TO_PHYS(m));
4121 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
4122 rw_rlock(&pvh_global_lock);
4125 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_next, next_pv) {
4127 if (!PMAP_TRYLOCK(pmap)) {
4128 pvh_gen = pvh->pv_gen;
4132 if (pvh_gen != pvh->pv_gen) {
4138 l2 = pmap_l2(pmap, va);
4139 oldl2 = pmap_load(l2);
4140 /* If oldl2 has PTE_W set, then it also has PTE_D set. */
4141 if ((oldl2 & PTE_W) != 0 &&
4142 pmap_demote_l2_locked(pmap, l2, va, &lock) &&
4143 (oldl2 & PTE_SW_WIRED) == 0) {
4145 * Write protect the mapping to a single page so that
4146 * a subsequent write access may repromote.
4148 va += VM_PAGE_TO_PHYS(m) - PTE_TO_PHYS(oldl2);
4149 l3 = pmap_l2_to_l3(l2, va);
4150 pmap_clear_bits(l3, PTE_D | PTE_W);
4152 pmap_invalidate_page(pmap, va);
4156 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
4158 if (!PMAP_TRYLOCK(pmap)) {
4159 md_gen = m->md.pv_gen;
4160 pvh_gen = pvh->pv_gen;
4164 if (pvh_gen != pvh->pv_gen || md_gen != m->md.pv_gen) {
4169 l2 = pmap_l2(pmap, pv->pv_va);
4170 KASSERT((pmap_load(l2) & PTE_RWX) == 0,
4171 ("pmap_clear_modify: found a 2mpage in page %p's pv list",
4173 l3 = pmap_l2_to_l3(l2, pv->pv_va);
4174 if ((pmap_load(l3) & (PTE_D | PTE_W)) == (PTE_D | PTE_W)) {
4175 pmap_clear_bits(l3, PTE_D | PTE_W);
4176 pmap_invalidate_page(pmap, pv->pv_va);
4181 rw_runlock(&pvh_global_lock);
4185 pmap_mapbios(vm_paddr_t pa, vm_size_t size)
4188 return ((void *)PHYS_TO_DMAP(pa));
4192 pmap_unmapbios(vm_paddr_t pa, vm_size_t size)
4197 * Sets the memory attribute for the specified page.
4200 pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma)
4203 m->md.pv_memattr = ma;
4207 * Perform the pmap work for mincore(2). If the page is not both referenced and
4208 * modified by this pmap, returns its physical address so that the caller can
4209 * find other mappings.
4212 pmap_mincore(pmap_t pmap, vm_offset_t addr, vm_paddr_t *pap)
4214 pt_entry_t *l2, *l3, tpte;
4220 l2 = pmap_l2(pmap, addr);
4221 if (l2 != NULL && ((tpte = pmap_load(l2)) & PTE_V) != 0) {
4222 if ((tpte & PTE_RWX) != 0) {
4223 pa = PTE_TO_PHYS(tpte) | (addr & L2_OFFSET);
4224 val = MINCORE_INCORE | MINCORE_SUPER;
4226 l3 = pmap_l2_to_l3(l2, addr);
4227 tpte = pmap_load(l3);
4228 if ((tpte & PTE_V) == 0) {
4232 pa = PTE_TO_PHYS(tpte) | (addr & L3_OFFSET);
4233 val = MINCORE_INCORE;
4236 if ((tpte & PTE_D) != 0)
4237 val |= MINCORE_MODIFIED | MINCORE_MODIFIED_OTHER;
4238 if ((tpte & PTE_A) != 0)
4239 val |= MINCORE_REFERENCED | MINCORE_REFERENCED_OTHER;
4240 managed = (tpte & PTE_SW_MANAGED) == PTE_SW_MANAGED;
4245 if ((val & (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER)) !=
4246 (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER) && managed) {
4254 pmap_activate_sw(struct thread *td)
4256 pmap_t oldpmap, pmap;
4259 oldpmap = PCPU_GET(curpmap);
4260 pmap = vmspace_pmap(td->td_proc->p_vmspace);
4261 if (pmap == oldpmap)
4263 load_satp(pmap->pm_satp);
4265 hart = PCPU_GET(hart);
4267 CPU_SET_ATOMIC(hart, &pmap->pm_active);
4268 CPU_CLR_ATOMIC(hart, &oldpmap->pm_active);
4270 CPU_SET(hart, &pmap->pm_active);
4271 CPU_CLR(hart, &oldpmap->pm_active);
4273 PCPU_SET(curpmap, pmap);
4279 pmap_activate(struct thread *td)
4283 pmap_activate_sw(td);
4288 pmap_activate_boot(pmap_t pmap)
4292 hart = PCPU_GET(hart);
4294 CPU_SET_ATOMIC(hart, &pmap->pm_active);
4296 CPU_SET(hart, &pmap->pm_active);
4298 PCPU_SET(curpmap, pmap);
4302 pmap_sync_icache(pmap_t pmap, vm_offset_t va, vm_size_t sz)
4307 * From the RISC-V User-Level ISA V2.2:
4309 * "To make a store to instruction memory visible to all
4310 * RISC-V harts, the writing hart has to execute a data FENCE
4311 * before requesting that all remote RISC-V harts execute a
4314 * However, this is slightly misleading; we still need to
4315 * perform a FENCE.I for the local hart, as FENCE does nothing
4316 * for its icache. FENCE.I alone is also sufficient for the
4321 CPU_CLR(PCPU_GET(hart), &mask);
4323 if (!CPU_EMPTY(&mask) && smp_started) {
4325 sbi_remote_fence_i(mask.__bits);
4331 * Increase the starting virtual address of the given mapping if a
4332 * different alignment might result in more superpage mappings.
4335 pmap_align_superpage(vm_object_t object, vm_ooffset_t offset,
4336 vm_offset_t *addr, vm_size_t size)
4338 vm_offset_t superpage_offset;
4342 if (object != NULL && (object->flags & OBJ_COLORED) != 0)
4343 offset += ptoa(object->pg_color);
4344 superpage_offset = offset & L2_OFFSET;
4345 if (size - ((L2_SIZE - superpage_offset) & L2_OFFSET) < L2_SIZE ||
4346 (*addr & L2_OFFSET) == superpage_offset)
4348 if ((*addr & L2_OFFSET) < superpage_offset)
4349 *addr = (*addr & ~L2_OFFSET) + superpage_offset;
4351 *addr = ((*addr + L2_OFFSET) & ~L2_OFFSET) + superpage_offset;
4355 * Get the kernel virtual address of a set of physical pages. If there are
4356 * physical addresses not covered by the DMAP perform a transient mapping
4357 * that will be removed when calling pmap_unmap_io_transient.
4359 * \param page The pages the caller wishes to obtain the virtual
4360 * address on the kernel memory map.
4361 * \param vaddr On return contains the kernel virtual memory address
4362 * of the pages passed in the page parameter.
4363 * \param count Number of pages passed in.
4364 * \param can_fault TRUE if the thread using the mapped pages can take
4365 * page faults, FALSE otherwise.
4367 * \returns TRUE if the caller must call pmap_unmap_io_transient when
4368 * finished or FALSE otherwise.
4372 pmap_map_io_transient(vm_page_t page[], vm_offset_t vaddr[], int count,
4373 boolean_t can_fault)
4376 boolean_t needs_mapping;
4380 * Allocate any KVA space that we need, this is done in a separate
4381 * loop to prevent calling vmem_alloc while pinned.
4383 needs_mapping = FALSE;
4384 for (i = 0; i < count; i++) {
4385 paddr = VM_PAGE_TO_PHYS(page[i]);
4386 if (__predict_false(paddr >= DMAP_MAX_PHYSADDR)) {
4387 error = vmem_alloc(kernel_arena, PAGE_SIZE,
4388 M_BESTFIT | M_WAITOK, &vaddr[i]);
4389 KASSERT(error == 0, ("vmem_alloc failed: %d", error));
4390 needs_mapping = TRUE;
4392 vaddr[i] = PHYS_TO_DMAP(paddr);
4396 /* Exit early if everything is covered by the DMAP */
4402 for (i = 0; i < count; i++) {
4403 paddr = VM_PAGE_TO_PHYS(page[i]);
4404 if (paddr >= DMAP_MAX_PHYSADDR) {
4406 "pmap_map_io_transient: TODO: Map out of DMAP data");
4410 return (needs_mapping);
4414 pmap_unmap_io_transient(vm_page_t page[], vm_offset_t vaddr[], int count,
4415 boolean_t can_fault)
4422 for (i = 0; i < count; i++) {
4423 paddr = VM_PAGE_TO_PHYS(page[i]);
4424 if (paddr >= DMAP_MAX_PHYSADDR) {
4425 panic("RISCVTODO: pmap_unmap_io_transient: Unmap data");
4431 pmap_is_valid_memattr(pmap_t pmap __unused, vm_memattr_t mode)
4434 return (mode >= VM_MEMATTR_DEVICE && mode <= VM_MEMATTR_WRITE_BACK);
4438 pmap_get_tables(pmap_t pmap, vm_offset_t va, pd_entry_t **l1, pd_entry_t **l2,
4441 pd_entry_t *l1p, *l2p;
4443 /* Get l1 directory entry. */
4444 l1p = pmap_l1(pmap, va);
4447 if (l1p == NULL || (pmap_load(l1p) & PTE_V) == 0)
4450 if ((pmap_load(l1p) & PTE_RX) != 0) {
4456 /* Get l2 directory entry. */
4457 l2p = pmap_l1_to_l2(l1p, va);
4460 if (l2p == NULL || (pmap_load(l2p) & PTE_V) == 0)
4463 if ((pmap_load(l2p) & PTE_RX) != 0) {
4468 /* Get l3 page table entry. */
4469 *l3 = pmap_l2_to_l3(l2p, va);
4475 * Track a range of the kernel's virtual address space that is contiguous
4476 * in various mapping attributes.
4478 struct pmap_kernel_map_range {
4487 sysctl_kmaps_dump(struct sbuf *sb, struct pmap_kernel_map_range *range,
4491 if (eva <= range->sva)
4494 sbuf_printf(sb, "0x%016lx-0x%016lx r%c%c%c%c %d %d %d\n",
4496 (range->attrs & PTE_W) == PTE_W ? 'w' : '-',
4497 (range->attrs & PTE_X) == PTE_X ? 'x' : '-',
4498 (range->attrs & PTE_U) == PTE_U ? 'u' : 's',
4499 (range->attrs & PTE_G) == PTE_G ? 'g' : '-',
4500 range->l1pages, range->l2pages, range->l3pages);
4502 /* Reset to sentinel value. */
4503 range->sva = 0xfffffffffffffffful;
4507 * Determine whether the attributes specified by a page table entry match those
4508 * being tracked by the current range.
4511 sysctl_kmaps_match(struct pmap_kernel_map_range *range, pt_entry_t attrs)
4514 return (range->attrs == attrs);
4518 sysctl_kmaps_reinit(struct pmap_kernel_map_range *range, vm_offset_t va,
4522 memset(range, 0, sizeof(*range));
4524 range->attrs = attrs;
4528 * Given a leaf PTE, derive the mapping's attributes. If they do not match
4529 * those of the current run, dump the address range and its attributes, and
4533 sysctl_kmaps_check(struct sbuf *sb, struct pmap_kernel_map_range *range,
4534 vm_offset_t va, pd_entry_t l1e, pd_entry_t l2e, pt_entry_t l3e)
4538 /* The PTE global bit is inherited by lower levels. */
4539 attrs = l1e & PTE_G;
4540 if ((l1e & PTE_RWX) != 0)
4541 attrs |= l1e & (PTE_RWX | PTE_U);
4543 attrs |= l2e & PTE_G;
4544 if ((l2e & PTE_RWX) != 0)
4545 attrs |= l2e & (PTE_RWX | PTE_U);
4547 attrs |= l3e & (PTE_RWX | PTE_U | PTE_G);
4549 if (range->sva > va || !sysctl_kmaps_match(range, attrs)) {
4550 sysctl_kmaps_dump(sb, range, va);
4551 sysctl_kmaps_reinit(range, va, attrs);
4556 sysctl_kmaps(SYSCTL_HANDLER_ARGS)
4558 struct pmap_kernel_map_range range;
4559 struct sbuf sbuf, *sb;
4560 pd_entry_t l1e, *l2, l2e;
4561 pt_entry_t *l3, l3e;
4566 error = sysctl_wire_old_buffer(req, 0);
4570 sbuf_new_for_sysctl(sb, NULL, PAGE_SIZE, req);
4572 /* Sentinel value. */
4573 range.sva = 0xfffffffffffffffful;
4576 * Iterate over the kernel page tables without holding the kernel pmap
4577 * lock. Kernel page table pages are never freed, so at worst we will
4578 * observe inconsistencies in the output.
4580 sva = VM_MIN_KERNEL_ADDRESS;
4581 for (i = pmap_l1_index(sva); i < Ln_ENTRIES; i++) {
4582 if (i == pmap_l1_index(DMAP_MIN_ADDRESS))
4583 sbuf_printf(sb, "\nDirect map:\n");
4584 else if (i == pmap_l1_index(VM_MIN_KERNEL_ADDRESS))
4585 sbuf_printf(sb, "\nKernel map:\n");
4587 l1e = kernel_pmap->pm_l1[i];
4588 if ((l1e & PTE_V) == 0) {
4589 sysctl_kmaps_dump(sb, &range, sva);
4593 if ((l1e & PTE_RWX) != 0) {
4594 sysctl_kmaps_check(sb, &range, sva, l1e, 0, 0);
4599 pa = PTE_TO_PHYS(l1e);
4600 l2 = (pd_entry_t *)PHYS_TO_DMAP(pa);
4602 for (j = pmap_l2_index(sva); j < Ln_ENTRIES; j++) {
4604 if ((l2e & PTE_V) == 0) {
4605 sysctl_kmaps_dump(sb, &range, sva);
4609 if ((l2e & PTE_RWX) != 0) {
4610 sysctl_kmaps_check(sb, &range, sva, l1e, l2e, 0);
4615 pa = PTE_TO_PHYS(l2e);
4616 l3 = (pd_entry_t *)PHYS_TO_DMAP(pa);
4618 for (k = pmap_l3_index(sva); k < Ln_ENTRIES; k++,
4621 if ((l3e & PTE_V) == 0) {
4622 sysctl_kmaps_dump(sb, &range, sva);
4625 sysctl_kmaps_check(sb, &range, sva,
4632 error = sbuf_finish(sb);
4636 SYSCTL_OID(_vm_pmap, OID_AUTO, kernel_maps,
4637 CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_MPSAFE,
4638 NULL, 0, sysctl_kmaps, "A",
4639 "Dump kernel address layout");