1 //===-- MBlazeAsmParser.cpp - Parse MBlaze asm to MCInst instructions -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #include "MCTargetDesc/MBlazeBaseInfo.h"
11 #include "llvm/ADT/SmallVector.h"
12 #include "llvm/ADT/Twine.h"
13 #include "llvm/MC/MCExpr.h"
14 #include "llvm/MC/MCInst.h"
15 #include "llvm/MC/MCParser/MCAsmLexer.h"
16 #include "llvm/MC/MCParser/MCAsmParser.h"
17 #include "llvm/MC/MCParser/MCParsedAsmOperand.h"
18 #include "llvm/MC/MCStreamer.h"
19 #include "llvm/MC/MCTargetAsmParser.h"
20 #include "llvm/Support/SourceMgr.h"
21 #include "llvm/Support/TargetRegistry.h"
22 #include "llvm/Support/raw_ostream.h"
28 class MBlazeAsmParser : public MCTargetAsmParser {
31 MCAsmParser &getParser() const { return Parser; }
32 MCAsmLexer &getLexer() const { return Parser.getLexer(); }
34 void Warning(SMLoc L, const Twine &Msg) { Parser.Warning(L, Msg); }
35 bool Error(SMLoc L, const Twine &Msg) { return Parser.Error(L, Msg); }
37 MBlazeOperand *ParseMemory(SmallVectorImpl<MCParsedAsmOperand*> &Operands);
38 MBlazeOperand *ParseRegister();
39 MBlazeOperand *ParseRegister(SMLoc &StartLoc, SMLoc &EndLoc);
40 MBlazeOperand *ParseImmediate();
41 MBlazeOperand *ParseFsl();
42 MBlazeOperand* ParseOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands);
44 virtual bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc);
46 bool ParseDirectiveWord(unsigned Size, SMLoc L);
48 bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
49 SmallVectorImpl<MCParsedAsmOperand*> &Operands,
50 MCStreamer &Out, unsigned &ErrorInfo,
51 bool MatchingInlineAsm);
53 /// @name Auto-generated Match Functions
56 #define GET_ASSEMBLER_HEADER
57 #include "MBlazeGenAsmMatcher.inc"
62 MBlazeAsmParser(MCSubtargetInfo &_STI, MCAsmParser &_Parser)
63 : MCTargetAsmParser(), Parser(_Parser) {}
65 virtual bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
67 SmallVectorImpl<MCParsedAsmOperand*> &Operands);
69 virtual bool ParseDirective(AsmToken DirectiveID);
72 /// MBlazeOperand - Instances of this class represent a parsed MBlaze machine
74 struct MBlazeOperand : public MCParsedAsmOperand {
83 SMLoc StartLoc, EndLoc;
113 struct FslImmOp FslImm;
116 MBlazeOperand(KindTy K) : MCParsedAsmOperand(), Kind(K) {}
118 MBlazeOperand(const MBlazeOperand &o) : MCParsedAsmOperand() {
120 StartLoc = o.StartLoc;
141 /// getStartLoc - Get the location of the first token of this operand.
142 SMLoc getStartLoc() const { return StartLoc; }
144 /// getEndLoc - Get the location of the last token of this operand.
145 SMLoc getEndLoc() const { return EndLoc; }
147 unsigned getReg() const {
148 assert(Kind == Register && "Invalid access!");
152 const MCExpr *getImm() const {
153 assert(Kind == Immediate && "Invalid access!");
157 const MCExpr *getFslImm() const {
158 assert(Kind == Fsl && "Invalid access!");
162 unsigned getMemBase() const {
163 assert(Kind == Memory && "Invalid access!");
167 const MCExpr* getMemOff() const {
168 assert(Kind == Memory && "Invalid access!");
172 unsigned getMemOffReg() const {
173 assert(Kind == Memory && "Invalid access!");
177 bool isToken() const { return Kind == Token; }
178 bool isImm() const { return Kind == Immediate; }
179 bool isMem() const { return Kind == Memory; }
180 bool isFsl() const { return Kind == Fsl; }
181 bool isReg() const { return Kind == Register; }
183 void addExpr(MCInst &Inst, const MCExpr *Expr) const {
184 // Add as immediates when possible. Null MCExpr = 0.
186 Inst.addOperand(MCOperand::CreateImm(0));
187 else if (const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(Expr))
188 Inst.addOperand(MCOperand::CreateImm(CE->getValue()));
190 Inst.addOperand(MCOperand::CreateExpr(Expr));
193 void addRegOperands(MCInst &Inst, unsigned N) const {
194 assert(N == 1 && "Invalid number of operands!");
195 Inst.addOperand(MCOperand::CreateReg(getReg()));
198 void addImmOperands(MCInst &Inst, unsigned N) const {
199 assert(N == 1 && "Invalid number of operands!");
200 addExpr(Inst, getImm());
203 void addFslOperands(MCInst &Inst, unsigned N) const {
204 assert(N == 1 && "Invalid number of operands!");
205 addExpr(Inst, getFslImm());
208 void addMemOperands(MCInst &Inst, unsigned N) const {
209 assert(N == 2 && "Invalid number of operands!");
211 Inst.addOperand(MCOperand::CreateReg(getMemBase()));
213 unsigned RegOff = getMemOffReg();
215 Inst.addOperand(MCOperand::CreateReg(RegOff));
217 addExpr(Inst, getMemOff());
220 StringRef getToken() const {
221 assert(Kind == Token && "Invalid access!");
222 return StringRef(Tok.Data, Tok.Length);
225 virtual void print(raw_ostream &OS) const;
227 static MBlazeOperand *CreateToken(StringRef Str, SMLoc S) {
228 MBlazeOperand *Op = new MBlazeOperand(Token);
229 Op->Tok.Data = Str.data();
230 Op->Tok.Length = Str.size();
236 static MBlazeOperand *CreateReg(unsigned RegNum, SMLoc S, SMLoc E) {
237 MBlazeOperand *Op = new MBlazeOperand(Register);
238 Op->Reg.RegNum = RegNum;
244 static MBlazeOperand *CreateImm(const MCExpr *Val, SMLoc S, SMLoc E) {
245 MBlazeOperand *Op = new MBlazeOperand(Immediate);
252 static MBlazeOperand *CreateFslImm(const MCExpr *Val, SMLoc S, SMLoc E) {
253 MBlazeOperand *Op = new MBlazeOperand(Fsl);
260 static MBlazeOperand *CreateMem(unsigned Base, const MCExpr *Off, SMLoc S,
262 MBlazeOperand *Op = new MBlazeOperand(Memory);
271 static MBlazeOperand *CreateMem(unsigned Base, unsigned Off, SMLoc S,
273 MBlazeOperand *Op = new MBlazeOperand(Memory);
275 Op->Mem.OffReg = Off;
283 } // end anonymous namespace.
285 void MBlazeOperand::print(raw_ostream &OS) const {
292 OS << getMBlazeRegisterNumbering(getReg()) << ">";
295 OS << "'" << getToken() << "'";
299 OS << getMBlazeRegisterNumbering(getMemBase());
302 unsigned RegOff = getMemOffReg();
304 OS << "R" << getMBlazeRegisterNumbering(RegOff);
311 getFslImm()->print(OS);
316 /// @name Auto-generated Match Functions
319 static unsigned MatchRegisterName(StringRef Name);
323 bool MBlazeAsmParser::
324 MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
325 SmallVectorImpl<MCParsedAsmOperand*> &Operands,
326 MCStreamer &Out, unsigned &ErrorInfo,
327 bool MatchingInlineAsm) {
329 switch (MatchInstructionImpl(Operands, Inst, ErrorInfo,
330 MatchingInlineAsm)) {
333 Out.EmitInstruction(Inst);
335 case Match_MissingFeature:
336 return Error(IDLoc, "instruction use requires an option to be enabled");
337 case Match_MnemonicFail:
338 return Error(IDLoc, "unrecognized instruction mnemonic");
339 case Match_InvalidOperand: {
340 SMLoc ErrorLoc = IDLoc;
341 if (ErrorInfo != ~0U) {
342 if (ErrorInfo >= Operands.size())
343 return Error(IDLoc, "too few operands for instruction");
345 ErrorLoc = ((MBlazeOperand*)Operands[ErrorInfo])->getStartLoc();
346 if (ErrorLoc == SMLoc()) ErrorLoc = IDLoc;
349 return Error(ErrorLoc, "invalid operand for instruction");
353 llvm_unreachable("Implement any new match types added!");
356 MBlazeOperand *MBlazeAsmParser::
357 ParseMemory(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
358 if (Operands.size() != 4)
361 MBlazeOperand &Base = *(MBlazeOperand*)Operands[2];
362 MBlazeOperand &Offset = *(MBlazeOperand*)Operands[3];
364 SMLoc S = Base.getStartLoc();
365 SMLoc O = Offset.getStartLoc();
366 SMLoc E = Offset.getEndLoc();
369 Error(S, "base address must be a register");
373 if (!Offset.isReg() && !Offset.isImm()) {
374 Error(O, "offset must be a register or immediate");
380 Op = MBlazeOperand::CreateMem(Base.getReg(), Offset.getReg(), S, E);
382 Op = MBlazeOperand::CreateMem(Base.getReg(), Offset.getImm(), S, E);
384 delete Operands.pop_back_val();
385 delete Operands.pop_back_val();
386 Operands.push_back(Op);
391 bool MBlazeAsmParser::ParseRegister(unsigned &RegNo,
392 SMLoc &StartLoc, SMLoc &EndLoc) {
393 MBlazeOperand *Reg = ParseRegister(StartLoc, EndLoc);
396 RegNo = Reg->getReg();
400 MBlazeOperand *MBlazeAsmParser::ParseRegister() {
402 return ParseRegister(S, E);
405 MBlazeOperand *MBlazeAsmParser::ParseRegister(SMLoc &StartLoc, SMLoc &EndLoc) {
406 StartLoc = Parser.getTok().getLoc();
407 EndLoc = Parser.getTok().getEndLoc();
409 if (getLexer().getKind() != AsmToken::Identifier)
412 unsigned RegNo = MatchRegisterName(getLexer().getTok().getIdentifier());
417 return MBlazeOperand::CreateReg(RegNo, StartLoc, EndLoc);
420 static unsigned MatchFslRegister(StringRef String) {
421 if (!String.startswith("rfsl"))
425 if (String.substr(4).getAsInteger(10,regNum))
431 MBlazeOperand *MBlazeAsmParser::ParseFsl() {
432 SMLoc S = Parser.getTok().getLoc();
433 SMLoc E = Parser.getTok().getEndLoc();
435 switch (getLexer().getKind()) {
437 case AsmToken::Identifier:
438 unsigned reg = MatchFslRegister(getLexer().getTok().getIdentifier());
443 const MCExpr *EVal = MCConstantExpr::Create(reg,getContext());
444 return MBlazeOperand::CreateFslImm(EVal,S,E);
448 MBlazeOperand *MBlazeAsmParser::ParseImmediate() {
449 SMLoc S = Parser.getTok().getLoc();
450 SMLoc E = Parser.getTok().getEndLoc();
453 switch (getLexer().getKind()) {
455 case AsmToken::LParen:
457 case AsmToken::Minus:
458 case AsmToken::Integer:
459 case AsmToken::Identifier:
460 if (getParser().parseExpression(EVal))
463 return MBlazeOperand::CreateImm(EVal, S, E);
467 MBlazeOperand *MBlazeAsmParser::
468 ParseOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
471 // Attempt to parse the next token as a register name
472 Op = ParseRegister();
474 // Attempt to parse the next token as an FSL immediate
478 // Attempt to parse the next token as an immediate
480 Op = ParseImmediate();
482 // If the token could not be parsed then fail
484 Error(Parser.getTok().getLoc(), "unknown operand");
488 // Push the parsed operand into the list of operands
489 Operands.push_back(Op);
493 /// Parse an mblaze instruction mnemonic followed by its operands.
494 bool MBlazeAsmParser::
495 ParseInstruction(ParseInstructionInfo &Info, StringRef Name, SMLoc NameLoc,
496 SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
497 // The first operands is the token for the instruction name
498 size_t dotLoc = Name.find('.');
499 Operands.push_back(MBlazeOperand::CreateToken(Name.substr(0,dotLoc),NameLoc));
500 if (dotLoc < Name.size())
501 Operands.push_back(MBlazeOperand::CreateToken(Name.substr(dotLoc),NameLoc));
503 // If there are no more operands then finish
504 if (getLexer().is(AsmToken::EndOfStatement))
507 // Parse the first operand
508 if (!ParseOperand(Operands))
511 while (getLexer().isNot(AsmToken::EndOfStatement) &&
512 getLexer().is(AsmToken::Comma)) {
513 // Consume the comma token
516 // Parse the next operand
517 if (!ParseOperand(Operands))
521 // If the instruction requires a memory operand then we need to
522 // replace the last two operands (base+offset) with a single
524 if (Name.startswith("lw") || Name.startswith("sw") ||
525 Name.startswith("lh") || Name.startswith("sh") ||
526 Name.startswith("lb") || Name.startswith("sb"))
527 return (ParseMemory(Operands) == NULL);
532 /// ParseDirective parses the MBlaze specific directives
533 bool MBlazeAsmParser::ParseDirective(AsmToken DirectiveID) {
534 StringRef IDVal = DirectiveID.getIdentifier();
535 if (IDVal == ".word")
536 return ParseDirectiveWord(2, DirectiveID.getLoc());
540 /// ParseDirectiveWord
541 /// ::= .word [ expression (, expression)* ]
542 bool MBlazeAsmParser::ParseDirectiveWord(unsigned Size, SMLoc L) {
543 if (getLexer().isNot(AsmToken::EndOfStatement)) {
546 if (getParser().parseExpression(Value))
549 getParser().getStreamer().EmitValue(Value, Size);
551 if (getLexer().is(AsmToken::EndOfStatement))
554 // FIXME: Improve diagnostic.
555 if (getLexer().isNot(AsmToken::Comma))
556 return Error(L, "unexpected token in directive");
565 /// Force static initialization.
566 extern "C" void LLVMInitializeMBlazeAsmParser() {
567 RegisterMCAsmParser<MBlazeAsmParser> X(TheMBlazeTarget);
570 #define GET_REGISTER_MATCHER
571 #define GET_MATCHER_IMPLEMENTATION
572 #include "MBlazeGenAsmMatcher.inc"