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47 * Module to support operations on core such as TLB config, etc.
49 * <hr>$Revision: 41586 $<hr>
53 #include "cvmx-config.h"
55 #include "cvmx-core.h"
59 * Adds a wired TLB entry, and returns the index of the entry added.
60 * Parameters are written to TLB registers without further processing.
62 * @param hi HI register value
63 * @param lo0 lo0 register value
64 * @param lo1 lo1 register value
65 * @param page_mask pagemask register value
67 * @return Success: TLB index used (0-31) or (0-63) for OCTEON Plus
70 int cvmx_core_add_wired_tlb_entry(uint64_t hi, uint64_t lo0, uint64_t lo1, cvmx_tlb_pagemask_t page_mask)
73 uint32_t index_limit = 31;
75 if (!OCTEON_IS_MODEL(OCTEON_CN3XXX))
80 CVMX_MF_TLB_WIRED(index);
81 if (index >= index_limit)
85 CVMX_MT_ENTRY_HIGH(hi);
86 CVMX_MT_ENTRY_LO_0(lo0);
87 CVMX_MT_ENTRY_LO_1(lo1);
88 CVMX_MT_PAGEMASK(page_mask);
89 CVMX_MT_TLB_INDEX(index);
90 CVMX_MT_TLB_WIRED(index + 1);
100 * Adds a fixed (wired) TLB mapping. Returns TLB index used or -1 on error.
101 * This is a wrapper around cvmx_core_add_wired_tlb_entry()
103 * @param vaddr Virtual address to map
104 * @param page0_addr page 0 physical address, with low 3 bits representing the DIRTY, VALID, and GLOBAL bits
105 * @param page1_addr page1 physical address, with low 3 bits representing the DIRTY, VALID, and GLOBAL bits
106 * @param page_mask page mask.
108 * @return Success: TLB index used (0-31)
111 int cvmx_core_add_fixed_tlb_mapping_bits(uint64_t vaddr, uint64_t page0_addr, uint64_t page1_addr, cvmx_tlb_pagemask_t page_mask)
114 if ((vaddr & (page_mask | 0x7ff))
115 || ((page0_addr & ~0x7ULL) & ((page_mask | 0x7ff) >> 1))
116 || ((page1_addr & ~0x7ULL) & ((page_mask | 0x7ff) >> 1)))
118 cvmx_dprintf("Error adding tlb mapping: invalid address alignment at vaddr: 0x%llx\n", (unsigned long long)vaddr);
123 return(cvmx_core_add_wired_tlb_entry(vaddr,
124 (page0_addr >> 6) | (page0_addr & 0x7),
125 (page1_addr >> 6) | (page1_addr & 0x7),
130 * Adds a fixed (wired) TLB mapping. Returns TLB index used or -1 on error.
131 * Assumes both pages are valid. Use cvmx_core_add_fixed_tlb_mapping_bits for more control.
132 * This is a wrapper around cvmx_core_add_wired_tlb_entry()
134 * @param vaddr Virtual address to map
135 * @param page0_addr page 0 physical address
136 * @param page1_addr page1 physical address
137 * @param page_mask page mask.
139 * @return Success: TLB index used (0-31)
142 int cvmx_core_add_fixed_tlb_mapping(uint64_t vaddr, uint64_t page0_addr, uint64_t page1_addr, cvmx_tlb_pagemask_t page_mask)
145 return(cvmx_core_add_fixed_tlb_mapping_bits(vaddr, page0_addr | TLB_DIRTY | TLB_VALID | TLB_GLOBAL, page1_addr | TLB_DIRTY | TLB_VALID | TLB_GLOBAL, page_mask));