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47 * Interface to RAID block. This is not available on all chips.
49 * <hr>$Revision: 41586 $<hr>
52 #ifndef __CVMX_RAID_H__
53 #define __CVMX_RAID_H__
60 * This structure defines the type of command words the RAID block
68 uint64_t reserved_37_63 : 27; /**< Must be zero */
69 uint64_t q_cmp : 1; /**< Indicates whether the Q pipe is in normal mode (CWORD[Q_CMP]=0) or in non-zero
70 byte detect mode (CWORD[Q_CMP]=1).
71 In non-zero byte detect mode, the Q OWORD[PTR] result is the non-zero detect
72 result, which indicates the position of the first non-zero byte in the pipe result bytes.
73 CWORD[Q_CMP] must not be set when CWORD[QOUT]=0, and must not be set
74 when CWORD[Q_XOR] is set. */
75 uint64_t p_cmp : 1; /**< Indicates whether the P pipe is in normal mode (CWORD[P_CMP]=0) or in non-zero
76 byte detect mode (CWORD[P_CMP]=1).
77 In non-zero byte detect mode, the P OWORD[PTR] result is the non-zero detect
78 result, which indicates the position of the first non-zero byte in the pipe result bytes.
79 CWORD[P_CMP] must not be set when CWORD[POUT]=0, and must not be set
80 when CWORD[P_XOR] is set. */
81 uint64_t q_xor : 1; /**< Indicates whether the Q output buffer bytes are the normal Q pipe result or the
82 normal Q pipe result exclusive-OR'ed with the P pipe result.
83 When CWORD[Q_XOR]=0 (and CWORD[Q_CMP]=0), the Q output buffer bytes are
84 the normal Q pipe result, which does not include the P pipe result in any way.
85 When CWORD[Q_XOR]=1, the Q output buffer bytes are the normal Q pipe result
86 exclusive-OR'ed with the P pipe result, as if the P pipe result were another Q IWORD
87 for the Q pipe with QMULT=1.
88 CWORD[Q_XOR] must not be set unless both CWORD[POUT,QOUT] are set, and
89 must not be set when CWORD[Q_CMP] is set. */
90 uint64_t p_xor : 1; /**< Indicates whether the P output buffer bytes are the normal P pipe result or the
91 normal P pipe result exclusive-OR'ed with the Q pipe result.
92 When CWORD[P_XOR]=0 (and CWORD[P_CMP]=0), the P output buffer bytes are
93 the normal P pipe result, which does not include the Q pipe result in any way.
94 When CWORD[P_XOR]=1, the P output buffer bytes are the normal P pipe result
95 exclusive-OR'ed with the Q pipe result, as if the Q pipe result were another P
97 CWORD[P_XOR] must not be set unless both CWORD[POUT,QOUT] are set, and
98 must not be set when CWORD[P_CMP] is set. */
99 uint64_t wqe : 1; /**< Indicates whether RAD submits a work queue entry or writes an L2/DRAM byte to
100 zero after completing the instruction.
101 When CWORD[WQE] is set and RESP[PTR]!=0, RAD adds the work queue entry
102 indicated by RESP[PTR] to the selected POW input queue after completing the
104 When CWORD[WQE] is clear and RESP[PTR]!=0, RAD writes the L2/DRAM byte
105 indicated by RESP[PTR] to zero after completing the instruction. */
106 uint64_t qout : 1; /**< Indicates whether the Q pipe is used by this instruction.
107 If CWORD[QOUT] is set, IWORD[QEN] must be set for at least one IWORD.
108 At least one of CWORD[QOUT,POUT] must be set. */
109 uint64_t pout : 1; /**< Indicates whether the P pipe is used by this instruction.
110 If CWORD[POUT] is set, IWORD[PEN] must be set for at least one IWORD.
111 At least one of CWORD[QOUT,POUT] must be set. */
112 uint64_t iword : 6; /**< Indicates the number of input buffers used.
113 1 <= CWORD[IWORD] <= 32. */
114 uint64_t size : 24; /**< Indicates the size in bytes of all input buffers. When CWORD[Q_CMP,P_CMP]=0,
115 also indicates the size of the Q/P output buffers.
116 CWORD[SIZE] must be a multiple of 8B (i.e. <2:0> must be zero). */
120 uint64_t reserved_58_63 : 6; /**< Must be zero */
121 uint64_t fw : 1; /**< When set, indicates that RAD can modify any byte in any (128B) cache line touched
122 by L2/DRAM addresses OWORD[PTR] through OWORD[PTR]+CWORD[SIZE]1.
123 Setting OWORD[FW] can improve hardware performance, as some DRAM loads can
124 be avoided on L2 cache misses. The Q OWORD[FW] must not be set when
125 CWORD[Q_CMP] is set, and the P OWORD[FW] must not be set when
126 CWORD[P_CMP] is set. */
127 uint64_t nc : 1; /**< When set, indicates that RAD should not allocate L2 cache space for the P/Q data on
129 OWORD[NC] should typically be clear, though setting OWORD[NC] can improve
130 performance in some circumstances, as the L2 cache will not be polluted by P/Q data.
131 The Q OWORD[NC] must not be set when CWORD[Q_CMP] is set, and the P
132 OWORD[NC] must not be set when CWORD[P_CMP] is set. */
133 uint64_t reserved_40_55 : 16; /**< Must be zero */
134 uint64_t addr : 40; /**< When CWORD[P_CMP,Q_CMP]=0, OWORD[PTR] indicates the starting address of
135 the L2/DRAM buffer that will receive the P/Q data. In the non-compare mode, the
136 output buffer receives all of the output buffer bytes.
137 When CWORD[P_CMP,Q_CMP]=1, the corresponding P/Q pipe is in compare mode,
138 and the only output of the pipe is the non-zero detect result. In this case,
139 OWORD[PTR] indicates the 8-byte location of the non-zero detect result. */
143 uint64_t reserved_57_63 : 7; /**< Must be zero */
144 uint64_t nc : 1; /**< When set, indicates that RAD should not allocate L2 cache space for this input buffer
145 data on L2 cache misses.
146 Setting IWORD[NC] may improve performance in some circumstances, as the L2
147 cache may not be polluted with input buffer data. */
148 uint64_t reserved_50_55 : 6; /**< Must be zero */
149 uint64_t qen : 1; /**< Indicates that this input buffer data should participate in the Q pipe result.
150 The Q pipe hardware multiplies each participating input byte by IWORD[QMULT]
151 before accumulating them by exclusive-OR'ing.
152 IWORD[QEN] must not be set when CWORD[QOUT] is not set.
153 If CWORD[QOUT] is set, IWORD[QEN] must be set for at least one IWORD. */
154 uint64_t pen : 1; /**< Indicates that this input buffer data should participate in the P pipe result.
155 The P pipe hardware accumulates each participating input byte by bit-wise
157 IWORD[PEN] must not be set when CWORD[POUT] is not set.
158 If CWORD[POUT] is set, IWORD[PEN] must be set for at least one IWORD. */
159 uint64_t qmult : 8; /**< The Q pipe multiplier for the input buffer. Section 26.1 above describes the GF(28)
160 multiplication algorithm.
161 IWORD[QMULT] must be zero when IWORD[QEN] is not set.
162 IWORD[QMULT] must not be zero when IWORD[QEN] is set.
163 When IWORD[QMULT] is 1, the multiplication simplifies to the identity function,
164 and the Q pipe performs the same XOR function as the P pipe. */
165 uint64_t addr : 40; /**< The starting address of the input buffer in L2/DRAM.
166 IWORD[PTR] must be naturally-aligned on an 8 byte boundary (i.e. <2:0> must be
172 * Initialize the RAID block
174 * @param polynomial Coefficients for the RAID polynomial
176 * @return Zero on success, negative on failure
178 int cvmx_raid_initialize(cvmx_rad_reg_polynomial_t polynomial);
181 * Shutdown the RAID block. RAID must be idle when
182 * this function is called.
184 * @return Zero on success, negative on failure
186 int cvmx_raid_shutdown(void);
189 * Submit a command to the RAID block
191 * @param num_words Number of command words to submit
192 * @param words Command words
194 * @return Zero on success, negative on failure
196 int cvmx_raid_submit(int num_words, cvmx_raid_word_t words[]);
202 #endif // __CVMX_CMD_QUEUE_H__