sys/dev/sound/pci/hda/hdac.c

   1 /*-
   2  * Copyright (c) 2006 Stephane E. Potvin <sepotvin@videotron.ca>
   3  * Copyright (c) 2006 Ariff Abdullah <ariff@FreeBSD.org>
   4  * Copyright (c) 2008 Alexander Motin <mav@FreeBSD.org>
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in the
  14  *    documentation and/or other materials provided with the distribution.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  26  * SUCH DAMAGE.
  27  */
  28
  29 /*
  30  * Intel High Definition Audio (Controller) driver for FreeBSD. Be advised
  31  * that this driver still in its early stage, and possible of rewrite are
  32  * pretty much guaranteed. There are supposedly several distinct parent/child
  33  * busses to make this "perfect", but as for now and for the sake of
  34  * simplicity, everything is gobble up within single source.
  35  *
  36  * List of subsys:
  37  *     1) HDA Controller support
  38  *     2) HDA Codecs support, which may include
  39  *        - HDA
  40  *        - Modem
  41  *     3) Widget parser - the real magic of why this driver works on so
  42  *        many hardwares with minimal vendor specific quirk. The original
  43  *        parser was written using Ruby and can be found at
  44  *        http://people.freebsd.org/~ariff/HDA/parser.rb . This crude
  45  *        ruby parser take the verbose dmesg dump as its input. Refer to
  46  *        http://www.microsoft.com/whdc/device/audio/default.mspx for various
  47  *        interesting documents, especially UAA (Universal Audio Architecture).
  48  *     4) Possible vendor specific support.
  49  *        (snd_hda_intel, snd_hda_ati, etc..)
  50  *
  51  * Thanks to Ahmad Ubaidah Omar @ Defenxis Sdn. Bhd. for the
  52  * Compaq V3000 with Conexant HDA.
  53  *
  54  *    * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
  55  *    *                                                                 *
  56  *    *        This driver is a collaborative effort made by:           *
  57  *    *                                                                 *
  58  *    *          Stephane E. Potvin <sepotvin@videotron.ca>             *
  59  *    *               Andrea Bittau <a.bittau@cs.ucl.ac.uk>             *
  60  *    *               Wesley Morgan <morganw@chemikals.org>             *
  61  *    *              Daniel Eischen <deischen@FreeBSD.org>              *
  62  *    *             Maxime Guillaud <bsd-ports@mguillaud.net>           *
  63  *    *              Ariff Abdullah <ariff@FreeBSD.org>                 *
  64  *    *             Alexander Motin <mav@FreeBSD.org>                   *
  65  *    *                                                                 *
  66  *    *   ....and various people from freebsd-multimedia@FreeBSD.org    *
  67  *    *                                                                 *
  68  *    * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
  69  */
  70
  71 #ifdef HAVE_KERNEL_OPTION_HEADERS
  72 #include "opt_snd.h"
  73 #endif
  74
  75 #include <dev/sound/pcm/sound.h>
  76 #include <dev/pci/pcireg.h>
  77 #include <dev/pci/pcivar.h>
  78
  79 #include <sys/ctype.h>
  80 #include <sys/taskqueue.h>
  81
  82 #include <dev/sound/pci/hda/hdac_private.h>
  83 #include <dev/sound/pci/hda/hdac_reg.h>
  84 #include <dev/sound/pci/hda/hda_reg.h>
  85 #include <dev/sound/pci/hda/hdac.h>
  86
  87 #include "mixer_if.h"
  88
  89 #define HDA_DRV_TEST_REV        "20100226_0142"
  90
  91 SND_DECLARE_FILE("$FreeBSD$");
  92
  93 #define HDA_BOOTVERBOSE(stmt)   do {                    \
  94         if (bootverbose != 0 || snd_verbose > 3) {      \
  95                 stmt                                    \
  96         }                                               \
  97 } while (0)
  98
  99 #define HDA_BOOTHVERBOSE(stmt)  do {                    \
 100         if (snd_verbose > 3) {                          \
 101                 stmt                                    \
 102         }                                               \
 103 } while (0)
 104
 105 #if 1
 106 #undef HDAC_INTR_EXTRA
 107 #define HDAC_INTR_EXTRA         1
 108 #endif
 109
 110 #define hdac_lock(sc)           snd_mtxlock((sc)->lock)
 111 #define hdac_unlock(sc)         snd_mtxunlock((sc)->lock)
 112 #define hdac_lockassert(sc)     snd_mtxassert((sc)->lock)
 113 #define hdac_lockowned(sc)      mtx_owned((sc)->lock)
 114
 115 #define HDA_FLAG_MATCH(fl, v)   (((fl) & (v)) == (v))
 116 #define HDA_DEV_MATCH(fl, v)    ((fl) == (v) || \
 117                                 (fl) == 0xffffffff || \
 118                                 (((fl) & 0xffff0000) == 0xffff0000 && \
 119                                 ((fl) & 0x0000ffff) == ((v) & 0x0000ffff)) || \
 120                                 (((fl) & 0x0000ffff) == 0x0000ffff && \
 121                                 ((fl) & 0xffff0000) == ((v) & 0xffff0000)))
 122 #define HDA_MATCH_ALL           0xffffffff
 123 #define HDAC_INVALID            0xffffffff
 124
 125 /* Default controller / jack sense poll: 250ms */
 126 #define HDAC_POLL_INTERVAL      max(hz >> 2, 1)
 127
 128 /*
 129  * Make room for possible 4096 playback/record channels, in 100 years to come.
 130  */
 131 #define HDAC_TRIGGER_NONE       0x00000000
 132 #define HDAC_TRIGGER_PLAY       0x00000fff
 133 #define HDAC_TRIGGER_REC        0x00fff000
 134 #define HDAC_TRIGGER_UNSOL      0x80000000
 135
 136 #define HDA_MODEL_CONSTRUCT(vendor, model)      \
 137                 (((uint32_t)(model) << 16) | ((vendor##_VENDORID) & 0xffff))
 138
 139 /* Controller models */
 140
 141 /* Intel */
 142 #define INTEL_VENDORID          0x8086
 143 #define HDA_INTEL_82801F        HDA_MODEL_CONSTRUCT(INTEL, 0x2668)
 144 #define HDA_INTEL_63XXESB       HDA_MODEL_CONSTRUCT(INTEL, 0x269a)
 145 #define HDA_INTEL_82801G        HDA_MODEL_CONSTRUCT(INTEL, 0x27d8)
 146 #define HDA_INTEL_82801H        HDA_MODEL_CONSTRUCT(INTEL, 0x284b)
 147 #define HDA_INTEL_82801I        HDA_MODEL_CONSTRUCT(INTEL, 0x293e)
 148 #define HDA_INTEL_82801JI       HDA_MODEL_CONSTRUCT(INTEL, 0x3a3e)
 149 #define HDA_INTEL_82801JD       HDA_MODEL_CONSTRUCT(INTEL, 0x3a6e)
 150 #define HDA_INTEL_PCH           HDA_MODEL_CONSTRUCT(INTEL, 0x3b56)
 151 #define HDA_INTEL_SCH           HDA_MODEL_CONSTRUCT(INTEL, 0x811b)
 152 #define HDA_INTEL_ALL           HDA_MODEL_CONSTRUCT(INTEL, 0xffff)
 153
 154 /* Nvidia */
 155 #define NVIDIA_VENDORID         0x10de
 156 #define HDA_NVIDIA_MCP51        HDA_MODEL_CONSTRUCT(NVIDIA, 0x026c)
 157 #define HDA_NVIDIA_MCP55        HDA_MODEL_CONSTRUCT(NVIDIA, 0x0371)
 158 #define HDA_NVIDIA_MCP61_1      HDA_MODEL_CONSTRUCT(NVIDIA, 0x03e4)
 159 #define HDA_NVIDIA_MCP61_2      HDA_MODEL_CONSTRUCT(NVIDIA, 0x03f0)
 160 #define HDA_NVIDIA_MCP65_1      HDA_MODEL_CONSTRUCT(NVIDIA, 0x044a)
 161 #define HDA_NVIDIA_MCP65_2      HDA_MODEL_CONSTRUCT(NVIDIA, 0x044b)
 162 #define HDA_NVIDIA_MCP67_1      HDA_MODEL_CONSTRUCT(NVIDIA, 0x055c)
 163 #define HDA_NVIDIA_MCP67_2      HDA_MODEL_CONSTRUCT(NVIDIA, 0x055d)
 164 #define HDA_NVIDIA_MCP78_1      HDA_MODEL_CONSTRUCT(NVIDIA, 0x0774)
 165 #define HDA_NVIDIA_MCP78_2      HDA_MODEL_CONSTRUCT(NVIDIA, 0x0775)
 166 #define HDA_NVIDIA_MCP78_3      HDA_MODEL_CONSTRUCT(NVIDIA, 0x0776)
 167 #define HDA_NVIDIA_MCP78_4      HDA_MODEL_CONSTRUCT(NVIDIA, 0x0777)
 168 #define HDA_NVIDIA_MCP73_1      HDA_MODEL_CONSTRUCT(NVIDIA, 0x07fc)
 169 #define HDA_NVIDIA_MCP73_2      HDA_MODEL_CONSTRUCT(NVIDIA, 0x07fd)
 170 #define HDA_NVIDIA_MCP79_1      HDA_MODEL_CONSTRUCT(NVIDIA, 0x0ac0)
 171 #define HDA_NVIDIA_MCP79_2      HDA_MODEL_CONSTRUCT(NVIDIA, 0x0ac1)
 172 #define HDA_NVIDIA_MCP79_3      HDA_MODEL_CONSTRUCT(NVIDIA, 0x0ac2)
 173 #define HDA_NVIDIA_MCP79_4      HDA_MODEL_CONSTRUCT(NVIDIA, 0x0ac3)
 174 #define HDA_NVIDIA_MCP89_1      HDA_MODEL_CONSTRUCT(NVIDIA, 0x0d94)
 175 #define HDA_NVIDIA_MCP89_2      HDA_MODEL_CONSTRUCT(NVIDIA, 0x0d95)
 176 #define HDA_NVIDIA_MCP89_3      HDA_MODEL_CONSTRUCT(NVIDIA, 0x0d96)
 177 #define HDA_NVIDIA_MCP89_4      HDA_MODEL_CONSTRUCT(NVIDIA, 0x0d97)
 178 #define HDA_NVIDIA_ALL          HDA_MODEL_CONSTRUCT(NVIDIA, 0xffff)
 179
 180 /* ATI */
 181 #define ATI_VENDORID            0x1002
 182 #define HDA_ATI_SB450           HDA_MODEL_CONSTRUCT(ATI, 0x437b)
 183 #define HDA_ATI_SB600           HDA_MODEL_CONSTRUCT(ATI, 0x4383)
 184 #define HDA_ATI_RS600           HDA_MODEL_CONSTRUCT(ATI, 0x793b)
 185 #define HDA_ATI_RS690           HDA_MODEL_CONSTRUCT(ATI, 0x7919)
 186 #define HDA_ATI_RS780           HDA_MODEL_CONSTRUCT(ATI, 0x960f)
 187 #define HDA_ATI_R600            HDA_MODEL_CONSTRUCT(ATI, 0xaa00)
 188 #define HDA_ATI_RV630           HDA_MODEL_CONSTRUCT(ATI, 0xaa08)
 189 #define HDA_ATI_RV610           HDA_MODEL_CONSTRUCT(ATI, 0xaa10)
 190 #define HDA_ATI_RV670           HDA_MODEL_CONSTRUCT(ATI, 0xaa18)
 191 #define HDA_ATI_RV635           HDA_MODEL_CONSTRUCT(ATI, 0xaa20)
 192 #define HDA_ATI_RV620           HDA_MODEL_CONSTRUCT(ATI, 0xaa28)
 193 #define HDA_ATI_RV770           HDA_MODEL_CONSTRUCT(ATI, 0xaa30)
 194 #define HDA_ATI_RV730           HDA_MODEL_CONSTRUCT(ATI, 0xaa38)
 195 #define HDA_ATI_RV710           HDA_MODEL_CONSTRUCT(ATI, 0xaa40)
 196 #define HDA_ATI_RV740           HDA_MODEL_CONSTRUCT(ATI, 0xaa48)
 197 #define HDA_ATI_ALL             HDA_MODEL_CONSTRUCT(ATI, 0xffff)
 198
 199 /* VIA */
 200 #define VIA_VENDORID            0x1106
 201 #define HDA_VIA_VT82XX          HDA_MODEL_CONSTRUCT(VIA, 0x3288)
 202 #define HDA_VIA_ALL             HDA_MODEL_CONSTRUCT(VIA, 0xffff)
 203
 204 /* SiS */
 205 #define SIS_VENDORID            0x1039
 206 #define HDA_SIS_966             HDA_MODEL_CONSTRUCT(SIS, 0x7502)
 207 #define HDA_SIS_ALL             HDA_MODEL_CONSTRUCT(SIS, 0xffff)
 208
 209 /* ULI */
 210 #define ULI_VENDORID            0x10b9
 211 #define HDA_ULI_M5461           HDA_MODEL_CONSTRUCT(ULI, 0x5461)
 212 #define HDA_ULI_ALL             HDA_MODEL_CONSTRUCT(ULI, 0xffff)
 213
 214 /* OEM/subvendors */
 215
 216 /* Intel */
 217 #define INTEL_D101GGC_SUBVENDOR HDA_MODEL_CONSTRUCT(INTEL, 0xd600)
 218
 219 /* HP/Compaq */
 220 #define HP_VENDORID             0x103c
 221 #define HP_V3000_SUBVENDOR      HDA_MODEL_CONSTRUCT(HP, 0x30b5)
 222 #define HP_NX7400_SUBVENDOR     HDA_MODEL_CONSTRUCT(HP, 0x30a2)
 223 #define HP_NX6310_SUBVENDOR     HDA_MODEL_CONSTRUCT(HP, 0x30aa)
 224 #define HP_NX6325_SUBVENDOR     HDA_MODEL_CONSTRUCT(HP, 0x30b0)
 225 #define HP_XW4300_SUBVENDOR     HDA_MODEL_CONSTRUCT(HP, 0x3013)
 226 #define HP_3010_SUBVENDOR       HDA_MODEL_CONSTRUCT(HP, 0x3010)
 227 #define HP_DV5000_SUBVENDOR     HDA_MODEL_CONSTRUCT(HP, 0x30a5)
 228 #define HP_DC7700S_SUBVENDOR    HDA_MODEL_CONSTRUCT(HP, 0x2801)
 229 #define HP_DC7700_SUBVENDOR     HDA_MODEL_CONSTRUCT(HP, 0x2802)
 230 #define HP_ALL_SUBVENDOR        HDA_MODEL_CONSTRUCT(HP, 0xffff)
 231 /* What is wrong with XN 2563 anyway? (Got the picture ?) */
 232 #define HP_NX6325_SUBVENDORX    0x103c30b0
 233
 234 /* Dell */
 235 #define DELL_VENDORID           0x1028
 236 #define DELL_D630_SUBVENDOR     HDA_MODEL_CONSTRUCT(DELL, 0x01f9)
 237 #define DELL_D820_SUBVENDOR     HDA_MODEL_CONSTRUCT(DELL, 0x01cc)
 238 #define DELL_V1400_SUBVENDOR    HDA_MODEL_CONSTRUCT(DELL, 0x0227)
 239 #define DELL_V1500_SUBVENDOR    HDA_MODEL_CONSTRUCT(DELL, 0x0228)
 240 #define DELL_I1300_SUBVENDOR    HDA_MODEL_CONSTRUCT(DELL, 0x01c9)
 241 #define DELL_XPSM1210_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x01d7)
 242 #define DELL_OPLX745_SUBVENDOR  HDA_MODEL_CONSTRUCT(DELL, 0x01da)
 243 #define DELL_ALL_SUBVENDOR      HDA_MODEL_CONSTRUCT(DELL, 0xffff)
 244
 245 /* Clevo */
 246 #define CLEVO_VENDORID          0x1558
 247 #define CLEVO_D900T_SUBVENDOR   HDA_MODEL_CONSTRUCT(CLEVO, 0x0900)
 248 #define CLEVO_ALL_SUBVENDOR     HDA_MODEL_CONSTRUCT(CLEVO, 0xffff)
 249
 250 /* Acer */
 251 #define ACER_VENDORID           0x1025
 252 #define ACER_A5050_SUBVENDOR    HDA_MODEL_CONSTRUCT(ACER, 0x010f)
 253 #define ACER_A4520_SUBVENDOR    HDA_MODEL_CONSTRUCT(ACER, 0x0127)
 254 #define ACER_A4710_SUBVENDOR    HDA_MODEL_CONSTRUCT(ACER, 0x012f)
 255 #define ACER_A4715_SUBVENDOR    HDA_MODEL_CONSTRUCT(ACER, 0x0133)
 256 #define ACER_3681WXM_SUBVENDOR  HDA_MODEL_CONSTRUCT(ACER, 0x0110)
 257 #define ACER_T6292_SUBVENDOR    HDA_MODEL_CONSTRUCT(ACER, 0x011b)
 258 #define ACER_T5320_SUBVENDOR    HDA_MODEL_CONSTRUCT(ACER, 0x011f)
 259 #define ACER_ALL_SUBVENDOR      HDA_MODEL_CONSTRUCT(ACER, 0xffff)
 260
 261 /* Asus */
 262 #define ASUS_VENDORID           0x1043
 263 #define ASUS_A8X_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x1153)
 264 #define ASUS_U5F_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x1263)
 265 #define ASUS_W6F_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x1263)
 266 #define ASUS_A7M_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x1323)
 267 #define ASUS_F3JC_SUBVENDOR     HDA_MODEL_CONSTRUCT(ASUS, 0x1338)
 268 #define ASUS_G2K_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x1339)
 269 #define ASUS_A7T_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x13c2)
 270 #define ASUS_W2J_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x1971)
 271 #define ASUS_M5200_SUBVENDOR    HDA_MODEL_CONSTRUCT(ASUS, 0x1993)
 272 #define ASUS_P5PL2_SUBVENDOR    HDA_MODEL_CONSTRUCT(ASUS, 0x817f)
 273 #define ASUS_P1AH2_SUBVENDOR    HDA_MODEL_CONSTRUCT(ASUS, 0x81cb)
 274 #define ASUS_M2NPVMX_SUBVENDOR  HDA_MODEL_CONSTRUCT(ASUS, 0x81cb)
 275 #define ASUS_M2V_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x81e7)
 276 #define ASUS_P5BWD_SUBVENDOR    HDA_MODEL_CONSTRUCT(ASUS, 0x81ec)
 277 #define ASUS_M2N_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x8234)
 278 #define ASUS_A8NVMCSM_SUBVENDOR HDA_MODEL_CONSTRUCT(NVIDIA, 0xcb84)
 279 #define ASUS_ALL_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0xffff)
 280
 281 /* IBM / Lenovo */
 282 #define IBM_VENDORID            0x1014
 283 #define IBM_M52_SUBVENDOR       HDA_MODEL_CONSTRUCT(IBM, 0x02f6)
 284 #define IBM_ALL_SUBVENDOR       HDA_MODEL_CONSTRUCT(IBM, 0xffff)
 285
 286 /* Lenovo */
 287 #define LENOVO_VENDORID         0x17aa
 288 #define LENOVO_3KN100_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x2066)
 289 #define LENOVO_3KN200_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x384e)
 290 #define LENOVO_TCA55_SUBVENDOR  HDA_MODEL_CONSTRUCT(LENOVO, 0x1015)
 291 #define LENOVO_ALL_SUBVENDOR    HDA_MODEL_CONSTRUCT(LENOVO, 0xffff)
 292
 293 /* Samsung */
 294 #define SAMSUNG_VENDORID        0x144d
 295 #define SAMSUNG_Q1_SUBVENDOR    HDA_MODEL_CONSTRUCT(SAMSUNG, 0xc027)
 296 #define SAMSUNG_ALL_SUBVENDOR   HDA_MODEL_CONSTRUCT(SAMSUNG, 0xffff)
 297
 298 /* Medion ? */
 299 #define MEDION_VENDORID                 0x161f
 300 #define MEDION_MD95257_SUBVENDOR        HDA_MODEL_CONSTRUCT(MEDION, 0x203d)
 301 #define MEDION_ALL_SUBVENDOR            HDA_MODEL_CONSTRUCT(MEDION, 0xffff)
 302
 303 /* Apple Computer Inc. */
 304 #define APPLE_VENDORID          0x106b
 305 #define APPLE_MB3_SUBVENDOR     HDA_MODEL_CONSTRUCT(APPLE, 0x00a1)
 306
 307 /* Sony */
 308 #define SONY_VENDORID           0x104d
 309 #define SONY_S5_SUBVENDOR       HDA_MODEL_CONSTRUCT(SONY, 0x81cc)
 310 #define SONY_ALL_SUBVENDOR      HDA_MODEL_CONSTRUCT(SONY, 0xffff)
 311
 312 /*
 313  * Apple Intel MacXXXX seems using Sigmatel codec/vendor id
 314  * instead of their own, which is beyond my comprehension
 315  * (see HDA_CODEC_STAC9221 below).
 316  */
 317 #define APPLE_INTEL_MAC         0x76808384
 318 #define APPLE_MACBOOKPRO55      0xcb7910de
 319
 320 /* LG Electronics */
 321 #define LG_VENDORID             0x1854
 322 #define LG_LW20_SUBVENDOR       HDA_MODEL_CONSTRUCT(LG, 0x0018)
 323 #define LG_ALL_SUBVENDOR        HDA_MODEL_CONSTRUCT(LG, 0xffff)
 324
 325 /* Fujitsu Siemens */
 326 #define FS_VENDORID             0x1734
 327 #define FS_PA1510_SUBVENDOR     HDA_MODEL_CONSTRUCT(FS, 0x10b8)
 328 #define FS_SI1848_SUBVENDOR     HDA_MODEL_CONSTRUCT(FS, 0x10cd)
 329 #define FS_ALL_SUBVENDOR        HDA_MODEL_CONSTRUCT(FS, 0xffff)
 330
 331 /* Fujitsu Limited */
 332 #define FL_VENDORID             0x10cf
 333 #define FL_S7020D_SUBVENDOR     HDA_MODEL_CONSTRUCT(FL, 0x1326)
 334 #define FL_U1010_SUBVENDOR      HDA_MODEL_CONSTRUCT(FL, 0x142d)
 335 #define FL_ALL_SUBVENDOR        HDA_MODEL_CONSTRUCT(FL, 0xffff)
 336
 337 /* Toshiba */
 338 #define TOSHIBA_VENDORID        0x1179
 339 #define TOSHIBA_U200_SUBVENDOR  HDA_MODEL_CONSTRUCT(TOSHIBA, 0x0001)
 340 #define TOSHIBA_A135_SUBVENDOR  HDA_MODEL_CONSTRUCT(TOSHIBA, 0xff01)
 341 #define TOSHIBA_ALL_SUBVENDOR   HDA_MODEL_CONSTRUCT(TOSHIBA, 0xffff)
 342
 343 /* Micro-Star International (MSI) */
 344 #define MSI_VENDORID            0x1462
 345 #define MSI_MS1034_SUBVENDOR    HDA_MODEL_CONSTRUCT(MSI, 0x0349)
 346 #define MSI_MS034A_SUBVENDOR    HDA_MODEL_CONSTRUCT(MSI, 0x034a)
 347 #define MSI_ALL_SUBVENDOR       HDA_MODEL_CONSTRUCT(MSI, 0xffff)
 348
 349 /* Giga-Byte Technology */
 350 #define GB_VENDORID             0x1458
 351 #define GB_G33S2H_SUBVENDOR     HDA_MODEL_CONSTRUCT(GB, 0xa022)
 352 #define GP_ALL_SUBVENDOR        HDA_MODEL_CONSTRUCT(GB, 0xffff)
 353
 354 /* Uniwill ? */
 355 #define UNIWILL_VENDORID        0x1584
 356 #define UNIWILL_9075_SUBVENDOR  HDA_MODEL_CONSTRUCT(UNIWILL, 0x9075)
 357 #define UNIWILL_9080_SUBVENDOR  HDA_MODEL_CONSTRUCT(UNIWILL, 0x9080)
 358
 359
 360 /* Misc constants.. */
 361 #define HDA_AMP_VOL_DEFAULT     (-1)
 362 #define HDA_AMP_MUTE_DEFAULT    (0xffffffff)
 363 #define HDA_AMP_MUTE_NONE       (0)
 364 #define HDA_AMP_MUTE_LEFT       (1 << 0)
 365 #define HDA_AMP_MUTE_RIGHT      (1 << 1)
 366 #define HDA_AMP_MUTE_ALL        (HDA_AMP_MUTE_LEFT | HDA_AMP_MUTE_RIGHT)
 367
 368 #define HDA_AMP_LEFT_MUTED(v)   ((v) & (HDA_AMP_MUTE_LEFT))
 369 #define HDA_AMP_RIGHT_MUTED(v)  (((v) & HDA_AMP_MUTE_RIGHT) >> 1)
 370
 371 #define HDA_ADC_MONITOR         (1 << 0)
 372
 373 #define HDA_CTL_OUT             1
 374 #define HDA_CTL_IN              2
 375
 376 #define HDA_GPIO_MAX            8
 377 /* 0 - 7 = GPIO , 8 = Flush */
 378 #define HDA_QUIRK_GPIO0         (1 << 0)
 379 #define HDA_QUIRK_GPIO1         (1 << 1)
 380 #define HDA_QUIRK_GPIO2         (1 << 2)
 381 #define HDA_QUIRK_GPIO3         (1 << 3)
 382 #define HDA_QUIRK_GPIO4         (1 << 4)
 383 #define HDA_QUIRK_GPIO5         (1 << 5)
 384 #define HDA_QUIRK_GPIO6         (1 << 6)
 385 #define HDA_QUIRK_GPIO7         (1 << 7)
 386 #define HDA_QUIRK_GPIOFLUSH     (1 << 8)
 387
 388 /* 9 - 25 = anything else */
 389 #define HDA_QUIRK_SOFTPCMVOL    (1 << 9)
 390 #define HDA_QUIRK_FIXEDRATE     (1 << 10)
 391 #define HDA_QUIRK_FORCESTEREO   (1 << 11)
 392 #define HDA_QUIRK_EAPDINV       (1 << 12)
 393 #define HDA_QUIRK_DMAPOS        (1 << 13)
 394 #define HDA_QUIRK_SENSEINV      (1 << 14)
 395
 396 /* 26 - 31 = vrefs */
 397 #define HDA_QUIRK_IVREF50       (1 << 26)
 398 #define HDA_QUIRK_IVREF80       (1 << 27)
 399 #define HDA_QUIRK_IVREF100      (1 << 28)
 400 #define HDA_QUIRK_OVREF50       (1 << 29)
 401 #define HDA_QUIRK_OVREF80       (1 << 30)
 402 #define HDA_QUIRK_OVREF100      (1 << 31)
 403
 404 #define HDA_QUIRK_IVREF         (HDA_QUIRK_IVREF50 | HDA_QUIRK_IVREF80 | \
 405                                                         HDA_QUIRK_IVREF100)
 406 #define HDA_QUIRK_OVREF         (HDA_QUIRK_OVREF50 | HDA_QUIRK_OVREF80 | \
 407                                                         HDA_QUIRK_OVREF100)
 408 #define HDA_QUIRK_VREF          (HDA_QUIRK_IVREF | HDA_QUIRK_OVREF)
 409
 410 #if __FreeBSD_version < 600000
 411 #define taskqueue_drain(...)
 412 #endif
 413
 414 static const struct {
 415         char *key;
 416         uint32_t value;
 417 } hdac_quirks_tab[] = {
 418         { "gpio0", HDA_QUIRK_GPIO0 },
 419         { "gpio1", HDA_QUIRK_GPIO1 },
 420         { "gpio2", HDA_QUIRK_GPIO2 },
 421         { "gpio3", HDA_QUIRK_GPIO3 },
 422         { "gpio4", HDA_QUIRK_GPIO4 },
 423         { "gpio5", HDA_QUIRK_GPIO5 },
 424         { "gpio6", HDA_QUIRK_GPIO6 },
 425         { "gpio7", HDA_QUIRK_GPIO7 },
 426         { "gpioflush", HDA_QUIRK_GPIOFLUSH },
 427         { "softpcmvol", HDA_QUIRK_SOFTPCMVOL },
 428         { "fixedrate", HDA_QUIRK_FIXEDRATE },
 429         { "forcestereo", HDA_QUIRK_FORCESTEREO },
 430         { "eapdinv", HDA_QUIRK_EAPDINV },
 431         { "dmapos", HDA_QUIRK_DMAPOS },
 432         { "senseinv", HDA_QUIRK_SENSEINV },
 433         { "ivref50", HDA_QUIRK_IVREF50 },
 434         { "ivref80", HDA_QUIRK_IVREF80 },
 435         { "ivref100", HDA_QUIRK_IVREF100 },
 436         { "ovref50", HDA_QUIRK_OVREF50 },
 437         { "ovref80", HDA_QUIRK_OVREF80 },
 438         { "ovref100", HDA_QUIRK_OVREF100 },
 439         { "ivref", HDA_QUIRK_IVREF },
 440         { "ovref", HDA_QUIRK_OVREF },
 441         { "vref", HDA_QUIRK_VREF },
 442 };
 443 #define HDAC_QUIRKS_TAB_LEN     \
 444                 (sizeof(hdac_quirks_tab) / sizeof(hdac_quirks_tab[0]))
 445
 446 #define HDA_BDL_MIN     2
 447 #define HDA_BDL_MAX     256
 448 #define HDA_BDL_DEFAULT HDA_BDL_MIN
 449
 450 #define HDA_BLK_MIN     HDAC_DMA_ALIGNMENT
 451 #define HDA_BLK_ALIGN   (~(HDA_BLK_MIN - 1))
 452
 453 #define HDA_BUFSZ_MIN           4096
 454 #define HDA_BUFSZ_MAX           65536
 455 #define HDA_BUFSZ_DEFAULT       16384
 456
 457 #define HDA_PARSE_MAXDEPTH      10
 458
 459 #define HDAC_UNSOLTAG_EVENT_HP          0x00
 460
 461 MALLOC_DEFINE(M_HDAC, "hdac", "High Definition Audio Controller");
 462
 463 const char *HDA_COLORS[16] = {"Unknown", "Black", "Grey", "Blue", "Green", "Red",
 464     "Orange", "Yellow", "Purple", "Pink", "Res.A", "Res.B", "Res.C", "Res.D",
 465     "White", "Other"};
 466
 467 const char *HDA_DEVS[16] = {"Line-out", "Speaker", "Headphones", "CD",
 468     "SPDIF-out", "Digital-out", "Modem-line", "Modem-handset", "Line-in",
 469     "AUX", "Mic", "Telephony", "SPDIF-in", "Digital-in", "Res.E", "Other"};
 470
 471 const char *HDA_CONNS[4] = {"Jack", "None", "Fixed", "Both"};
 472
 473 /* Default */
 474 static uint32_t hdac_fmt[] = {
 475         SND_FORMAT(AFMT_S16_LE, 2, 0),
 476         0
 477 };
 478
 479 static struct pcmchan_caps hdac_caps = {48000, 48000, hdac_fmt, 0};
 480
 481 #define HDAC_NO_MSI     1
 482 #define HDAC_NO_64BIT   2
 483
 484 static const struct {
 485         uint32_t        model;
 486         char            *desc;
 487         char            flags;
 488 } hdac_devices[] = {
 489         { HDA_INTEL_82801F,  "Intel 82801F",    0 },
 490         { HDA_INTEL_63XXESB, "Intel 631x/632xESB",      0 },
 491         { HDA_INTEL_82801G,  "Intel 82801G",    0 },
 492         { HDA_INTEL_82801H,  "Intel 82801H",    0 },
 493         { HDA_INTEL_82801I,  "Intel 82801I",    0 },
 494         { HDA_INTEL_82801JI, "Intel 82801JI",   0 },
 495         { HDA_INTEL_82801JD, "Intel 82801JD",   0 },
 496         { HDA_INTEL_PCH,     "Intel PCH",       0 },
 497         { HDA_INTEL_SCH,     "Intel SCH",       0 },
 498         { HDA_NVIDIA_MCP51,  "NVidia MCP51",    HDAC_NO_MSI },
 499         { HDA_NVIDIA_MCP55,  "NVidia MCP55",    HDAC_NO_MSI },
 500         { HDA_NVIDIA_MCP61_1, "NVidia MCP61",   0 },
 501         { HDA_NVIDIA_MCP61_2, "NVidia MCP61",   0 },
 502         { HDA_NVIDIA_MCP65_1, "NVidia MCP65",   0 },
 503         { HDA_NVIDIA_MCP65_2, "NVidia MCP65",   0 },
 504         { HDA_NVIDIA_MCP67_1, "NVidia MCP67",   0 },
 505         { HDA_NVIDIA_MCP67_2, "NVidia MCP67",   0 },
 506         { HDA_NVIDIA_MCP73_1, "NVidia MCP73",   0 },
 507         { HDA_NVIDIA_MCP73_2, "NVidia MCP73",   0 },
 508         { HDA_NVIDIA_MCP78_1, "NVidia MCP78",   HDAC_NO_64BIT },
 509         { HDA_NVIDIA_MCP78_2, "NVidia MCP78",   HDAC_NO_64BIT },
 510         { HDA_NVIDIA_MCP78_3, "NVidia MCP78",   HDAC_NO_64BIT },
 511         { HDA_NVIDIA_MCP78_4, "NVidia MCP78",   HDAC_NO_64BIT },
 512         { HDA_NVIDIA_MCP79_1, "NVidia MCP79",   0 },
 513         { HDA_NVIDIA_MCP79_2, "NVidia MCP79",   0 },
 514         { HDA_NVIDIA_MCP79_3, "NVidia MCP79",   0 },
 515         { HDA_NVIDIA_MCP79_4, "NVidia MCP79",   0 },
 516         { HDA_NVIDIA_MCP89_1, "NVidia MCP89",   0 },
 517         { HDA_NVIDIA_MCP89_2, "NVidia MCP89",   0 },
 518         { HDA_NVIDIA_MCP89_3, "NVidia MCP89",   0 },
 519         { HDA_NVIDIA_MCP89_4, "NVidia MCP89",   0 },
 520         { HDA_ATI_SB450,     "ATI SB450",       0 },
 521         { HDA_ATI_SB600,     "ATI SB600",       0 },
 522         { HDA_ATI_RS600,     "ATI RS600",       0 },
 523         { HDA_ATI_RS690,     "ATI RS690",       0 },
 524         { HDA_ATI_RS780,     "ATI RS780",       0 },
 525         { HDA_ATI_R600,      "ATI R600",        0 },
 526         { HDA_ATI_RV610,     "ATI RV610",       0 },
 527         { HDA_ATI_RV620,     "ATI RV620",       0 },
 528         { HDA_ATI_RV630,     "ATI RV630",       0 },
 529         { HDA_ATI_RV635,     "ATI RV635",       0 },
 530         { HDA_ATI_RV710,     "ATI RV710",       0 },
 531         { HDA_ATI_RV730,     "ATI RV730",       0 },
 532         { HDA_ATI_RV740,     "ATI RV740",       0 },
 533         { HDA_ATI_RV770,     "ATI RV770",       0 },
 534         { HDA_VIA_VT82XX,    "VIA VT8251/8237A",0 },
 535         { HDA_SIS_966,       "SiS 966",         0 },
 536         { HDA_ULI_M5461,     "ULI M5461",       0 },
 537         /* Unknown */
 538         { HDA_INTEL_ALL,  "Intel (Unknown)"  },
 539         { HDA_NVIDIA_ALL, "NVidia (Unknown)" },
 540         { HDA_ATI_ALL,    "ATI (Unknown)"    },
 541         { HDA_VIA_ALL,    "VIA (Unknown)"    },
 542         { HDA_SIS_ALL,    "SiS (Unknown)"    },
 543         { HDA_ULI_ALL,    "ULI (Unknown)"    },
 544 };
 545 #define HDAC_DEVICES_LEN (sizeof(hdac_devices) / sizeof(hdac_devices[0]))
 546
 547 static const struct {
 548         uint16_t vendor;
 549         uint8_t reg;
 550         uint8_t mask;
 551         uint8_t enable;
 552 } hdac_pcie_snoop[] = {
 553         {  INTEL_VENDORID, 0x00, 0x00, 0x00 },
 554         {    ATI_VENDORID, 0x42, 0xf8, 0x02 },
 555         { NVIDIA_VENDORID, 0x4e, 0xf0, 0x0f },
 556 };
 557 #define HDAC_PCIESNOOP_LEN      \
 558                         (sizeof(hdac_pcie_snoop) / sizeof(hdac_pcie_snoop[0]))
 559
 560 static const struct {
 561         uint32_t        rate;
 562         int             valid;
 563         uint16_t        base;
 564         uint16_t        mul;
 565         uint16_t        div;
 566 } hda_rate_tab[] = {
 567         {   8000, 1, 0x0000, 0x0000, 0x0500 },  /* (48000 * 1) / 6 */
 568         {   9600, 0, 0x0000, 0x0000, 0x0400 },  /* (48000 * 1) / 5 */
 569         {  12000, 0, 0x0000, 0x0000, 0x0300 },  /* (48000 * 1) / 4 */
 570         {  16000, 1, 0x0000, 0x0000, 0x0200 },  /* (48000 * 1) / 3 */
 571         {  18000, 0, 0x0000, 0x1000, 0x0700 },  /* (48000 * 3) / 8 */
 572         {  19200, 0, 0x0000, 0x0800, 0x0400 },  /* (48000 * 2) / 5 */
 573         {  24000, 0, 0x0000, 0x0000, 0x0100 },  /* (48000 * 1) / 2 */
 574         {  28800, 0, 0x0000, 0x1000, 0x0400 },  /* (48000 * 3) / 5 */
 575         {  32000, 1, 0x0000, 0x0800, 0x0200 },  /* (48000 * 2) / 3 */
 576         {  36000, 0, 0x0000, 0x1000, 0x0300 },  /* (48000 * 3) / 4 */
 577         {  38400, 0, 0x0000, 0x1800, 0x0400 },  /* (48000 * 4) / 5 */
 578         {  48000, 1, 0x0000, 0x0000, 0x0000 },  /* (48000 * 1) / 1 */
 579         {  64000, 0, 0x0000, 0x1800, 0x0200 },  /* (48000 * 4) / 3 */
 580         {  72000, 0, 0x0000, 0x1000, 0x0100 },  /* (48000 * 3) / 2 */
 581         {  96000, 1, 0x0000, 0x0800, 0x0000 },  /* (48000 * 2) / 1 */
 582         { 144000, 0, 0x0000, 0x1000, 0x0000 },  /* (48000 * 3) / 1 */
 583         { 192000, 1, 0x0000, 0x1800, 0x0000 },  /* (48000 * 4) / 1 */
 584         {   8820, 0, 0x4000, 0x0000, 0x0400 },  /* (44100 * 1) / 5 */
 585         {  11025, 1, 0x4000, 0x0000, 0x0300 },  /* (44100 * 1) / 4 */
 586         {  12600, 0, 0x4000, 0x0800, 0x0600 },  /* (44100 * 2) / 7 */
 587         {  14700, 0, 0x4000, 0x0000, 0x0200 },  /* (44100 * 1) / 3 */
 588         {  17640, 0, 0x4000, 0x0800, 0x0400 },  /* (44100 * 2) / 5 */
 589         {  18900, 0, 0x4000, 0x1000, 0x0600 },  /* (44100 * 3) / 7 */
 590         {  22050, 1, 0x4000, 0x0000, 0x0100 },  /* (44100 * 1) / 2 */
 591         {  25200, 0, 0x4000, 0x1800, 0x0600 },  /* (44100 * 4) / 7 */
 592         {  26460, 0, 0x4000, 0x1000, 0x0400 },  /* (44100 * 3) / 5 */
 593         {  29400, 0, 0x4000, 0x0800, 0x0200 },  /* (44100 * 2) / 3 */
 594         {  33075, 0, 0x4000, 0x1000, 0x0300 },  /* (44100 * 3) / 4 */
 595         {  35280, 0, 0x4000, 0x1800, 0x0400 },  /* (44100 * 4) / 5 */
 596         {  44100, 1, 0x4000, 0x0000, 0x0000 },  /* (44100 * 1) / 1 */
 597         {  58800, 0, 0x4000, 0x1800, 0x0200 },  /* (44100 * 4) / 3 */
 598         {  66150, 0, 0x4000, 0x1000, 0x0100 },  /* (44100 * 3) / 2 */
 599         {  88200, 1, 0x4000, 0x0800, 0x0000 },  /* (44100 * 2) / 1 */
 600         { 132300, 0, 0x4000, 0x1000, 0x0000 },  /* (44100 * 3) / 1 */
 601         { 176400, 1, 0x4000, 0x1800, 0x0000 },  /* (44100 * 4) / 1 */
 602 };
 603 #define HDA_RATE_TAB_LEN (sizeof(hda_rate_tab) / sizeof(hda_rate_tab[0]))
 604
 605 /* All codecs you can eat... */
 606 #define HDA_CODEC_CONSTRUCT(vendor, id) \
 607                 (((uint32_t)(vendor##_VENDORID) << 16) | ((id) & 0xffff))
 608
 609 /* Cirrus Logic */
 610 #define CIRRUSLOGIC_VENDORID    0x1013
 611 #define HDA_CODEC_CS4206        HDA_CODEC_CONSTRUCT(CIRRUSLOGIC, 0x4206)
 612 #define HDA_CODEC_CS4207        HDA_CODEC_CONSTRUCT(CIRRUSLOGIC, 0x4207)
 613 #define HDA_CODEC_CSXXXX        HDA_CODEC_CONSTRUCT(CIRRUSLOGIC, 0xffff)
 614
 615 /* Realtek */
 616 #define REALTEK_VENDORID        0x10ec
 617 #define HDA_CODEC_ALC260        HDA_CODEC_CONSTRUCT(REALTEK, 0x0260)
 618 #define HDA_CODEC_ALC262        HDA_CODEC_CONSTRUCT(REALTEK, 0x0262)
 619 #define HDA_CODEC_ALC267        HDA_CODEC_CONSTRUCT(REALTEK, 0x0267)
 620 #define HDA_CODEC_ALC268        HDA_CODEC_CONSTRUCT(REALTEK, 0x0268)
 621 #define HDA_CODEC_ALC269        HDA_CODEC_CONSTRUCT(REALTEK, 0x0269)
 622 #define HDA_CODEC_ALC270        HDA_CODEC_CONSTRUCT(REALTEK, 0x0270)
 623 #define HDA_CODEC_ALC272        HDA_CODEC_CONSTRUCT(REALTEK, 0x0272)
 624 #define HDA_CODEC_ALC273        HDA_CODEC_CONSTRUCT(REALTEK, 0x0273)
 625 #define HDA_CODEC_ALC275        HDA_CODEC_CONSTRUCT(REALTEK, 0x0275)
 626 #define HDA_CODEC_ALC660        HDA_CODEC_CONSTRUCT(REALTEK, 0x0660)
 627 #define HDA_CODEC_ALC662        HDA_CODEC_CONSTRUCT(REALTEK, 0x0662)
 628 #define HDA_CODEC_ALC663        HDA_CODEC_CONSTRUCT(REALTEK, 0x0663)
 629 #define HDA_CODEC_ALC665        HDA_CODEC_CONSTRUCT(REALTEK, 0x0665)
 630 #define HDA_CODEC_ALC861        HDA_CODEC_CONSTRUCT(REALTEK, 0x0861)
 631 #define HDA_CODEC_ALC861VD      HDA_CODEC_CONSTRUCT(REALTEK, 0x0862)
 632 #define HDA_CODEC_ALC880        HDA_CODEC_CONSTRUCT(REALTEK, 0x0880)
 633 #define HDA_CODEC_ALC882        HDA_CODEC_CONSTRUCT(REALTEK, 0x0882)
 634 #define HDA_CODEC_ALC883        HDA_CODEC_CONSTRUCT(REALTEK, 0x0883)
 635 #define HDA_CODEC_ALC885        HDA_CODEC_CONSTRUCT(REALTEK, 0x0885)
 636 #define HDA_CODEC_ALC887        HDA_CODEC_CONSTRUCT(REALTEK, 0x0887)
 637 #define HDA_CODEC_ALC888        HDA_CODEC_CONSTRUCT(REALTEK, 0x0888)
 638 #define HDA_CODEC_ALC889        HDA_CODEC_CONSTRUCT(REALTEK, 0x0889)
 639 #define HDA_CODEC_ALC892        HDA_CODEC_CONSTRUCT(REALTEK, 0x0892)
 640 #define HDA_CODEC_ALCXXXX       HDA_CODEC_CONSTRUCT(REALTEK, 0xffff)
 641
 642 /* Analog Devices */
 643 #define ANALOGDEVICES_VENDORID  0x11d4
 644 #define HDA_CODEC_AD1884A       HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x184a)
 645 #define HDA_CODEC_AD1882        HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1882)
 646 #define HDA_CODEC_AD1883        HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1883)
 647 #define HDA_CODEC_AD1884        HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1884)
 648 #define HDA_CODEC_AD1984A       HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x194a)
 649 #define HDA_CODEC_AD1984B       HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x194b)
 650 #define HDA_CODEC_AD1981HD      HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1981)
 651 #define HDA_CODEC_AD1983        HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1983)
 652 #define HDA_CODEC_AD1984        HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1984)
 653 #define HDA_CODEC_AD1986A       HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1986)
 654 #define HDA_CODEC_AD1987        HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1987)
 655 #define HDA_CODEC_AD1988        HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1988)
 656 #define HDA_CODEC_AD1988B       HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x198b)
 657 #define HDA_CODEC_AD1882A       HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x882a)
 658 #define HDA_CODEC_AD1989B       HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x989b)
 659 #define HDA_CODEC_ADXXXX        HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0xffff)
 660
 661 /* CMedia */
 662 #define CMEDIA_VENDORID         0x434d
 663 #define HDA_CODEC_CMI9880       HDA_CODEC_CONSTRUCT(CMEDIA, 0x4980)
 664 #define HDA_CODEC_CMIXXXX       HDA_CODEC_CONSTRUCT(CMEDIA, 0xffff)
 665
 666 /* Sigmatel */
 667 #define SIGMATEL_VENDORID       0x8384
 668 #define HDA_CODEC_STAC9230X     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7612)
 669 #define HDA_CODEC_STAC9230D     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7613)
 670 #define HDA_CODEC_STAC9229X     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7614)
 671 #define HDA_CODEC_STAC9229D     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7615)
 672 #define HDA_CODEC_STAC9228X     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7616)
 673 #define HDA_CODEC_STAC9228D     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7617)
 674 #define HDA_CODEC_STAC9227X     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7618)
 675 #define HDA_CODEC_STAC9227D     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7619)
 676 #define HDA_CODEC_STAC9274      HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7620)
 677 #define HDA_CODEC_STAC9274D     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7621)
 678 #define HDA_CODEC_STAC9273X     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7622)
 679 #define HDA_CODEC_STAC9273D     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7623)
 680 #define HDA_CODEC_STAC9272X     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7624)
 681 #define HDA_CODEC_STAC9272D     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7625)
 682 #define HDA_CODEC_STAC9271X     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7626)
 683 #define HDA_CODEC_STAC9271D     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7627)
 684 #define HDA_CODEC_STAC9274X5NH  HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7628)
 685 #define HDA_CODEC_STAC9274D5NH  HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7629)
 686 #define HDA_CODEC_STAC9250      HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7634)
 687 #define HDA_CODEC_STAC9251      HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7636)
 688 #define HDA_CODEC_IDT92HD700X   HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7638)
 689 #define HDA_CODEC_IDT92HD700D   HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7639)
 690 #define HDA_CODEC_IDT92HD206X   HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7645)
 691 #define HDA_CODEC_IDT92HD206D   HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7646)
 692 #define HDA_CODEC_CXD9872RDK    HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7661)
 693 #define HDA_CODEC_STAC9872AK    HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7662)
 694 #define HDA_CODEC_CXD9872AKD    HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7664)
 695 #define HDA_CODEC_STAC9221      HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7680)
 696 #define HDA_CODEC_STAC922XD     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7681)
 697 #define HDA_CODEC_STAC9221_A2   HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7682)
 698 #define HDA_CODEC_STAC9221D     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7683)
 699 #define HDA_CODEC_STAC9220      HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7690)
 700 #define HDA_CODEC_STAC9200D     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7691)
 701 #define HDA_CODEC_IDT92HD005    HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7698)
 702 #define HDA_CODEC_IDT92HD005D   HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7699)
 703 #define HDA_CODEC_STAC9205X     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x76a0)
 704 #define HDA_CODEC_STAC9205D     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x76a1)
 705 #define HDA_CODEC_STAC9204X     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x76a2)
 706 #define HDA_CODEC_STAC9204D     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x76a3)
 707 #define HDA_CODEC_STAC9220_A2   HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7880)
 708 #define HDA_CODEC_STAC9220_A1   HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7882)
 709 #define HDA_CODEC_STACXXXX      HDA_CODEC_CONSTRUCT(SIGMATEL, 0xffff)
 710
 711 /* IDT */
 712 #define IDT_VENDORID            0x111d
 713 #define HDA_CODEC_IDT92HD75BX   HDA_CODEC_CONSTRUCT(IDT, 0x7603)
 714 #define HDA_CODEC_IDT92HD83C1X  HDA_CODEC_CONSTRUCT(IDT, 0x7604)
 715 #define HDA_CODEC_IDT92HD81B1X  HDA_CODEC_CONSTRUCT(IDT, 0x7605)
 716 #define HDA_CODEC_IDT92HD75B3   HDA_CODEC_CONSTRUCT(IDT, 0x7608)
 717 #define HDA_CODEC_IDT92HD73D1   HDA_CODEC_CONSTRUCT(IDT, 0x7674)
 718 #define HDA_CODEC_IDT92HD73C1   HDA_CODEC_CONSTRUCT(IDT, 0x7675)
 719 #define HDA_CODEC_IDT92HD73E1   HDA_CODEC_CONSTRUCT(IDT, 0x7676)
 720 #define HDA_CODEC_IDT92HD71B8   HDA_CODEC_CONSTRUCT(IDT, 0x76b0)
 721 #define HDA_CODEC_IDT92HD71B7   HDA_CODEC_CONSTRUCT(IDT, 0x76b2)
 722 #define HDA_CODEC_IDT92HD71B5   HDA_CODEC_CONSTRUCT(IDT, 0x76b6)
 723 #define HDA_CODEC_IDT92HD83C1C  HDA_CODEC_CONSTRUCT(IDT, 0x76d4)
 724 #define HDA_CODEC_IDT92HD81B1C  HDA_CODEC_CONSTRUCT(IDT, 0x76d5)
 725 #define HDA_CODEC_IDTXXXX       HDA_CODEC_CONSTRUCT(IDT, 0xffff)
 726
 727 /* Silicon Image */
 728 #define SII_VENDORID    0x1095
 729 #define HDA_CODEC_SII1390       HDA_CODEC_CONSTRUCT(SII, 0x1390)
 730 #define HDA_CODEC_SII1392       HDA_CODEC_CONSTRUCT(SII, 0x1392)
 731 #define HDA_CODEC_SIIXXXX       HDA_CODEC_CONSTRUCT(SII, 0xffff)
 732
 733 /* Lucent/Agere */
 734 #define AGERE_VENDORID  0x11c1
 735 #define HDA_CODEC_AGEREXXXX     HDA_CODEC_CONSTRUCT(AGERE, 0xffff)
 736
 737 /* Conexant */
 738 #define CONEXANT_VENDORID       0x14f1
 739 #define HDA_CODEC_CX20549       HDA_CODEC_CONSTRUCT(CONEXANT, 0x5045)
 740 #define HDA_CODEC_CX20551       HDA_CODEC_CONSTRUCT(CONEXANT, 0x5047)
 741 #define HDA_CODEC_CX20561       HDA_CODEC_CONSTRUCT(CONEXANT, 0x5051)
 742 #define HDA_CODEC_CX20582       HDA_CODEC_CONSTRUCT(CONEXANT, 0x5066)
 743 #define HDA_CODEC_CX20583       HDA_CODEC_CONSTRUCT(CONEXANT, 0x5067)
 744 #define HDA_CODEC_CXXXXX        HDA_CODEC_CONSTRUCT(CONEXANT, 0xffff)
 745
 746 /* VIA */
 747 #define HDA_CODEC_VT1708_8      HDA_CODEC_CONSTRUCT(VIA, 0x1708)
 748 #define HDA_CODEC_VT1708_9      HDA_CODEC_CONSTRUCT(VIA, 0x1709)
 749 #define HDA_CODEC_VT1708_A      HDA_CODEC_CONSTRUCT(VIA, 0x170a)
 750 #define HDA_CODEC_VT1708_B      HDA_CODEC_CONSTRUCT(VIA, 0x170b)
 751 #define HDA_CODEC_VT1709_0      HDA_CODEC_CONSTRUCT(VIA, 0xe710)
 752 #define HDA_CODEC_VT1709_1      HDA_CODEC_CONSTRUCT(VIA, 0xe711)
 753 #define HDA_CODEC_VT1709_2      HDA_CODEC_CONSTRUCT(VIA, 0xe712)
 754 #define HDA_CODEC_VT1709_3      HDA_CODEC_CONSTRUCT(VIA, 0xe713)
 755 #define HDA_CODEC_VT1709_4      HDA_CODEC_CONSTRUCT(VIA, 0xe714)
 756 #define HDA_CODEC_VT1709_5      HDA_CODEC_CONSTRUCT(VIA, 0xe715)
 757 #define HDA_CODEC_VT1709_6      HDA_CODEC_CONSTRUCT(VIA, 0xe716)
 758 #define HDA_CODEC_VT1709_7      HDA_CODEC_CONSTRUCT(VIA, 0xe717)
 759 #define HDA_CODEC_VT1708B_0     HDA_CODEC_CONSTRUCT(VIA, 0xe720)
 760 #define HDA_CODEC_VT1708B_1     HDA_CODEC_CONSTRUCT(VIA, 0xe721)
 761 #define HDA_CODEC_VT1708B_2     HDA_CODEC_CONSTRUCT(VIA, 0xe722)
 762 #define HDA_CODEC_VT1708B_3     HDA_CODEC_CONSTRUCT(VIA, 0xe723)
 763 #define HDA_CODEC_VT1708B_4     HDA_CODEC_CONSTRUCT(VIA, 0xe724)
 764 #define HDA_CODEC_VT1708B_5     HDA_CODEC_CONSTRUCT(VIA, 0xe725)
 765 #define HDA_CODEC_VT1708B_6     HDA_CODEC_CONSTRUCT(VIA, 0xe726)
 766 #define HDA_CODEC_VT1708B_7     HDA_CODEC_CONSTRUCT(VIA, 0xe727)
 767 #define HDA_CODEC_VT1708S_0     HDA_CODEC_CONSTRUCT(VIA, 0x0397)
 768 #define HDA_CODEC_VT1708S_1     HDA_CODEC_CONSTRUCT(VIA, 0x1397)
 769 #define HDA_CODEC_VT1708S_2     HDA_CODEC_CONSTRUCT(VIA, 0x2397)
 770 #define HDA_CODEC_VT1708S_3     HDA_CODEC_CONSTRUCT(VIA, 0x3397)
 771 #define HDA_CODEC_VT1708S_4     HDA_CODEC_CONSTRUCT(VIA, 0x4397)
 772 #define HDA_CODEC_VT1708S_5     HDA_CODEC_CONSTRUCT(VIA, 0x5397)
 773 #define HDA_CODEC_VT1708S_6     HDA_CODEC_CONSTRUCT(VIA, 0x6397)
 774 #define HDA_CODEC_VT1708S_7     HDA_CODEC_CONSTRUCT(VIA, 0x7397)
 775 #define HDA_CODEC_VT1702_0      HDA_CODEC_CONSTRUCT(VIA, 0x0398)
 776 #define HDA_CODEC_VT1702_1      HDA_CODEC_CONSTRUCT(VIA, 0x1398)
 777 #define HDA_CODEC_VT1702_2      HDA_CODEC_CONSTRUCT(VIA, 0x2398)
 778 #define HDA_CODEC_VT1702_3      HDA_CODEC_CONSTRUCT(VIA, 0x3398)
 779 #define HDA_CODEC_VT1702_4      HDA_CODEC_CONSTRUCT(VIA, 0x4398)
 780 #define HDA_CODEC_VT1702_5      HDA_CODEC_CONSTRUCT(VIA, 0x5398)
 781 #define HDA_CODEC_VT1702_6      HDA_CODEC_CONSTRUCT(VIA, 0x6398)
 782 #define HDA_CODEC_VT1702_7      HDA_CODEC_CONSTRUCT(VIA, 0x7398)
 783 #define HDA_CODEC_VT1716S_0     HDA_CODEC_CONSTRUCT(VIA, 0x0433)
 784 #define HDA_CODEC_VT1716S_1     HDA_CODEC_CONSTRUCT(VIA, 0xa721)
 785 #define HDA_CODEC_VT1718S_0     HDA_CODEC_CONSTRUCT(VIA, 0x0428)
 786 #define HDA_CODEC_VT1718S_1     HDA_CODEC_CONSTRUCT(VIA, 0x4428)
 787 #define HDA_CODEC_VT1812        HDA_CODEC_CONSTRUCT(VIA, 0x0448)
 788 #define HDA_CODEC_VT1818S       HDA_CODEC_CONSTRUCT(VIA, 0x0440)
 789 #define HDA_CODEC_VT1828S       HDA_CODEC_CONSTRUCT(VIA, 0x4441)
 790 #define HDA_CODEC_VT2002P_0     HDA_CODEC_CONSTRUCT(VIA, 0x0438)
 791 #define HDA_CODEC_VT2002P_1     HDA_CODEC_CONSTRUCT(VIA, 0x4438)
 792 #define HDA_CODEC_VT2020        HDA_CODEC_CONSTRUCT(VIA, 0x0441)
 793 #define HDA_CODEC_VTXXXX        HDA_CODEC_CONSTRUCT(VIA, 0xffff)
 794
 795 /* ATI */
 796 #define HDA_CODEC_ATIRS600_1    HDA_CODEC_CONSTRUCT(ATI, 0x793c)
 797 #define HDA_CODEC_ATIRS600_2    HDA_CODEC_CONSTRUCT(ATI, 0x7919)
 798 #define HDA_CODEC_ATIRS690      HDA_CODEC_CONSTRUCT(ATI, 0x791a)
 799 #define HDA_CODEC_ATIR6XX       HDA_CODEC_CONSTRUCT(ATI, 0xaa01)
 800 #define HDA_CODEC_ATIXXXX       HDA_CODEC_CONSTRUCT(ATI, 0xffff)
 801
 802 /* NVIDIA */
 803 #define HDA_CODEC_NVIDIAMCP78   HDA_CODEC_CONSTRUCT(NVIDIA, 0x0002)
 804 #define HDA_CODEC_NVIDIAMCP78_2 HDA_CODEC_CONSTRUCT(NVIDIA, 0x0006)
 805 #define HDA_CODEC_NVIDIAMCP7A   HDA_CODEC_CONSTRUCT(NVIDIA, 0x0007)
 806 #define HDA_CODEC_NVIDIAMCP67   HDA_CODEC_CONSTRUCT(NVIDIA, 0x0067)
 807 #define HDA_CODEC_NVIDIAMCP73   HDA_CODEC_CONSTRUCT(NVIDIA, 0x8001)
 808 #define HDA_CODEC_NVIDIAXXXX    HDA_CODEC_CONSTRUCT(NVIDIA, 0xffff)
 809
 810 /* INTEL */
 811 #define HDA_CODEC_INTELG45_1    HDA_CODEC_CONSTRUCT(INTEL, 0x2801)
 812 #define HDA_CODEC_INTELG45_2    HDA_CODEC_CONSTRUCT(INTEL, 0x2802)
 813 #define HDA_CODEC_INTELG45_3    HDA_CODEC_CONSTRUCT(INTEL, 0x2803)
 814 #define HDA_CODEC_INTELG45_4    HDA_CODEC_CONSTRUCT(INTEL, 0x2804)
 815 #define HDA_CODEC_INTELG45_5    HDA_CODEC_CONSTRUCT(INTEL, 0x29fb)
 816 #define HDA_CODEC_INTELQ57      HDA_CODEC_CONSTRUCT(INTEL, 0x0054)
 817 #define HDA_CODEC_INTELXXXX     HDA_CODEC_CONSTRUCT(INTEL, 0xffff)
 818
 819 /* Codecs */
 820 static const struct {
 821         uint32_t id;
 822         char *name;
 823 } hdac_codecs[] = {
 824         { HDA_CODEC_CS4206,    "Cirrus Logic CS4206" },
 825         { HDA_CODEC_CS4207,    "Cirrus Logic CS4207" },
 826         { HDA_CODEC_ALC260,    "Realtek ALC260" },
 827         { HDA_CODEC_ALC262,    "Realtek ALC262" },
 828         { HDA_CODEC_ALC267,    "Realtek ALC267" },
 829         { HDA_CODEC_ALC268,    "Realtek ALC268" },
 830         { HDA_CODEC_ALC269,    "Realtek ALC269" },
 831         { HDA_CODEC_ALC270,    "Realtek ALC270" },
 832         { HDA_CODEC_ALC272,    "Realtek ALC272" },
 833         { HDA_CODEC_ALC273,    "Realtek ALC273" },
 834         { HDA_CODEC_ALC275,    "Realtek ALC275" },
 835         { HDA_CODEC_ALC660,    "Realtek ALC660" },
 836         { HDA_CODEC_ALC662,    "Realtek ALC662" },
 837         { HDA_CODEC_ALC663,    "Realtek ALC663" },
 838         { HDA_CODEC_ALC665,    "Realtek ALC665" },
 839         { HDA_CODEC_ALC861,    "Realtek ALC861" },
 840         { HDA_CODEC_ALC861VD,  "Realtek ALC861-VD" },
 841         { HDA_CODEC_ALC880,    "Realtek ALC880" },
 842         { HDA_CODEC_ALC882,    "Realtek ALC882" },
 843         { HDA_CODEC_ALC883,    "Realtek ALC883" },
 844         { HDA_CODEC_ALC885,    "Realtek ALC885" },
 845         { HDA_CODEC_ALC887,    "Realtek ALC887" },
 846         { HDA_CODEC_ALC888,    "Realtek ALC888" },
 847         { HDA_CODEC_ALC889,    "Realtek ALC889" },
 848         { HDA_CODEC_ALC892,    "Realtek ALC892" },
 849         { HDA_CODEC_AD1882,    "Analog Devices AD1882" },
 850         { HDA_CODEC_AD1882A,   "Analog Devices AD1882A" },
 851         { HDA_CODEC_AD1883,    "Analog Devices AD1883" },
 852         { HDA_CODEC_AD1884,    "Analog Devices AD1884" },
 853         { HDA_CODEC_AD1884A,   "Analog Devices AD1884A" },
 854         { HDA_CODEC_AD1981HD,  "Analog Devices AD1981HD" },
 855         { HDA_CODEC_AD1983,    "Analog Devices AD1983" },
 856         { HDA_CODEC_AD1984,    "Analog Devices AD1984" },
 857         { HDA_CODEC_AD1984A,   "Analog Devices AD1984A" },
 858         { HDA_CODEC_AD1984B,   "Analog Devices AD1984B" },
 859         { HDA_CODEC_AD1986A,   "Analog Devices AD1986A" },
 860         { HDA_CODEC_AD1987,    "Analog Devices AD1987" },
 861         { HDA_CODEC_AD1988,    "Analog Devices AD1988A" },
 862         { HDA_CODEC_AD1988B,   "Analog Devices AD1988B" },
 863         { HDA_CODEC_AD1989B,   "Analog Devices AD1989B" },
 864         { HDA_CODEC_CMI9880,   "CMedia CMI9880" },
 865         { HDA_CODEC_CXD9872RDK, "Sigmatel CXD9872RD/K" },
 866         { HDA_CODEC_CXD9872AKD, "Sigmatel CXD9872AKD" },
 867         { HDA_CODEC_STAC9200D, "Sigmatel STAC9200D" },
 868         { HDA_CODEC_STAC9204X, "Sigmatel STAC9204X" },
 869         { HDA_CODEC_STAC9204D, "Sigmatel STAC9204D" },
 870         { HDA_CODEC_STAC9205X, "Sigmatel STAC9205X" },
 871         { HDA_CODEC_STAC9205D, "Sigmatel STAC9205D" },
 872         { HDA_CODEC_STAC9220,  "Sigmatel STAC9220" },
 873         { HDA_CODEC_STAC9220_A1, "Sigmatel STAC9220_A1" },
 874         { HDA_CODEC_STAC9220_A2, "Sigmatel STAC9220_A2" },
 875         { HDA_CODEC_STAC9221,  "Sigmatel STAC9221" },
 876         { HDA_CODEC_STAC9221_A2, "Sigmatel STAC9221_A2" },
 877         { HDA_CODEC_STAC9221D, "Sigmatel STAC9221D" },
 878         { HDA_CODEC_STAC922XD, "Sigmatel STAC9220D/9223D" },
 879         { HDA_CODEC_STAC9227X, "Sigmatel STAC9227X" },
 880         { HDA_CODEC_STAC9227D, "Sigmatel STAC9227D" },
 881         { HDA_CODEC_STAC9228X, "Sigmatel STAC9228X" },
 882         { HDA_CODEC_STAC9228D, "Sigmatel STAC9228D" },
 883         { HDA_CODEC_STAC9229X, "Sigmatel STAC9229X" },
 884         { HDA_CODEC_STAC9229D, "Sigmatel STAC9229D" },
 885         { HDA_CODEC_STAC9230X, "Sigmatel STAC9230X" },
 886         { HDA_CODEC_STAC9230D, "Sigmatel STAC9230D" },
 887         { HDA_CODEC_STAC9250,  "Sigmatel STAC9250" },
 888         { HDA_CODEC_STAC9251,  "Sigmatel STAC9251" },
 889         { HDA_CODEC_STAC9271X, "Sigmatel STAC9271X" },
 890         { HDA_CODEC_STAC9271D, "Sigmatel STAC9271D" },
 891         { HDA_CODEC_STAC9272X, "Sigmatel STAC9272X" },
 892         { HDA_CODEC_STAC9272D, "Sigmatel STAC9272D" },
 893         { HDA_CODEC_STAC9273X, "Sigmatel STAC9273X" },
 894         { HDA_CODEC_STAC9273D, "Sigmatel STAC9273D" },
 895         { HDA_CODEC_STAC9274,  "Sigmatel STAC9274" },
 896         { HDA_CODEC_STAC9274D, "Sigmatel STAC9274D" },
 897         { HDA_CODEC_STAC9274X5NH, "Sigmatel STAC9274X5NH" },
 898         { HDA_CODEC_STAC9274D5NH, "Sigmatel STAC9274D5NH" },
 899         { HDA_CODEC_STAC9872AK, "Sigmatel STAC9872AK" },
 900         { HDA_CODEC_IDT92HD005, "IDT 92HD005" },
 901         { HDA_CODEC_IDT92HD005D, "IDT 92HD005D" },
 902         { HDA_CODEC_IDT92HD206X, "IDT 92HD206X" },
 903         { HDA_CODEC_IDT92HD206D, "IDT 92HD206D" },
 904         { HDA_CODEC_IDT92HD700X, "IDT 92HD700X" },
 905         { HDA_CODEC_IDT92HD700D, "IDT 92HD700D" },
 906         { HDA_CODEC_IDT92HD71B5, "IDT 92HD71B5" },
 907         { HDA_CODEC_IDT92HD71B7, "IDT 92HD71B7" },
 908         { HDA_CODEC_IDT92HD71B8, "IDT 92HD71B8" },
 909         { HDA_CODEC_IDT92HD73C1, "IDT 92HD73C1" },
 910         { HDA_CODEC_IDT92HD73D1, "IDT 92HD73D1" },
 911         { HDA_CODEC_IDT92HD73E1, "IDT 92HD73E1" },
 912         { HDA_CODEC_IDT92HD75B3, "IDT 92HD75B3" },
 913         { HDA_CODEC_IDT92HD75BX, "IDT 92HD75BX" },
 914         { HDA_CODEC_IDT92HD81B1C, "IDT 92HD81B1C" },
 915         { HDA_CODEC_IDT92HD81B1X, "IDT 92HD81B1X" },
 916         { HDA_CODEC_IDT92HD83C1C, "IDT 92HD83C1C" },
 917         { HDA_CODEC_IDT92HD83C1X, "IDT 92HD83C1X" },
 918         { HDA_CODEC_CX20549,   "Conexant CX20549 (Venice)" },
 919         { HDA_CODEC_CX20551,   "Conexant CX20551 (Waikiki)" },
 920         { HDA_CODEC_CX20561,   "Conexant CX20561 (Hermosa)" },
 921         { HDA_CODEC_CX20582,   "Conexant CX20582 (Pebble)" },
 922         { HDA_CODEC_CX20583,   "Conexant CX20583 (Pebble HSF)" },
 923         { HDA_CODEC_VT1708_8,  "VIA VT1708_8" },
 924         { HDA_CODEC_VT1708_9,  "VIA VT1708_9" },
 925         { HDA_CODEC_VT1708_A,  "VIA VT1708_A" },
 926         { HDA_CODEC_VT1708_B,  "VIA VT1708_B" },
 927         { HDA_CODEC_VT1709_0,  "VIA VT1709_0" },
 928         { HDA_CODEC_VT1709_1,  "VIA VT1709_1" },
 929         { HDA_CODEC_VT1709_2,  "VIA VT1709_2" },
 930         { HDA_CODEC_VT1709_3,  "VIA VT1709_3" },
 931         { HDA_CODEC_VT1709_4,  "VIA VT1709_4" },
 932         { HDA_CODEC_VT1709_5,  "VIA VT1709_5" },
 933         { HDA_CODEC_VT1709_6,  "VIA VT1709_6" },
 934         { HDA_CODEC_VT1709_7,  "VIA VT1709_7" },
 935         { HDA_CODEC_VT1708B_0, "VIA VT1708B_0" },
 936         { HDA_CODEC_VT1708B_1, "VIA VT1708B_1" },
 937         { HDA_CODEC_VT1708B_2, "VIA VT1708B_2" },
 938         { HDA_CODEC_VT1708B_3, "VIA VT1708B_3" },
 939         { HDA_CODEC_VT1708B_4, "VIA VT1708B_4" },
 940         { HDA_CODEC_VT1708B_5, "VIA VT1708B_5" },
 941         { HDA_CODEC_VT1708B_6, "VIA VT1708B_6" },
 942         { HDA_CODEC_VT1708B_7, "VIA VT1708B_7" },
 943         { HDA_CODEC_VT1708S_0, "VIA VT1708S_0" },
 944         { HDA_CODEC_VT1708S_1, "VIA VT1708S_1" },
 945         { HDA_CODEC_VT1708S_2, "VIA VT1708S_2" },
 946         { HDA_CODEC_VT1708S_3, "VIA VT1708S_3" },
 947         { HDA_CODEC_VT1708S_4, "VIA VT1708S_4" },
 948         { HDA_CODEC_VT1708S_5, "VIA VT1708S_5" },
 949         { HDA_CODEC_VT1708S_6, "VIA VT1708S_6" },
 950         { HDA_CODEC_VT1708S_7, "VIA VT1708S_7" },
 951         { HDA_CODEC_VT1702_0, "VIA VT1702_0" },
 952         { HDA_CODEC_VT1702_1, "VIA VT1702_1" },
 953         { HDA_CODEC_VT1702_2, "VIA VT1702_2" },
 954         { HDA_CODEC_VT1702_3, "VIA VT1702_3" },
 955         { HDA_CODEC_VT1702_4, "VIA VT1702_4" },
 956         { HDA_CODEC_VT1702_5, "VIA VT1702_5" },
 957         { HDA_CODEC_VT1702_6, "VIA VT1702_6" },
 958         { HDA_CODEC_VT1702_7, "VIA VT1702_7" },
 959         { HDA_CODEC_VT1716S_0, "VIA VT1716S_0" },
 960         { HDA_CODEC_VT1716S_1, "VIA VT1716S_1" },
 961         { HDA_CODEC_VT1718S_0, "VIA VT1718S_0" },
 962         { HDA_CODEC_VT1718S_1, "VIA VT1718S_1" },
 963         { HDA_CODEC_VT1812, "VIA VT1812" },
 964         { HDA_CODEC_VT1818S, "VIA VT1818S" },
 965         { HDA_CODEC_VT1828S, "VIA VT1828S" },
 966         { HDA_CODEC_VT2002P_0, "VIA VT2002P_0" },
 967         { HDA_CODEC_VT2002P_1, "VIA VT2002P_1" },
 968         { HDA_CODEC_VT2020, "VIA VT2020" },
 969         { HDA_CODEC_ATIRS600_1,"ATI RS600 HDMI" },
 970         { HDA_CODEC_ATIRS600_2,"ATI RS600 HDMI" },
 971         { HDA_CODEC_ATIRS690,  "ATI RS690/780 HDMI" },
 972         { HDA_CODEC_ATIR6XX,   "ATI R6xx HDMI" },
 973         { HDA_CODEC_NVIDIAMCP67, "NVidia MCP67 HDMI" },
 974         { HDA_CODEC_NVIDIAMCP73, "NVidia MCP73 HDMI" },
 975         { HDA_CODEC_NVIDIAMCP78, "NVidia MCP78 HDMI" },
 976         { HDA_CODEC_NVIDIAMCP78_2, "NVidia MCP78 HDMI" },
 977         { HDA_CODEC_NVIDIAMCP7A, "NVidia MCP7A HDMI" },
 978         { HDA_CODEC_INTELG45_1, "Intel G45 HDMI" },
 979         { HDA_CODEC_INTELG45_2, "Intel G45 HDMI" },
 980         { HDA_CODEC_INTELG45_3, "Intel G45 HDMI" },
 981         { HDA_CODEC_INTELG45_4, "Intel G45 HDMI" },
 982         { HDA_CODEC_INTELG45_5, "Intel G45 HDMI" },
 983         { HDA_CODEC_INTELQ57, "Intel Q57 HDMI" },
 984         { HDA_CODEC_SII1390,   "Silicon Image SiI1390 HDMI" },
 985         { HDA_CODEC_SII1392,   "Silicon Image SiI1392 HDMI" },
 986         /* Unknown codec */
 987         { HDA_CODEC_ALCXXXX,   "Realtek (Unknown)" },
 988         { HDA_CODEC_ADXXXX,    "Analog Devices (Unknown)" },
 989         { HDA_CODEC_CSXXXX,    "Cirrus Logic (Unknown)" },
 990         { HDA_CODEC_CMIXXXX,   "CMedia (Unknown)" },
 991         { HDA_CODEC_STACXXXX,  "Sigmatel (Unknown)" },
 992         { HDA_CODEC_SIIXXXX,   "Silicon Image (Unknown)" },
 993         { HDA_CODEC_AGEREXXXX, "Lucent/Agere Systems (Unknown)" },
 994         { HDA_CODEC_CXXXXX,    "Conexant (Unknown)" },
 995         { HDA_CODEC_VTXXXX,    "VIA (Unknown)" },
 996         { HDA_CODEC_ATIXXXX,   "ATI (Unknown)" },
 997         { HDA_CODEC_NVIDIAXXXX,"NVidia (Unknown)" },
 998         { HDA_CODEC_INTELXXXX, "Intel (Unknown)" },
 999         { HDA_CODEC_IDTXXXX,   "IDT (Unknown)" },
1000 };
1001 #define HDAC_CODECS_LEN (sizeof(hdac_codecs) / sizeof(hdac_codecs[0]))
1002
1003
1004 /****************************************************************************
1005  * Function prototypes
1006  ****************************************************************************/
1007 static void     hdac_intr_handler(void *);
1008 static int      hdac_reset(struct hdac_softc *, int);
1009 static int      hdac_get_capabilities(struct hdac_softc *);
1010 static void     hdac_dma_cb(void *, bus_dma_segment_t *, int, int);
1011 static int      hdac_dma_alloc(struct hdac_softc *,
1012                                         struct hdac_dma *, bus_size_t);
1013 static void     hdac_dma_free(struct hdac_softc *, struct hdac_dma *);
1014 static int      hdac_mem_alloc(struct hdac_softc *);
1015 static void     hdac_mem_free(struct hdac_softc *);
1016 static int      hdac_irq_alloc(struct hdac_softc *);
1017 static void     hdac_irq_free(struct hdac_softc *);
1018 static void     hdac_corb_init(struct hdac_softc *);
1019 static void     hdac_rirb_init(struct hdac_softc *);
1020 static void     hdac_corb_start(struct hdac_softc *);
1021 static void     hdac_rirb_start(struct hdac_softc *);
1022 static void     hdac_scan_codecs(struct hdac_softc *);
1023 static void     hdac_probe_codec(struct hdac_codec *);
1024 static void     hdac_probe_function(struct hdac_codec *, nid_t);
1025 static int      hdac_pcmchannel_setup(struct hdac_chan *);
1026
1027 static void     hdac_attach2(void *);
1028
1029 static uint32_t hdac_command_sendone_internal(struct hdac_softc *,
1030                                                         uint32_t, int);
1031 static void     hdac_command_send_internal(struct hdac_softc *,
1032                                         struct hdac_command_list *, int);
1033
1034 static int      hdac_probe(device_t);
1035 static int      hdac_attach(device_t);
1036 static int      hdac_detach(device_t);
1037 static int      hdac_suspend(device_t);
1038 static int      hdac_resume(device_t);
1039 static void     hdac_widget_connection_select(struct hdac_widget *, uint8_t);
1040 static void     hdac_audio_ctl_amp_set(struct hdac_audio_ctl *,
1041                                                 uint32_t, int, int);
1042 static struct   hdac_audio_ctl *hdac_audio_ctl_amp_get(struct hdac_devinfo *,
1043                                                         nid_t, int, int, int);
1044 static void     hdac_audio_ctl_amp_set_internal(struct hdac_softc *,
1045                                 nid_t, nid_t, int, int, int, int, int, int);
1046 static struct   hdac_widget *hdac_widget_get(struct hdac_devinfo *, nid_t);
1047
1048 static int      hdac_rirb_flush(struct hdac_softc *sc);
1049 static int      hdac_unsolq_flush(struct hdac_softc *sc);
1050
1051 static void     hdac_dump_pin_config(struct hdac_widget *w, uint32_t conf);
1052
1053 #define hdac_command(a1, a2, a3)        \
1054                 hdac_command_sendone_internal(a1, a2, a3)
1055
1056 #define hdac_codec_id(c)                                                        \
1057                 ((uint32_t)((c == NULL) ? 0x00000000 :  \
1058                 ((((uint32_t)(c)->vendor_id & 0x0000ffff) << 16) |      \
1059                 ((uint32_t)(c)->device_id & 0x0000ffff))))
1060
1061 static char *
1062 hdac_codec_name(struct hdac_codec *codec)
1063 {
1064         uint32_t id;
1065         int i;
1066
1067         id = hdac_codec_id(codec);
1068
1069         for (i = 0; i < HDAC_CODECS_LEN; i++) {
1070                 if (HDA_DEV_MATCH(hdac_codecs[i].id, id))
1071                         return (hdac_codecs[i].name);
1072         }
1073
1074         return ((id == 0x00000000) ? "NULL Codec" : "Unknown Codec");
1075 }
1076
1077 static char *
1078 hdac_audio_ctl_ossmixer_mask2allname(uint32_t mask, char *buf, size_t len)
1079 {
1080         static char *ossname[] = SOUND_DEVICE_NAMES;
1081         int i, first = 1;
1082
1083         bzero(buf, len);
1084         for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) {
1085                 if (mask & (1 << i)) {
1086                         if (first == 0)
1087                                 strlcat(buf, ", ", len);
1088                         strlcat(buf, ossname[i], len);
1089                         first = 0;
1090                 }
1091         }
1092         return (buf);
1093 }
1094
1095 static struct hdac_audio_ctl *
1096 hdac_audio_ctl_each(struct hdac_devinfo *devinfo, int *index)
1097 {
1098         if (devinfo == NULL ||
1099             devinfo->node_type != HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO ||
1100             index == NULL || devinfo->function.audio.ctl == NULL ||
1101             devinfo->function.audio.ctlcnt < 1 ||
1102             *index < 0 || *index >= devinfo->function.audio.ctlcnt)
1103                 return (NULL);
1104         return (&devinfo->function.audio.ctl[(*index)++]);
1105 }
1106
1107 static struct hdac_audio_ctl *
1108 hdac_audio_ctl_amp_get(struct hdac_devinfo *devinfo, nid_t nid, int dir,
1109                                                 int index, int cnt)
1110 {
1111         struct hdac_audio_ctl *ctl;
1112         int i, found = 0;
1113
1114         if (devinfo == NULL || devinfo->function.audio.ctl == NULL)
1115                 return (NULL);
1116
1117         i = 0;
1118         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
1119                 if (ctl->enable == 0)
1120                         continue;
1121                 if (ctl->widget->nid != nid)
1122                         continue;
1123                 if (dir && ctl->ndir != dir)
1124                         continue;
1125                 if (index >= 0 && ctl->ndir == HDA_CTL_IN &&
1126                     ctl->dir == ctl->ndir && ctl->index != index)
1127                         continue;
1128                 found++;
1129                 if (found == cnt || cnt <= 0)
1130                         return (ctl);
1131         }
1132
1133         return (NULL);
1134 }
1135
1136 /*
1137  * Jack detection (Speaker/HP redirection) event handler.
1138  */
1139 static void
1140 hdac_hp_switch_handler(struct hdac_devinfo *devinfo)
1141 {
1142         struct hdac_audio_as *as;
1143         struct hdac_softc *sc;
1144         struct hdac_widget *w;
1145         struct hdac_audio_ctl *ctl;
1146         uint32_t val, res;
1147         int i, j;
1148         nid_t cad;
1149
1150         if (devinfo == NULL || devinfo->codec == NULL ||
1151             devinfo->codec->sc == NULL)
1152                 return;
1153
1154         sc = devinfo->codec->sc;
1155         cad = devinfo->codec->cad;
1156         as = devinfo->function.audio.as;
1157         for (i = 0; i < devinfo->function.audio.ascnt; i++) {
1158                 if (as[i].hpredir < 0)
1159                         continue;
1160
1161                 w = hdac_widget_get(devinfo, as[i].pins[15]);
1162                 if (w == NULL || w->enable == 0 || w->type !=
1163                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
1164                         continue;
1165
1166                 res = hdac_command(sc,
1167                     HDA_CMD_GET_PIN_SENSE(cad, as[i].pins[15]), cad);
1168
1169                 HDA_BOOTVERBOSE(
1170                         device_printf(sc->dev,
1171                             "Pin sense: nid=%d res=0x%08x\n",
1172                             as[i].pins[15], res);
1173                 );
1174
1175                 res = HDA_CMD_GET_PIN_SENSE_PRESENCE_DETECT(res);
1176                 if (devinfo->function.audio.quirks & HDA_QUIRK_SENSEINV)
1177                         res ^= 1;
1178
1179                 /* (Un)Mute headphone pin. */
1180                 ctl = hdac_audio_ctl_amp_get(devinfo,
1181                     as[i].pins[15], HDA_CTL_IN, -1, 1);
1182                 if (ctl != NULL && ctl->mute) {
1183                         /* If pin has muter - use it. */
1184                         val = (res != 0) ? 0 : 1;
1185                         if (val != ctl->forcemute) {
1186                                 ctl->forcemute = val;
1187                                 hdac_audio_ctl_amp_set(ctl,
1188                                     HDA_AMP_MUTE_DEFAULT,
1189                                     HDA_AMP_VOL_DEFAULT, HDA_AMP_VOL_DEFAULT);
1190                         }
1191                 } else {
1192                         /* If there is no muter - disable pin output. */
1193                         w = hdac_widget_get(devinfo, as[i].pins[15]);
1194                         if (w != NULL && w->type ==
1195                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) {
1196                                 if (res != 0)
1197                                         val = w->wclass.pin.ctrl |
1198                                             HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE;
1199                                 else
1200                                         val = w->wclass.pin.ctrl &
1201                                             ~HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE;
1202                                 if (val != w->wclass.pin.ctrl) {
1203                                         w->wclass.pin.ctrl = val;
1204                                         hdac_command(sc,
1205                                             HDA_CMD_SET_PIN_WIDGET_CTRL(cad,
1206                                             w->nid, w->wclass.pin.ctrl), cad);
1207                                 }
1208                         }
1209                 }
1210                 /* (Un)Mute other pins. */
1211                 for (j = 0; j < 15; j++) {
1212                         if (as[i].pins[j] <= 0)
1213                                 continue;
1214                         ctl = hdac_audio_ctl_amp_get(devinfo,
1215                             as[i].pins[j], HDA_CTL_IN, -1, 1);
1216                         if (ctl != NULL && ctl->mute) {
1217                                 /* If pin has muter - use it. */
1218                                 val = (res != 0) ? 1 : 0;
1219                                 if (val == ctl->forcemute)
1220                                         continue;
1221                                 ctl->forcemute = val;
1222                                 hdac_audio_ctl_amp_set(ctl,
1223                                     HDA_AMP_MUTE_DEFAULT,
1224                                     HDA_AMP_VOL_DEFAULT, HDA_AMP_VOL_DEFAULT);
1225                                 continue;
1226                         }
1227                         /* If there is no muter - disable pin output. */
1228                         w = hdac_widget_get(devinfo, as[i].pins[j]);
1229                         if (w != NULL && w->type ==
1230                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) {
1231                                 if (res != 0)
1232                                         val = w->wclass.pin.ctrl &
1233                                             ~HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE;
1234                                 else
1235                                         val = w->wclass.pin.ctrl |
1236                                             HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE;
1237                                 if (val != w->wclass.pin.ctrl) {
1238                                         w->wclass.pin.ctrl = val;
1239                                         hdac_command(sc,
1240                                             HDA_CMD_SET_PIN_WIDGET_CTRL(cad,
1241                                             w->nid, w->wclass.pin.ctrl), cad);
1242                                 }
1243                         }
1244                 }
1245         }
1246 }
1247
1248 /*
1249  * Callback for poll based jack detection.
1250  */
1251 static void
1252 hdac_jack_poll_callback(void *arg)
1253 {
1254         struct hdac_devinfo *devinfo = arg;
1255         struct hdac_softc *sc;
1256
1257         if (devinfo == NULL || devinfo->codec == NULL ||
1258             devinfo->codec->sc == NULL)
1259                 return;
1260         sc = devinfo->codec->sc;
1261         hdac_lock(sc);
1262         if (sc->poll_ival == 0) {
1263                 hdac_unlock(sc);
1264                 return;
1265         }
1266         hdac_hp_switch_handler(devinfo);
1267         callout_reset(&sc->poll_jack, sc->poll_ival,
1268             hdac_jack_poll_callback, devinfo);
1269         hdac_unlock(sc);
1270 }
1271
1272 /*
1273  * Jack detection initializer.
1274  */
1275 static void
1276 hdac_hp_switch_init(struct hdac_devinfo *devinfo)
1277 {
1278         struct hdac_softc *sc = devinfo->codec->sc;
1279         struct hdac_audio_as *as = devinfo->function.audio.as;
1280         struct hdac_widget *w;
1281         uint32_t id;
1282         int i, enable = 0, poll = 0;
1283         nid_t cad;
1284
1285         id = hdac_codec_id(devinfo->codec);
1286         cad = devinfo->codec->cad;
1287         for (i = 0; i < devinfo->function.audio.ascnt; i++) {
1288                 if (as[i].hpredir < 0)
1289                         continue;
1290
1291                 w = hdac_widget_get(devinfo, as[i].pins[15]);
1292                 if (w == NULL || w->enable == 0 || w->type !=
1293                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
1294                         continue;
1295                 if (HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP(w->wclass.pin.cap) == 0 ||
1296                     (HDA_CONFIG_DEFAULTCONF_MISC(w->wclass.pin.config) & 1) != 0) {
1297                         device_printf(sc->dev,
1298                             "No jack detection support at pin %d\n",
1299                             as[i].pins[15]);
1300                         continue;
1301                 }
1302                 enable = 1;
1303                 if (HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP(w->param.widget_cap)) {
1304                         hdac_command(sc,
1305                             HDA_CMD_SET_UNSOLICITED_RESPONSE(cad, w->nid,
1306                             HDA_CMD_SET_UNSOLICITED_RESPONSE_ENABLE |
1307                             HDAC_UNSOLTAG_EVENT_HP), cad);
1308                 } else
1309                         poll = 1;
1310                 HDA_BOOTVERBOSE(
1311                         device_printf(sc->dev,
1312                             "Enabling headphone/speaker "
1313                             "audio routing switching:\n");
1314                         device_printf(sc->dev, "\tas=%d sense nid=%d [%s]\n",
1315                             i, w->nid, (poll != 0) ? "POLL" : "UNSOL");
1316                 );
1317         }
1318         if (enable) {
1319                 hdac_hp_switch_handler(devinfo);
1320                 if (poll) {
1321                         callout_reset(&sc->poll_jack, 1,
1322                             hdac_jack_poll_callback, devinfo);
1323                 }
1324         }
1325 }
1326
1327 /*
1328  * Unsolicited messages handler.
1329  */
1330 static void
1331 hdac_unsolicited_handler(struct hdac_codec *codec, uint32_t tag)
1332 {
1333         struct hdac_softc *sc;
1334         struct hdac_devinfo *devinfo = NULL;
1335         int i;
1336
1337         if (codec == NULL || codec->sc == NULL)
1338                 return;
1339
1340         sc = codec->sc;
1341
1342         HDA_BOOTVERBOSE(
1343                 device_printf(sc->dev, "Unsol Tag: 0x%08x\n", tag);
1344         );
1345
1346         for (i = 0; i < codec->num_fgs; i++) {
1347                 if (codec->fgs[i].node_type ==
1348                     HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO) {
1349                         devinfo = &codec->fgs[i];
1350                         break;
1351                 }
1352         }
1353
1354         if (devinfo == NULL)
1355                 return;
1356
1357         switch (tag) {
1358         case HDAC_UNSOLTAG_EVENT_HP:
1359                 hdac_hp_switch_handler(devinfo);
1360                 break;
1361         default:
1362                 device_printf(sc->dev, "Unknown unsol tag: 0x%08x!\n", tag);
1363                 break;
1364         }
1365 }
1366
1367 static int
1368 hdac_stream_intr(struct hdac_softc *sc, struct hdac_chan *ch)
1369 {
1370         /* XXX to be removed */
1371 #ifdef HDAC_INTR_EXTRA
1372         uint32_t res;
1373 #endif
1374
1375         if (!(ch->flags & HDAC_CHN_RUNNING))
1376                 return (0);
1377
1378         /* XXX to be removed */
1379 #ifdef HDAC_INTR_EXTRA
1380         res = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDSTS);
1381 #endif
1382
1383         /* XXX to be removed */
1384 #ifdef HDAC_INTR_EXTRA
1385         HDA_BOOTVERBOSE(
1386                 if (res & (HDAC_SDSTS_DESE | HDAC_SDSTS_FIFOE))
1387                         device_printf(ch->pdevinfo->dev,
1388                             "PCMDIR_%s intr triggered beyond stream boundary:"
1389                             "%08x\n",
1390                             (ch->dir == PCMDIR_PLAY) ? "PLAY" : "REC", res);
1391         );
1392 #endif
1393
1394         HDAC_WRITE_1(&sc->mem, ch->off + HDAC_SDSTS,
1395             HDAC_SDSTS_DESE | HDAC_SDSTS_FIFOE | HDAC_SDSTS_BCIS );
1396
1397         /* XXX to be removed */
1398 #ifdef HDAC_INTR_EXTRA
1399         if (res & HDAC_SDSTS_BCIS) {
1400 #endif
1401                 return (1);
1402         /* XXX to be removed */
1403 #ifdef HDAC_INTR_EXTRA
1404         }
1405 #endif
1406
1407         return (0);
1408 }
1409
1410 /****************************************************************************
1411  * void hdac_intr_handler(void *)
1412  *
1413  * Interrupt handler. Processes interrupts received from the hdac.
1414  ****************************************************************************/
1415 static void
1416 hdac_intr_handler(void *context)
1417 {
1418         struct hdac_softc *sc;
1419         uint32_t intsts;
1420         uint8_t rirbsts;
1421         struct hdac_rirb *rirb_base;
1422         uint32_t trigger;
1423         int i;
1424
1425         sc = (struct hdac_softc *)context;
1426
1427         hdac_lock(sc);
1428         if (sc->polling != 0) {
1429                 hdac_unlock(sc);
1430                 return;
1431         }
1432
1433         /* Do we have anything to do? */
1434         intsts = HDAC_READ_4(&sc->mem, HDAC_INTSTS);
1435         if (!HDA_FLAG_MATCH(intsts, HDAC_INTSTS_GIS)) {
1436                 hdac_unlock(sc);
1437                 return;
1438         }
1439
1440         trigger = 0;
1441
1442         /* Was this a controller interrupt? */
1443         if (HDA_FLAG_MATCH(intsts, HDAC_INTSTS_CIS)) {
1444                 rirb_base = (struct hdac_rirb *)sc->rirb_dma.dma_vaddr;
1445                 rirbsts = HDAC_READ_1(&sc->mem, HDAC_RIRBSTS);
1446                 /* Get as many responses that we can */
1447                 while (HDA_FLAG_MATCH(rirbsts, HDAC_RIRBSTS_RINTFL)) {
1448                         HDAC_WRITE_1(&sc->mem,
1449                             HDAC_RIRBSTS, HDAC_RIRBSTS_RINTFL);
1450                         if (hdac_rirb_flush(sc) != 0)
1451                                 trigger |= HDAC_TRIGGER_UNSOL;
1452                         rirbsts = HDAC_READ_1(&sc->mem, HDAC_RIRBSTS);
1453                 }
1454                 /* XXX to be removed */
1455                 /* Clear interrupt and exit */
1456 #ifdef HDAC_INTR_EXTRA
1457                 HDAC_WRITE_4(&sc->mem, HDAC_INTSTS, HDAC_INTSTS_CIS);
1458 #endif
1459         }
1460
1461         if (intsts & HDAC_INTSTS_SIS_MASK) {
1462                 for (i = 0; i < sc->num_chans; i++) {
1463                         if ((intsts & (1 << (sc->chans[i].off >> 5))) &&
1464                             hdac_stream_intr(sc, &sc->chans[i]) != 0)
1465                                 trigger |= (1 << i);
1466                 }
1467                 /* XXX to be removed */
1468 #ifdef HDAC_INTR_EXTRA
1469                 HDAC_WRITE_4(&sc->mem, HDAC_INTSTS, intsts &
1470                     HDAC_INTSTS_SIS_MASK);
1471 #endif
1472         }
1473
1474         hdac_unlock(sc);
1475
1476         for (i = 0; i < sc->num_chans; i++) {
1477                 if (trigger & (1 << i))
1478                         chn_intr(sc->chans[i].c);
1479         }
1480         if (trigger & HDAC_TRIGGER_UNSOL)
1481                 taskqueue_enqueue(taskqueue_thread, &sc->unsolq_task);
1482 }
1483
1484 /****************************************************************************
1485  * int hdac_reset(hdac_softc *, int)
1486  *
1487  * Reset the hdac to a quiescent and known state.
1488  ****************************************************************************/
1489 static int
1490 hdac_reset(struct hdac_softc *sc, int wakeup)
1491 {
1492         uint32_t gctl;
1493         int count, i;
1494
1495         /*
1496          * Stop all Streams DMA engine
1497          */
1498         for (i = 0; i < sc->num_iss; i++)
1499                 HDAC_WRITE_4(&sc->mem, HDAC_ISDCTL(sc, i), 0x0);
1500         for (i = 0; i < sc->num_oss; i++)
1501                 HDAC_WRITE_4(&sc->mem, HDAC_OSDCTL(sc, i), 0x0);
1502         for (i = 0; i < sc->num_bss; i++)
1503                 HDAC_WRITE_4(&sc->mem, HDAC_BSDCTL(sc, i), 0x0);
1504
1505         /*
1506          * Stop Control DMA engines.
1507          */
1508         HDAC_WRITE_1(&sc->mem, HDAC_CORBCTL, 0x0);
1509         HDAC_WRITE_1(&sc->mem, HDAC_RIRBCTL, 0x0);
1510
1511         /*
1512          * Reset DMA position buffer.
1513          */
1514         HDAC_WRITE_4(&sc->mem, HDAC_DPIBLBASE, 0x0);
1515         HDAC_WRITE_4(&sc->mem, HDAC_DPIBUBASE, 0x0);
1516
1517         /*
1518          * Reset the controller. The reset must remain asserted for
1519          * a minimum of 100us.
1520          */
1521         gctl = HDAC_READ_4(&sc->mem, HDAC_GCTL);
1522         HDAC_WRITE_4(&sc->mem, HDAC_GCTL, gctl & ~HDAC_GCTL_CRST);
1523         count = 10000;
1524         do {
1525                 gctl = HDAC_READ_4(&sc->mem, HDAC_GCTL);
1526                 if (!(gctl & HDAC_GCTL_CRST))
1527                         break;
1528                 DELAY(10);
1529         } while (--count);
1530         if (gctl & HDAC_GCTL_CRST) {
1531                 device_printf(sc->dev, "Unable to put hdac in reset\n");
1532                 return (ENXIO);
1533         }
1534
1535         /* If wakeup is not requested - leave the controller in reset state. */
1536         if (!wakeup)
1537                 return (0);
1538
1539         DELAY(100);
1540         gctl = HDAC_READ_4(&sc->mem, HDAC_GCTL);
1541         HDAC_WRITE_4(&sc->mem, HDAC_GCTL, gctl | HDAC_GCTL_CRST);
1542         count = 10000;
1543         do {
1544                 gctl = HDAC_READ_4(&sc->mem, HDAC_GCTL);
1545                 if (gctl & HDAC_GCTL_CRST)
1546                         break;
1547                 DELAY(10);
1548         } while (--count);
1549         if (!(gctl & HDAC_GCTL_CRST)) {
1550                 device_printf(sc->dev, "Device stuck in reset\n");
1551                 return (ENXIO);
1552         }
1553
1554         /*
1555          * Wait for codecs to finish their own reset sequence. The delay here
1556          * should be of 250us but for some reasons, on it's not enough on my
1557          * computer. Let's use twice as much as necessary to make sure that
1558          * it's reset properly.
1559          */
1560         DELAY(1000);
1561
1562         return (0);
1563 }
1564
1565
1566 /****************************************************************************
1567  * int hdac_get_capabilities(struct hdac_softc *);
1568  *
1569  * Retreive the general capabilities of the hdac;
1570  *      Number of Input Streams
1571  *      Number of Output Streams
1572  *      Number of bidirectional Streams
1573  *      64bit ready
1574  *      CORB and RIRB sizes
1575  ****************************************************************************/
1576 static int
1577 hdac_get_capabilities(struct hdac_softc *sc)
1578 {
1579         uint16_t gcap;
1580         uint8_t corbsize, rirbsize;
1581
1582         gcap = HDAC_READ_2(&sc->mem, HDAC_GCAP);
1583         sc->num_iss = HDAC_GCAP_ISS(gcap);
1584         sc->num_oss = HDAC_GCAP_OSS(gcap);
1585         sc->num_bss = HDAC_GCAP_BSS(gcap);
1586         sc->num_sdo = HDAC_GCAP_NSDO(gcap);
1587         sc->support_64bit = HDA_FLAG_MATCH(gcap, HDAC_GCAP_64OK);
1588
1589         corbsize = HDAC_READ_1(&sc->mem, HDAC_CORBSIZE);
1590         if ((corbsize & HDAC_CORBSIZE_CORBSZCAP_256) ==
1591             HDAC_CORBSIZE_CORBSZCAP_256)
1592                 sc->corb_size = 256;
1593         else if ((corbsize & HDAC_CORBSIZE_CORBSZCAP_16) ==
1594             HDAC_CORBSIZE_CORBSZCAP_16)
1595                 sc->corb_size = 16;
1596         else if ((corbsize & HDAC_CORBSIZE_CORBSZCAP_2) ==
1597             HDAC_CORBSIZE_CORBSZCAP_2)
1598                 sc->corb_size = 2;
1599         else {
1600                 device_printf(sc->dev, "%s: Invalid corb size (%x)\n",
1601                     __func__, corbsize);
1602                 return (ENXIO);
1603         }
1604
1605         rirbsize = HDAC_READ_1(&sc->mem, HDAC_RIRBSIZE);
1606         if ((rirbsize & HDAC_RIRBSIZE_RIRBSZCAP_256) ==
1607             HDAC_RIRBSIZE_RIRBSZCAP_256)
1608                 sc->rirb_size = 256;
1609         else if ((rirbsize & HDAC_RIRBSIZE_RIRBSZCAP_16) ==
1610             HDAC_RIRBSIZE_RIRBSZCAP_16)
1611                 sc->rirb_size = 16;
1612         else if ((rirbsize & HDAC_RIRBSIZE_RIRBSZCAP_2) ==
1613             HDAC_RIRBSIZE_RIRBSZCAP_2)
1614                 sc->rirb_size = 2;
1615         else {
1616                 device_printf(sc->dev, "%s: Invalid rirb size (%x)\n",
1617                     __func__, rirbsize);
1618                 return (ENXIO);
1619         }
1620
1621         HDA_BOOTVERBOSE(
1622                 device_printf(sc->dev, "Caps: OSS %d, ISS %d, BSS %d, "
1623                     "NSDO %d%s, CORB %d, RIRB %d\n",
1624                     sc->num_oss, sc->num_iss, sc->num_bss, 1 << sc->num_sdo,
1625                     sc->support_64bit ? ", 64bit" : "",
1626                     sc->corb_size, sc->rirb_size);
1627         );
1628
1629         return (0);
1630 }
1631
1632
1633 /****************************************************************************
1634  * void hdac_dma_cb
1635  *
1636  * This function is called by bus_dmamap_load when the mapping has been
1637  * established. We just record the physical address of the mapping into
1638  * the struct hdac_dma passed in.
1639  ****************************************************************************/
1640 static void
1641 hdac_dma_cb(void *callback_arg, bus_dma_segment_t *segs, int nseg, int error)
1642 {
1643         struct hdac_dma *dma;
1644
1645         if (error == 0) {
1646                 dma = (struct hdac_dma *)callback_arg;
1647                 dma->dma_paddr = segs[0].ds_addr;
1648         }
1649 }
1650
1651
1652 /****************************************************************************
1653  * int hdac_dma_alloc
1654  *
1655  * This function allocate and setup a dma region (struct hdac_dma).
1656  * It must be freed by a corresponding hdac_dma_free.
1657  ****************************************************************************/
1658 static int
1659 hdac_dma_alloc(struct hdac_softc *sc, struct hdac_dma *dma, bus_size_t size)
1660 {
1661         bus_size_t roundsz;
1662         int result;
1663
1664         roundsz = roundup2(size, HDAC_DMA_ALIGNMENT);
1665         bzero(dma, sizeof(*dma));
1666
1667         /*
1668          * Create a DMA tag
1669          */
1670         result = bus_dma_tag_create(
1671             bus_get_dma_tag(sc->dev),           /* parent */
1672             HDAC_DMA_ALIGNMENT,                 /* alignment */
1673             0,                                  /* boundary */
1674             (sc->support_64bit) ? BUS_SPACE_MAXADDR :
1675                 BUS_SPACE_MAXADDR_32BIT,        /* lowaddr */
1676             BUS_SPACE_MAXADDR,                  /* highaddr */
1677             NULL,                               /* filtfunc */
1678             NULL,                               /* fistfuncarg */
1679             roundsz,                            /* maxsize */
1680             1,                                  /* nsegments */
1681             roundsz,                            /* maxsegsz */
1682             0,                                  /* flags */
1683             NULL,                               /* lockfunc */
1684             NULL,                               /* lockfuncarg */
1685             &dma->dma_tag);                     /* dmat */
1686         if (result != 0) {
1687                 device_printf(sc->dev, "%s: bus_dma_tag_create failed (%x)\n",
1688                     __func__, result);
1689                 goto hdac_dma_alloc_fail;
1690         }
1691
1692         /*
1693          * Allocate DMA memory
1694          */
1695         result = bus_dmamem_alloc(dma->dma_tag, (void **)&dma->dma_vaddr,
1696             BUS_DMA_NOWAIT | BUS_DMA_ZERO |
1697             ((sc->flags & HDAC_F_DMA_NOCACHE) ? BUS_DMA_NOCACHE : 0),
1698             &dma->dma_map);
1699         if (result != 0) {
1700                 device_printf(sc->dev, "%s: bus_dmamem_alloc failed (%x)\n",
1701                     __func__, result);
1702                 goto hdac_dma_alloc_fail;
1703         }
1704
1705         dma->dma_size = roundsz;
1706
1707         /*
1708          * Map the memory
1709          */
1710         result = bus_dmamap_load(dma->dma_tag, dma->dma_map,
1711             (void *)dma->dma_vaddr, roundsz, hdac_dma_cb, (void *)dma, 0);
1712         if (result != 0 || dma->dma_paddr == 0) {
1713                 if (result == 0)
1714                         result = ENOMEM;
1715                 device_printf(sc->dev, "%s: bus_dmamem_load failed (%x)\n",
1716                     __func__, result);
1717                 goto hdac_dma_alloc_fail;
1718         }
1719
1720         HDA_BOOTHVERBOSE(
1721                 device_printf(sc->dev, "%s: size=%ju -> roundsz=%ju\n",
1722                     __func__, (uintmax_t)size, (uintmax_t)roundsz);
1723         );
1724
1725         return (0);
1726
1727 hdac_dma_alloc_fail:
1728         hdac_dma_free(sc, dma);
1729
1730         return (result);
1731 }
1732
1733
1734 /****************************************************************************
1735  * void hdac_dma_free(struct hdac_softc *, struct hdac_dma *)
1736  *
1737  * Free a struct dhac_dma that has been previously allocated via the
1738  * hdac_dma_alloc function.
1739  ****************************************************************************/
1740 static void
1741 hdac_dma_free(struct hdac_softc *sc, struct hdac_dma *dma)
1742 {
1743         if (dma->dma_map != NULL) {
1744 #if 0
1745                 /* Flush caches */
1746                 bus_dmamap_sync(dma->dma_tag, dma->dma_map,
1747                     BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
1748 #endif
1749                 bus_dmamap_unload(dma->dma_tag, dma->dma_map);
1750         }
1751         if (dma->dma_vaddr != NULL) {
1752                 bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map);
1753                 dma->dma_vaddr = NULL;
1754         }
1755         dma->dma_map = NULL;
1756         if (dma->dma_tag != NULL) {
1757                 bus_dma_tag_destroy(dma->dma_tag);
1758                 dma->dma_tag = NULL;
1759         }
1760         dma->dma_size = 0;
1761 }
1762
1763 /****************************************************************************
1764  * int hdac_mem_alloc(struct hdac_softc *)
1765  *
1766  * Allocate all the bus resources necessary to speak with the physical
1767  * controller.
1768  ****************************************************************************/
1769 static int
1770 hdac_mem_alloc(struct hdac_softc *sc)
1771 {
1772         struct hdac_mem *mem;
1773
1774         mem = &sc->mem;
1775         mem->mem_rid = PCIR_BAR(0);
1776         mem->mem_res = bus_alloc_resource_any(sc->dev, SYS_RES_MEMORY,
1777             &mem->mem_rid, RF_ACTIVE);
1778         if (mem->mem_res == NULL) {
1779                 device_printf(sc->dev,
1780                     "%s: Unable to allocate memory resource\n", __func__);
1781                 return (ENOMEM);
1782         }
1783         mem->mem_tag = rman_get_bustag(mem->mem_res);
1784         mem->mem_handle = rman_get_bushandle(mem->mem_res);
1785
1786         return (0);
1787 }
1788
1789 /****************************************************************************
1790  * void hdac_mem_free(struct hdac_softc *)
1791  *
1792  * Free up resources previously allocated by hdac_mem_alloc.
1793  ****************************************************************************/
1794 static void
1795 hdac_mem_free(struct hdac_softc *sc)
1796 {
1797         struct hdac_mem *mem;
1798
1799         mem = &sc->mem;
1800         if (mem->mem_res != NULL)
1801                 bus_release_resource(sc->dev, SYS_RES_MEMORY, mem->mem_rid,
1802                     mem->mem_res);
1803         mem->mem_res = NULL;
1804 }
1805
1806 /****************************************************************************
1807  * int hdac_irq_alloc(struct hdac_softc *)
1808  *
1809  * Allocate and setup the resources necessary for interrupt handling.
1810  ****************************************************************************/
1811 static int
1812 hdac_irq_alloc(struct hdac_softc *sc)
1813 {
1814         struct hdac_irq *irq;
1815         int result;
1816
1817         irq = &sc->irq;
1818         irq->irq_rid = 0x0;
1819
1820         if ((sc->flags & HDAC_F_MSI) &&
1821             (result = pci_msi_count(sc->dev)) == 1 &&
1822             pci_alloc_msi(sc->dev, &result) == 0)
1823                 irq->irq_rid = 0x1;
1824         else
1825                 sc->flags &= ~HDAC_F_MSI;
1826
1827         irq->irq_res = bus_alloc_resource_any(sc->dev, SYS_RES_IRQ,
1828             &irq->irq_rid, RF_SHAREABLE | RF_ACTIVE);
1829         if (irq->irq_res == NULL) {
1830                 device_printf(sc->dev, "%s: Unable to allocate irq\n",
1831                     __func__);
1832                 goto hdac_irq_alloc_fail;
1833         }
1834         result = bus_setup_intr(sc->dev, irq->irq_res, INTR_MPSAFE | INTR_TYPE_AV,
1835             NULL, hdac_intr_handler, sc, &irq->irq_handle);
1836         if (result != 0) {
1837                 device_printf(sc->dev,
1838                     "%s: Unable to setup interrupt handler (%x)\n",
1839                     __func__, result);
1840                 goto hdac_irq_alloc_fail;
1841         }
1842
1843         return (0);
1844
1845 hdac_irq_alloc_fail:
1846         hdac_irq_free(sc);
1847
1848         return (ENXIO);
1849 }
1850
1851 /****************************************************************************
1852  * void hdac_irq_free(struct hdac_softc *)
1853  *
1854  * Free up resources previously allocated by hdac_irq_alloc.
1855  ****************************************************************************/
1856 static void
1857 hdac_irq_free(struct hdac_softc *sc)
1858 {
1859         struct hdac_irq *irq;
1860
1861         irq = &sc->irq;
1862         if (irq->irq_res != NULL && irq->irq_handle != NULL)
1863                 bus_teardown_intr(sc->dev, irq->irq_res, irq->irq_handle);
1864         if (irq->irq_res != NULL)
1865                 bus_release_resource(sc->dev, SYS_RES_IRQ, irq->irq_rid,
1866                     irq->irq_res);
1867         if (irq->irq_rid == 0x1)
1868                 pci_release_msi(sc->dev);
1869         irq->irq_handle = NULL;
1870         irq->irq_res = NULL;
1871         irq->irq_rid = 0x0;
1872 }
1873
1874 /****************************************************************************
1875  * void hdac_corb_init(struct hdac_softc *)
1876  *
1877  * Initialize the corb registers for operations but do not start it up yet.
1878  * The CORB engine must not be running when this function is called.
1879  ****************************************************************************/
1880 static void
1881 hdac_corb_init(struct hdac_softc *sc)
1882 {
1883         uint8_t corbsize;
1884         uint64_t corbpaddr;
1885
1886         /* Setup the CORB size. */
1887         switch (sc->corb_size) {
1888         case 256:
1889                 corbsize = HDAC_CORBSIZE_CORBSIZE(HDAC_CORBSIZE_CORBSIZE_256);
1890                 break;
1891         case 16:
1892                 corbsize = HDAC_CORBSIZE_CORBSIZE(HDAC_CORBSIZE_CORBSIZE_16);
1893                 break;
1894         case 2:
1895                 corbsize = HDAC_CORBSIZE_CORBSIZE(HDAC_CORBSIZE_CORBSIZE_2);
1896                 break;
1897         default:
1898                 panic("%s: Invalid CORB size (%x)\n", __func__, sc->corb_size);
1899         }
1900         HDAC_WRITE_1(&sc->mem, HDAC_CORBSIZE, corbsize);
1901
1902         /* Setup the CORB Address in the hdac */
1903         corbpaddr = (uint64_t)sc->corb_dma.dma_paddr;
1904         HDAC_WRITE_4(&sc->mem, HDAC_CORBLBASE, (uint32_t)corbpaddr);
1905         HDAC_WRITE_4(&sc->mem, HDAC_CORBUBASE, (uint32_t)(corbpaddr >> 32));
1906
1907         /* Set the WP and RP */
1908         sc->corb_wp = 0;
1909         HDAC_WRITE_2(&sc->mem, HDAC_CORBWP, sc->corb_wp);
1910         HDAC_WRITE_2(&sc->mem, HDAC_CORBRP, HDAC_CORBRP_CORBRPRST);
1911         /*
1912          * The HDA specification indicates that the CORBRPRST bit will always
1913          * read as zero. Unfortunately, it seems that at least the 82801G
1914          * doesn't reset the bit to zero, which stalls the corb engine.
1915          * manually reset the bit to zero before continuing.
1916          */
1917         HDAC_WRITE_2(&sc->mem, HDAC_CORBRP, 0x0);
1918
1919         /* Enable CORB error reporting */
1920 #if 0
1921         HDAC_WRITE_1(&sc->mem, HDAC_CORBCTL, HDAC_CORBCTL_CMEIE);
1922 #endif
1923 }
1924
1925 /****************************************************************************
1926  * void hdac_rirb_init(struct hdac_softc *)
1927  *
1928  * Initialize the rirb registers for operations but do not start it up yet.
1929  * The RIRB engine must not be running when this function is called.
1930  ****************************************************************************/
1931 static void
1932 hdac_rirb_init(struct hdac_softc *sc)
1933 {
1934         uint8_t rirbsize;
1935         uint64_t rirbpaddr;
1936
1937         /* Setup the RIRB size. */
1938         switch (sc->rirb_size) {
1939         case 256:
1940                 rirbsize = HDAC_RIRBSIZE_RIRBSIZE(HDAC_RIRBSIZE_RIRBSIZE_256);
1941                 break;
1942         case 16:
1943                 rirbsize = HDAC_RIRBSIZE_RIRBSIZE(HDAC_RIRBSIZE_RIRBSIZE_16);
1944                 break;
1945         case 2:
1946                 rirbsize = HDAC_RIRBSIZE_RIRBSIZE(HDAC_RIRBSIZE_RIRBSIZE_2);
1947                 break;
1948         default:
1949                 panic("%s: Invalid RIRB size (%x)\n", __func__, sc->rirb_size);
1950         }
1951         HDAC_WRITE_1(&sc->mem, HDAC_RIRBSIZE, rirbsize);
1952
1953         /* Setup the RIRB Address in the hdac */
1954         rirbpaddr = (uint64_t)sc->rirb_dma.dma_paddr;
1955         HDAC_WRITE_4(&sc->mem, HDAC_RIRBLBASE, (uint32_t)rirbpaddr);
1956         HDAC_WRITE_4(&sc->mem, HDAC_RIRBUBASE, (uint32_t)(rirbpaddr >> 32));
1957
1958         /* Setup the WP and RP */
1959         sc->rirb_rp = 0;
1960         HDAC_WRITE_2(&sc->mem, HDAC_RIRBWP, HDAC_RIRBWP_RIRBWPRST);
1961
1962         /* Setup the interrupt threshold */
1963         HDAC_WRITE_2(&sc->mem, HDAC_RINTCNT, sc->rirb_size / 2);
1964
1965         /* Enable Overrun and response received reporting */
1966 #if 0
1967         HDAC_WRITE_1(&sc->mem, HDAC_RIRBCTL,
1968             HDAC_RIRBCTL_RIRBOIC | HDAC_RIRBCTL_RINTCTL);
1969 #else
1970         HDAC_WRITE_1(&sc->mem, HDAC_RIRBCTL, HDAC_RIRBCTL_RINTCTL);
1971 #endif
1972
1973 #if 0
1974         /*
1975          * Make sure that the Host CPU cache doesn't contain any dirty
1976          * cache lines that falls in the rirb. If I understood correctly, it
1977          * should be sufficient to do this only once as the rirb is purely
1978          * read-only from now on.
1979          */
1980         bus_dmamap_sync(sc->rirb_dma.dma_tag, sc->rirb_dma.dma_map,
1981             BUS_DMASYNC_PREREAD);
1982 #endif
1983 }
1984
1985 /****************************************************************************
1986  * void hdac_corb_start(hdac_softc *)
1987  *
1988  * Startup the corb DMA engine
1989  ****************************************************************************/
1990 static void
1991 hdac_corb_start(struct hdac_softc *sc)
1992 {
1993         uint32_t corbctl;
1994
1995         corbctl = HDAC_READ_1(&sc->mem, HDAC_CORBCTL);
1996         corbctl |= HDAC_CORBCTL_CORBRUN;
1997         HDAC_WRITE_1(&sc->mem, HDAC_CORBCTL, corbctl);
1998 }
1999
2000 /****************************************************************************
2001  * void hdac_rirb_start(hdac_softc *)
2002  *
2003  * Startup the rirb DMA engine
2004  ****************************************************************************/
2005 static void
2006 hdac_rirb_start(struct hdac_softc *sc)
2007 {
2008         uint32_t rirbctl;
2009
2010         rirbctl = HDAC_READ_1(&sc->mem, HDAC_RIRBCTL);
2011         rirbctl |= HDAC_RIRBCTL_RIRBDMAEN;
2012         HDAC_WRITE_1(&sc->mem, HDAC_RIRBCTL, rirbctl);
2013 }
2014
2015
2016 /****************************************************************************
2017  * void hdac_scan_codecs(struct hdac_softc *, int)
2018  *
2019  * Scan the bus for available codecs, starting with num.
2020  ****************************************************************************/
2021 static void
2022 hdac_scan_codecs(struct hdac_softc *sc)
2023 {
2024         struct hdac_codec *codec;
2025         int i;
2026         uint16_t statests;
2027
2028         statests = HDAC_READ_2(&sc->mem, HDAC_STATESTS);
2029         for (i = 0; i < HDAC_CODEC_MAX; i++) {
2030                 if (HDAC_STATESTS_SDIWAKE(statests, i)) {
2031                         /* We have found a codec. */
2032                         codec = (struct hdac_codec *)malloc(sizeof(*codec),
2033                             M_HDAC, M_ZERO | M_NOWAIT);
2034                         if (codec == NULL) {
2035                                 device_printf(sc->dev,
2036                                     "Unable to allocate memory for codec\n");
2037                                 continue;
2038                         }
2039                         codec->commands = NULL;
2040                         codec->responses_received = 0;
2041                         codec->verbs_sent = 0;
2042                         codec->sc = sc;
2043                         codec->cad = i;
2044                         sc->codecs[i] = codec;
2045                         hdac_probe_codec(codec);
2046                 }
2047         }
2048         /* All codecs have been probed, now try to attach drivers to them */
2049         /* bus_generic_attach(sc->dev); */
2050 }
2051
2052 /****************************************************************************
2053  * void hdac_probe_codec(struct hdac_softc *, int)
2054  *
2055  * Probe a the given codec_id for available function groups.
2056  ****************************************************************************/
2057 static void
2058 hdac_probe_codec(struct hdac_codec *codec)
2059 {
2060         struct hdac_softc *sc = codec->sc;
2061         uint32_t vendorid, revisionid, subnode;
2062         int startnode;
2063         int endnode;
2064         int i;
2065         nid_t cad = codec->cad;
2066
2067         HDA_BOOTVERBOSE(
2068                 device_printf(sc->dev, "Probing codec #%d...\n", cad);
2069         );
2070         vendorid = hdac_command(sc,
2071             HDA_CMD_GET_PARAMETER(cad, 0x0, HDA_PARAM_VENDOR_ID),
2072             cad);
2073         revisionid = hdac_command(sc,
2074             HDA_CMD_GET_PARAMETER(cad, 0x0, HDA_PARAM_REVISION_ID),
2075             cad);
2076         codec->vendor_id = HDA_PARAM_VENDOR_ID_VENDOR_ID(vendorid);
2077         codec->device_id = HDA_PARAM_VENDOR_ID_DEVICE_ID(vendorid);
2078         codec->revision_id = HDA_PARAM_REVISION_ID_REVISION_ID(revisionid);
2079         codec->stepping_id = HDA_PARAM_REVISION_ID_STEPPING_ID(revisionid);
2080
2081         if (vendorid == HDAC_INVALID && revisionid == HDAC_INVALID) {
2082                 device_printf(sc->dev, "Codec #%d is not responding!"
2083                     " Probing aborted.\n", cad);
2084                 return;
2085         }
2086
2087         device_printf(sc->dev, "HDA Codec #%d: %s\n",
2088             cad, hdac_codec_name(codec));
2089         HDA_BOOTVERBOSE(
2090                 device_printf(sc->dev, " HDA Codec ID: 0x%08x\n",
2091                     hdac_codec_id(codec));
2092                 device_printf(sc->dev, "       Vendor: 0x%04x\n",
2093                     codec->vendor_id);
2094                 device_printf(sc->dev, "       Device: 0x%04x\n",
2095                     codec->device_id);
2096                 device_printf(sc->dev, "     Revision: 0x%02x\n",
2097                     codec->revision_id);
2098                 device_printf(sc->dev, "     Stepping: 0x%02x\n",
2099                     codec->stepping_id);
2100                 device_printf(sc->dev, "PCI Subvendor: 0x%08x\n",
2101                     sc->pci_subvendor);
2102         );
2103         subnode = hdac_command(sc,
2104             HDA_CMD_GET_PARAMETER(cad, 0x0, HDA_PARAM_SUB_NODE_COUNT),
2105             cad);
2106         startnode = HDA_PARAM_SUB_NODE_COUNT_START(subnode);
2107         endnode = startnode + HDA_PARAM_SUB_NODE_COUNT_TOTAL(subnode);
2108
2109         HDA_BOOTHVERBOSE(
2110                 device_printf(sc->dev, "\tstartnode=%d endnode=%d\n",
2111                     startnode, endnode);
2112         );
2113
2114         codec->fgs = (struct hdac_devinfo *)malloc(sizeof(struct hdac_devinfo) *
2115             (endnode - startnode), M_HDAC, M_NOWAIT | M_ZERO);
2116         if (codec->fgs == NULL) {
2117                 device_printf(sc->dev, "%s: Unable to allocate function groups\n",
2118                     __func__);
2119                 return;
2120         }
2121
2122         for (i = startnode; i < endnode; i++)
2123                 hdac_probe_function(codec, i);
2124         return;
2125 }
2126
2127 /*
2128  * Probe codec function and add it to the list.
2129  */
2130 static void
2131 hdac_probe_function(struct hdac_codec *codec, nid_t nid)
2132 {
2133         struct hdac_softc *sc = codec->sc;
2134         struct hdac_devinfo *devinfo = &codec->fgs[codec->num_fgs];
2135         uint32_t fctgrptype;
2136         uint32_t res;
2137         nid_t cad = codec->cad;
2138
2139         fctgrptype = HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE(hdac_command(sc,
2140             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_FCT_GRP_TYPE), cad));
2141
2142         devinfo->nid = nid;
2143         devinfo->node_type = fctgrptype;
2144         devinfo->codec = codec;
2145
2146         res = hdac_command(sc,
2147             HDA_CMD_GET_PARAMETER(cad , nid, HDA_PARAM_SUB_NODE_COUNT), cad);
2148
2149         devinfo->nodecnt = HDA_PARAM_SUB_NODE_COUNT_TOTAL(res);
2150         devinfo->startnode = HDA_PARAM_SUB_NODE_COUNT_START(res);
2151         devinfo->endnode = devinfo->startnode + devinfo->nodecnt;
2152
2153         HDA_BOOTVERBOSE(
2154                 device_printf(sc->dev,
2155                     "\tFound %s FG nid=%d startnode=%d endnode=%d total=%d\n",
2156                     (fctgrptype == HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO) ? "audio":
2157                     (fctgrptype == HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_MODEM) ? "modem":
2158                     "unknown", nid, devinfo->startnode, devinfo->endnode,
2159                     devinfo->nodecnt);
2160         );
2161
2162         if (devinfo->nodecnt > 0)
2163                 devinfo->widget = (struct hdac_widget *)malloc(
2164                     sizeof(*(devinfo->widget)) * devinfo->nodecnt, M_HDAC,
2165                     M_NOWAIT | M_ZERO);
2166         else
2167                 devinfo->widget = NULL;
2168
2169         if (devinfo->widget == NULL) {
2170                 device_printf(sc->dev, "unable to allocate widgets!\n");
2171                 devinfo->endnode = devinfo->startnode;
2172                 devinfo->nodecnt = 0;
2173                 return;
2174         }
2175
2176         codec->num_fgs++;
2177 }
2178
2179 static void
2180 hdac_widget_connection_parse(struct hdac_widget *w)
2181 {
2182         struct hdac_softc *sc = w->devinfo->codec->sc;
2183         uint32_t res;
2184         int i, j, max, ents, entnum;
2185         nid_t cad = w->devinfo->codec->cad;
2186         nid_t nid = w->nid;
2187         nid_t cnid, addcnid, prevcnid;
2188
2189         w->nconns = 0;
2190
2191         res = hdac_command(sc,
2192             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_CONN_LIST_LENGTH), cad);
2193
2194         ents = HDA_PARAM_CONN_LIST_LENGTH_LIST_LENGTH(res);
2195
2196         if (ents < 1)
2197                 return;
2198
2199         entnum = HDA_PARAM_CONN_LIST_LENGTH_LONG_FORM(res) ? 2 : 4;
2200         max = (sizeof(w->conns) / sizeof(w->conns[0])) - 1;
2201         prevcnid = 0;
2202
2203 #define CONN_RMASK(e)           (1 << ((32 / (e)) - 1))
2204 #define CONN_NMASK(e)           (CONN_RMASK(e) - 1)
2205 #define CONN_RESVAL(r, e, n)    ((r) >> ((32 / (e)) * (n)))
2206 #define CONN_RANGE(r, e, n)     (CONN_RESVAL(r, e, n) & CONN_RMASK(e))
2207 #define CONN_CNID(r, e, n)      (CONN_RESVAL(r, e, n) & CONN_NMASK(e))
2208
2209         for (i = 0; i < ents; i += entnum) {
2210                 res = hdac_command(sc,
2211                     HDA_CMD_GET_CONN_LIST_ENTRY(cad, nid, i), cad);
2212                 for (j = 0; j < entnum; j++) {
2213                         cnid = CONN_CNID(res, entnum, j);
2214                         if (cnid == 0) {
2215                                 if (w->nconns < ents)
2216                                         device_printf(sc->dev,
2217                                             "%s: nid=%d WARNING: zero cnid "
2218                                             "entnum=%d j=%d index=%d "
2219                                             "entries=%d found=%d res=0x%08x\n",
2220                                             __func__, nid, entnum, j, i,
2221                                             ents, w->nconns, res);
2222                                 else
2223                                         goto getconns_out;
2224                         }
2225                         if (cnid < w->devinfo->startnode ||
2226                             cnid >= w->devinfo->endnode) {
2227                                 HDA_BOOTVERBOSE(
2228                                         device_printf(sc->dev,
2229                                             "GHOST: nid=%d j=%d "
2230                                             "entnum=%d index=%d res=0x%08x\n",
2231                                             nid, j, entnum, i, res);
2232                                 );
2233                         }
2234                         if (CONN_RANGE(res, entnum, j) == 0)
2235                                 addcnid = cnid;
2236                         else if (prevcnid == 0 || prevcnid >= cnid) {
2237                                 device_printf(sc->dev,
2238                                     "%s: WARNING: Invalid child range "
2239                                     "nid=%d index=%d j=%d entnum=%d "
2240                                     "prevcnid=%d cnid=%d res=0x%08x\n",
2241                                     __func__, nid, i, j, entnum, prevcnid,
2242                                     cnid, res);
2243                                 addcnid = cnid;
2244                         } else
2245                                 addcnid = prevcnid + 1;
2246                         while (addcnid <= cnid) {
2247                                 if (w->nconns > max) {
2248                                         device_printf(sc->dev,
2249                                             "Adding %d (nid=%d): "
2250                                             "Max connection reached! max=%d\n",
2251                                             addcnid, nid, max + 1);
2252                                         goto getconns_out;
2253                                 }
2254                                 w->connsenable[w->nconns] = 1;
2255                                 w->conns[w->nconns++] = addcnid++;
2256                         }
2257                         prevcnid = cnid;
2258                 }
2259         }
2260
2261 getconns_out:
2262         return;
2263 }
2264
2265 static uint32_t
2266 hdac_widget_pin_patch(uint32_t config, const char *str)
2267 {
2268         char buf[256];
2269         char *key, *value, *rest, *bad;
2270         int ival, i;
2271
2272         strlcpy(buf, str, sizeof(buf));
2273         rest = buf;
2274         while ((key = strsep(&rest, "=")) != NULL) {
2275                 value = strsep(&rest, " \t");
2276                 if (value == NULL)
2277                         break;
2278                 ival = strtol(value, &bad, 10);
2279                 if (strcmp(key, "seq") == 0) {
2280                         config &= ~HDA_CONFIG_DEFAULTCONF_SEQUENCE_MASK;
2281                         config |= ((ival << HDA_CONFIG_DEFAULTCONF_SEQUENCE_SHIFT) &
2282                             HDA_CONFIG_DEFAULTCONF_SEQUENCE_MASK);
2283                 } else if (strcmp(key, "as") == 0) {
2284                         config &= ~HDA_CONFIG_DEFAULTCONF_ASSOCIATION_MASK;
2285                         config |= ((ival << HDA_CONFIG_DEFAULTCONF_ASSOCIATION_SHIFT) &
2286                             HDA_CONFIG_DEFAULTCONF_ASSOCIATION_MASK);
2287                 } else if (strcmp(key, "misc") == 0) {
2288                         config &= ~HDA_CONFIG_DEFAULTCONF_MISC_MASK;
2289                         config |= ((ival << HDA_CONFIG_DEFAULTCONF_MISC_SHIFT) &
2290                             HDA_CONFIG_DEFAULTCONF_MISC_MASK);
2291                 } else if (strcmp(key, "color") == 0) {
2292                         config &= ~HDA_CONFIG_DEFAULTCONF_COLOR_MASK;
2293                         if (bad[0] == 0) {
2294                                 config |= ((ival << HDA_CONFIG_DEFAULTCONF_COLOR_SHIFT) &
2295                                     HDA_CONFIG_DEFAULTCONF_COLOR_MASK);
2296                         };
2297                         for (i = 0; i < 16; i++) {
2298                                 if (strcasecmp(HDA_COLORS[i], value) == 0) {
2299                                         config |= (i << HDA_CONFIG_DEFAULTCONF_COLOR_SHIFT);
2300                                         break;
2301                                 }
2302                         }
2303                 } else if (strcmp(key, "ctype") == 0) {
2304                         config &= ~HDA_CONFIG_DEFAULTCONF_CONNECTION_TYPE_MASK;
2305                         config |= ((ival << HDA_CONFIG_DEFAULTCONF_CONNECTION_TYPE_SHIFT) &
2306                             HDA_CONFIG_DEFAULTCONF_CONNECTION_TYPE_MASK);
2307                 } else if (strcmp(key, "device") == 0) {
2308                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2309                         if (bad[0] == 0) {
2310                                 config |= ((ival << HDA_CONFIG_DEFAULTCONF_DEVICE_SHIFT) &
2311                                     HDA_CONFIG_DEFAULTCONF_DEVICE_MASK);
2312                                 continue;
2313                         };
2314                         for (i = 0; i < 16; i++) {
2315                                 if (strcasecmp(HDA_DEVS[i], value) == 0) {
2316                                         config |= (i << HDA_CONFIG_DEFAULTCONF_DEVICE_SHIFT);
2317                                         break;
2318                                 }
2319                         }
2320                 } else if (strcmp(key, "loc") == 0) {
2321                         config &= ~HDA_CONFIG_DEFAULTCONF_LOCATION_MASK;
2322                         config |= ((ival << HDA_CONFIG_DEFAULTCONF_LOCATION_SHIFT) &
2323                             HDA_CONFIG_DEFAULTCONF_LOCATION_MASK);
2324                 } else if (strcmp(key, "conn") == 0) {
2325                         config &= ~HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK;
2326                         if (bad[0] == 0) {
2327                                 config |= ((ival << HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_SHIFT) &
2328                                     HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2329                                 continue;
2330                         };
2331                         for (i = 0; i < 4; i++) {
2332                                 if (strcasecmp(HDA_CONNS[i], value) == 0) {
2333                                         config |= (i << HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_SHIFT);
2334                                         break;
2335                                 }
2336                         }
2337                 }
2338         }
2339         return (config);
2340 }
2341
2342 static uint32_t
2343 hdac_widget_pin_getconfig(struct hdac_widget *w)
2344 {
2345         struct hdac_softc *sc;
2346         uint32_t config, orig, id;
2347         nid_t cad, nid;
2348         char buf[32];
2349         const char *res = NULL, *patch = NULL;
2350
2351         sc = w->devinfo->codec->sc;
2352         cad = w->devinfo->codec->cad;
2353         nid = w->nid;
2354         id = hdac_codec_id(w->devinfo->codec);
2355
2356         config = hdac_command(sc,
2357             HDA_CMD_GET_CONFIGURATION_DEFAULT(cad, nid),
2358             cad);
2359         orig = config;
2360
2361         HDA_BOOTVERBOSE(
2362                 hdac_dump_pin_config(w, orig);
2363         );
2364
2365         /* XXX: Old patches require complete review.
2366          * Now they may create more problem then solve due to
2367          * incorrect associations.
2368          */
2369         if (id == HDA_CODEC_ALC880 && sc->pci_subvendor == LG_LW20_SUBVENDOR) {
2370                 switch (nid) {
2371                 case 26:
2372                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2373                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN;
2374                         break;
2375                 case 27:
2376                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2377                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT;
2378                         break;
2379                 default:
2380                         break;
2381                 }
2382         } else if (id == HDA_CODEC_ALC880 &&
2383             (sc->pci_subvendor == CLEVO_D900T_SUBVENDOR ||
2384             sc->pci_subvendor == ASUS_M5200_SUBVENDOR)) {
2385                 /*
2386                  * Super broken BIOS
2387                  */
2388                 switch (nid) {
2389                 case 24:        /* MIC1 */
2390                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2391                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN;
2392                         break;
2393                 case 25:        /* XXX MIC2 */
2394                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2395                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN;
2396                         break;
2397                 case 26:        /* LINE1 */
2398                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2399                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN;
2400                         break;
2401                 case 27:        /* XXX LINE2 */
2402                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2403                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN;
2404                         break;
2405                 case 28:        /* CD */
2406                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2407                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_CD;
2408                         break;
2409                 }
2410         } else if (id == HDA_CODEC_ALC883 &&
2411             (sc->pci_subvendor == MSI_MS034A_SUBVENDOR ||
2412             HDA_DEV_MATCH(ACER_ALL_SUBVENDOR, sc->pci_subvendor))) {
2413                 switch (nid) {
2414                 case 25:
2415                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2416                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2417                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN |
2418                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED);
2419                         break;
2420                 case 28:
2421                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2422                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2423                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_CD |
2424                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED);
2425                         break;
2426                 }
2427         } else if (id == HDA_CODEC_CX20549 && sc->pci_subvendor ==
2428             HP_V3000_SUBVENDOR) {
2429                 switch (nid) {
2430                 case 18:
2431                         config &= ~HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK;
2432                         config |= HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_NONE;
2433                         break;
2434                 case 20:
2435                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2436                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2437                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN |
2438                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED);
2439                         break;
2440                 case 21:
2441                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2442                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2443                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_CD |
2444                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED);
2445                         break;
2446                 }
2447         } else if (id == HDA_CODEC_CX20551 && sc->pci_subvendor ==
2448             HP_DV5000_SUBVENDOR) {
2449                 switch (nid) {
2450                 case 20:
2451                 case 21:
2452                         config &= ~HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK;
2453                         config |= HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_NONE;
2454                         break;
2455                 }
2456         } else if (id == HDA_CODEC_ALC861 && sc->pci_subvendor ==
2457             ASUS_W6F_SUBVENDOR) {
2458                 switch (nid) {
2459                 case 11:
2460                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2461                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2462                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_OUT |
2463                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED);
2464                         break;
2465                 case 12:
2466                 case 14:
2467                 case 16:
2468                 case 31:
2469                 case 32:
2470                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2471                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2472                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN |
2473                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED);
2474                         break;
2475                 case 15:
2476                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2477                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2478                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT |
2479                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_JACK);
2480                         break;
2481                 }
2482         } else if (id == HDA_CODEC_ALC861 && sc->pci_subvendor ==
2483             UNIWILL_9075_SUBVENDOR) {
2484                 switch (nid) {
2485                 case 15:
2486                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2487                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2488                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT |
2489                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_JACK);
2490                         break;
2491                 }
2492         }
2493
2494         /* New patches */
2495         if (id == HDA_CODEC_AD1986A &&
2496             (sc->pci_subvendor == ASUS_M2NPVMX_SUBVENDOR ||
2497             sc->pci_subvendor == ASUS_A8NVMCSM_SUBVENDOR ||
2498             sc->pci_subvendor == ASUS_P5PL2_SUBVENDOR)) {
2499                 switch (nid) {
2500                 case 26: /* Headphones with redirection */
2501                         patch = "as=1 seq=15";
2502                         break;
2503                 case 28: /* 5.1 out => 2.0 out + 1 input */
2504                         patch = "device=Line-in as=8 seq=1";
2505                         break;
2506                 case 29: /* Can't use this as input, as the only available mic
2507                           * preamplifier is busy by front panel mic (nid 31).
2508                           * If you want to use this rear connector as mic input,
2509                           * you have to disable the front panel one. */
2510                         patch = "as=0";
2511                         break;
2512                 case 31: /* Lot of inputs configured with as=15 and unusable */
2513                         patch = "as=8 seq=3";
2514                         break;
2515                 case 32:
2516                         patch = "as=8 seq=4";
2517                         break;
2518                 case 34:
2519                         patch = "as=8 seq=5";
2520                         break;
2521                 case 36:
2522                         patch = "as=8 seq=6";
2523                         break;
2524                 }
2525         } else if (id == HDA_CODEC_ALC260 &&
2526             HDA_DEV_MATCH(SONY_S5_SUBVENDOR, sc->pci_subvendor)) {
2527                 switch (nid) {
2528                 case 16:
2529                         patch = "seq=15 device=Headphones";
2530                         break;
2531                 }
2532         } else if (id == HDA_CODEC_ALC268) {
2533             if (sc->pci_subvendor == ACER_T5320_SUBVENDOR) {
2534                 switch (nid) {
2535                 case 20: /* Headphones Jack */
2536                         patch = "as=1 seq=15";
2537                         break;
2538                 }
2539             }
2540         }
2541
2542         if (patch != NULL)
2543                 config = hdac_widget_pin_patch(config, patch);
2544
2545         snprintf(buf, sizeof(buf), "cad%u.nid%u.config", cad, nid);
2546         if (resource_string_value(device_get_name(sc->dev),
2547             device_get_unit(sc->dev), buf, &res) == 0) {
2548                 if (strncmp(res, "0x", 2) == 0) {
2549                         config = strtol(res + 2, NULL, 16);
2550                 } else {
2551                         config = hdac_widget_pin_patch(config, res);
2552                 }
2553         }
2554
2555         HDA_BOOTVERBOSE(
2556                 if (config != orig)
2557                         device_printf(sc->dev,
2558                             "Patching pin config nid=%u 0x%08x -> 0x%08x\n",
2559                             nid, orig, config);
2560         );
2561
2562         return (config);
2563 }
2564
2565 static uint32_t
2566 hdac_widget_pin_getcaps(struct hdac_widget *w)
2567 {
2568         struct hdac_softc *sc;
2569         uint32_t caps, orig, id;
2570         nid_t cad, nid;
2571
2572         sc = w->devinfo->codec->sc;
2573         cad = w->devinfo->codec->cad;
2574         nid = w->nid;
2575         id = hdac_codec_id(w->devinfo->codec);
2576
2577         caps = hdac_command(sc,
2578             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_PIN_CAP), cad);
2579         orig = caps;
2580
2581         HDA_BOOTVERBOSE(
2582                 if (caps != orig)
2583                         device_printf(sc->dev,
2584                             "Patching pin caps nid=%u 0x%08x -> 0x%08x\n",
2585                             nid, orig, caps);
2586         );
2587
2588         return (caps);
2589 }
2590
2591 static void
2592 hdac_widget_pin_parse(struct hdac_widget *w)
2593 {
2594         struct hdac_softc *sc = w->devinfo->codec->sc;
2595         uint32_t config, pincap;
2596         const char *devstr;
2597         nid_t cad = w->devinfo->codec->cad;
2598         nid_t nid = w->nid;
2599         int conn, color;
2600
2601         config = hdac_widget_pin_getconfig(w);
2602         w->wclass.pin.config = config;
2603
2604         pincap = hdac_widget_pin_getcaps(w);
2605         w->wclass.pin.cap = pincap;
2606
2607         w->wclass.pin.ctrl = hdac_command(sc,
2608             HDA_CMD_GET_PIN_WIDGET_CTRL(cad, nid), cad);
2609
2610         if (HDA_PARAM_PIN_CAP_EAPD_CAP(pincap)) {
2611                 w->param.eapdbtl = hdac_command(sc,
2612                     HDA_CMD_GET_EAPD_BTL_ENABLE(cad, nid), cad);
2613                 w->param.eapdbtl &= 0x7;
2614                 w->param.eapdbtl |= HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD;
2615         } else
2616                 w->param.eapdbtl = HDAC_INVALID;
2617
2618         devstr = HDA_DEVS[(config & HDA_CONFIG_DEFAULTCONF_DEVICE_MASK) >>
2619             HDA_CONFIG_DEFAULTCONF_DEVICE_SHIFT];
2620
2621         conn = (config & HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK) >>
2622             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_SHIFT;
2623         color = (config & HDA_CONFIG_DEFAULTCONF_COLOR_MASK) >>
2624             HDA_CONFIG_DEFAULTCONF_COLOR_SHIFT;
2625
2626         strlcat(w->name, ": ", sizeof(w->name));
2627         strlcat(w->name, devstr, sizeof(w->name));
2628         strlcat(w->name, " (", sizeof(w->name));
2629         if (conn == 0 && color != 0 && color != 15) {
2630                 strlcat(w->name, HDA_COLORS[color], sizeof(w->name));
2631                 strlcat(w->name, " ", sizeof(w->name));
2632         }
2633         strlcat(w->name, HDA_CONNS[conn], sizeof(w->name));
2634         strlcat(w->name, ")", sizeof(w->name));
2635 }
2636
2637 static uint32_t
2638 hdac_widget_getcaps(struct hdac_widget *w, int *waspin)
2639 {
2640         struct hdac_softc *sc;
2641         uint32_t caps, orig, id;
2642         nid_t cad, nid, beeper = -1;
2643
2644         sc = w->devinfo->codec->sc;
2645         cad = w->devinfo->codec->cad;
2646         nid = w->nid;
2647         id = hdac_codec_id(w->devinfo->codec);
2648
2649         caps = hdac_command(sc,
2650             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_AUDIO_WIDGET_CAP),
2651             cad);
2652         orig = caps;
2653
2654         /* On some codecs beeper is an input pin, but it is not recordable
2655            alone. Also most of BIOSes does not declare beeper pin.
2656            Change beeper pin node type to beeper to help parser. */
2657         *waspin = 0;
2658         switch (id) {
2659         case HDA_CODEC_AD1882:
2660         case HDA_CODEC_AD1883:
2661         case HDA_CODEC_AD1984:
2662         case HDA_CODEC_AD1984A:
2663         case HDA_CODEC_AD1984B:
2664         case HDA_CODEC_AD1987:
2665         case HDA_CODEC_AD1988:
2666         case HDA_CODEC_AD1988B:
2667         case HDA_CODEC_AD1989B:
2668                 beeper = 26;
2669                 break;
2670         case HDA_CODEC_ALC260:
2671                 beeper = 23;
2672                 break;
2673         case HDA_CODEC_ALC262:
2674         case HDA_CODEC_ALC268:
2675         case HDA_CODEC_ALC880:
2676         case HDA_CODEC_ALC882:
2677         case HDA_CODEC_ALC883:
2678         case HDA_CODEC_ALC885:
2679         case HDA_CODEC_ALC888:
2680         case HDA_CODEC_ALC889:
2681                 beeper = 29;
2682                 break;
2683         }
2684         if (nid == beeper) {
2685                 caps &= ~HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_MASK;
2686                 caps |= HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET <<
2687                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_SHIFT;
2688                 *waspin = 1;
2689         }
2690
2691         HDA_BOOTVERBOSE(
2692                 if (caps != orig) {
2693                         device_printf(sc->dev,
2694                             "Patching widget caps nid=%u 0x%08x -> 0x%08x\n",
2695                             nid, orig, caps);
2696                 }
2697         );
2698
2699         return (caps);
2700 }
2701
2702 static void
2703 hdac_widget_parse(struct hdac_widget *w)
2704 {
2705         struct hdac_softc *sc = w->devinfo->codec->sc;
2706         uint32_t wcap, cap;
2707         char *typestr;
2708         nid_t cad = w->devinfo->codec->cad;
2709         nid_t nid = w->nid;
2710
2711         wcap = hdac_widget_getcaps(w, &w->waspin);
2712
2713         w->param.widget_cap = wcap;
2714         w->type = HDA_PARAM_AUDIO_WIDGET_CAP_TYPE(wcap);
2715
2716         switch (w->type) {
2717         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT:
2718                 typestr = "audio output";
2719                 break;
2720         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT:
2721                 typestr = "audio input";
2722                 break;
2723         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER:
2724                 typestr = "audio mixer";
2725                 break;
2726         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR:
2727                 typestr = "audio selector";
2728                 break;
2729         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX:
2730                 typestr = "pin";
2731                 break;
2732         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_POWER_WIDGET:
2733                 typestr = "power widget";
2734                 break;
2735         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_VOLUME_WIDGET:
2736                 typestr = "volume widget";
2737                 break;
2738         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET:
2739                 typestr = "beep widget";
2740                 break;
2741         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_VENDOR_WIDGET:
2742                 typestr = "vendor widget";
2743                 break;
2744         default:
2745                 typestr = "unknown type";
2746                 break;
2747         }
2748
2749         strlcpy(w->name, typestr, sizeof(w->name));
2750
2751         hdac_widget_connection_parse(w);
2752
2753         if (HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP(wcap)) {
2754                 if (HDA_PARAM_AUDIO_WIDGET_CAP_AMP_OVR(wcap))
2755                         w->param.outamp_cap =
2756                             hdac_command(sc,
2757                             HDA_CMD_GET_PARAMETER(cad, nid,
2758                             HDA_PARAM_OUTPUT_AMP_CAP), cad);
2759                 else
2760                         w->param.outamp_cap =
2761                             w->devinfo->function.audio.outamp_cap;
2762         } else
2763                 w->param.outamp_cap = 0;
2764
2765         if (HDA_PARAM_AUDIO_WIDGET_CAP_IN_AMP(wcap)) {
2766                 if (HDA_PARAM_AUDIO_WIDGET_CAP_AMP_OVR(wcap))
2767                         w->param.inamp_cap =
2768                             hdac_command(sc,
2769                             HDA_CMD_GET_PARAMETER(cad, nid,
2770                             HDA_PARAM_INPUT_AMP_CAP), cad);
2771                 else
2772                         w->param.inamp_cap =
2773                             w->devinfo->function.audio.inamp_cap;
2774         } else
2775                 w->param.inamp_cap = 0;
2776
2777         if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT ||
2778             w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT) {
2779                 if (HDA_PARAM_AUDIO_WIDGET_CAP_FORMAT_OVR(wcap)) {
2780                         cap = hdac_command(sc,
2781                             HDA_CMD_GET_PARAMETER(cad, nid,
2782                             HDA_PARAM_SUPP_STREAM_FORMATS), cad);
2783                         w->param.supp_stream_formats = (cap != 0) ? cap :
2784                             w->devinfo->function.audio.supp_stream_formats;
2785                         cap = hdac_command(sc,
2786                             HDA_CMD_GET_PARAMETER(cad, nid,
2787                             HDA_PARAM_SUPP_PCM_SIZE_RATE), cad);
2788                         w->param.supp_pcm_size_rate = (cap != 0) ? cap :
2789                             w->devinfo->function.audio.supp_pcm_size_rate;
2790                 } else {
2791                         w->param.supp_stream_formats =
2792                             w->devinfo->function.audio.supp_stream_formats;
2793                         w->param.supp_pcm_size_rate =
2794                             w->devinfo->function.audio.supp_pcm_size_rate;
2795                 }
2796         } else {
2797                 w->param.supp_stream_formats = 0;
2798                 w->param.supp_pcm_size_rate = 0;
2799         }
2800
2801         if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
2802                 hdac_widget_pin_parse(w);
2803 }
2804
2805 static struct hdac_widget *
2806 hdac_widget_get(struct hdac_devinfo *devinfo, nid_t nid)
2807 {
2808         if (devinfo == NULL || devinfo->widget == NULL ||
2809                     nid < devinfo->startnode || nid >= devinfo->endnode)
2810                 return (NULL);
2811         return (&devinfo->widget[nid - devinfo->startnode]);
2812 }
2813
2814 static __inline int
2815 hda_poll_channel(struct hdac_chan *ch)
2816 {
2817         uint32_t sz, delta;
2818         volatile uint32_t ptr;
2819
2820         if (!(ch->flags & HDAC_CHN_RUNNING))
2821                 return (0);
2822
2823         sz = ch->blksz * ch->blkcnt;
2824         if (ch->dmapos != NULL)
2825                 ptr = *(ch->dmapos);
2826         else
2827                 ptr = HDAC_READ_4(&ch->devinfo->codec->sc->mem,
2828                     ch->off + HDAC_SDLPIB);
2829         ch->ptr = ptr;
2830         ptr %= sz;
2831         ptr &= ~(ch->blksz - 1);
2832         delta = (sz + ptr - ch->prevptr) % sz;
2833
2834         if (delta < ch->blksz)
2835                 return (0);
2836
2837         ch->prevptr = ptr;
2838
2839         return (1);
2840 }
2841
2842 static void
2843 hda_poll_callback(void *arg)
2844 {
2845         struct hdac_softc *sc = arg;
2846         uint32_t trigger;
2847         int i, active = 0;
2848
2849         if (sc == NULL)
2850                 return;
2851
2852         hdac_lock(sc);
2853         if (sc->polling == 0) {
2854                 hdac_unlock(sc);
2855                 return;
2856         }
2857
2858         trigger = 0;
2859         for (i = 0; i < sc->num_chans; i++) {
2860                 if ((sc->chans[i].flags & HDAC_CHN_RUNNING) == 0)
2861                     continue;
2862                 active = 1;
2863                 if (hda_poll_channel(&sc->chans[i]))
2864                     trigger |= (1 << i);
2865         }
2866
2867         /* XXX */
2868         if (active)
2869                 callout_reset(&sc->poll_hda, sc->poll_ticks,
2870                     hda_poll_callback, sc);
2871
2872         hdac_unlock(sc);
2873
2874         for (i = 0; i < sc->num_chans; i++) {
2875                 if (trigger & (1 << i))
2876                         chn_intr(sc->chans[i].c);
2877         }
2878 }
2879
2880 static int
2881 hdac_rirb_flush(struct hdac_softc *sc)
2882 {
2883         struct hdac_rirb *rirb_base, *rirb;
2884         struct hdac_codec *codec;
2885         struct hdac_command_list *commands;
2886         nid_t cad;
2887         uint32_t resp;
2888         uint8_t rirbwp;
2889         int ret;
2890
2891         rirb_base = (struct hdac_rirb *)sc->rirb_dma.dma_vaddr;
2892         rirbwp = HDAC_READ_1(&sc->mem, HDAC_RIRBWP);
2893 #if 0
2894         bus_dmamap_sync(sc->rirb_dma.dma_tag, sc->rirb_dma.dma_map,
2895             BUS_DMASYNC_POSTREAD);
2896 #endif
2897
2898         ret = 0;
2899
2900         while (sc->rirb_rp != rirbwp) {
2901                 sc->rirb_rp++;
2902                 sc->rirb_rp %= sc->rirb_size;
2903                 rirb = &rirb_base[sc->rirb_rp];
2904                 cad = HDAC_RIRB_RESPONSE_EX_SDATA_IN(rirb->response_ex);
2905                 if (cad < 0 || cad >= HDAC_CODEC_MAX ||
2906                     sc->codecs[cad] == NULL)
2907                         continue;
2908                 resp = rirb->response;
2909                 codec = sc->codecs[cad];
2910                 commands = codec->commands;
2911                 if (rirb->response_ex & HDAC_RIRB_RESPONSE_EX_UNSOLICITED) {
2912                         sc->unsolq[sc->unsolq_wp++] = (cad << 16) |
2913                             ((resp >> 26) & 0xffff);
2914                         sc->unsolq_wp %= HDAC_UNSOLQ_MAX;
2915                 } else if (commands != NULL && commands->num_commands > 0 &&
2916                     codec->responses_received < commands->num_commands)
2917                         commands->responses[codec->responses_received++] =
2918                             resp;
2919                 ret++;
2920         }
2921
2922         return (ret);
2923 }
2924
2925 static int
2926 hdac_unsolq_flush(struct hdac_softc *sc)
2927 {
2928         nid_t cad;
2929         uint32_t tag;
2930         int ret = 0;
2931
2932         if (sc->unsolq_st == HDAC_UNSOLQ_READY) {
2933                 sc->unsolq_st = HDAC_UNSOLQ_BUSY;
2934                 while (sc->unsolq_rp != sc->unsolq_wp) {
2935                         cad = sc->unsolq[sc->unsolq_rp] >> 16;
2936                         tag = sc->unsolq[sc->unsolq_rp++] & 0xffff;
2937                         sc->unsolq_rp %= HDAC_UNSOLQ_MAX;
2938                         hdac_unsolicited_handler(sc->codecs[cad], tag);
2939                         ret++;
2940                 }
2941                 sc->unsolq_st = HDAC_UNSOLQ_READY;
2942         }
2943
2944         return (ret);
2945 }
2946
2947 static void
2948 hdac_poll_callback(void *arg)
2949 {
2950         struct hdac_softc *sc = arg;
2951         if (sc == NULL)
2952                 return;
2953
2954         hdac_lock(sc);
2955         if (sc->polling == 0 || sc->poll_ival == 0) {
2956                 hdac_unlock(sc);
2957                 return;
2958         }
2959         if (hdac_rirb_flush(sc) != 0)
2960                 hdac_unsolq_flush(sc);
2961         callout_reset(&sc->poll_hdac, sc->poll_ival, hdac_poll_callback, sc);
2962         hdac_unlock(sc);
2963 }
2964
2965 static void
2966 hdac_poll_reinit(struct hdac_softc *sc)
2967 {
2968         int i, pollticks, min = 1000000;
2969         struct hdac_chan *ch;
2970
2971         for (i = 0; i < sc->num_chans; i++) {
2972                 if ((sc->chans[i].flags & HDAC_CHN_RUNNING) == 0)
2973                         continue;
2974                 ch = &sc->chans[i];
2975                 pollticks = ((uint64_t)hz * ch->blksz) /
2976                     ((uint64_t)sndbuf_getalign(ch->b) * sndbuf_getspd(ch->b));
2977                 pollticks >>= 1;
2978                 if (pollticks > hz)
2979                         pollticks = hz;
2980                 if (pollticks < 1) {
2981                         HDA_BOOTVERBOSE(
2982                                 device_printf(sc->dev,
2983                                     "%s: pollticks=%d < 1 !\n",
2984                                     __func__, pollticks);
2985                         );
2986                         pollticks = 1;
2987                 }
2988                 if (min > pollticks)
2989                         min = pollticks;
2990         }
2991         HDA_BOOTVERBOSE(
2992                 device_printf(sc->dev,
2993                     "%s: pollticks %d -> %d\n",
2994                     __func__, sc->poll_ticks, min);
2995         );
2996         sc->poll_ticks = min;
2997         if (min == 1000000)
2998                 callout_stop(&sc->poll_hda);
2999         else
3000                 callout_reset(&sc->poll_hda, 1, hda_poll_callback, sc);
3001 }
3002
3003 static void
3004 hdac_stream_stop(struct hdac_chan *ch)
3005 {
3006         struct hdac_softc *sc = ch->devinfo->codec->sc;
3007         uint32_t ctl;
3008
3009         ctl = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDCTL0);
3010         ctl &= ~(HDAC_SDCTL_IOCE | HDAC_SDCTL_FEIE | HDAC_SDCTL_DEIE |
3011             HDAC_SDCTL_RUN);
3012         HDAC_WRITE_1(&sc->mem, ch->off + HDAC_SDCTL0, ctl);
3013
3014         ch->flags &= ~HDAC_CHN_RUNNING;
3015
3016         if (sc->polling != 0)
3017                 hdac_poll_reinit(sc);
3018
3019         ctl = HDAC_READ_4(&sc->mem, HDAC_INTCTL);
3020         ctl &= ~(1 << (ch->off >> 5));
3021         HDAC_WRITE_4(&sc->mem, HDAC_INTCTL, ctl);
3022 }
3023
3024 static void
3025 hdac_stream_start(struct hdac_chan *ch)
3026 {
3027         struct hdac_softc *sc = ch->devinfo->codec->sc;
3028         uint32_t ctl;
3029
3030         ch->flags |= HDAC_CHN_RUNNING;
3031
3032         if (sc->polling != 0)
3033                 hdac_poll_reinit(sc);
3034
3035         ctl = HDAC_READ_4(&sc->mem, HDAC_INTCTL);
3036         ctl |= 1 << (ch->off >> 5);
3037         HDAC_WRITE_4(&sc->mem, HDAC_INTCTL, ctl);
3038
3039         ctl = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDCTL0);
3040         ctl |= HDAC_SDCTL_IOCE | HDAC_SDCTL_FEIE | HDAC_SDCTL_DEIE |
3041             HDAC_SDCTL_RUN;
3042         HDAC_WRITE_1(&sc->mem, ch->off + HDAC_SDCTL0, ctl);
3043 }
3044
3045 static void
3046 hdac_stream_reset(struct hdac_chan *ch)
3047 {
3048         struct hdac_softc *sc = ch->devinfo->codec->sc;
3049         int timeout = 1000;
3050         int to = timeout;
3051         uint32_t ctl;
3052
3053         ctl = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDCTL0);
3054         ctl |= HDAC_SDCTL_SRST;
3055         HDAC_WRITE_1(&sc->mem, ch->off + HDAC_SDCTL0, ctl);
3056         do {
3057                 ctl = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDCTL0);
3058                 if (ctl & HDAC_SDCTL_SRST)
3059                         break;
3060                 DELAY(10);
3061         } while (--to);
3062         if (!(ctl & HDAC_SDCTL_SRST)) {
3063                 device_printf(sc->dev, "timeout in reset\n");
3064         }
3065         ctl &= ~HDAC_SDCTL_SRST;
3066         HDAC_WRITE_1(&sc->mem, ch->off + HDAC_SDCTL0, ctl);
3067         to = timeout;
3068         do {
3069                 ctl = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDCTL0);
3070                 if (!(ctl & HDAC_SDCTL_SRST))
3071                         break;
3072                 DELAY(10);
3073         } while (--to);
3074         if (ctl & HDAC_SDCTL_SRST)
3075                 device_printf(sc->dev, "can't reset!\n");
3076 }
3077
3078 static void
3079 hdac_stream_setid(struct hdac_chan *ch)
3080 {
3081         struct hdac_softc *sc = ch->devinfo->codec->sc;
3082         uint32_t ctl;
3083
3084         ctl = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDCTL2);
3085         ctl &= ~HDAC_SDCTL2_STRM_MASK;
3086         ctl |= ch->sid << HDAC_SDCTL2_STRM_SHIFT;
3087         HDAC_WRITE_1(&sc->mem, ch->off + HDAC_SDCTL2, ctl);
3088 }
3089
3090 static void
3091 hdac_bdl_setup(struct hdac_chan *ch)
3092 {
3093         struct hdac_softc *sc = ch->devinfo->codec->sc;
3094         struct hdac_bdle *bdle;
3095         uint64_t addr;
3096         uint32_t blksz, blkcnt;
3097         int i;
3098
3099         addr = (uint64_t)sndbuf_getbufaddr(ch->b);
3100         bdle = (struct hdac_bdle *)ch->bdl_dma.dma_vaddr;
3101
3102         blksz = ch->blksz;
3103         blkcnt = ch->blkcnt;
3104
3105         for (i = 0; i < blkcnt; i++, bdle++) {
3106                 bdle->addrl = (uint32_t)addr;
3107                 bdle->addrh = (uint32_t)(addr >> 32);
3108                 bdle->len = blksz;
3109                 bdle->ioc = 1;
3110                 addr += blksz;
3111         }
3112
3113         HDAC_WRITE_4(&sc->mem, ch->off + HDAC_SDCBL, blksz * blkcnt);
3114         HDAC_WRITE_2(&sc->mem, ch->off + HDAC_SDLVI, blkcnt - 1);
3115         addr = ch->bdl_dma.dma_paddr;
3116         HDAC_WRITE_4(&sc->mem, ch->off + HDAC_SDBDPL, (uint32_t)addr);
3117         HDAC_WRITE_4(&sc->mem, ch->off + HDAC_SDBDPU, (uint32_t)(addr >> 32));
3118         if (ch->dmapos != NULL &&
3119             !(HDAC_READ_4(&sc->mem, HDAC_DPIBLBASE) & 0x00000001)) {
3120                 addr = sc->pos_dma.dma_paddr;
3121                 HDAC_WRITE_4(&sc->mem, HDAC_DPIBLBASE,
3122                     ((uint32_t)addr & HDAC_DPLBASE_DPLBASE_MASK) | 0x00000001);
3123                 HDAC_WRITE_4(&sc->mem, HDAC_DPIBUBASE, (uint32_t)(addr >> 32));
3124         }
3125 }
3126
3127 static int
3128 hdac_bdl_alloc(struct hdac_chan *ch)
3129 {
3130         struct hdac_softc *sc = ch->devinfo->codec->sc;
3131         int rc;
3132
3133         rc = hdac_dma_alloc(sc, &ch->bdl_dma,
3134             sizeof(struct hdac_bdle) * HDA_BDL_MAX);
3135         if (rc) {
3136                 device_printf(sc->dev, "can't alloc bdl\n");
3137                 return (rc);
3138         }
3139
3140         return (0);
3141 }
3142
3143 static void
3144 hdac_audio_ctl_amp_set_internal(struct hdac_softc *sc, nid_t cad, nid_t nid,
3145                                         int index, int lmute, int rmute,
3146                                         int left, int right, int dir)
3147 {
3148         uint16_t v = 0;
3149
3150         if (sc == NULL)
3151                 return;
3152
3153         if (left != right || lmute != rmute) {
3154                 v = (1 << (15 - dir)) | (1 << 13) | (index << 8) |
3155                     (lmute << 7) | left;
3156                 hdac_command(sc,
3157                     HDA_CMD_SET_AMP_GAIN_MUTE(cad, nid, v), cad);
3158                 v = (1 << (15 - dir)) | (1 << 12) | (index << 8) |
3159                     (rmute << 7) | right;
3160         } else
3161                 v = (1 << (15 - dir)) | (3 << 12) | (index << 8) |
3162                     (lmute << 7) | left;
3163
3164         hdac_command(sc,
3165             HDA_CMD_SET_AMP_GAIN_MUTE(cad, nid, v), cad);
3166 }
3167
3168 static void
3169 hdac_audio_ctl_amp_set(struct hdac_audio_ctl *ctl, uint32_t mute,
3170                                                 int left, int right)
3171 {
3172         struct hdac_softc *sc;
3173         nid_t nid, cad;
3174         int lmute, rmute;
3175
3176         sc = ctl->widget->devinfo->codec->sc;
3177         cad = ctl->widget->devinfo->codec->cad;
3178         nid = ctl->widget->nid;
3179
3180         /* Save new values if valid. */
3181         if (mute != HDA_AMP_MUTE_DEFAULT)
3182                 ctl->muted = mute;
3183         if (left != HDA_AMP_VOL_DEFAULT)
3184                 ctl->left = left;
3185         if (right != HDA_AMP_VOL_DEFAULT)
3186                 ctl->right = right;
3187         /* Prepare effective values */
3188         if (ctl->forcemute) {
3189                 lmute = 1;
3190                 rmute = 1;
3191                 left = 0;
3192                 right = 0;
3193         } else {
3194                 lmute = HDA_AMP_LEFT_MUTED(ctl->muted);
3195                 rmute = HDA_AMP_RIGHT_MUTED(ctl->muted);
3196                 left = ctl->left;
3197                 right = ctl->right;
3198         }
3199         /* Apply effective values */
3200         if (ctl->dir & HDA_CTL_OUT)
3201                 hdac_audio_ctl_amp_set_internal(sc, cad, nid, ctl->index,
3202                     lmute, rmute, left, right, 0);
3203         if (ctl->dir & HDA_CTL_IN)
3204                 hdac_audio_ctl_amp_set_internal(sc, cad, nid, ctl->index,
3205                     lmute, rmute, left, right, 1);
3206 }
3207
3208 static void
3209 hdac_widget_connection_select(struct hdac_widget *w, uint8_t index)
3210 {
3211         if (w == NULL || w->nconns < 1 || index > (w->nconns - 1))
3212                 return;
3213         hdac_command(w->devinfo->codec->sc,
3214             HDA_CMD_SET_CONNECTION_SELECT_CONTROL(w->devinfo->codec->cad,
3215             w->nid, index), w->devinfo->codec->cad);
3216         w->selconn = index;
3217 }
3218
3219
3220 /****************************************************************************
3221  * uint32_t hdac_command_sendone_internal
3222  *
3223  * Wrapper function that sends only one command to a given codec
3224  ****************************************************************************/
3225 static uint32_t
3226 hdac_command_sendone_internal(struct hdac_softc *sc, uint32_t verb, nid_t cad)
3227 {
3228         struct hdac_command_list cl;
3229         uint32_t response = HDAC_INVALID;
3230
3231         if (!hdac_lockowned(sc))
3232                 device_printf(sc->dev, "WARNING!!!! mtx not owned!!!!\n");
3233         cl.num_commands = 1;
3234         cl.verbs = &verb;
3235         cl.responses = &response;
3236
3237         hdac_command_send_internal(sc, &cl, cad);
3238
3239         return (response);
3240 }
3241
3242 /****************************************************************************
3243  * hdac_command_send_internal
3244  *
3245  * Send a command list to the codec via the corb. We queue as much verbs as
3246  * we can and msleep on the codec. When the interrupt get the responses
3247  * back from the rirb, it will wake us up so we can queue the remaining verbs
3248  * if any.
3249  ****************************************************************************/
3250 static void
3251 hdac_command_send_internal(struct hdac_softc *sc,
3252                         struct hdac_command_list *commands, nid_t cad)
3253 {
3254         struct hdac_codec *codec;
3255         int corbrp;
3256         uint32_t *corb;
3257         int timeout;
3258         int retry = 10;
3259         struct hdac_rirb *rirb_base;
3260
3261         if (sc == NULL || sc->codecs[cad] == NULL || commands == NULL ||
3262             commands->num_commands < 1)
3263                 return;
3264
3265         codec = sc->codecs[cad];
3266         codec->commands = commands;
3267         codec->responses_received = 0;
3268         codec->verbs_sent = 0;
3269         corb = (uint32_t *)sc->corb_dma.dma_vaddr;
3270         rirb_base = (struct hdac_rirb *)sc->rirb_dma.dma_vaddr;
3271
3272         do {
3273                 if (codec->verbs_sent != commands->num_commands) {
3274                         /* Queue as many verbs as possible */
3275                         corbrp = HDAC_READ_2(&sc->mem, HDAC_CORBRP);
3276 #if 0
3277                         bus_dmamap_sync(sc->corb_dma.dma_tag,
3278                             sc->corb_dma.dma_map, BUS_DMASYNC_PREWRITE);
3279 #endif
3280                         while (codec->verbs_sent != commands->num_commands &&
3281                             ((sc->corb_wp + 1) % sc->corb_size) != corbrp) {
3282                                 sc->corb_wp++;
3283                                 sc->corb_wp %= sc->corb_size;
3284                                 corb[sc->corb_wp] =
3285                                     commands->verbs[codec->verbs_sent++];
3286                         }
3287
3288                         /* Send the verbs to the codecs */
3289 #if 0
3290                         bus_dmamap_sync(sc->corb_dma.dma_tag,
3291                             sc->corb_dma.dma_map, BUS_DMASYNC_POSTWRITE);
3292 #endif
3293                         HDAC_WRITE_2(&sc->mem, HDAC_CORBWP, sc->corb_wp);
3294                 }
3295
3296                 timeout = 1000;
3297                 while (hdac_rirb_flush(sc) == 0 && --timeout)
3298                         DELAY(10);
3299         } while ((codec->verbs_sent != commands->num_commands ||
3300             codec->responses_received != commands->num_commands) && --retry);
3301
3302         if (retry == 0)
3303                 device_printf(sc->dev,
3304                     "%s: TIMEOUT numcmd=%d, sent=%d, received=%d\n",
3305                     __func__, commands->num_commands, codec->verbs_sent,
3306                     codec->responses_received);
3307
3308         codec->commands = NULL;
3309         codec->responses_received = 0;
3310         codec->verbs_sent = 0;
3311
3312         hdac_unsolq_flush(sc);
3313 }
3314
3315
3316 /****************************************************************************
3317  * Device Methods
3318  ****************************************************************************/
3319
3320 /****************************************************************************
3321  * int hdac_probe(device_t)
3322  *
3323  * Probe for the presence of an hdac. If none is found, check for a generic
3324  * match using the subclass of the device.
3325  ****************************************************************************/
3326 static int
3327 hdac_probe(device_t dev)
3328 {
3329         int i, result;
3330         uint32_t model;
3331         uint16_t class, subclass;
3332         char desc[64];
3333
3334         model = (uint32_t)pci_get_device(dev) << 16;
3335         model |= (uint32_t)pci_get_vendor(dev) & 0x0000ffff;
3336         class = pci_get_class(dev);
3337         subclass = pci_get_subclass(dev);
3338
3339         bzero(desc, sizeof(desc));
3340         result = ENXIO;
3341         for (i = 0; i < HDAC_DEVICES_LEN; i++) {
3342                 if (hdac_devices[i].model == model) {
3343                         strlcpy(desc, hdac_devices[i].desc, sizeof(desc));
3344                         result = BUS_PROBE_DEFAULT;
3345                         break;
3346                 }
3347                 if (HDA_DEV_MATCH(hdac_devices[i].model, model) &&
3348                     class == PCIC_MULTIMEDIA &&
3349                     subclass == PCIS_MULTIMEDIA_HDA) {
3350                         strlcpy(desc, hdac_devices[i].desc, sizeof(desc));
3351                         result = BUS_PROBE_GENERIC;
3352                         break;
3353                 }
3354         }
3355         if (result == ENXIO && class == PCIC_MULTIMEDIA &&
3356             subclass == PCIS_MULTIMEDIA_HDA) {
3357                 strlcpy(desc, "Generic", sizeof(desc));
3358                 result = BUS_PROBE_GENERIC;
3359         }
3360         if (result != ENXIO) {
3361                 strlcat(desc, " High Definition Audio Controller",
3362                     sizeof(desc));
3363                 device_set_desc_copy(dev, desc);
3364         }
3365
3366         return (result);
3367 }
3368
3369 static void *
3370 hdac_channel_init(kobj_t obj, void *data, struct snd_dbuf *b,
3371                                         struct pcm_channel *c, int dir)
3372 {
3373         struct hdac_pcm_devinfo *pdevinfo = data;
3374         struct hdac_devinfo *devinfo = pdevinfo->devinfo;
3375         struct hdac_softc *sc = devinfo->codec->sc;
3376         struct hdac_chan *ch;
3377         int i, ord = 0, chid;
3378
3379         hdac_lock(sc);
3380
3381         chid = (dir == PCMDIR_PLAY)?pdevinfo->play:pdevinfo->rec;
3382         ch = &sc->chans[chid];
3383         for (i = 0; i < sc->num_chans && i < chid; i++) {
3384                 if (ch->dir == sc->chans[i].dir)
3385                         ord++;
3386         }
3387         if (dir == PCMDIR_PLAY) {
3388                 ch->off = (sc->num_iss + ord) << 5;
3389         } else {
3390                 ch->off = ord << 5;
3391         }
3392
3393         if (devinfo->function.audio.quirks & HDA_QUIRK_FIXEDRATE) {
3394                 ch->caps.minspeed = ch->caps.maxspeed = 48000;
3395                 ch->pcmrates[0] = 48000;
3396                 ch->pcmrates[1] = 0;
3397         }
3398         if (sc->pos_dma.dma_vaddr != NULL)
3399                 ch->dmapos = (uint32_t *)(sc->pos_dma.dma_vaddr +
3400                     (sc->streamcnt * 8));
3401         else
3402                 ch->dmapos = NULL;
3403         ch->sid = ++sc->streamcnt;
3404         ch->dir = dir;
3405         ch->b = b;
3406         ch->c = c;
3407         ch->blksz = pdevinfo->chan_size / pdevinfo->chan_blkcnt;
3408         ch->blkcnt = pdevinfo->chan_blkcnt;
3409         hdac_unlock(sc);
3410
3411         if (hdac_bdl_alloc(ch) != 0) {
3412                 ch->blkcnt = 0;
3413                 return (NULL);
3414         }
3415
3416         if (sndbuf_alloc(ch->b, sc->chan_dmat,
3417             (sc->flags & HDAC_F_DMA_NOCACHE) ? BUS_DMA_NOCACHE : 0,
3418             pdevinfo->chan_size) != 0)
3419                 return (NULL);
3420
3421         return (ch);
3422 }
3423
3424 static int
3425 hdac_channel_setformat(kobj_t obj, void *data, uint32_t format)
3426 {
3427         struct hdac_chan *ch = data;
3428         int i;
3429
3430         for (i = 0; ch->caps.fmtlist[i] != 0; i++) {
3431                 if (format == ch->caps.fmtlist[i]) {
3432                         ch->fmt = format;
3433                         return (0);
3434                 }
3435         }
3436
3437         return (EINVAL);
3438 }
3439
3440 static uint32_t
3441 hdac_channel_setspeed(kobj_t obj, void *data, uint32_t speed)
3442 {
3443         struct hdac_chan *ch = data;
3444         uint32_t spd = 0, threshold;
3445         int i;
3446
3447         for (i = 0; ch->pcmrates[i] != 0; i++) {
3448                 spd = ch->pcmrates[i];
3449                 threshold = spd + ((ch->pcmrates[i + 1] != 0) ?
3450                     ((ch->pcmrates[i + 1] - spd) >> 1) : 0);
3451                 if (speed < threshold)
3452                         break;
3453         }
3454
3455         if (spd == 0)   /* impossible */
3456                 ch->spd = 48000;
3457         else
3458                 ch->spd = spd;
3459
3460         return (ch->spd);
3461 }
3462
3463 static void
3464 hdac_stream_setup(struct hdac_chan *ch)
3465 {
3466         struct hdac_softc *sc = ch->devinfo->codec->sc;
3467         struct hdac_audio_as *as = &ch->devinfo->function.audio.as[ch->as];
3468         struct hdac_widget *w;
3469         int i, chn, totalchn, c;
3470         nid_t cad = ch->devinfo->codec->cad;
3471         uint16_t fmt, dfmt;
3472         uint16_t chmap[2][5] = {{ 0x0010, 0x0001, 0x0201, 0x0231, 0x0231 }, /* 5.1 */
3473                                 { 0x0010, 0x0001, 0x2001, 0x2031, 0x2431 }};/* 7.1 */
3474         int map = -1;
3475
3476         totalchn = AFMT_CHANNEL(ch->fmt);
3477         HDA_BOOTHVERBOSE(
3478                 device_printf(ch->pdevinfo->dev,
3479                     "PCMDIR_%s: Stream setup fmt=%08x speed=%d\n",
3480                     (ch->dir == PCMDIR_PLAY) ? "PLAY" : "REC",
3481                     ch->fmt, ch->spd);
3482         );
3483         fmt = 0;
3484         if (ch->fmt & AFMT_S16_LE)
3485                 fmt |= ch->bit16 << 4;
3486         else if (ch->fmt & AFMT_S32_LE)
3487                 fmt |= ch->bit32 << 4;
3488         else
3489                 fmt |= 1 << 4;
3490         for (i = 0; i < HDA_RATE_TAB_LEN; i++) {
3491                 if (hda_rate_tab[i].valid && ch->spd == hda_rate_tab[i].rate) {
3492                         fmt |= hda_rate_tab[i].base;
3493                         fmt |= hda_rate_tab[i].mul;
3494                         fmt |= hda_rate_tab[i].div;
3495                         break;
3496                 }
3497         }
3498         fmt |= (totalchn - 1);
3499
3500         /* Set channel mapping for known speaker setups. */
3501         if (as->pinset == 0x0007 || as->pinset == 0x0013) /* Standard 5.1 */
3502                 map = 0;
3503         else if (as->pinset == 0x0017) /* Standard 7.1 */
3504                 map = 1;
3505
3506         HDAC_WRITE_2(&sc->mem, ch->off + HDAC_SDFMT, fmt);
3507
3508         dfmt = HDA_CMD_SET_DIGITAL_CONV_FMT1_DIGEN;
3509         if (ch->fmt & AFMT_AC3)
3510                 dfmt |= HDA_CMD_SET_DIGITAL_CONV_FMT1_NAUDIO;
3511
3512         chn = 0;
3513         for (i = 0; ch->io[i] != -1; i++) {
3514                 w = hdac_widget_get(ch->devinfo, ch->io[i]);
3515                 if (w == NULL)
3516                         continue;
3517
3518                 /* If HP redirection is enabled, but failed to use same
3519                    DAC, make last DAC to duplicate first one. */
3520                 if (as->fakeredir && i == (as->pincnt - 1)) {
3521                         c = (ch->sid << 4);
3522                 } else {
3523                         if (map >= 0) /* Map known speaker setups. */
3524                                 chn = (((chmap[map][totalchn / 2] >> i * 4) &
3525                                     0xf) - 1) * 2;
3526                         if (chn < 0 || chn >= totalchn) {
3527                                 c = 0;
3528                         } else {
3529                                 c = (ch->sid << 4) | chn;
3530                         }
3531                 }
3532                 HDA_BOOTHVERBOSE(
3533                         device_printf(ch->pdevinfo->dev,
3534                             "PCMDIR_%s: Stream setup nid=%d: "
3535                             "fmt=0x%04x, dfmt=0x%04x, chan=0x%04x\n",
3536                             (ch->dir == PCMDIR_PLAY) ? "PLAY" : "REC",
3537                             ch->io[i], fmt, dfmt, c);
3538                 );
3539                 hdac_command(sc,
3540                     HDA_CMD_SET_CONV_FMT(cad, ch->io[i], fmt), cad);
3541                 if (HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL(w->param.widget_cap)) {
3542                         hdac_command(sc,
3543                             HDA_CMD_SET_DIGITAL_CONV_FMT1(cad, ch->io[i], dfmt),
3544                             cad);
3545                 }
3546                 hdac_command(sc,
3547                     HDA_CMD_SET_CONV_STREAM_CHAN(cad, ch->io[i], c), cad);
3548 #if 0
3549                 hdac_command(sc,
3550                     HDA_CMD_SET_CONV_CHAN_COUNT(cad, ch->io[i], 1), cad);
3551                 hdac_command(sc,
3552                     HDA_CMD_SET_HDMI_CHAN_SLOT(cad, ch->io[i], 0x00), cad);
3553                 hdac_command(sc,
3554                     HDA_CMD_SET_HDMI_CHAN_SLOT(cad, ch->io[i], 0x11), cad);
3555 #endif
3556                 chn += HDA_PARAM_AUDIO_WIDGET_CAP_CC(w->param.widget_cap) + 1;
3557         }
3558 }
3559
3560 /*
3561  * Greatest Common Divisor.
3562  */
3563 static unsigned
3564 gcd(unsigned a, unsigned b)
3565 {
3566         u_int c;
3567
3568         while (b != 0) {
3569                 c = a;
3570                 a = b;
3571                 b = (c % b);
3572         }
3573         return (a);
3574 }
3575
3576 /*
3577  * Least Common Multiple.
3578  */
3579 static unsigned
3580 lcm(unsigned a, unsigned b)
3581 {
3582
3583         return ((a * b) / gcd(a, b));
3584 }
3585
3586 static int
3587 hdac_channel_setfragments(kobj_t obj, void *data,
3588                                         uint32_t blksz, uint32_t blkcnt)
3589 {
3590         struct hdac_chan *ch = data;
3591         struct hdac_softc *sc = ch->devinfo->codec->sc;
3592
3593         blksz -= blksz % lcm(HDAC_DMA_ALIGNMENT, sndbuf_getalign(ch->b));
3594
3595         if (blksz > (sndbuf_getmaxsize(ch->b) / HDA_BDL_MIN))
3596                 blksz = sndbuf_getmaxsize(ch->b) / HDA_BDL_MIN;
3597         if (blksz < HDA_BLK_MIN)
3598                 blksz = HDA_BLK_MIN;
3599         if (blkcnt > HDA_BDL_MAX)
3600                 blkcnt = HDA_BDL_MAX;
3601         if (blkcnt < HDA_BDL_MIN)
3602                 blkcnt = HDA_BDL_MIN;
3603
3604         while ((blksz * blkcnt) > sndbuf_getmaxsize(ch->b)) {
3605                 if ((blkcnt >> 1) >= HDA_BDL_MIN)
3606                         blkcnt >>= 1;
3607                 else if ((blksz >> 1) >= HDA_BLK_MIN)
3608                         blksz >>= 1;
3609                 else
3610                         break;
3611         }
3612
3613         if ((sndbuf_getblksz(ch->b) != blksz ||
3614             sndbuf_getblkcnt(ch->b) != blkcnt) &&
3615             sndbuf_resize(ch->b, blkcnt, blksz) != 0)
3616                 device_printf(sc->dev, "%s: failed blksz=%u blkcnt=%u\n",
3617                     __func__, blksz, blkcnt);
3618
3619         ch->blksz = sndbuf_getblksz(ch->b);
3620         ch->blkcnt = sndbuf_getblkcnt(ch->b);
3621
3622         return (0);
3623 }
3624
3625 static uint32_t
3626 hdac_channel_setblocksize(kobj_t obj, void *data, uint32_t blksz)
3627 {
3628         struct hdac_chan *ch = data;
3629
3630         hdac_channel_setfragments(obj, data, blksz, ch->pdevinfo->chan_blkcnt);
3631
3632         return (ch->blksz);
3633 }
3634
3635 static void
3636 hdac_channel_stop(struct hdac_softc *sc, struct hdac_chan *ch)
3637 {
3638         struct hdac_devinfo *devinfo = ch->devinfo;
3639         struct hdac_widget *w;
3640         nid_t cad = devinfo->codec->cad;
3641         int i;
3642
3643         hdac_stream_stop(ch);
3644
3645         for (i = 0; ch->io[i] != -1; i++) {
3646                 w = hdac_widget_get(ch->devinfo, ch->io[i]);
3647                 if (w == NULL)
3648                         continue;
3649                 if (HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL(w->param.widget_cap)) {
3650                         hdac_command(sc,
3651                             HDA_CMD_SET_DIGITAL_CONV_FMT1(cad, ch->io[i], 0),
3652                             cad);
3653                 }
3654                 hdac_command(sc,
3655                     HDA_CMD_SET_CONV_STREAM_CHAN(cad, ch->io[i],
3656                     0), cad);
3657         }
3658 }
3659
3660 static void
3661 hdac_channel_start(struct hdac_softc *sc, struct hdac_chan *ch)
3662 {
3663         ch->ptr = 0;
3664         ch->prevptr = 0;
3665         hdac_stream_stop(ch);
3666         hdac_stream_reset(ch);
3667         hdac_bdl_setup(ch);
3668         hdac_stream_setid(ch);
3669         hdac_stream_setup(ch);
3670         hdac_stream_start(ch);
3671 }
3672
3673 static int
3674 hdac_channel_trigger(kobj_t obj, void *data, int go)
3675 {
3676         struct hdac_chan *ch = data;
3677         struct hdac_softc *sc = ch->devinfo->codec->sc;
3678
3679         if (!PCMTRIG_COMMON(go))
3680                 return (0);
3681
3682         hdac_lock(sc);
3683         switch (go) {
3684         case PCMTRIG_START:
3685                 hdac_channel_start(sc, ch);
3686                 break;
3687         case PCMTRIG_STOP:
3688         case PCMTRIG_ABORT:
3689                 hdac_channel_stop(sc, ch);
3690                 break;
3691         default:
3692                 break;
3693         }
3694         hdac_unlock(sc);
3695
3696         return (0);
3697 }
3698
3699 static uint32_t
3700 hdac_channel_getptr(kobj_t obj, void *data)
3701 {
3702         struct hdac_chan *ch = data;
3703         struct hdac_softc *sc = ch->devinfo->codec->sc;
3704         uint32_t ptr;
3705
3706         hdac_lock(sc);
3707         if (sc->polling != 0)
3708                 ptr = ch->ptr;
3709         else if (ch->dmapos != NULL)
3710                 ptr = *(ch->dmapos);
3711         else
3712                 ptr = HDAC_READ_4(&sc->mem, ch->off + HDAC_SDLPIB);
3713         hdac_unlock(sc);
3714
3715         /*
3716          * Round to available space and force 128 bytes aligment.
3717          */
3718         ptr %= ch->blksz * ch->blkcnt;
3719         ptr &= HDA_BLK_ALIGN;
3720
3721         return (ptr);
3722 }
3723
3724 static struct pcmchan_caps *
3725 hdac_channel_getcaps(kobj_t obj, void *data)
3726 {
3727         return (&((struct hdac_chan *)data)->caps);
3728 }
3729
3730 static kobj_method_t hdac_channel_methods[] = {
3731         KOBJMETHOD(channel_init,                hdac_channel_init),
3732         KOBJMETHOD(channel_setformat,           hdac_channel_setformat),
3733         KOBJMETHOD(channel_setspeed,            hdac_channel_setspeed),
3734         KOBJMETHOD(channel_setblocksize,        hdac_channel_setblocksize),
3735         KOBJMETHOD(channel_setfragments,        hdac_channel_setfragments),
3736         KOBJMETHOD(channel_trigger,             hdac_channel_trigger),
3737         KOBJMETHOD(channel_getptr,              hdac_channel_getptr),
3738         KOBJMETHOD(channel_getcaps,             hdac_channel_getcaps),
3739         KOBJMETHOD_END
3740 };
3741 CHANNEL_DECLARE(hdac_channel);
3742
3743 static int
3744 hdac_audio_ctl_ossmixer_init(struct snd_mixer *m)
3745 {
3746         struct hdac_pcm_devinfo *pdevinfo = mix_getdevinfo(m);
3747         struct hdac_devinfo *devinfo = pdevinfo->devinfo;
3748         struct hdac_softc *sc = devinfo->codec->sc;
3749         struct hdac_widget *w, *cw;
3750         struct hdac_audio_ctl *ctl;
3751         uint32_t mask, recmask, id;
3752         int i, j, softpcmvol;
3753
3754         hdac_lock(sc);
3755
3756         /* Make sure that in case of soft volume it won't stay muted. */
3757         for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) {
3758                 pdevinfo->left[i] = 100;
3759                 pdevinfo->right[i] = 100;
3760         }
3761
3762         mask = 0;
3763         recmask = 0;
3764         id = hdac_codec_id(devinfo->codec);
3765
3766         /* Declate EAPD as ogain control. */
3767         if (pdevinfo->play >= 0) {
3768                 for (i = devinfo->startnode; i < devinfo->endnode; i++) {
3769                         w = hdac_widget_get(devinfo, i);
3770                         if (w == NULL || w->enable == 0)
3771                                 continue;
3772                         if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX ||
3773                             w->param.eapdbtl == HDAC_INVALID ||
3774                             w->bindas != sc->chans[pdevinfo->play].as)
3775                                 continue;
3776                         mask |= SOUND_MASK_OGAIN;
3777                         break;
3778                 }
3779         }
3780
3781         /* Declare volume controls assigned to this association. */
3782         i = 0;
3783         ctl = NULL;
3784         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
3785                 if (ctl->enable == 0)
3786                         continue;
3787                 if ((pdevinfo->play >= 0 &&
3788                     ctl->widget->bindas == sc->chans[pdevinfo->play].as) ||
3789                     (pdevinfo->rec >= 0 &&
3790                     ctl->widget->bindas == sc->chans[pdevinfo->rec].as) ||
3791                     (ctl->widget->bindas == -2 && pdevinfo->index == 0))
3792                         mask |= ctl->ossmask;
3793         }
3794
3795         /* Declare record sources available to this association. */
3796         if (pdevinfo->rec >= 0) {
3797                 struct hdac_chan *ch = &sc->chans[pdevinfo->rec];
3798                 for (i = 0; ch->io[i] != -1; i++) {
3799                         w = hdac_widget_get(devinfo, ch->io[i]);
3800                         if (w == NULL || w->enable == 0)
3801                                 continue;
3802                         for (j = 0; j < w->nconns; j++) {
3803                                 if (w->connsenable[j] == 0)
3804                                         continue;
3805                                 cw = hdac_widget_get(devinfo, w->conns[j]);
3806                                 if (cw == NULL || cw->enable == 0)
3807                                         continue;
3808                                 if (cw->bindas != sc->chans[pdevinfo->rec].as &&
3809                                     cw->bindas != -2)
3810                                         continue;
3811                                 recmask |= cw->ossmask;
3812                         }
3813                 }
3814         }
3815
3816         /* Declare soft PCM volume if needed. */
3817         if (pdevinfo->play >= 0) {
3818                 ctl = NULL;
3819                 if ((mask & SOUND_MASK_PCM) == 0 ||
3820                     (devinfo->function.audio.quirks & HDA_QUIRK_SOFTPCMVOL)) {
3821                         softpcmvol = 1;
3822                         mask |= SOUND_MASK_PCM;
3823                 } else {
3824                         softpcmvol = 0;
3825                         i = 0;
3826                         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
3827                                 if (ctl->enable == 0)
3828                                         continue;
3829                                 if (ctl->widget->bindas != sc->chans[pdevinfo->play].as &&
3830                                     (ctl->widget->bindas != -2 || pdevinfo->index != 0))
3831                                         continue;
3832                                 if (!(ctl->ossmask & SOUND_MASK_PCM))
3833                                         continue;
3834                                 if (ctl->step > 0)
3835                                         break;
3836                         }
3837                 }
3838
3839                 if (softpcmvol == 1 || ctl == NULL) {
3840                         pcm_setflags(pdevinfo->dev, pcm_getflags(pdevinfo->dev) | SD_F_SOFTPCMVOL);
3841                         HDA_BOOTVERBOSE(
3842                                 device_printf(pdevinfo->dev,
3843                                     "%s Soft PCM volume\n",
3844                                     (softpcmvol == 1) ? "Forcing" : "Enabling");
3845                         );
3846                 }
3847         }
3848
3849         /* Declare master volume if needed. */
3850         if (pdevinfo->play >= 0) {
3851                 if ((mask & (SOUND_MASK_VOLUME | SOUND_MASK_PCM)) ==
3852                     SOUND_MASK_PCM) {
3853                         mask |= SOUND_MASK_VOLUME;
3854                         mix_setparentchild(m, SOUND_MIXER_VOLUME,
3855                             SOUND_MASK_PCM);
3856                         mix_setrealdev(m, SOUND_MIXER_VOLUME,
3857                             SOUND_MIXER_NONE);
3858                         HDA_BOOTVERBOSE(
3859                                 device_printf(pdevinfo->dev,
3860                                     "Forcing master volume with PCM\n");
3861                         );
3862                 }
3863         }
3864
3865         recmask &= (1 << SOUND_MIXER_NRDEVICES) - 1;
3866         mask &= (1 << SOUND_MIXER_NRDEVICES) - 1;
3867
3868         mix_setrecdevs(m, recmask);
3869         mix_setdevs(m, mask);
3870
3871         hdac_unlock(sc);
3872
3873         return (0);
3874 }
3875
3876 static int
3877 hdac_audio_ctl_ossmixer_set(struct snd_mixer *m, unsigned dev,
3878                                         unsigned left, unsigned right)
3879 {
3880         struct hdac_pcm_devinfo *pdevinfo = mix_getdevinfo(m);
3881         struct hdac_devinfo *devinfo = pdevinfo->devinfo;
3882         struct hdac_softc *sc = devinfo->codec->sc;
3883         struct hdac_widget *w;
3884         struct hdac_audio_ctl *ctl;
3885         uint32_t mute;
3886         int lvol, rvol;
3887         int i, j;
3888
3889         hdac_lock(sc);
3890         /* Save new values. */
3891         pdevinfo->left[dev] = left;
3892         pdevinfo->right[dev] = right;
3893
3894         /* 'ogain' is the special case implemented with EAPD. */
3895         if (dev == SOUND_MIXER_OGAIN) {
3896                 uint32_t orig;
3897                 w = NULL;
3898                 for (i = devinfo->startnode; i < devinfo->endnode; i++) {
3899                         w = hdac_widget_get(devinfo, i);
3900                         if (w == NULL || w->enable == 0)
3901                                 continue;
3902                         if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX ||
3903                             w->param.eapdbtl == HDAC_INVALID)
3904                                 continue;
3905                         break;
3906                 }
3907                 if (i >= devinfo->endnode) {
3908                         hdac_unlock(sc);
3909                         return (-1);
3910                 }
3911                 orig = w->param.eapdbtl;
3912                 if (left == 0)
3913                         w->param.eapdbtl &= ~HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD;
3914                 else
3915                         w->param.eapdbtl |= HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD;
3916                 if (orig != w->param.eapdbtl) {
3917                         uint32_t val;
3918
3919                         val = w->param.eapdbtl;
3920                         if (devinfo->function.audio.quirks & HDA_QUIRK_EAPDINV)
3921                                 val ^= HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD;
3922                         hdac_command(sc,
3923                             HDA_CMD_SET_EAPD_BTL_ENABLE(devinfo->codec->cad,
3924                             w->nid, val), devinfo->codec->cad);
3925                 }
3926                 hdac_unlock(sc);
3927                 return (left | (left << 8));
3928         }
3929
3930         /* Recalculate all controls related to this OSS device. */
3931         i = 0;
3932         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
3933                 if (ctl->enable == 0 ||
3934                     !(ctl->ossmask & (1 << dev)))
3935                         continue;
3936                 if (!((pdevinfo->play >= 0 &&
3937                     ctl->widget->bindas == sc->chans[pdevinfo->play].as) ||
3938                     (pdevinfo->rec >= 0 &&
3939                     ctl->widget->bindas == sc->chans[pdevinfo->rec].as) ||
3940                     ctl->widget->bindas == -2))
3941                         continue;
3942
3943                 lvol = 100;
3944                 rvol = 100;
3945                 for (j = 0; j < SOUND_MIXER_NRDEVICES; j++) {
3946                         if (ctl->ossmask & (1 << j)) {
3947                                 lvol = lvol * pdevinfo->left[j] / 100;
3948                                 rvol = rvol * pdevinfo->right[j] / 100;
3949                         }
3950                 }
3951                 mute = (lvol == 0) ? HDA_AMP_MUTE_LEFT : 0;
3952                 mute |= (rvol == 0) ? HDA_AMP_MUTE_RIGHT : 0;
3953                 lvol = (lvol * ctl->step + 50) / 100;
3954                 rvol = (rvol * ctl->step + 50) / 100;
3955                 hdac_audio_ctl_amp_set(ctl, mute, lvol, rvol);
3956         }
3957         hdac_unlock(sc);
3958
3959         return (left | (right << 8));
3960 }
3961
3962 /*
3963  * Commutate specified record source.
3964  */
3965 static uint32_t
3966 hdac_audio_ctl_recsel_comm(struct hdac_pcm_devinfo *pdevinfo, uint32_t src, nid_t nid, int depth)
3967 {
3968         struct hdac_devinfo *devinfo = pdevinfo->devinfo;
3969         struct hdac_widget *w, *cw;
3970         struct hdac_audio_ctl *ctl;
3971         char buf[64];
3972         int i, muted;
3973         uint32_t res = 0;
3974
3975         if (depth > HDA_PARSE_MAXDEPTH)
3976                 return (0);
3977
3978         w = hdac_widget_get(devinfo, nid);
3979         if (w == NULL || w->enable == 0)
3980                 return (0);
3981
3982         for (i = 0; i < w->nconns; i++) {
3983                 if (w->connsenable[i] == 0)
3984                         continue;
3985                 cw = hdac_widget_get(devinfo, w->conns[i]);
3986                 if (cw == NULL || cw->enable == 0 || cw->bindas == -1)
3987                         continue;
3988                 /* Call recursively to trace signal to it's source if needed. */
3989                 if ((src & cw->ossmask) != 0) {
3990                         if (cw->ossdev < 0) {
3991                                 res |= hdac_audio_ctl_recsel_comm(pdevinfo, src,
3992                                     w->conns[i], depth + 1);
3993                         } else {
3994                                 res |= cw->ossmask;
3995                         }
3996                 }
3997                 /* We have two special cases: mixers and others (selectors). */
3998                 if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER) {
3999                         ctl = hdac_audio_ctl_amp_get(devinfo,
4000                             w->nid, HDA_CTL_IN, i, 1);
4001                         if (ctl == NULL)
4002                                 continue;
4003                         /* If we have input control on this node mute them
4004                          * according to requested sources. */
4005                         muted = (src & cw->ossmask) ? 0 : 1;
4006                         if (muted != ctl->forcemute) {
4007                                 ctl->forcemute = muted;
4008                                 hdac_audio_ctl_amp_set(ctl,
4009                                     HDA_AMP_MUTE_DEFAULT,
4010                                     HDA_AMP_VOL_DEFAULT, HDA_AMP_VOL_DEFAULT);
4011                         }
4012                         HDA_BOOTHVERBOSE(
4013                                 device_printf(pdevinfo->dev,
4014                                     "Recsel (%s): nid %d source %d %s\n",
4015                                     hdac_audio_ctl_ossmixer_mask2allname(
4016                                     src, buf, sizeof(buf)),
4017                                     nid, i, muted?"mute":"unmute");
4018                         );
4019                 } else {
4020                         if (w->nconns == 1)
4021                                 break;
4022                         if ((src & cw->ossmask) == 0)
4023                                 continue;
4024                         /* If we found requested source - select it and exit. */
4025                         hdac_widget_connection_select(w, i);
4026                         HDA_BOOTHVERBOSE(
4027                                 device_printf(pdevinfo->dev,
4028                                     "Recsel (%s): nid %d source %d select\n",
4029                                     hdac_audio_ctl_ossmixer_mask2allname(
4030                                     src, buf, sizeof(buf)),
4031                                     nid, i);
4032                         );
4033                         break;
4034                 }
4035         }
4036         return (res);
4037 }
4038
4039 static uint32_t
4040 hdac_audio_ctl_ossmixer_setrecsrc(struct snd_mixer *m, uint32_t src)
4041 {
4042         struct hdac_pcm_devinfo *pdevinfo = mix_getdevinfo(m);
4043         struct hdac_devinfo *devinfo = pdevinfo->devinfo;
4044         struct hdac_widget *w;
4045         struct hdac_softc *sc = devinfo->codec->sc;
4046         struct hdac_chan *ch;
4047         int i;
4048         uint32_t ret = 0xffffffff;
4049
4050         hdac_lock(sc);
4051
4052         /* Commutate requested recsrc for each ADC. */
4053         ch = &sc->chans[pdevinfo->rec];
4054         for (i = 0; ch->io[i] != -1; i++) {
4055                 w = hdac_widget_get(devinfo, ch->io[i]);
4056                 if (w == NULL || w->enable == 0)
4057                         continue;
4058                 ret &= hdac_audio_ctl_recsel_comm(pdevinfo, src, ch->io[i], 0);
4059         }
4060
4061         hdac_unlock(sc);
4062
4063         return ((ret == 0xffffffff)? 0 : ret);
4064 }
4065
4066 static kobj_method_t hdac_audio_ctl_ossmixer_methods[] = {
4067         KOBJMETHOD(mixer_init,          hdac_audio_ctl_ossmixer_init),
4068         KOBJMETHOD(mixer_set,           hdac_audio_ctl_ossmixer_set),
4069         KOBJMETHOD(mixer_setrecsrc,     hdac_audio_ctl_ossmixer_setrecsrc),
4070         KOBJMETHOD_END
4071 };
4072 MIXER_DECLARE(hdac_audio_ctl_ossmixer);
4073
4074 static void
4075 hdac_unsolq_task(void *context, int pending)
4076 {
4077         struct hdac_softc *sc;
4078
4079         sc = (struct hdac_softc *)context;
4080
4081         hdac_lock(sc);
4082         hdac_unsolq_flush(sc);
4083         hdac_unlock(sc);
4084 }
4085
4086 /****************************************************************************
4087  * int hdac_attach(device_t)
4088  *
4089  * Attach the device into the kernel. Interrupts usually won't be enabled
4090  * when this function is called. Setup everything that doesn't require
4091  * interrupts and defer probing of codecs until interrupts are enabled.
4092  ****************************************************************************/
4093 static int
4094 hdac_attach(device_t dev)
4095 {
4096         struct hdac_softc *sc;
4097         int result;
4098         int i, devid = -1;
4099         uint32_t model;
4100         uint16_t class, subclass;
4101         uint16_t vendor;
4102         uint8_t v;
4103
4104         device_printf(dev, "HDA Driver Revision: %s\n", HDA_DRV_TEST_REV);
4105
4106         model = (uint32_t)pci_get_device(dev) << 16;
4107         model |= (uint32_t)pci_get_vendor(dev) & 0x0000ffff;
4108         class = pci_get_class(dev);
4109         subclass = pci_get_subclass(dev);
4110
4111         for (i = 0; i < HDAC_DEVICES_LEN; i++) {
4112                 if (hdac_devices[i].model == model) {
4113                         devid = i;
4114                         break;
4115                 }
4116                 if (HDA_DEV_MATCH(hdac_devices[i].model, model) &&
4117                     class == PCIC_MULTIMEDIA &&
4118                     subclass == PCIS_MULTIMEDIA_HDA) {
4119                         devid = i;
4120                         break;
4121                 }
4122         }
4123
4124         sc = device_get_softc(dev);
4125         sc->lock = snd_mtxcreate(device_get_nameunit(dev), HDAC_MTX_NAME);
4126         sc->dev = dev;
4127         sc->pci_subvendor = (uint32_t)pci_get_subdevice(sc->dev) << 16;
4128         sc->pci_subvendor |= (uint32_t)pci_get_subvendor(sc->dev) & 0x0000ffff;
4129         vendor = pci_get_vendor(dev);
4130
4131         if (sc->pci_subvendor == HP_NX6325_SUBVENDORX) {
4132                 /* Screw nx6325 - subdevice/subvendor swapped */
4133                 sc->pci_subvendor = HP_NX6325_SUBVENDOR;
4134         }
4135
4136         callout_init(&sc->poll_hda, CALLOUT_MPSAFE);
4137         callout_init(&sc->poll_hdac, CALLOUT_MPSAFE);
4138         callout_init(&sc->poll_jack, CALLOUT_MPSAFE);
4139
4140         TASK_INIT(&sc->unsolq_task, 0, hdac_unsolq_task, sc);
4141
4142         sc->poll_ticks = 1000000;
4143         sc->poll_ival = HDAC_POLL_INTERVAL;
4144         if (resource_int_value(device_get_name(dev),
4145             device_get_unit(dev), "polling", &i) == 0 && i != 0)
4146                 sc->polling = 1;
4147         else
4148                 sc->polling = 0;
4149
4150         sc->hdabus = NULL;
4151         for (i = 0; i < HDAC_CODEC_MAX; i++)
4152                 sc->codecs[i] = NULL;
4153
4154         pci_enable_busmaster(dev);
4155
4156         if (vendor == INTEL_VENDORID) {
4157                 /* TCSEL -> TC0 */
4158                 v = pci_read_config(dev, 0x44, 1);
4159                 pci_write_config(dev, 0x44, v & 0xf8, 1);
4160                 HDA_BOOTHVERBOSE(
4161                         device_printf(dev, "TCSEL: 0x%02d -> 0x%02d\n", v,
4162                             pci_read_config(dev, 0x44, 1));
4163                 );
4164         }
4165
4166         if (devid >= 0 && (hdac_devices[devid].flags & HDAC_NO_MSI))
4167                 sc->flags &= ~HDAC_F_MSI;
4168         else
4169                 sc->flags |= HDAC_F_MSI;
4170         if (resource_int_value(device_get_name(dev),
4171             device_get_unit(dev), "msi", &i) == 0) {
4172                 if (i == 0)
4173                         sc->flags &= ~HDAC_F_MSI;
4174                 else
4175                         sc->flags |= HDAC_F_MSI;
4176         }
4177
4178 #if defined(__i386__) || defined(__amd64__)
4179         sc->flags |= HDAC_F_DMA_NOCACHE;
4180
4181         if (resource_int_value(device_get_name(dev),
4182             device_get_unit(dev), "snoop", &i) == 0 && i != 0) {
4183 #else
4184         sc->flags &= ~HDAC_F_DMA_NOCACHE;
4185 #endif
4186                 /*
4187                  * Try to enable PCIe snoop to avoid messing around with
4188                  * uncacheable DMA attribute. Since PCIe snoop register
4189                  * config is pretty much vendor specific, there are no
4190                  * general solutions on how to enable it, forcing us (even
4191                  * Microsoft) to enable uncacheable or write combined DMA
4192                  * by default.
4193                  *
4194                  * http://msdn2.microsoft.com/en-us/library/ms790324.aspx
4195                  */
4196                 for (i = 0; i < HDAC_PCIESNOOP_LEN; i++) {
4197                         if (hdac_pcie_snoop[i].vendor != vendor)
4198                                 continue;
4199                         sc->flags &= ~HDAC_F_DMA_NOCACHE;
4200                         if (hdac_pcie_snoop[i].reg == 0x00)
4201                                 break;
4202                         v = pci_read_config(dev, hdac_pcie_snoop[i].reg, 1);
4203                         if ((v & hdac_pcie_snoop[i].enable) ==
4204                             hdac_pcie_snoop[i].enable)
4205                                 break;
4206                         v &= hdac_pcie_snoop[i].mask;
4207                         v |= hdac_pcie_snoop[i].enable;
4208                         pci_write_config(dev, hdac_pcie_snoop[i].reg, v, 1);
4209                         v = pci_read_config(dev, hdac_pcie_snoop[i].reg, 1);
4210                         if ((v & hdac_pcie_snoop[i].enable) !=
4211                             hdac_pcie_snoop[i].enable) {
4212                                 HDA_BOOTVERBOSE(
4213                                         device_printf(dev,
4214                                             "WARNING: Failed to enable PCIe "
4215                                             "snoop!\n");
4216                                 );
4217 #if defined(__i386__) || defined(__amd64__)
4218                                 sc->flags |= HDAC_F_DMA_NOCACHE;
4219 #endif
4220                         }
4221                         break;
4222                 }
4223 #if defined(__i386__) || defined(__amd64__)
4224         }
4225 #endif
4226
4227         HDA_BOOTHVERBOSE(
4228                 device_printf(dev, "DMA Coherency: %s / vendor=0x%04x\n",
4229                     (sc->flags & HDAC_F_DMA_NOCACHE) ?
4230                     "Uncacheable" : "PCIe snoop", vendor);
4231         );
4232
4233         /* Allocate resources */
4234         result = hdac_mem_alloc(sc);
4235         if (result != 0)
4236                 goto hdac_attach_fail;
4237         result = hdac_irq_alloc(sc);
4238         if (result != 0)
4239                 goto hdac_attach_fail;
4240
4241         /* Get Capabilities */
4242         result = hdac_get_capabilities(sc);
4243         if (result != 0)
4244                 goto hdac_attach_fail;
4245
4246         if (devid >= 0 && (hdac_devices[devid].flags & HDAC_NO_64BIT))
4247                 sc->support_64bit = 0;
4248
4249         /* Allocate CORB and RIRB dma memory */
4250         result = hdac_dma_alloc(sc, &sc->corb_dma,
4251             sc->corb_size * sizeof(uint32_t));
4252         if (result != 0)
4253                 goto hdac_attach_fail;
4254         result = hdac_dma_alloc(sc, &sc->rirb_dma,
4255             sc->rirb_size * sizeof(struct hdac_rirb));
4256         if (result != 0)
4257                 goto hdac_attach_fail;
4258
4259         result = bus_dma_tag_create(
4260             bus_get_dma_tag(sc->dev),           /* parent */
4261             HDAC_DMA_ALIGNMENT,                 /* alignment */
4262             0,                                  /* boundary */
4263             (sc->support_64bit) ? BUS_SPACE_MAXADDR :
4264                 BUS_SPACE_MAXADDR_32BIT,        /* lowaddr */
4265             BUS_SPACE_MAXADDR,                  /* highaddr */
4266             NULL,                               /* filtfunc */
4267             NULL,                               /* fistfuncarg */
4268             HDA_BUFSZ_MAX,                      /* maxsize */
4269             1,                                  /* nsegments */
4270             HDA_BUFSZ_MAX,                      /* maxsegsz */
4271             0,                                  /* flags */
4272             NULL,                               /* lockfunc */
4273             NULL,                               /* lockfuncarg */
4274             &sc->chan_dmat);                    /* dmat */
4275         if (result != 0) {
4276                 device_printf(dev, "%s: bus_dma_tag_create failed (%x)\n",
4277                      __func__, result);
4278                 goto hdac_attach_fail;
4279         }
4280
4281         /* Quiesce everything */
4282         HDA_BOOTHVERBOSE(
4283                 device_printf(dev, "Reset controller...\n");
4284         );
4285         hdac_reset(sc, 1);
4286
4287         /* Initialize the CORB and RIRB */
4288         hdac_corb_init(sc);
4289         hdac_rirb_init(sc);
4290
4291         /* Defer remaining of initialization until interrupts are enabled */
4292         sc->intrhook.ich_func = hdac_attach2;
4293         sc->intrhook.ich_arg = (void *)sc;
4294         if (cold == 0 || config_intrhook_establish(&sc->intrhook) != 0) {
4295                 sc->intrhook.ich_func = NULL;
4296                 hdac_attach2((void *)sc);
4297         }
4298
4299         return (0);
4300
4301 hdac_attach_fail:
4302         hdac_irq_free(sc);
4303         hdac_dma_free(sc, &sc->rirb_dma);
4304         hdac_dma_free(sc, &sc->corb_dma);
4305         hdac_mem_free(sc);
4306         snd_mtxfree(sc->lock);
4307
4308         return (ENXIO);
4309 }
4310
4311 static void
4312 hdac_audio_parse(struct hdac_devinfo *devinfo)
4313 {
4314         struct hdac_codec *codec = devinfo->codec;
4315         struct hdac_softc *sc = codec->sc;
4316         struct hdac_widget *w;
4317         uint32_t res;
4318         int i;
4319         nid_t cad, nid;
4320
4321         cad = devinfo->codec->cad;
4322         nid = devinfo->nid;
4323
4324         res = hdac_command(sc,
4325             HDA_CMD_GET_PARAMETER(cad , nid, HDA_PARAM_GPIO_COUNT), cad);
4326         devinfo->function.audio.gpio = res;
4327
4328         HDA_BOOTVERBOSE(
4329                 device_printf(sc->dev, "GPIO: 0x%08x "
4330                     "NumGPIO=%d NumGPO=%d "
4331                     "NumGPI=%d GPIWake=%d GPIUnsol=%d\n",
4332                     devinfo->function.audio.gpio,
4333                     HDA_PARAM_GPIO_COUNT_NUM_GPIO(devinfo->function.audio.gpio),
4334                     HDA_PARAM_GPIO_COUNT_NUM_GPO(devinfo->function.audio.gpio),
4335                     HDA_PARAM_GPIO_COUNT_NUM_GPI(devinfo->function.audio.gpio),
4336                     HDA_PARAM_GPIO_COUNT_GPI_WAKE(devinfo->function.audio.gpio),
4337                     HDA_PARAM_GPIO_COUNT_GPI_UNSOL(devinfo->function.audio.gpio));
4338         );
4339
4340         res = hdac_command(sc,
4341             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_SUPP_STREAM_FORMATS),
4342             cad);
4343         devinfo->function.audio.supp_stream_formats = res;
4344
4345         res = hdac_command(sc,
4346             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_SUPP_PCM_SIZE_RATE),
4347             cad);
4348         devinfo->function.audio.supp_pcm_size_rate = res;
4349
4350         res = hdac_command(sc,
4351             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_OUTPUT_AMP_CAP),
4352             cad);
4353         devinfo->function.audio.outamp_cap = res;
4354
4355         res = hdac_command(sc,
4356             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_INPUT_AMP_CAP),
4357             cad);
4358         devinfo->function.audio.inamp_cap = res;
4359
4360         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4361                 w = hdac_widget_get(devinfo, i);
4362                 if (w == NULL)
4363                         device_printf(sc->dev, "Ghost widget! nid=%d!\n", i);
4364                 else {
4365                         w->devinfo = devinfo;
4366                         w->nid = i;
4367                         w->enable = 1;
4368                         w->selconn = -1;
4369                         w->pflags = 0;
4370                         w->ossdev = -1;
4371                         w->bindas = -1;
4372                         w->param.eapdbtl = HDAC_INVALID;
4373                         hdac_widget_parse(w);
4374                 }
4375         }
4376 }
4377
4378 static void
4379 hdac_audio_ctl_parse(struct hdac_devinfo *devinfo)
4380 {
4381         struct hdac_softc *sc = devinfo->codec->sc;
4382         struct hdac_audio_ctl *ctls;
4383         struct hdac_widget *w, *cw;
4384         int i, j, cnt, max, ocap, icap;
4385         int mute, offset, step, size;
4386
4387         /* XXX This is redundant */
4388         max = 0;
4389         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4390                 w = hdac_widget_get(devinfo, i);
4391                 if (w == NULL || w->enable == 0)
4392                         continue;
4393                 if (w->param.outamp_cap != 0)
4394                         max++;
4395                 if (w->param.inamp_cap != 0) {
4396                         switch (w->type) {
4397                         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR:
4398                         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER:
4399                                 for (j = 0; j < w->nconns; j++) {
4400                                         cw = hdac_widget_get(devinfo,
4401                                             w->conns[j]);
4402                                         if (cw == NULL || cw->enable == 0)
4403                                                 continue;
4404                                         max++;
4405                                 }
4406                                 break;
4407                         default:
4408                                 max++;
4409                                 break;
4410                         }
4411                 }
4412         }
4413
4414         devinfo->function.audio.ctlcnt = max;
4415
4416         if (max < 1)
4417                 return;
4418
4419         ctls = (struct hdac_audio_ctl *)malloc(
4420             sizeof(*ctls) * max, M_HDAC, M_ZERO | M_NOWAIT);
4421
4422         if (ctls == NULL) {
4423                 /* Blekh! */
4424                 device_printf(sc->dev, "unable to allocate ctls!\n");
4425                 devinfo->function.audio.ctlcnt = 0;
4426                 return;
4427         }
4428
4429         cnt = 0;
4430         for (i = devinfo->startnode; cnt < max && i < devinfo->endnode; i++) {
4431                 if (cnt >= max) {
4432                         device_printf(sc->dev, "%s: Ctl overflow!\n",
4433                             __func__);
4434                         break;
4435                 }
4436                 w = hdac_widget_get(devinfo, i);
4437                 if (w == NULL || w->enable == 0)
4438                         continue;
4439                 ocap = w->param.outamp_cap;
4440                 icap = w->param.inamp_cap;
4441                 if (ocap != 0) {
4442                         mute = HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP(ocap);
4443                         step = HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS(ocap);
4444                         size = HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE(ocap);
4445                         offset = HDA_PARAM_OUTPUT_AMP_CAP_OFFSET(ocap);
4446                         /*if (offset > step) {
4447                                 HDA_BOOTVERBOSE(
4448                                         device_printf(sc->dev,
4449                                             "BUGGY outamp: nid=%d "
4450                                             "[offset=%d > step=%d]\n",
4451                                             w->nid, offset, step);
4452                                 );
4453                                 offset = step;
4454                         }*/
4455                         ctls[cnt].enable = 1;
4456                         ctls[cnt].widget = w;
4457                         ctls[cnt].mute = mute;
4458                         ctls[cnt].step = step;
4459                         ctls[cnt].size = size;
4460                         ctls[cnt].offset = offset;
4461                         ctls[cnt].left = offset;
4462                         ctls[cnt].right = offset;
4463                         if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX ||
4464                             w->waspin)
4465                                 ctls[cnt].ndir = HDA_CTL_IN;
4466                         else
4467                                 ctls[cnt].ndir = HDA_CTL_OUT;
4468                         ctls[cnt++].dir = HDA_CTL_OUT;
4469                 }
4470
4471                 if (icap != 0) {
4472                         mute = HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP(icap);
4473                         step = HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS(icap);
4474                         size = HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE(icap);
4475                         offset = HDA_PARAM_OUTPUT_AMP_CAP_OFFSET(icap);
4476                         /*if (offset > step) {
4477                                 HDA_BOOTVERBOSE(
4478                                         device_printf(sc->dev,
4479                                             "BUGGY inamp: nid=%d "
4480                                             "[offset=%d > step=%d]\n",
4481                                             w->nid, offset, step);
4482                                 );
4483                                 offset = step;
4484                         }*/
4485                         switch (w->type) {
4486                         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR:
4487                         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER:
4488                                 for (j = 0; j < w->nconns; j++) {
4489                                         if (cnt >= max) {
4490                                                 device_printf(sc->dev,
4491                                                     "%s: Ctl overflow!\n",
4492                                                     __func__);
4493                                                 break;
4494                                         }
4495                                         cw = hdac_widget_get(devinfo,
4496                                             w->conns[j]);
4497                                         if (cw == NULL || cw->enable == 0)
4498                                                 continue;
4499                                         ctls[cnt].enable = 1;
4500                                         ctls[cnt].widget = w;
4501                                         ctls[cnt].childwidget = cw;
4502                                         ctls[cnt].index = j;
4503                                         ctls[cnt].mute = mute;
4504                                         ctls[cnt].step = step;
4505                                         ctls[cnt].size = size;
4506                                         ctls[cnt].offset = offset;
4507                                         ctls[cnt].left = offset;
4508                                         ctls[cnt].right = offset;
4509                                         ctls[cnt].ndir = HDA_CTL_IN;
4510                                         ctls[cnt++].dir = HDA_CTL_IN;
4511                                 }
4512                                 break;
4513                         default:
4514                                 if (cnt >= max) {
4515                                         device_printf(sc->dev,
4516                                             "%s: Ctl overflow!\n",
4517                                             __func__);
4518                                         break;
4519                                 }
4520                                 ctls[cnt].enable = 1;
4521                                 ctls[cnt].widget = w;
4522                                 ctls[cnt].mute = mute;
4523                                 ctls[cnt].step = step;
4524                                 ctls[cnt].size = size;
4525                                 ctls[cnt].offset = offset;
4526                                 ctls[cnt].left = offset;
4527                                 ctls[cnt].right = offset;
4528                                 if (w->type ==
4529                                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
4530                                         ctls[cnt].ndir = HDA_CTL_OUT;
4531                                 else
4532                                         ctls[cnt].ndir = HDA_CTL_IN;
4533                                 ctls[cnt++].dir = HDA_CTL_IN;
4534                                 break;
4535                         }
4536                 }
4537         }
4538
4539         devinfo->function.audio.ctl = ctls;
4540 }
4541
4542 static void
4543 hdac_audio_as_parse(struct hdac_devinfo *devinfo)
4544 {
4545         struct hdac_softc *sc = devinfo->codec->sc;
4546         struct hdac_audio_as *as;
4547         struct hdac_widget *w;
4548         int i, j, cnt, max, type, dir, assoc, seq, first, hpredir;
4549
4550         /* Count present associations */
4551         max = 0;
4552         for (j = 1; j < 16; j++) {
4553                 for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4554                         w = hdac_widget_get(devinfo, i);
4555                         if (w == NULL || w->enable == 0)
4556                                 continue;
4557                         if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
4558                                 continue;
4559                         if (HDA_CONFIG_DEFAULTCONF_ASSOCIATION(w->wclass.pin.config)
4560                             != j)
4561                                 continue;
4562                         max++;
4563                         if (j != 15)  /* There could be many 1-pin assocs #15 */
4564                                 break;
4565                 }
4566         }
4567
4568         devinfo->function.audio.ascnt = max;
4569
4570         if (max < 1)
4571                 return;
4572
4573         as = (struct hdac_audio_as *)malloc(
4574             sizeof(*as) * max, M_HDAC, M_ZERO | M_NOWAIT);
4575
4576         if (as == NULL) {
4577                 /* Blekh! */
4578                 device_printf(sc->dev, "unable to allocate assocs!\n");
4579                 devinfo->function.audio.ascnt = 0;
4580                 return;
4581         }
4582
4583         for (i = 0; i < max; i++) {
4584                 as[i].hpredir = -1;
4585                 as[i].chan = -1;
4586                 as[i].digital = 0;
4587         }
4588
4589         /* Scan associations skipping as=0. */
4590         cnt = 0;
4591         for (j = 1; j < 16; j++) {
4592                 first = 16;
4593                 hpredir = 0;
4594                 for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4595                         w = hdac_widget_get(devinfo, i);
4596                         if (w == NULL || w->enable == 0)
4597                                 continue;
4598                         if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
4599                                 continue;
4600                         assoc = HDA_CONFIG_DEFAULTCONF_ASSOCIATION(w->wclass.pin.config);
4601                         seq = HDA_CONFIG_DEFAULTCONF_SEQUENCE(w->wclass.pin.config);
4602                         if (assoc != j) {
4603                                 continue;
4604                         }
4605                         KASSERT(cnt < max,
4606                             ("%s: Associations owerflow (%d of %d)",
4607                             __func__, cnt, max));
4608                         type = w->wclass.pin.config &
4609                             HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
4610                         /* Get pin direction. */
4611                         if (type == HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_OUT ||
4612                             type == HDA_CONFIG_DEFAULTCONF_DEVICE_SPEAKER ||
4613                             type == HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT ||
4614                             type == HDA_CONFIG_DEFAULTCONF_DEVICE_SPDIF_OUT ||
4615                             type == HDA_CONFIG_DEFAULTCONF_DEVICE_DIGITAL_OTHER_OUT)
4616                                 dir = HDA_CTL_OUT;
4617                         else
4618                                 dir = HDA_CTL_IN;
4619                         /* If this is a first pin - create new association. */
4620                         if (as[cnt].pincnt == 0) {
4621                                 as[cnt].enable = 1;
4622                                 as[cnt].index = j;
4623                                 as[cnt].dir = dir;
4624                         }
4625                         if (seq < first)
4626                                 first = seq;
4627                         /* Check association correctness. */
4628                         if (as[cnt].pins[seq] != 0) {
4629                                 device_printf(sc->dev, "%s: Duplicate pin %d (%d) "
4630                                     "in association %d! Disabling association.\n",
4631                                     __func__, seq, w->nid, j);
4632                                 as[cnt].enable = 0;
4633                         }
4634                         if (dir != as[cnt].dir) {
4635                                 device_printf(sc->dev, "%s: Pin %d has wrong "
4636                                     "direction for association %d! Disabling "
4637                                     "association.\n",
4638                                     __func__, w->nid, j);
4639                                 as[cnt].enable = 0;
4640                         }
4641                         if (HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL(w->param.widget_cap)) {
4642                                 if (HDA_PARAM_PIN_CAP_DP(w->wclass.pin.cap))
4643                                         as[cnt].digital = 3;
4644                                 else if (HDA_PARAM_PIN_CAP_HDMI(w->wclass.pin.cap))
4645                                         as[cnt].digital = 2;
4646                                 else
4647                                         as[cnt].digital = 1;
4648                         }
4649                         /* Headphones with seq=15 may mean redirection. */
4650                         if (type == HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT &&
4651                             seq == 15)
4652                                 hpredir = 1;
4653                         as[cnt].pins[seq] = w->nid;
4654                         as[cnt].pincnt++;
4655                         /* Association 15 is a multiple unassociated pins. */
4656                         if (j == 15)
4657                                 cnt++;
4658                 }
4659                 if (j != 15 && as[cnt].pincnt > 0) {
4660                         if (hpredir && as[cnt].pincnt > 1)
4661                                 as[cnt].hpredir = first;
4662                         cnt++;
4663                 }
4664         }
4665         HDA_BOOTVERBOSE(
4666                 device_printf(sc->dev,
4667                     "%d associations found:\n", max);
4668                 for (i = 0; i < max; i++) {
4669                         device_printf(sc->dev,
4670                             "Association %d (%d) %s%s:\n",
4671                             i, as[i].index, (as[i].dir == HDA_CTL_IN)?"in":"out",
4672                             as[i].enable?"":" (disabled)");
4673                         for (j = 0; j < 16; j++) {
4674                                 if (as[i].pins[j] == 0)
4675                                         continue;
4676                                 device_printf(sc->dev,
4677                                     " Pin nid=%d seq=%d\n",
4678                                     as[i].pins[j], j);
4679                         }
4680                 }
4681         );
4682
4683         devinfo->function.audio.as = as;
4684 }
4685
4686 static const struct {
4687         uint32_t model;
4688         uint32_t id;
4689         uint32_t set, unset;
4690 } hdac_quirks[] = {
4691         /*
4692          * XXX Force stereo quirk. Monoural recording / playback
4693          *     on few codecs (especially ALC880) seems broken or
4694          *     perhaps unsupported.
4695          */
4696         { HDA_MATCH_ALL, HDA_MATCH_ALL,
4697             HDA_QUIRK_FORCESTEREO | HDA_QUIRK_IVREF, 0 },
4698         { ACER_ALL_SUBVENDOR, HDA_MATCH_ALL,
4699             HDA_QUIRK_GPIO0, 0 },
4700         { ASUS_G2K_SUBVENDOR, HDA_CODEC_ALC660,
4701             HDA_QUIRK_GPIO0, 0 },
4702         { ASUS_M5200_SUBVENDOR, HDA_CODEC_ALC880,
4703             HDA_QUIRK_GPIO0, 0 },
4704         { ASUS_A7M_SUBVENDOR, HDA_CODEC_ALC880,
4705             HDA_QUIRK_GPIO0, 0 },
4706         { ASUS_A7T_SUBVENDOR, HDA_CODEC_ALC882,
4707             HDA_QUIRK_GPIO0, 0 },
4708         { ASUS_W2J_SUBVENDOR, HDA_CODEC_ALC882,
4709             HDA_QUIRK_GPIO0, 0 },
4710         { ASUS_U5F_SUBVENDOR, HDA_CODEC_AD1986A,
4711             HDA_QUIRK_EAPDINV, 0 },
4712         { ASUS_A8X_SUBVENDOR, HDA_CODEC_AD1986A,
4713             HDA_QUIRK_EAPDINV, 0 },
4714         { ASUS_F3JC_SUBVENDOR, HDA_CODEC_ALC861,
4715             HDA_QUIRK_OVREF, 0 },
4716         { UNIWILL_9075_SUBVENDOR, HDA_CODEC_ALC861,
4717             HDA_QUIRK_OVREF, 0 },
4718         /*{ ASUS_M2N_SUBVENDOR, HDA_CODEC_AD1988,
4719             HDA_QUIRK_IVREF80, HDA_QUIRK_IVREF50 | HDA_QUIRK_IVREF100 },*/
4720         { MEDION_MD95257_SUBVENDOR, HDA_CODEC_ALC880,
4721             HDA_QUIRK_GPIO1, 0 },
4722         { LENOVO_3KN100_SUBVENDOR, HDA_CODEC_AD1986A,
4723             HDA_QUIRK_EAPDINV | HDA_QUIRK_SENSEINV, 0 },
4724         { SAMSUNG_Q1_SUBVENDOR, HDA_CODEC_AD1986A,
4725             HDA_QUIRK_EAPDINV, 0 },
4726         { APPLE_MB3_SUBVENDOR, HDA_CODEC_ALC885,
4727             HDA_QUIRK_GPIO0 | HDA_QUIRK_OVREF50, 0},
4728         { APPLE_INTEL_MAC, HDA_CODEC_STAC9221,
4729             HDA_QUIRK_GPIO0 | HDA_QUIRK_GPIO1, 0 },
4730         { APPLE_MACBOOKPRO55, HDA_CODEC_CS4206,
4731             HDA_QUIRK_GPIO1 | HDA_QUIRK_GPIO3, 0 },
4732         { DELL_D630_SUBVENDOR, HDA_CODEC_STAC9205X,
4733             HDA_QUIRK_GPIO0, 0 },
4734         { DELL_V1400_SUBVENDOR, HDA_CODEC_STAC9228X,
4735             HDA_QUIRK_GPIO2, 0 },
4736         { DELL_V1500_SUBVENDOR, HDA_CODEC_STAC9205X,
4737             HDA_QUIRK_GPIO0, 0 },
4738         { HDA_MATCH_ALL, HDA_CODEC_AD1988,
4739             HDA_QUIRK_IVREF80, HDA_QUIRK_IVREF50 | HDA_QUIRK_IVREF100 },
4740         { HDA_MATCH_ALL, HDA_CODEC_AD1988B,
4741             HDA_QUIRK_IVREF80, HDA_QUIRK_IVREF50 | HDA_QUIRK_IVREF100 },
4742         { HDA_MATCH_ALL, HDA_CODEC_CX20549,
4743             0, HDA_QUIRK_FORCESTEREO }
4744 };
4745 #define HDAC_QUIRKS_LEN (sizeof(hdac_quirks) / sizeof(hdac_quirks[0]))
4746
4747 static void
4748 hdac_vendor_patch_parse(struct hdac_devinfo *devinfo)
4749 {
4750         struct hdac_widget *w;
4751         uint32_t id, subvendor;
4752         int i;
4753
4754         id = hdac_codec_id(devinfo->codec);
4755         subvendor = devinfo->codec->sc->pci_subvendor;
4756
4757         /*
4758          * Quirks
4759          */
4760         for (i = 0; i < HDAC_QUIRKS_LEN; i++) {
4761                 if (!(HDA_DEV_MATCH(hdac_quirks[i].model, subvendor) &&
4762                     HDA_DEV_MATCH(hdac_quirks[i].id, id)))
4763                         continue;
4764                 if (hdac_quirks[i].set != 0)
4765                         devinfo->function.audio.quirks |=
4766                             hdac_quirks[i].set;
4767                 if (hdac_quirks[i].unset != 0)
4768                         devinfo->function.audio.quirks &=
4769                             ~(hdac_quirks[i].unset);
4770         }
4771
4772         switch (id) {
4773         case HDA_CODEC_AD1983:
4774                 /*
4775                  * This codec has several possible usages, but none
4776                  * fit the parser best. Help parser to choose better.
4777                  */
4778                 /* Disable direct unmixed playback to get pcm volume. */
4779                 w = hdac_widget_get(devinfo, 5);
4780                 if (w != NULL)
4781                         w->connsenable[0] = 0;
4782                 w = hdac_widget_get(devinfo, 6);
4783                 if (w != NULL)
4784                         w->connsenable[0] = 0;
4785                 w = hdac_widget_get(devinfo, 11);
4786                 if (w != NULL)
4787                         w->connsenable[0] = 0;
4788                 /* Disable mic and line selectors. */
4789                 w = hdac_widget_get(devinfo, 12);
4790                 if (w != NULL)
4791                         w->connsenable[1] = 0;
4792                 w = hdac_widget_get(devinfo, 13);
4793                 if (w != NULL)
4794                         w->connsenable[1] = 0;
4795                 /* Disable recording from mono playback mix. */
4796                 w = hdac_widget_get(devinfo, 20);
4797                 if (w != NULL)
4798                         w->connsenable[3] = 0;
4799                 break;
4800         case HDA_CODEC_AD1986A:
4801                 /*
4802                  * This codec has overcomplicated input mixing.
4803                  * Make some cleaning there.
4804                  */
4805                 /* Disable input mono mixer. Not needed and not supported. */
4806                 w = hdac_widget_get(devinfo, 43);
4807                 if (w != NULL)
4808                         w->enable = 0;
4809                 /* Disable any with any input mixing mesh. Use separately. */
4810                 w = hdac_widget_get(devinfo, 39);
4811                 if (w != NULL)
4812                         w->enable = 0;
4813                 w = hdac_widget_get(devinfo, 40);
4814                 if (w != NULL)
4815                         w->enable = 0;
4816                 w = hdac_widget_get(devinfo, 41);
4817                 if (w != NULL)
4818                         w->enable = 0;
4819                 w = hdac_widget_get(devinfo, 42);
4820                 if (w != NULL)
4821                         w->enable = 0;
4822                 /* Disable duplicate mixer node connector. */
4823                 w = hdac_widget_get(devinfo, 15);
4824                 if (w != NULL)
4825                         w->connsenable[3] = 0;
4826                 /* There is only one mic preamplifier, use it effectively. */
4827                 w = hdac_widget_get(devinfo, 31);
4828                 if (w != NULL) {
4829                         if ((w->wclass.pin.config &
4830                             HDA_CONFIG_DEFAULTCONF_DEVICE_MASK) ==
4831                             HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN) {
4832                                 w = hdac_widget_get(devinfo, 16);
4833                                 if (w != NULL)
4834                                     w->connsenable[2] = 0;
4835                         } else {
4836                                 w = hdac_widget_get(devinfo, 15);
4837                                 if (w != NULL)
4838                                     w->connsenable[0] = 0;
4839                         }
4840                 }
4841                 w = hdac_widget_get(devinfo, 32);
4842                 if (w != NULL) {
4843                         if ((w->wclass.pin.config &
4844                             HDA_CONFIG_DEFAULTCONF_DEVICE_MASK) ==
4845                             HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN) {
4846                                 w = hdac_widget_get(devinfo, 16);
4847                                 if (w != NULL)
4848                                     w->connsenable[0] = 0;
4849                         } else {
4850                                 w = hdac_widget_get(devinfo, 15);
4851                                 if (w != NULL)
4852                                     w->connsenable[1] = 0;
4853                         }
4854                 }
4855
4856                 if (subvendor == ASUS_A8X_SUBVENDOR) {
4857                         /*
4858                          * This is just plain ridiculous.. There
4859                          * are several A8 series that share the same
4860                          * pci id but works differently (EAPD).
4861                          */
4862                         w = hdac_widget_get(devinfo, 26);
4863                         if (w != NULL && w->type ==
4864                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX &&
4865                             (w->wclass.pin.config &
4866                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK) !=
4867                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_NONE)
4868                                 devinfo->function.audio.quirks &=
4869                                     ~HDA_QUIRK_EAPDINV;
4870                 }
4871                 break;
4872         case HDA_CODEC_AD1981HD:
4873                 /*
4874                  * This codec has very unusual design with several
4875                  * points inappropriate for the present parser.
4876                  */
4877                 /* Disable recording from mono playback mix. */
4878                 w = hdac_widget_get(devinfo, 21);
4879                 if (w != NULL)
4880                         w->connsenable[3] = 0;
4881                 /* Disable rear to front mic mixer, use separately. */
4882                 w = hdac_widget_get(devinfo, 31);
4883                 if (w != NULL)
4884                         w->enable = 0;
4885                 /* Disable direct playback, use mixer. */
4886                 w = hdac_widget_get(devinfo, 5);
4887                 if (w != NULL)
4888                         w->connsenable[0] = 0;
4889                 w = hdac_widget_get(devinfo, 6);
4890                 if (w != NULL)
4891                         w->connsenable[0] = 0;
4892                 w = hdac_widget_get(devinfo, 9);
4893                 if (w != NULL)
4894                         w->connsenable[0] = 0;
4895                 w = hdac_widget_get(devinfo, 24);
4896                 if (w != NULL)
4897                         w->connsenable[0] = 0;
4898                 break;
4899         }
4900 }
4901
4902 /*
4903  * Trace path from DAC to pin.
4904  */
4905 static nid_t
4906 hdac_audio_trace_dac(struct hdac_devinfo *devinfo, int as, int seq, nid_t nid,
4907     int dupseq, int min, int only, int depth)
4908 {
4909         struct hdac_widget *w;
4910         int i, im = -1;
4911         nid_t m = 0, ret;
4912
4913         if (depth > HDA_PARSE_MAXDEPTH)
4914                 return (0);
4915         w = hdac_widget_get(devinfo, nid);
4916         if (w == NULL || w->enable == 0)
4917                 return (0);
4918         HDA_BOOTHVERBOSE(
4919                 if (!only) {
4920                         device_printf(devinfo->codec->sc->dev,
4921                             " %*stracing via nid %d\n",
4922                                 depth + 1, "", w->nid);
4923                 }
4924         );
4925         /* Use only unused widgets */
4926         if (w->bindas >= 0 && w->bindas != as) {
4927                 HDA_BOOTHVERBOSE(
4928                         if (!only) {
4929                                 device_printf(devinfo->codec->sc->dev,
4930                                     " %*snid %d busy by association %d\n",
4931                                         depth + 1, "", w->nid, w->bindas);
4932                         }
4933                 );
4934                 return (0);
4935         }
4936         if (dupseq < 0) {
4937                 if (w->bindseqmask != 0) {
4938                         HDA_BOOTHVERBOSE(
4939                                 if (!only) {
4940                                         device_printf(devinfo->codec->sc->dev,
4941                                             " %*snid %d busy by seqmask %x\n",
4942                                                 depth + 1, "", w->nid, w->bindseqmask);
4943                                 }
4944                         );
4945                         return (0);
4946                 }
4947         } else {
4948                 /* If this is headphones - allow duplicate first pin. */
4949                 if (w->bindseqmask != 0 &&
4950                     (w->bindseqmask & (1 << dupseq)) == 0) {
4951                         HDA_BOOTHVERBOSE(
4952                                 device_printf(devinfo->codec->sc->dev,
4953                                     " %*snid %d busy by seqmask %x\n",
4954                                         depth + 1, "", w->nid, w->bindseqmask);
4955                         );
4956                         return (0);
4957                 }
4958         }
4959
4960         switch (w->type) {
4961         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT:
4962                 /* Do not traverse input. AD1988 has digital monitor
4963                 for which we are not ready. */
4964                 break;
4965         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT:
4966                 /* If we are tracing HP take only dac of first pin. */
4967                 if ((only == 0 || only == w->nid) &&
4968                     (w->nid >= min) && (dupseq < 0 || w->nid ==
4969                     devinfo->function.audio.as[as].dacs[dupseq]))
4970                         m = w->nid;
4971                 break;
4972         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX:
4973                 if (depth > 0)
4974                         break;
4975                 /* Fall */
4976         default:
4977                 /* Find reachable DACs with smallest nid respecting constraints. */
4978                 for (i = 0; i < w->nconns; i++) {
4979                         if (w->connsenable[i] == 0)
4980                                 continue;
4981                         if (w->selconn != -1 && w->selconn != i)
4982                                 continue;
4983                         if ((ret = hdac_audio_trace_dac(devinfo, as, seq,
4984                             w->conns[i], dupseq, min, only, depth + 1)) != 0) {
4985                                 if (m == 0 || ret < m) {
4986                                         m = ret;
4987                                         im = i;
4988                                 }
4989                                 if (only || dupseq >= 0)
4990                                         break;
4991                         }
4992                 }
4993                 if (m && only && ((w->nconns > 1 &&
4994                     w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER) ||
4995                     w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR))
4996                         w->selconn = im;
4997                 break;
4998         }
4999         if (m && only) {
5000                 w->bindas = as;
5001                 w->bindseqmask |= (1 << seq);
5002         }
5003         HDA_BOOTHVERBOSE(
5004                 if (!only) {
5005                         device_printf(devinfo->codec->sc->dev,
5006                             " %*snid %d returned %d\n",
5007                                 depth + 1, "", w->nid, m);
5008                 }
5009         );
5010         return (m);
5011 }
5012
5013 /*
5014  * Trace path from widget to ADC.
5015  */
5016 static nid_t
5017 hdac_audio_trace_adc(struct hdac_devinfo *devinfo, int as, int seq, nid_t nid,
5018     int only, int depth)
5019 {
5020         struct hdac_widget *w, *wc;
5021         int i, j;
5022         nid_t res = 0;
5023
5024         if (depth > HDA_PARSE_MAXDEPTH)
5025                 return (0);
5026         w = hdac_widget_get(devinfo, nid);
5027         if (w == NULL || w->enable == 0)
5028                 return (0);
5029         HDA_BOOTHVERBOSE(
5030                 device_printf(devinfo->codec->sc->dev,
5031                     " %*stracing via nid %d\n",
5032                         depth + 1, "", w->nid);
5033         );
5034         /* Use only unused widgets */
5035         if (w->bindas >= 0 && w->bindas != as) {
5036                 HDA_BOOTHVERBOSE(
5037                         device_printf(devinfo->codec->sc->dev,
5038                             " %*snid %d busy by association %d\n",
5039                                 depth + 1, "", w->nid, w->bindas);
5040                 );
5041                 return (0);
5042         }
5043
5044         switch (w->type) {
5045         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT:
5046                 /* If we are tracing HP take only dac of first pin. */
5047                 if (only == w->nid)
5048                         res = 1;
5049                 break;
5050         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX:
5051                 if (depth > 0)
5052                         break;
5053                 /* Fall */
5054         default:
5055                 /* Try to find reachable ADCs with specified nid. */
5056                 for (j = devinfo->startnode; j < devinfo->endnode; j++) {
5057                         wc = hdac_widget_get(devinfo, j);
5058                         if (wc == NULL || wc->enable == 0)
5059                                 continue;
5060                         for (i = 0; i < wc->nconns; i++) {
5061                                 if (wc->connsenable[i] == 0)
5062                                         continue;
5063                                 if (wc->conns[i] != nid)
5064                                         continue;
5065                                 if (hdac_audio_trace_adc(devinfo, as, seq,
5066                                     j, only, depth + 1) != 0) {
5067                                         res = 1;
5068                                         if (((wc->nconns > 1 &&
5069                                             wc->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER) ||
5070                                             wc->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR) &&
5071                                             wc->selconn == -1)
5072                                                 wc->selconn = i;
5073                                 }
5074                         }
5075                 }
5076                 break;
5077         }
5078         if (res) {
5079                 w->bindas = as;
5080                 w->bindseqmask |= (1 << seq);
5081         }
5082         HDA_BOOTHVERBOSE(
5083                 device_printf(devinfo->codec->sc->dev,
5084                     " %*snid %d returned %d\n",
5085                         depth + 1, "", w->nid, res);
5086         );
5087         return (res);
5088 }
5089
5090 /*
5091  * Erase trace path of the specified association.
5092  */
5093 static void
5094 hdac_audio_undo_trace(struct hdac_devinfo *devinfo, int as, int seq)
5095 {
5096         struct hdac_widget *w;
5097         int i;
5098
5099         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
5100                 w = hdac_widget_get(devinfo, i);
5101                 if (w == NULL || w->enable == 0)
5102                         continue;
5103                 if (w->bindas == as) {
5104                         if (seq >= 0) {
5105                                 w->bindseqmask &= ~(1 << seq);
5106                                 if (w->bindseqmask == 0) {
5107                                         w->bindas = -1;
5108                                         w->selconn = -1;
5109                                 }
5110                         } else {
5111                                 w->bindas = -1;
5112                                 w->bindseqmask = 0;
5113                                 w->selconn = -1;
5114                         }
5115                 }
5116         }
5117 }
5118
5119 /*
5120  * Trace association path from DAC to output
5121  */
5122 static int
5123 hdac_audio_trace_as_out(struct hdac_devinfo *devinfo, int as, int seq)
5124 {
5125         struct hdac_audio_as *ases = devinfo->function.audio.as;
5126         int i, hpredir;
5127         nid_t min, res;
5128
5129         /* Find next pin */
5130         for (i = seq; i < 16 && ases[as].pins[i] == 0; i++)
5131                 ;
5132         /* Check if there is no any left. If so - we succeeded. */
5133         if (i == 16)
5134                 return (1);
5135
5136         hpredir = (i == 15 && ases[as].fakeredir == 0)?ases[as].hpredir:-1;
5137         min = 0;
5138         res = 0;
5139         do {
5140                 HDA_BOOTHVERBOSE(
5141                         device_printf(devinfo->codec->sc->dev,
5142                             " Tracing pin %d with min nid %d",
5143                             ases[as].pins[i], min);
5144                         if (hpredir >= 0)
5145                                 printf(" and hpredir %d", hpredir);
5146                         printf("\n");
5147                 );
5148                 /* Trace this pin taking min nid into account. */
5149                 res = hdac_audio_trace_dac(devinfo, as, i,
5150                     ases[as].pins[i], hpredir, min, 0, 0);
5151                 if (res == 0) {
5152                         /* If we failed - return to previous and redo it. */
5153                         HDA_BOOTVERBOSE(
5154                                 device_printf(devinfo->codec->sc->dev,
5155                                     " Unable to trace pin %d seq %d with min "
5156                                     "nid %d",
5157                                     ases[as].pins[i], i, min);
5158                                 if (hpredir >= 0)
5159                                         printf(" and hpredir %d", hpredir);
5160                                 printf("\n");
5161                         );
5162                         return (0);
5163                 }
5164                 HDA_BOOTVERBOSE(
5165                         device_printf(devinfo->codec->sc->dev,
5166                             " Pin %d traced to DAC %d",
5167                             ases[as].pins[i], res);
5168                         if (hpredir >= 0)
5169                                 printf(" and hpredir %d", hpredir);
5170                         if (ases[as].fakeredir)
5171                                 printf(" with fake redirection");
5172                         printf("\n");
5173                 );
5174                 /* Trace again to mark the path */
5175                 hdac_audio_trace_dac(devinfo, as, i,
5176                     ases[as].pins[i], hpredir, min, res, 0);
5177                 ases[as].dacs[i] = res;
5178                 /* We succeeded, so call next. */
5179                 if (hdac_audio_trace_as_out(devinfo, as, i + 1))
5180                         return (1);
5181                 /* If next failed, we should retry with next min */
5182                 hdac_audio_undo_trace(devinfo, as, i);
5183                 ases[as].dacs[i] = 0;
5184                 min = res + 1;
5185         } while (1);
5186 }
5187
5188 /*
5189  * Trace association path from input to ADC
5190  */
5191 static int
5192 hdac_audio_trace_as_in(struct hdac_devinfo *devinfo, int as)
5193 {
5194         struct hdac_audio_as *ases = devinfo->function.audio.as;
5195         struct hdac_widget *w;
5196         int i, j, k;
5197
5198         for (j = devinfo->startnode; j < devinfo->endnode; j++) {
5199                 w = hdac_widget_get(devinfo, j);
5200                 if (w == NULL || w->enable == 0)
5201                         continue;
5202                 if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT)
5203                         continue;
5204                 if (w->bindas >= 0 && w->bindas != as)
5205                         continue;
5206
5207                 /* Find next pin */
5208                 for (i = 0; i < 16; i++) {
5209                         if (ases[as].pins[i] == 0)
5210                                 continue;
5211
5212                         HDA_BOOTHVERBOSE(
5213                                 device_printf(devinfo->codec->sc->dev,
5214                                     " Tracing pin %d to ADC %d\n",
5215                                     ases[as].pins[i], j);
5216                         );
5217                         /* Trace this pin taking goal into account. */
5218                         if (hdac_audio_trace_adc(devinfo, as, i,
5219                             ases[as].pins[i], j, 0) == 0) {
5220                                 /* If we failed - return to previous and redo it. */
5221                                 HDA_BOOTVERBOSE(
5222                                         device_printf(devinfo->codec->sc->dev,
5223                                             " Unable to trace pin %d to ADC %d, undo traces\n",
5224                                             ases[as].pins[i], j);
5225                                 );
5226                                 hdac_audio_undo_trace(devinfo, as, -1);
5227                                 for (k = 0; k < 16; k++)
5228                                         ases[as].dacs[k] = 0;
5229                                 break;
5230                         }
5231                         HDA_BOOTVERBOSE(
5232                                 device_printf(devinfo->codec->sc->dev,
5233                                     " Pin %d traced to ADC %d\n",
5234                                     ases[as].pins[i], j);
5235                         );
5236                         ases[as].dacs[i] = j;
5237                 }
5238                 if (i == 16)
5239                         return (1);
5240         }
5241         return (0);
5242 }
5243
5244 /*
5245  * Trace input monitor path from mixer to output association.
5246  */
5247 static int
5248 hdac_audio_trace_to_out(struct hdac_devinfo *devinfo, nid_t nid, int depth)
5249 {
5250         struct hdac_audio_as *ases = devinfo->function.audio.as;
5251         struct hdac_widget *w, *wc;
5252         int i, j;
5253         nid_t res = 0;
5254
5255         if (depth > HDA_PARSE_MAXDEPTH)
5256                 return (0);
5257         w = hdac_widget_get(devinfo, nid);
5258         if (w == NULL || w->enable == 0)
5259                 return (0);
5260         HDA_BOOTHVERBOSE(
5261                 device_printf(devinfo->codec->sc->dev,
5262                     " %*stracing via nid %d\n",
5263                         depth + 1, "", w->nid);
5264         );
5265         /* Use only unused widgets */
5266         if (depth > 0 && w->bindas != -1) {
5267                 if (w->bindas < 0 || ases[w->bindas].dir == HDA_CTL_OUT) {
5268                         HDA_BOOTHVERBOSE(
5269                                 device_printf(devinfo->codec->sc->dev,
5270                                     " %*snid %d found output association %d\n",
5271                                         depth + 1, "", w->nid, w->bindas);
5272                         );
5273                         if (w->bindas >= 0)
5274                                 w->pflags |= HDA_ADC_MONITOR;
5275                         return (1);
5276                 } else {
5277                         HDA_BOOTHVERBOSE(
5278                                 device_printf(devinfo->codec->sc->dev,
5279                                     " %*snid %d busy by input association %d\n",
5280                                         depth + 1, "", w->nid, w->bindas);
5281                         );
5282                         return (0);
5283                 }
5284         }
5285
5286         switch (w->type) {
5287         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT:
5288                 /* Do not traverse input. AD1988 has digital monitor
5289                 for which we are not ready. */
5290                 break;
5291         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX:
5292                 if (depth > 0)
5293                         break;
5294                 /* Fall */
5295         default:
5296                 /* Try to find reachable ADCs with specified nid. */
5297                 for (j = devinfo->startnode; j < devinfo->endnode; j++) {
5298                         wc = hdac_widget_get(devinfo, j);
5299                         if (wc == NULL || wc->enable == 0)
5300                                 continue;
5301                         for (i = 0; i < wc->nconns; i++) {
5302                                 if (wc->connsenable[i] == 0)
5303                                         continue;
5304                                 if (wc->conns[i] != nid)
5305                                         continue;
5306                                 if (hdac_audio_trace_to_out(devinfo,
5307                                     j, depth + 1) != 0) {
5308                                         res = 1;
5309                                         if (wc->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR &&
5310                                             wc->selconn == -1)
5311                                                 wc->selconn = i;
5312                                 }
5313                         }
5314                 }
5315                 break;
5316         }
5317         if (res && w->bindas == -1)
5318                 w->bindas = -2;
5319
5320         HDA_BOOTHVERBOSE(
5321                 device_printf(devinfo->codec->sc->dev,
5322                     " %*snid %d returned %d\n",
5323                         depth + 1, "", w->nid, res);
5324         );
5325         return (res);
5326 }
5327
5328 /*
5329  * Trace extra associations (beeper, monitor)
5330  */
5331 static void
5332 hdac_audio_trace_as_extra(struct hdac_devinfo *devinfo)
5333 {
5334         struct hdac_audio_as *as = devinfo->function.audio.as;
5335         struct hdac_widget *w;
5336         int j;
5337
5338         /* Input monitor */
5339         /* Find mixer associated with input, but supplying signal
5340            for output associations. Hope it will be input monitor. */
5341         HDA_BOOTVERBOSE(
5342                 device_printf(devinfo->codec->sc->dev,
5343                     "Tracing input monitor\n");
5344         );
5345         for (j = devinfo->startnode; j < devinfo->endnode; j++) {
5346                 w = hdac_widget_get(devinfo, j);
5347                 if (w == NULL || w->enable == 0)
5348                         continue;
5349                 if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER)
5350                         continue;
5351                 if (w->bindas < 0 || as[w->bindas].dir != HDA_CTL_IN)
5352                         continue;
5353                 HDA_BOOTVERBOSE(
5354                         device_printf(devinfo->codec->sc->dev,
5355                             " Tracing nid %d to out\n",
5356                             j);
5357                 );
5358                 if (hdac_audio_trace_to_out(devinfo, w->nid, 0)) {
5359                         HDA_BOOTVERBOSE(
5360                                 device_printf(devinfo->codec->sc->dev,
5361                                     " nid %d is input monitor\n",
5362                                         w->nid);
5363                         );
5364                         w->ossdev = SOUND_MIXER_IMIX;
5365                 }
5366         }
5367
5368         /* Other inputs monitor */
5369         /* Find input pins supplying signal for output associations.
5370            Hope it will be input monitoring. */
5371         HDA_BOOTVERBOSE(
5372                 device_printf(devinfo->codec->sc->dev,
5373                     "Tracing other input monitors\n");
5374         );
5375         for (j = devinfo->startnode; j < devinfo->endnode; j++) {
5376                 w = hdac_widget_get(devinfo, j);
5377                 if (w == NULL || w->enable == 0)
5378                         continue;
5379                 if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
5380                         continue;
5381                 if (w->bindas < 0 || as[w->bindas].dir != HDA_CTL_IN)
5382                         continue;
5383                 HDA_BOOTVERBOSE(
5384                         device_printf(devinfo->codec->sc->dev,
5385                             " Tracing nid %d to out\n",
5386                             j);
5387                 );
5388                 if (hdac_audio_trace_to_out(devinfo, w->nid, 0)) {
5389                         HDA_BOOTVERBOSE(
5390                                 device_printf(devinfo->codec->sc->dev,
5391                                     " nid %d is input monitor\n",
5392                                         w->nid);
5393                         );
5394                 }
5395         }
5396
5397         /* Beeper */
5398         HDA_BOOTVERBOSE(
5399                 device_printf(devinfo->codec->sc->dev,
5400                     "Tracing beeper\n");
5401         );
5402         for (j = devinfo->startnode; j < devinfo->endnode; j++) {
5403                 w = hdac_widget_get(devinfo, j);
5404                 if (w == NULL || w->enable == 0)
5405                         continue;
5406                 if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET)
5407                         continue;
5408                 HDA_BOOTHVERBOSE(
5409                         device_printf(devinfo->codec->sc->dev,
5410                             " Tracing nid %d to out\n",
5411                             j);
5412                 );
5413                 if (hdac_audio_trace_to_out(devinfo, w->nid, 0)) {
5414                         HDA_BOOTVERBOSE(
5415                                 device_printf(devinfo->codec->sc->dev,
5416                                     " nid %d traced to out\n",
5417                                     j);
5418                         );
5419                 }
5420                 w->bindas = -2;
5421         }
5422 }
5423
5424 /*
5425  * Bind assotiations to PCM channels
5426  */
5427 static void
5428 hdac_audio_bind_as(struct hdac_devinfo *devinfo)
5429 {
5430         struct hdac_softc *sc = devinfo->codec->sc;
5431         struct hdac_audio_as *as = devinfo->function.audio.as;
5432         int j, cnt = 0, free;
5433
5434         for (j = 0; j < devinfo->function.audio.ascnt; j++) {
5435                 if (as[j].enable)
5436                         cnt++;
5437         }
5438         if (sc->num_chans == 0) {
5439                 sc->chans = (struct hdac_chan *)malloc(
5440                     sizeof(struct hdac_chan) * cnt,
5441                     M_HDAC, M_ZERO | M_NOWAIT);
5442                 if (sc->chans == NULL) {
5443                         device_printf(sc->dev,
5444                             "Channels memory allocation failed!\n");
5445                         return;
5446                 }
5447         } else {
5448                 sc->chans = (struct hdac_chan *)realloc(sc->chans,
5449                     sizeof(struct hdac_chan) * (sc->num_chans + cnt),
5450                     M_HDAC, M_ZERO | M_NOWAIT);
5451                 if (sc->chans == NULL) {
5452                         sc->num_chans = 0;
5453                         device_printf(sc->dev,
5454                             "Channels memory allocation failed!\n");
5455                         return;
5456                 }
5457                 /* Fixup relative pointers after realloc */
5458                 for (j = 0; j < sc->num_chans; j++)
5459                         sc->chans[j].caps.fmtlist = sc->chans[j].fmtlist;
5460         }
5461         free = sc->num_chans;
5462         sc->num_chans += cnt;
5463
5464         for (j = free; j < free + cnt; j++) {
5465                 sc->chans[j].devinfo = devinfo;
5466                 sc->chans[j].as = -1;
5467         }
5468
5469         /* Assign associations in order of their numbers, */
5470         for (j = 0; j < devinfo->function.audio.ascnt; j++) {
5471                 if (as[j].enable == 0)
5472                         continue;
5473
5474                 as[j].chan = free;
5475                 sc->chans[free].as = j;
5476                 sc->chans[free].dir =
5477                     (as[j].dir == HDA_CTL_IN) ? PCMDIR_REC : PCMDIR_PLAY;
5478                 hdac_pcmchannel_setup(&sc->chans[free]);
5479                 free++;
5480         }
5481 }
5482
5483 static void
5484 hdac_audio_disable_nonaudio(struct hdac_devinfo *devinfo)
5485 {
5486         struct hdac_widget *w;
5487         int i;
5488
5489         /* Disable power and volume widgets. */
5490         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
5491                 w = hdac_widget_get(devinfo, i);
5492                 if (w == NULL || w->enable == 0)
5493                         continue;
5494                 if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_POWER_WIDGET ||
5495                     w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_VOLUME_WIDGET) {
5496                         w->enable = 0;
5497                         HDA_BOOTHVERBOSE(
5498                                 device_printf(devinfo->codec->sc->dev,
5499                                     " Disabling nid %d due to it's"
5500                                     " non-audio type.\n",
5501                                     w->nid);
5502                         );
5503                 }
5504         }
5505 }
5506
5507 static void
5508 hdac_audio_disable_useless(struct hdac_devinfo *devinfo)
5509 {
5510         struct hdac_widget *w, *cw;
5511         struct hdac_audio_ctl *ctl;
5512         int done, found, i, j, k;
5513
5514         /* Disable useless pins. */
5515         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
5516                 w = hdac_widget_get(devinfo, i);
5517                 if (w == NULL || w->enable == 0)
5518                         continue;
5519                 if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) {
5520                         if ((w->wclass.pin.config &
5521                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK) ==
5522                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_NONE) {
5523                                 w->enable = 0;
5524                                 HDA_BOOTHVERBOSE(
5525                                         device_printf(devinfo->codec->sc->dev,
5526                                             " Disabling pin nid %d due"
5527                                             " to None connectivity.\n",
5528                                             w->nid);
5529                                 );
5530                         } else if ((w->wclass.pin.config &
5531                             HDA_CONFIG_DEFAULTCONF_ASSOCIATION_MASK) == 0) {
5532                                 w->enable = 0;
5533                                 HDA_BOOTHVERBOSE(
5534                                         device_printf(devinfo->codec->sc->dev,
5535                                             " Disabling unassociated"
5536                                             " pin nid %d.\n",
5537                                             w->nid);
5538                                 );
5539                         }
5540                 }
5541         }
5542         do {
5543                 done = 1;
5544                 /* Disable and mute controls for disabled widgets. */
5545                 i = 0;
5546                 while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
5547                         if (ctl->enable == 0)
5548                                 continue;
5549                         if (ctl->widget->enable == 0 ||
5550                             (ctl->childwidget != NULL &&
5551                             ctl->childwidget->enable == 0)) {
5552                                 ctl->forcemute = 1;
5553                                 ctl->muted = HDA_AMP_MUTE_ALL;
5554                                 ctl->left = 0;
5555                                 ctl->right = 0;
5556                                 ctl->enable = 0;
5557                                 if (ctl->ndir == HDA_CTL_IN)
5558                                         ctl->widget->connsenable[ctl->index] = 0;
5559                                 done = 0;
5560                                 HDA_BOOTHVERBOSE(
5561                                         device_printf(devinfo->codec->sc->dev,
5562                                             " Disabling ctl %d nid %d cnid %d due"
5563                                             " to disabled widget.\n", i,
5564                                             ctl->widget->nid,
5565                                             (ctl->childwidget != NULL)?
5566                                             ctl->childwidget->nid:-1);
5567                                 );
5568                         }
5569                 }
5570                 /* Disable useless widgets. */
5571                 for (i = devinfo->startnode; i < devinfo->endnode; i++) {
5572                         w = hdac_widget_get(devinfo, i);
5573                         if (w == NULL || w->enable == 0)
5574                                 continue;
5575                         /* Disable inputs with disabled child widgets. */
5576                         for (j = 0; j < w->nconns; j++) {
5577                                 if (w->connsenable[j]) {
5578                                         cw = hdac_widget_get(devinfo, w->conns[j]);
5579                                         if (cw == NULL || cw->enable == 0) {
5580                                                 w->connsenable[j] = 0;
5581                                                 HDA_BOOTHVERBOSE(
5582                                                         device_printf(devinfo->codec->sc->dev,
5583                                                             " Disabling nid %d connection %d due"
5584                                                             " to disabled child widget.\n",
5585                                                             i, j);
5586                                                 );
5587                                         }
5588                                 }
5589                         }
5590                         if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR &&
5591                             w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER)
5592                                 continue;
5593                         /* Disable mixers and selectors without inputs. */
5594                         found = 0;
5595                         for (j = 0; j < w->nconns; j++) {
5596                                 if (w->connsenable[j]) {
5597                                         found = 1;
5598                                         break;
5599                                 }
5600                         }
5601                         if (found == 0) {
5602                                 w->enable = 0;
5603                                 done = 0;
5604                                 HDA_BOOTHVERBOSE(
5605                                         device_printf(devinfo->codec->sc->dev,
5606                                             " Disabling nid %d due to all it's"
5607                                             " inputs disabled.\n", w->nid);
5608                                 );
5609                         }
5610                         /* Disable nodes without consumers. */
5611                         if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR &&
5612                             w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER)
5613                                 continue;
5614                         found = 0;
5615                         for (k = devinfo->startnode; k < devinfo->endnode; k++) {
5616                                 cw = hdac_widget_get(devinfo, k);
5617                                 if (cw == NULL || cw->enable == 0)
5618                                         continue;
5619                                 for (j = 0; j < cw->nconns; j++) {
5620                                         if (cw->connsenable[j] && cw->conns[j] == i) {
5621                                                 found = 1;
5622                                                 break;
5623                                         }
5624                                 }
5625                         }
5626                         if (found == 0) {
5627                                 w->enable = 0;
5628                                 done = 0;
5629                                 HDA_BOOTHVERBOSE(
5630                                         device_printf(devinfo->codec->sc->dev,
5631                                             " Disabling nid %d due to all it's"
5632                                             " consumers disabled.\n", w->nid);
5633                                 );
5634                         }
5635                 }
5636         } while (done == 0);
5637
5638 }
5639
5640 static void
5641 hdac_audio_disable_unas(struct hdac_devinfo *devinfo)
5642 {
5643         struct hdac_audio_as *as = devinfo->function.audio.as;
5644         struct hdac_widget *w, *cw;
5645         struct hdac_audio_ctl *ctl;
5646         int i, j, k;
5647
5648         /* Disable unassosiated widgets. */
5649         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
5650                 w = hdac_widget_get(devinfo, i);
5651                 if (w == NULL || w->enable == 0)
5652                         continue;
5653                 if (w->bindas == -1) {
5654                         w->enable = 0;
5655                         HDA_BOOTHVERBOSE(
5656                                 device_printf(devinfo->codec->sc->dev,
5657                                     " Disabling unassociated nid %d.\n",
5658                                     w->nid);
5659                         );
5660                 }
5661         }
5662         /* Disable input connections on input pin and
5663          * output on output. */
5664         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
5665                 w = hdac_widget_get(devinfo, i);
5666                 if (w == NULL || w->enable == 0)
5667                         continue;
5668                 if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
5669                         continue;
5670                 if (w->bindas < 0)
5671                         continue;
5672                 if (as[w->bindas].dir == HDA_CTL_IN) {
5673                         for (j = 0; j < w->nconns; j++) {
5674                                 if (w->connsenable[j] == 0)
5675                                         continue;
5676                                 w->connsenable[j] = 0;
5677                                 HDA_BOOTHVERBOSE(
5678                                         device_printf(devinfo->codec->sc->dev,
5679                                             " Disabling connection to input pin "
5680                                             "nid %d conn %d.\n",
5681                                             i, j);
5682                                 );
5683                         }
5684                         ctl = hdac_audio_ctl_amp_get(devinfo, w->nid,
5685                             HDA_CTL_IN, -1, 1);
5686                         if (ctl && ctl->enable) {
5687                                 ctl->forcemute = 1;
5688                                 ctl->muted = HDA_AMP_MUTE_ALL;
5689                                 ctl->left = 0;
5690                                 ctl->right = 0;
5691                                 ctl->enable = 0;
5692                         }
5693                 } else {
5694                         ctl = hdac_audio_ctl_amp_get(devinfo, w->nid,
5695                             HDA_CTL_OUT, -1, 1);
5696                         if (ctl && ctl->enable) {
5697                                 ctl->forcemute = 1;
5698                                 ctl->muted = HDA_AMP_MUTE_ALL;
5699                                 ctl->left = 0;
5700                                 ctl->right = 0;
5701                                 ctl->enable = 0;
5702                         }
5703                         for (k = devinfo->startnode; k < devinfo->endnode; k++) {
5704                                 cw = hdac_widget_get(devinfo, k);
5705                                 if (cw == NULL || cw->enable == 0)
5706                                         continue;
5707                                 for (j = 0; j < cw->nconns; j++) {
5708                                         if (cw->connsenable[j] && cw->conns[j] == i) {
5709                                                 cw->connsenable[j] = 0;
5710                                                 HDA_BOOTHVERBOSE(
5711                                                         device_printf(devinfo->codec->sc->dev,
5712                                                             " Disabling connection from output pin "
5713                                                             "nid %d conn %d cnid %d.\n",
5714                                                             k, j, i);
5715                                                 );
5716                                                 if (cw->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX &&
5717                                                     cw->nconns > 1)
5718                                                         continue;
5719                                                 ctl = hdac_audio_ctl_amp_get(devinfo, k,
5720                                                     HDA_CTL_IN, j, 1);
5721                                                 if (ctl && ctl->enable) {
5722                                                         ctl->forcemute = 1;
5723                                                         ctl->muted = HDA_AMP_MUTE_ALL;
5724                                                         ctl->left = 0;
5725                                                         ctl->right = 0;
5726                                                         ctl->enable = 0;
5727                                                 }
5728                                         }
5729                                 }
5730                         }
5731                 }
5732         }
5733 }
5734
5735 static void
5736 hdac_audio_disable_notselected(struct hdac_devinfo *devinfo)
5737 {
5738         struct hdac_audio_as *as = devinfo->function.audio.as;
5739         struct hdac_widget *w;
5740         int i, j;
5741
5742         /* On playback path we can safely disable all unseleted inputs. */
5743         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
5744                 w = hdac_widget_get(devinfo, i);
5745                 if (w == NULL || w->enable == 0)
5746                         continue;
5747                 if (w->nconns <= 1)
5748                         continue;
5749                 if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER)
5750                         continue;
5751                 if (w->bindas < 0 || as[w->bindas].dir == HDA_CTL_IN)
5752                         continue;
5753                 for (j = 0; j < w->nconns; j++) {
5754                         if (w->connsenable[j] == 0)
5755                                 continue;
5756                         if (w->selconn < 0 || w->selconn == j)
5757                                 continue;
5758                         w->connsenable[j] = 0;
5759                         HDA_BOOTHVERBOSE(
5760                                 device_printf(devinfo->codec->sc->dev,
5761                                     " Disabling unselected connection "
5762                                     "nid %d conn %d.\n",
5763                                     i, j);
5764                         );
5765                 }
5766         }
5767 }
5768
5769 static void
5770 hdac_audio_disable_crossas(struct hdac_devinfo *devinfo)
5771 {
5772         struct hdac_audio_as *ases = devinfo->function.audio.as;
5773         struct hdac_widget *w, *cw;
5774         struct hdac_audio_ctl *ctl;
5775         int i, j;
5776
5777         /* Disable crossassociatement and unwanted crosschannel connections. */
5778         /* ... using selectors */
5779         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
5780                 w = hdac_widget_get(devinfo, i);
5781                 if (w == NULL || w->enable == 0)
5782                         continue;
5783                 if (w->nconns <= 1)
5784                         continue;
5785                 if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER)
5786                         continue;
5787                 if (w->bindas == -2)
5788                         continue;
5789                 for (j = 0; j < w->nconns; j++) {
5790                         if (w->connsenable[j] == 0)
5791                                 continue;
5792                         cw = hdac_widget_get(devinfo, w->conns[j]);
5793                         if (cw == NULL || w->enable == 0)
5794                                 continue;
5795                         if (cw->bindas == -2 ||
5796                             ((w->pflags & HDA_ADC_MONITOR) &&
5797                              cw->bindas >= 0 &&
5798                              ases[cw->bindas].dir == HDA_CTL_IN))
5799                                 continue;
5800                         if (w->bindas == cw->bindas &&
5801                             (w->bindseqmask & cw->bindseqmask) != 0)
5802                                 continue;
5803                         w->connsenable[j] = 0;
5804                         HDA_BOOTHVERBOSE(
5805                                 device_printf(devinfo->codec->sc->dev,
5806                                     " Disabling crossassociatement connection "
5807                                     "nid %d conn %d cnid %d.\n",
5808                                     i, j, cw->nid);
5809                         );
5810                 }
5811         }
5812         /* ... using controls */
5813         i = 0;
5814         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
5815                 if (ctl->enable == 0 || ctl->childwidget == NULL)
5816                         continue;
5817                 if (ctl->widget->bindas == -2)
5818                         continue;
5819                 if (ctl->childwidget->bindas == -2 ||
5820                     ((ctl->widget->pflags & HDA_ADC_MONITOR) &&
5821                      ctl->childwidget->bindas >= 0 &&
5822                      ases[ctl->childwidget->bindas].dir == HDA_CTL_IN))
5823                         continue;
5824                 if (ctl->widget->bindas != ctl->childwidget->bindas ||
5825                     (ctl->widget->bindseqmask & ctl->childwidget->bindseqmask) == 0) {
5826                         ctl->forcemute = 1;
5827                         ctl->muted = HDA_AMP_MUTE_ALL;
5828                         ctl->left = 0;
5829                         ctl->right = 0;
5830                         ctl->enable = 0;
5831                         if (ctl->ndir == HDA_CTL_IN)
5832                                 ctl->widget->connsenable[ctl->index] = 0;
5833                         HDA_BOOTHVERBOSE(
5834                                 device_printf(devinfo->codec->sc->dev,
5835                                     " Disabling crossassociatement connection "
5836                                     "ctl %d nid %d cnid %d.\n", i,
5837                                     ctl->widget->nid,
5838                                     ctl->childwidget->nid);
5839                         );
5840                 }
5841         }
5842
5843 }
5844
5845 #define HDA_CTL_GIVE(ctl)       ((ctl)->step?1:0)
5846
5847 /*
5848  * Find controls to control amplification for source.
5849  */
5850 static int
5851 hdac_audio_ctl_source_amp(struct hdac_devinfo *devinfo, nid_t nid, int index,
5852     int ossdev, int ctlable, int depth, int need)
5853 {
5854         struct hdac_widget *w, *wc;
5855         struct hdac_audio_ctl *ctl;
5856         int i, j, conns = 0, rneed;
5857
5858         if (depth > HDA_PARSE_MAXDEPTH)
5859                 return (need);
5860
5861         w = hdac_widget_get(devinfo, nid);
5862         if (w == NULL || w->enable == 0)
5863                 return (need);
5864
5865         /* Count number of active inputs. */
5866         if (depth > 0) {
5867                 for (j = 0; j < w->nconns; j++) {
5868                         if (w->connsenable[j])
5869                                 conns++;
5870                 }
5871         }
5872
5873         /* If this is not a first step - use input mixer.
5874            Pins have common input ctl so care must be taken. */
5875         if (depth > 0 && ctlable && (conns == 1 ||
5876             w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)) {
5877                 ctl = hdac_audio_ctl_amp_get(devinfo, w->nid, HDA_CTL_IN,
5878                     index, 1);
5879                 if (ctl) {
5880                         if (HDA_CTL_GIVE(ctl) & need)
5881                                 ctl->ossmask |= (1 << ossdev);
5882                         else
5883                                 ctl->possmask |= (1 << ossdev);
5884                         need &= ~HDA_CTL_GIVE(ctl);
5885                 }
5886         }
5887
5888         /* If widget has own ossdev - not traverse it.
5889            It will be traversed on it's own. */
5890         if (w->ossdev >= 0 && depth > 0)
5891                 return (need);
5892
5893         /* We must not traverse pin */
5894         if ((w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT ||
5895             w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) &&
5896             depth > 0)
5897                 return (need);
5898
5899         /* record that this widget exports such signal, */
5900         w->ossmask |= (1 << ossdev);
5901
5902         /* If signals mixed, we can't assign controls farther.
5903          * Ignore this on depth zero. Caller must knows why.
5904          * Ignore this for static selectors if this input selected.
5905          */
5906         if (conns > 1)
5907                 ctlable = 0;
5908
5909         if (ctlable) {
5910                 ctl = hdac_audio_ctl_amp_get(devinfo, w->nid, HDA_CTL_OUT, -1, 1);
5911                 if (ctl) {
5912                         if (HDA_CTL_GIVE(ctl) & need)
5913                                 ctl->ossmask |= (1 << ossdev);
5914                         else
5915                                 ctl->possmask |= (1 << ossdev);
5916                         need &= ~HDA_CTL_GIVE(ctl);
5917                 }
5918         }
5919
5920         rneed = 0;
5921         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
5922                 wc = hdac_widget_get(devinfo, i);
5923                 if (wc == NULL || wc->enable == 0)
5924                         continue;
5925                 for (j = 0; j < wc->nconns; j++) {
5926                         if (wc->connsenable[j] && wc->conns[j] == nid) {
5927                                 rneed |= hdac_audio_ctl_source_amp(devinfo,
5928                                     wc->nid, j, ossdev, ctlable, depth + 1, need);
5929                         }
5930                 }
5931         }
5932         rneed &= need;
5933
5934         return (rneed);
5935 }
5936
5937 /*
5938  * Find controls to control amplification for destination.
5939  */
5940 static void
5941 hdac_audio_ctl_dest_amp(struct hdac_devinfo *devinfo, nid_t nid, int index,
5942     int ossdev, int depth, int need)
5943 {
5944         struct hdac_audio_as *as = devinfo->function.audio.as;
5945         struct hdac_widget *w, *wc;
5946         struct hdac_audio_ctl *ctl;
5947         int i, j, consumers;
5948
5949         if (depth > HDA_PARSE_MAXDEPTH)
5950                 return;
5951
5952         w = hdac_widget_get(devinfo, nid);
5953         if (w == NULL || w->enable == 0)
5954                 return;
5955
5956         if (depth > 0) {
5957                 /* If this node produce output for several consumers,
5958                    we can't touch it. */
5959                 consumers = 0;
5960                 for (i = devinfo->startnode; i < devinfo->endnode; i++) {
5961                         wc = hdac_widget_get(devinfo, i);
5962                         if (wc == NULL || wc->enable == 0)
5963                                 continue;
5964                         for (j = 0; j < wc->nconns; j++) {
5965                                 if (wc->connsenable[j] && wc->conns[j] == nid)
5966                                         consumers++;
5967                         }
5968                 }
5969                 /* The only exception is if real HP redirection is configured
5970                    and this is a duplication point.
5971                    XXX: Actually exception is not completely correct.
5972                    XXX: Duplication point check is not perfect. */
5973                 if ((consumers == 2 && (w->bindas < 0 ||
5974                     as[w->bindas].hpredir < 0 || as[w->bindas].fakeredir ||
5975                     (w->bindseqmask & (1 << 15)) == 0)) ||
5976                     consumers > 2)
5977                         return;
5978
5979                 /* Else use it's output mixer. */
5980                 ctl = hdac_audio_ctl_amp_get(devinfo, w->nid,
5981                     HDA_CTL_OUT, -1, 1);
5982                 if (ctl) {
5983                         if (HDA_CTL_GIVE(ctl) & need)
5984                                 ctl->ossmask |= (1 << ossdev);
5985                         else
5986                                 ctl->possmask |= (1 << ossdev);
5987                         need &= ~HDA_CTL_GIVE(ctl);
5988                 }
5989         }
5990
5991         /* We must not traverse pin */
5992         if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX &&
5993             depth > 0)
5994                 return;
5995
5996         for (i = 0; i < w->nconns; i++) {
5997                 int tneed = need;
5998                 if (w->connsenable[i] == 0)
5999                         continue;
6000                 if (index >= 0 && i != index)
6001                         continue;
6002                 ctl = hdac_audio_ctl_amp_get(devinfo, w->nid,
6003                     HDA_CTL_IN, i, 1);
6004                 if (ctl) {
6005                         if (HDA_CTL_GIVE(ctl) & tneed)
6006                                 ctl->ossmask |= (1 << ossdev);
6007                         else
6008                                 ctl->possmask |= (1 << ossdev);
6009                         tneed &= ~HDA_CTL_GIVE(ctl);
6010                 }
6011                 hdac_audio_ctl_dest_amp(devinfo, w->conns[i], -1, ossdev,
6012                     depth + 1, tneed);
6013         }
6014 }
6015
6016 /*
6017  * Assign OSS names to sound sources
6018  */
6019 static void
6020 hdac_audio_assign_names(struct hdac_devinfo *devinfo)
6021 {
6022         struct hdac_audio_as *as = devinfo->function.audio.as;
6023         struct hdac_widget *w;
6024         int i, j;
6025         int type = -1, use, used = 0;
6026         static const int types[7][13] = {
6027             { SOUND_MIXER_LINE, SOUND_MIXER_LINE1, SOUND_MIXER_LINE2,
6028               SOUND_MIXER_LINE3, -1 },  /* line */
6029             { SOUND_MIXER_MONITOR, SOUND_MIXER_MIC, -1 }, /* int mic */
6030             { SOUND_MIXER_MIC, SOUND_MIXER_MONITOR, -1 }, /* ext mic */
6031             { SOUND_MIXER_CD, -1 },     /* cd */
6032             { SOUND_MIXER_SPEAKER, -1 },        /* speaker */
6033             { SOUND_MIXER_DIGITAL1, SOUND_MIXER_DIGITAL2, SOUND_MIXER_DIGITAL3,
6034               -1 },     /* digital */
6035             { SOUND_MIXER_LINE, SOUND_MIXER_LINE1, SOUND_MIXER_LINE2,
6036               SOUND_MIXER_LINE3, SOUND_MIXER_PHONEIN, SOUND_MIXER_PHONEOUT,
6037               SOUND_MIXER_VIDEO, SOUND_MIXER_RADIO, SOUND_MIXER_DIGITAL1,
6038               SOUND_MIXER_DIGITAL2, SOUND_MIXER_DIGITAL3, SOUND_MIXER_MONITOR,
6039               -1 }      /* others */
6040         };
6041
6042         /* Surely known names */
6043         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
6044                 w = hdac_widget_get(devinfo, i);
6045                 if (w == NULL || w->enable == 0)
6046                         continue;
6047                 if (w->bindas == -1)
6048                         continue;
6049                 use = -1;
6050                 switch (w->type) {
6051                 case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX:
6052                         if (as[w->bindas].dir == HDA_CTL_OUT)
6053                                 break;
6054                         type = -1;
6055                         switch (w->wclass.pin.config & HDA_CONFIG_DEFAULTCONF_DEVICE_MASK) {
6056                         case HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN:
6057                                 type = 0;
6058                                 break;
6059                         case HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN:
6060                                 if ((w->wclass.pin.config & HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK)
6061                                     == HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_JACK)
6062                                         break;
6063                                 type = 1;
6064                                 break;
6065                         case HDA_CONFIG_DEFAULTCONF_DEVICE_CD:
6066                                 type = 3;
6067                                 break;
6068                         case HDA_CONFIG_DEFAULTCONF_DEVICE_SPEAKER:
6069                                 type = 4;
6070                                 break;
6071                         case HDA_CONFIG_DEFAULTCONF_DEVICE_SPDIF_IN:
6072                         case HDA_CONFIG_DEFAULTCONF_DEVICE_DIGITAL_OTHER_IN:
6073                                 type = 5;
6074                                 break;
6075                         }
6076                         if (type == -1)
6077                                 break;
6078                         j = 0;
6079                         while (types[type][j] >= 0 &&
6080                             (used & (1 << types[type][j])) != 0) {
6081                                 j++;
6082                         }
6083                         if (types[type][j] >= 0)
6084                                 use = types[type][j];
6085                         break;
6086                 case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT:
6087                         use = SOUND_MIXER_PCM;
6088                         break;
6089                 case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET:
6090                         use = SOUND_MIXER_SPEAKER;
6091                         break;
6092                 default:
6093                         break;
6094                 }
6095                 if (use >= 0) {
6096                         w->ossdev = use;
6097                         used |= (1 << use);
6098                 }
6099         }
6100         /* Semi-known names */
6101         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
6102                 w = hdac_widget_get(devinfo, i);
6103                 if (w == NULL || w->enable == 0)
6104                         continue;
6105                 if (w->ossdev >= 0)
6106                         continue;
6107                 if (w->bindas == -1)
6108                         continue;
6109                 if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
6110                         continue;
6111                 if (as[w->bindas].dir == HDA_CTL_OUT)
6112                         continue;
6113                 type = -1;
6114                 switch (w->wclass.pin.config & HDA_CONFIG_DEFAULTCONF_DEVICE_MASK) {
6115                 case HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_OUT:
6116                 case HDA_CONFIG_DEFAULTCONF_DEVICE_SPEAKER:
6117                 case HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT:
6118                 case HDA_CONFIG_DEFAULTCONF_DEVICE_AUX:
6119                         type = 0;
6120                         break;
6121                 case HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN:
6122                         type = 2;
6123                         break;
6124                 case HDA_CONFIG_DEFAULTCONF_DEVICE_SPDIF_OUT:
6125                 case HDA_CONFIG_DEFAULTCONF_DEVICE_DIGITAL_OTHER_OUT:
6126                         type = 5;
6127                         break;
6128                 }
6129                 if (type == -1)
6130                         break;
6131                 j = 0;
6132                 while (types[type][j] >= 0 &&
6133                     (used & (1 << types[type][j])) != 0) {
6134                         j++;
6135                 }
6136                 if (types[type][j] >= 0) {
6137                         w->ossdev = types[type][j];
6138                         used |= (1 << types[type][j]);
6139                 }
6140         }
6141         /* Others */
6142         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
6143                 w = hdac_widget_get(devinfo, i);
6144                 if (w == NULL || w->enable == 0)
6145                         continue;
6146                 if (w->ossdev >= 0)
6147                         continue;
6148                 if (w->bindas == -1)
6149                         continue;
6150                 if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
6151                         continue;
6152                 if (as[w->bindas].dir == HDA_CTL_OUT)
6153                         continue;
6154                 j = 0;
6155                 while (types[6][j] >= 0 &&
6156                     (used & (1 << types[6][j])) != 0) {
6157                         j++;
6158                 }
6159                 if (types[6][j] >= 0) {
6160                         w->ossdev = types[6][j];
6161                         used |= (1 << types[6][j]);
6162                 }
6163         }
6164 }
6165
6166 static void
6167 hdac_audio_build_tree(struct hdac_devinfo *devinfo)
6168 {
6169         struct hdac_audio_as *as = devinfo->function.audio.as;
6170         int j, res;
6171
6172         /* Trace all associations in order of their numbers, */
6173         for (j = 0; j < devinfo->function.audio.ascnt; j++) {
6174                 if (as[j].enable == 0)
6175                         continue;
6176                 HDA_BOOTVERBOSE(
6177                         device_printf(devinfo->codec->sc->dev,
6178                             "Tracing association %d (%d)\n", j, as[j].index);
6179                 );
6180                 if (as[j].dir == HDA_CTL_OUT) {
6181 retry:
6182                         res = hdac_audio_trace_as_out(devinfo, j, 0);
6183                         if (res == 0 && as[j].hpredir >= 0 &&
6184                             as[j].fakeredir == 0) {
6185                                 /* If codec can't do analog HP redirection
6186                                    try to make it using one more DAC. */
6187                                 as[j].fakeredir = 1;
6188                                 goto retry;
6189                         }
6190                 } else {
6191                         res = hdac_audio_trace_as_in(devinfo, j);
6192                 }
6193                 if (res) {
6194                         HDA_BOOTVERBOSE(
6195                                 device_printf(devinfo->codec->sc->dev,
6196                                     "Association %d (%d) trace succeeded\n",
6197                                     j, as[j].index);
6198                         );
6199                 } else {
6200                         HDA_BOOTVERBOSE(
6201                                 device_printf(devinfo->codec->sc->dev,
6202                                     "Association %d (%d) trace failed\n",
6203                                     j, as[j].index);
6204                         );
6205                         as[j].enable = 0;
6206                 }
6207         }
6208
6209         /* Trace mixer and beeper pseudo associations. */
6210         hdac_audio_trace_as_extra(devinfo);
6211 }
6212
6213 static void
6214 hdac_audio_assign_mixers(struct hdac_devinfo *devinfo)
6215 {
6216         struct hdac_audio_as *as = devinfo->function.audio.as;
6217         struct hdac_audio_ctl *ctl;
6218         struct hdac_widget *w, *cw;
6219         int i, j;
6220
6221         /* Assign mixers to the tree. */
6222         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
6223                 w = hdac_widget_get(devinfo, i);
6224                 if (w == NULL || w->enable == 0)
6225                         continue;
6226                 if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT ||
6227                     w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET ||
6228                     (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX &&
6229                     as[w->bindas].dir == HDA_CTL_IN)) {
6230                         if (w->ossdev < 0)
6231                                 continue;
6232                         hdac_audio_ctl_source_amp(devinfo, w->nid, -1,
6233                             w->ossdev, 1, 0, 1);
6234                 } else if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT) {
6235                         hdac_audio_ctl_dest_amp(devinfo, w->nid, -1,
6236                             SOUND_MIXER_RECLEV, 0, 1);
6237                 } else if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX &&
6238                     as[w->bindas].dir == HDA_CTL_OUT) {
6239                         hdac_audio_ctl_dest_amp(devinfo, w->nid, -1,
6240                             SOUND_MIXER_VOLUME, 0, 1);
6241                 }
6242                 if (w->ossdev == SOUND_MIXER_IMIX) {
6243                         if (hdac_audio_ctl_source_amp(devinfo, w->nid, -1,
6244                             w->ossdev, 1, 0, 1)) {
6245                                 /* If we are unable to control input monitor
6246                                    as source - try to control it as destination. */
6247                                 hdac_audio_ctl_dest_amp(devinfo, w->nid, -1,
6248                                     w->ossdev, 0, 1);
6249                         }
6250                 }
6251                 if (w->pflags & HDA_ADC_MONITOR) {
6252                         for (j = 0; j < w->nconns; j++) {
6253                                 if (!w->connsenable[j])
6254                                     continue;
6255                                 cw = hdac_widget_get(devinfo, w->conns[j]);
6256                                 if (cw == NULL || cw->enable == 0)
6257                                     continue;
6258                                 if (cw->bindas == -1)
6259                                     continue;
6260                                 if (cw->bindas >= 0 &&
6261                                     as[cw->bindas].dir != HDA_CTL_IN)
6262                                         continue;
6263                                 hdac_audio_ctl_dest_amp(devinfo,
6264                                     w->nid, j, SOUND_MIXER_IGAIN, 0, 1);
6265                         }
6266                 }
6267         }
6268         /* Treat unrequired as possible. */
6269         i = 0;
6270         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
6271                 if (ctl->ossmask == 0)
6272                         ctl->ossmask = ctl->possmask;
6273         }
6274 }
6275
6276 static void
6277 hdac_audio_prepare_pin_ctrl(struct hdac_devinfo *devinfo)
6278 {
6279         struct hdac_audio_as *as = devinfo->function.audio.as;
6280         struct hdac_widget *w;
6281         uint32_t pincap;
6282         int i;
6283
6284         for (i = 0; i < devinfo->nodecnt; i++) {
6285                 w = &devinfo->widget[i];
6286                 if (w == NULL)
6287                         continue;
6288                 if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
6289                         continue;
6290
6291                 pincap = w->wclass.pin.cap;
6292
6293                 /* Disable everything. */
6294                 w->wclass.pin.ctrl &= ~(
6295                     HDA_CMD_SET_PIN_WIDGET_CTRL_HPHN_ENABLE |
6296                     HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE |
6297                     HDA_CMD_SET_PIN_WIDGET_CTRL_IN_ENABLE |
6298                     HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK);
6299
6300                 if (w->enable == 0 ||
6301                     w->bindas < 0 || as[w->bindas].enable == 0) {
6302                         /* Pin is unused so left it disabled. */
6303                         continue;
6304                 } else if (as[w->bindas].dir == HDA_CTL_IN) {
6305                         /* Input pin, configure for input. */
6306                         if (HDA_PARAM_PIN_CAP_INPUT_CAP(pincap))
6307                                 w->wclass.pin.ctrl |=
6308                                     HDA_CMD_SET_PIN_WIDGET_CTRL_IN_ENABLE;
6309
6310                         if ((devinfo->function.audio.quirks & HDA_QUIRK_IVREF100) &&
6311                             HDA_PARAM_PIN_CAP_VREF_CTRL_100(pincap))
6312                                 w->wclass.pin.ctrl |=
6313                                     HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE(
6314                                     HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_100);
6315                         else if ((devinfo->function.audio.quirks & HDA_QUIRK_IVREF80) &&
6316                             HDA_PARAM_PIN_CAP_VREF_CTRL_80(pincap))
6317                                 w->wclass.pin.ctrl |=
6318                                     HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE(
6319                                     HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_80);
6320                         else if ((devinfo->function.audio.quirks & HDA_QUIRK_IVREF50) &&
6321                             HDA_PARAM_PIN_CAP_VREF_CTRL_50(pincap))
6322                                 w->wclass.pin.ctrl |=
6323                                     HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE(
6324                                     HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_50);
6325                 } else {
6326                         /* Output pin, configure for output. */
6327                         if (HDA_PARAM_PIN_CAP_OUTPUT_CAP(pincap))
6328                                 w->wclass.pin.ctrl |=
6329                                     HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE;
6330
6331                         if (HDA_PARAM_PIN_CAP_HEADPHONE_CAP(pincap) &&
6332                             (w->wclass.pin.config &
6333                             HDA_CONFIG_DEFAULTCONF_DEVICE_MASK) ==
6334                             HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT)
6335                                 w->wclass.pin.ctrl |=
6336                                     HDA_CMD_SET_PIN_WIDGET_CTRL_HPHN_ENABLE;
6337
6338                         if ((devinfo->function.audio.quirks & HDA_QUIRK_OVREF100) &&
6339                             HDA_PARAM_PIN_CAP_VREF_CTRL_100(pincap))
6340                                 w->wclass.pin.ctrl |=
6341                                     HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE(
6342                                     HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_100);
6343                         else if ((devinfo->function.audio.quirks & HDA_QUIRK_OVREF80) &&
6344                             HDA_PARAM_PIN_CAP_VREF_CTRL_80(pincap))
6345                                 w->wclass.pin.ctrl |=
6346                                     HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE(
6347                                     HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_80);
6348                         else if ((devinfo->function.audio.quirks & HDA_QUIRK_OVREF50) &&
6349                             HDA_PARAM_PIN_CAP_VREF_CTRL_50(pincap))
6350                                 w->wclass.pin.ctrl |=
6351                                     HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE(
6352                                     HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_50);
6353                 }
6354         }
6355 }
6356
6357 static void
6358 hdac_audio_ctl_commit(struct hdac_devinfo *devinfo)
6359 {
6360         struct hdac_audio_ctl *ctl;
6361         int i, z;
6362
6363         i = 0;
6364         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
6365                 if (ctl->enable == 0 || ctl->ossmask != 0) {
6366                         /* Mute disabled and mixer controllable controls.
6367                          * Last will be initialized by mixer_init().
6368                          * This expected to reduce click on startup. */
6369                         hdac_audio_ctl_amp_set(ctl, HDA_AMP_MUTE_ALL, 0, 0);
6370                         continue;
6371                 }
6372                 /* Init fixed controls to 0dB amplification. */
6373                 z = ctl->offset;
6374                 if (z > ctl->step)
6375                         z = ctl->step;
6376                 hdac_audio_ctl_amp_set(ctl, HDA_AMP_MUTE_NONE, z, z);
6377         }
6378 }
6379
6380 static void
6381 hdac_audio_commit(struct hdac_devinfo *devinfo)
6382 {
6383         struct hdac_softc *sc = devinfo->codec->sc;
6384         struct hdac_widget *w;
6385         nid_t cad;
6386         uint32_t gdata, gmask, gdir;
6387         int commitgpio, numgpio;
6388         int i;
6389
6390         cad = devinfo->codec->cad;
6391
6392         if (sc->pci_subvendor == APPLE_INTEL_MAC)
6393                 hdac_command(sc, HDA_CMD_12BIT(cad, devinfo->nid,
6394                     0x7e7, 0), cad);
6395
6396         /* Commit controls. */
6397         hdac_audio_ctl_commit(devinfo);
6398
6399         /* Commit selectors, pins and EAPD. */
6400         for (i = 0; i < devinfo->nodecnt; i++) {
6401                 w = &devinfo->widget[i];
6402                 if (w == NULL)
6403                         continue;
6404                 if (w->selconn == -1)
6405                         w->selconn = 0;
6406                 if (w->nconns > 0)
6407                         hdac_widget_connection_select(w, w->selconn);
6408                 if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) {
6409                         hdac_command(sc,
6410                             HDA_CMD_SET_PIN_WIDGET_CTRL(cad, w->nid,
6411                             w->wclass.pin.ctrl), cad);
6412                 }
6413                 if (w->param.eapdbtl != HDAC_INVALID) {
6414                         uint32_t val;
6415
6416                         val = w->param.eapdbtl;
6417                         if (devinfo->function.audio.quirks &
6418                             HDA_QUIRK_EAPDINV)
6419                                 val ^= HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD;
6420                         hdac_command(sc,
6421                             HDA_CMD_SET_EAPD_BTL_ENABLE(cad, w->nid,
6422                             val), cad);
6423                 }
6424         }
6425
6426         /* Commit GPIOs. */
6427         gdata = 0;
6428         gmask = 0;
6429         gdir = 0;
6430         commitgpio = 0;
6431         numgpio = HDA_PARAM_GPIO_COUNT_NUM_GPIO(
6432             devinfo->function.audio.gpio);
6433
6434         if (devinfo->function.audio.quirks & HDA_QUIRK_GPIOFLUSH)
6435                 commitgpio = (numgpio > 0) ? 1 : 0;
6436         else {
6437                 for (i = 0; i < numgpio && i < HDA_GPIO_MAX; i++) {
6438                         if (!(devinfo->function.audio.quirks &
6439                             (1 << i)))
6440                                 continue;
6441                         if (commitgpio == 0) {
6442                                 commitgpio = 1;
6443                                 HDA_BOOTVERBOSE(
6444                                         gdata = hdac_command(sc,
6445                                             HDA_CMD_GET_GPIO_DATA(cad,
6446                                             devinfo->nid), cad);
6447                                         gmask = hdac_command(sc,
6448                                             HDA_CMD_GET_GPIO_ENABLE_MASK(cad,
6449                                             devinfo->nid), cad);
6450                                         gdir = hdac_command(sc,
6451                                             HDA_CMD_GET_GPIO_DIRECTION(cad,
6452                                             devinfo->nid), cad);
6453                                         device_printf(sc->dev,
6454                                             "GPIO init: data=0x%08x "
6455                                             "mask=0x%08x dir=0x%08x\n",
6456                                             gdata, gmask, gdir);
6457                                         gdata = 0;
6458                                         gmask = 0;
6459                                         gdir = 0;
6460                                 );
6461                         }
6462                         gdata |= 1 << i;
6463                         gmask |= 1 << i;
6464                         gdir |= 1 << i;
6465                 }
6466         }
6467
6468         if (commitgpio != 0) {
6469                 HDA_BOOTVERBOSE(
6470                         device_printf(sc->dev,
6471                             "GPIO commit: data=0x%08x mask=0x%08x "
6472                             "dir=0x%08x\n",
6473                             gdata, gmask, gdir);
6474                 );
6475                 hdac_command(sc,
6476                     HDA_CMD_SET_GPIO_ENABLE_MASK(cad, devinfo->nid,
6477                     gmask), cad);
6478                 hdac_command(sc,
6479                     HDA_CMD_SET_GPIO_DIRECTION(cad, devinfo->nid,
6480                     gdir), cad);
6481                 hdac_command(sc,
6482                     HDA_CMD_SET_GPIO_DATA(cad, devinfo->nid,
6483                     gdata), cad);
6484         }
6485 }
6486
6487 static void
6488 hdac_powerup(struct hdac_devinfo *devinfo)
6489 {
6490         struct hdac_softc *sc = devinfo->codec->sc;
6491         nid_t cad = devinfo->codec->cad;
6492         int i;
6493
6494         hdac_command(sc,
6495             HDA_CMD_SET_POWER_STATE(cad,
6496             devinfo->nid, HDA_CMD_POWER_STATE_D0),
6497             cad);
6498         DELAY(100);
6499
6500         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
6501                 hdac_command(sc,
6502                     HDA_CMD_SET_POWER_STATE(cad,
6503                     i, HDA_CMD_POWER_STATE_D0),
6504                     cad);
6505         }
6506         DELAY(1000);
6507 }
6508
6509 static int
6510 hdac_pcmchannel_setup(struct hdac_chan *ch)
6511 {
6512         struct hdac_devinfo *devinfo = ch->devinfo;
6513         struct hdac_audio_as *as = devinfo->function.audio.as;
6514         struct hdac_widget *w;
6515         uint32_t cap, fmtcap, pcmcap;
6516         int i, j, ret, channels, onlystereo;
6517         uint16_t pinset;
6518
6519         ch->caps = hdac_caps;
6520         ch->caps.fmtlist = ch->fmtlist;
6521         ch->bit16 = 1;
6522         ch->bit32 = 0;
6523         ch->pcmrates[0] = 48000;
6524         ch->pcmrates[1] = 0;
6525
6526         ret = 0;
6527         channels = 0;
6528         onlystereo = 1;
6529         pinset = 0;
6530         fmtcap = devinfo->function.audio.supp_stream_formats;
6531         pcmcap = devinfo->function.audio.supp_pcm_size_rate;
6532
6533         for (i = 0; i < 16; i++) {
6534                 /* Check as is correct */
6535                 if (ch->as < 0)
6536                         break;
6537                 /* Cound only present DACs */
6538                 if (as[ch->as].dacs[i] <= 0)
6539                         continue;
6540                 /* Ignore duplicates */
6541                 for (j = 0; j < ret; j++) {
6542                         if (ch->io[j] == as[ch->as].dacs[i])
6543                                 break;
6544                 }
6545                 if (j < ret)
6546                         continue;
6547
6548                 w = hdac_widget_get(devinfo, as[ch->as].dacs[i]);
6549                 if (w == NULL || w->enable == 0)
6550                         continue;
6551                 cap = w->param.supp_stream_formats;
6552                 if (!HDA_PARAM_SUPP_STREAM_FORMATS_PCM(cap) &&
6553                     !HDA_PARAM_SUPP_STREAM_FORMATS_AC3(cap))
6554                         continue;
6555                 /* Many CODECs does not declare AC3 support on SPDIF.
6556                    I don't beleave that they doesn't support it! */
6557                 if (HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL(w->param.widget_cap))
6558                         cap |= HDA_PARAM_SUPP_STREAM_FORMATS_AC3_MASK;
6559                 if (ret == 0) {
6560                         fmtcap = cap;
6561                         pcmcap = w->param.supp_pcm_size_rate;
6562                 } else {
6563                         fmtcap &= cap;
6564                         pcmcap &= w->param.supp_pcm_size_rate;
6565                 }
6566                 ch->io[ret++] = as[ch->as].dacs[i];
6567                 /* Do not count redirection pin/dac channels. */
6568                 if (i == 15 && as[ch->as].hpredir >= 0)
6569                         continue;
6570                 channels += HDA_PARAM_AUDIO_WIDGET_CAP_CC(w->param.widget_cap) + 1;
6571                 if (HDA_PARAM_AUDIO_WIDGET_CAP_CC(w->param.widget_cap) != 1)
6572                         onlystereo = 0;
6573                 pinset |= (1 << i);
6574         }
6575         ch->io[ret] = -1;
6576
6577         if (as[ch->as].fakeredir)
6578                 ret--;
6579         /* Standard speaks only about stereo pins and playback, ... */
6580         if ((!onlystereo) || as[ch->as].dir != HDA_CTL_OUT)
6581                 pinset = 0;
6582         /* ..., but there it gives us info about speakers layout. */
6583         as[ch->as].pinset = pinset;
6584
6585         ch->supp_stream_formats = fmtcap;
6586         ch->supp_pcm_size_rate = pcmcap;
6587
6588         /*
6589          *  8bit = 0
6590          * 16bit = 1
6591          * 20bit = 2
6592          * 24bit = 3
6593          * 32bit = 4
6594          */
6595         if (ret > 0) {
6596                 i = 0;
6597                 if (HDA_PARAM_SUPP_STREAM_FORMATS_PCM(fmtcap)) {
6598                         if (HDA_PARAM_SUPP_PCM_SIZE_RATE_16BIT(pcmcap))
6599                                 ch->bit16 = 1;
6600                         else if (HDA_PARAM_SUPP_PCM_SIZE_RATE_8BIT(pcmcap))
6601                                 ch->bit16 = 0;
6602                         if (HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT(pcmcap))
6603                                 ch->bit32 = 4;
6604                         else if (HDA_PARAM_SUPP_PCM_SIZE_RATE_24BIT(pcmcap))
6605                                 ch->bit32 = 3;
6606                         else if (HDA_PARAM_SUPP_PCM_SIZE_RATE_20BIT(pcmcap))
6607                                 ch->bit32 = 2;
6608                         if (!(devinfo->function.audio.quirks & HDA_QUIRK_FORCESTEREO)) {
6609                                 ch->fmtlist[i++] = SND_FORMAT(AFMT_S16_LE, 1, 0);
6610                                 if (ch->bit32)
6611                                         ch->fmtlist[i++] = SND_FORMAT(AFMT_S32_LE, 1, 0);
6612                         }
6613                         if (channels >= 2) {
6614                                 ch->fmtlist[i++] = SND_FORMAT(AFMT_S16_LE, 2, 0);
6615                                 if (ch->bit32)
6616                                         ch->fmtlist[i++] = SND_FORMAT(AFMT_S32_LE, 2, 0);
6617                         }
6618                         if (channels == 4 || /* Any 4-channel */
6619                             pinset == 0x0007 || /* 5.1 */
6620                             pinset == 0x0013 || /* 5.1 */
6621                             pinset == 0x0017) {  /* 7.1 */
6622                                 ch->fmtlist[i++] = SND_FORMAT(AFMT_S16_LE, 4, 0);
6623                                 if (ch->bit32)
6624                                         ch->fmtlist[i++] = SND_FORMAT(AFMT_S32_LE, 4, 0);
6625                         }
6626                         if (channels == 6 || /* Any 6-channel */
6627                             pinset == 0x0017) {  /* 7.1 */
6628                                 ch->fmtlist[i++] = SND_FORMAT(AFMT_S16_LE, 6, 1);
6629                                 if (ch->bit32)
6630                                         ch->fmtlist[i++] = SND_FORMAT(AFMT_S32_LE, 6, 1);
6631                         }
6632                         if (channels == 8) { /* Any 8-channel */
6633                                 ch->fmtlist[i++] = SND_FORMAT(AFMT_S16_LE, 8, 1);
6634                                 if (ch->bit32)
6635                                         ch->fmtlist[i++] = SND_FORMAT(AFMT_S32_LE, 8, 1);
6636                         }
6637                 }
6638                 if (HDA_PARAM_SUPP_STREAM_FORMATS_AC3(fmtcap)) {
6639                         ch->fmtlist[i++] = SND_FORMAT(AFMT_AC3, 2, 0);
6640                 }
6641                 ch->fmtlist[i] = 0;
6642                 i = 0;
6643                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_8KHZ(pcmcap))
6644                         ch->pcmrates[i++] = 8000;
6645                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_11KHZ(pcmcap))
6646                         ch->pcmrates[i++] = 11025;
6647                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_16KHZ(pcmcap))
6648                         ch->pcmrates[i++] = 16000;
6649                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_22KHZ(pcmcap))
6650                         ch->pcmrates[i++] = 22050;
6651                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_32KHZ(pcmcap))
6652                         ch->pcmrates[i++] = 32000;
6653                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_44KHZ(pcmcap))
6654                         ch->pcmrates[i++] = 44100;
6655                 /* if (HDA_PARAM_SUPP_PCM_SIZE_RATE_48KHZ(pcmcap)) */
6656                 ch->pcmrates[i++] = 48000;
6657                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_88KHZ(pcmcap))
6658                         ch->pcmrates[i++] = 88200;
6659                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_96KHZ(pcmcap))
6660                         ch->pcmrates[i++] = 96000;
6661                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_176KHZ(pcmcap))
6662                         ch->pcmrates[i++] = 176400;
6663                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_192KHZ(pcmcap))
6664                         ch->pcmrates[i++] = 192000;
6665                 /* if (HDA_PARAM_SUPP_PCM_SIZE_RATE_384KHZ(pcmcap)) */
6666                 ch->pcmrates[i] = 0;
6667                 if (i > 0) {
6668                         ch->caps.minspeed = ch->pcmrates[0];
6669                         ch->caps.maxspeed = ch->pcmrates[i - 1];
6670                 }
6671         }
6672
6673         return (ret);
6674 }
6675
6676 static void
6677 hdac_create_pcms(struct hdac_devinfo *devinfo)
6678 {
6679         struct hdac_softc *sc = devinfo->codec->sc;
6680         struct hdac_audio_as *as = devinfo->function.audio.as;
6681         int i, j, apdev = 0, ardev = 0, dpdev = 0, drdev = 0;
6682
6683         for (i = 0; i < devinfo->function.audio.ascnt; i++) {
6684                 if (as[i].enable == 0)
6685                         continue;
6686                 if (as[i].dir == HDA_CTL_IN) {
6687                         if (as[i].digital)
6688                                 drdev++;
6689                         else
6690                                 ardev++;
6691                 } else {
6692                         if (as[i].digital)
6693                                 dpdev++;
6694                         else
6695                                 apdev++;
6696                 }
6697         }
6698         devinfo->function.audio.num_devs =
6699             max(ardev, apdev) + max(drdev, dpdev);
6700         devinfo->function.audio.devs =
6701             (struct hdac_pcm_devinfo *)malloc(
6702             devinfo->function.audio.num_devs * sizeof(struct hdac_pcm_devinfo),
6703             M_HDAC, M_ZERO | M_NOWAIT);
6704         if (devinfo->function.audio.devs == NULL) {
6705                 device_printf(sc->dev,
6706                     "Unable to allocate memory for devices\n");
6707                 return;
6708         }
6709         for (i = 0; i < devinfo->function.audio.num_devs; i++) {
6710                 devinfo->function.audio.devs[i].index = i;
6711                 devinfo->function.audio.devs[i].devinfo = devinfo;
6712                 devinfo->function.audio.devs[i].play = -1;
6713                 devinfo->function.audio.devs[i].rec = -1;
6714                 devinfo->function.audio.devs[i].digital = 255;
6715         }
6716         for (i = 0; i < devinfo->function.audio.ascnt; i++) {
6717                 if (as[i].enable == 0)
6718                         continue;
6719                 for (j = 0; j < devinfo->function.audio.num_devs; j++) {
6720                         if (devinfo->function.audio.devs[j].digital != 255 &&
6721                             (!devinfo->function.audio.devs[j].digital) !=
6722                             (!as[i].digital))
6723                                 continue;
6724                         if (as[i].dir == HDA_CTL_IN) {
6725                                 if (devinfo->function.audio.devs[j].rec >= 0)
6726                                         continue;
6727                                 devinfo->function.audio.devs[j].rec
6728                                     = as[i].chan;
6729                         } else {
6730                                 if (devinfo->function.audio.devs[j].play >= 0)
6731                                         continue;
6732                                 devinfo->function.audio.devs[j].play
6733                                     = as[i].chan;
6734                         }
6735                         sc->chans[as[i].chan].pdevinfo =
6736                             &devinfo->function.audio.devs[j];
6737                         devinfo->function.audio.devs[j].digital =
6738                             as[i].digital;
6739                         break;
6740                 }
6741         }
6742         for (i = 0; i < devinfo->function.audio.num_devs; i++) {
6743                 struct hdac_pcm_devinfo *pdevinfo =
6744                     &devinfo->function.audio.devs[i];
6745                 pdevinfo->dev =
6746                     device_add_child(sc->dev, "pcm", -1);
6747                 device_set_ivars(pdevinfo->dev,
6748                      (void *)pdevinfo);
6749         }
6750 }
6751
6752 static void
6753 hdac_dump_ctls(struct hdac_pcm_devinfo *pdevinfo, const char *banner, uint32_t flag)
6754 {
6755         struct hdac_devinfo *devinfo = pdevinfo->devinfo;
6756         struct hdac_audio_ctl *ctl;
6757         struct hdac_softc *sc = devinfo->codec->sc;
6758         char buf[64];
6759         int i, j, printed;
6760
6761         if (flag == 0) {
6762                 flag = ~(SOUND_MASK_VOLUME | SOUND_MASK_PCM |
6763                     SOUND_MASK_CD | SOUND_MASK_LINE | SOUND_MASK_RECLEV |
6764                     SOUND_MASK_MIC | SOUND_MASK_SPEAKER | SOUND_MASK_IGAIN |
6765                     SOUND_MASK_OGAIN | SOUND_MASK_IMIX | SOUND_MASK_MONITOR);
6766         }
6767
6768         for (j = 0; j < SOUND_MIXER_NRDEVICES; j++) {
6769                 if ((flag & (1 << j)) == 0)
6770                         continue;
6771                 i = 0;
6772                 printed = 0;
6773                 while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
6774                         if (ctl->enable == 0 ||
6775                             ctl->widget->enable == 0)
6776                                 continue;
6777                         if (!((pdevinfo->play >= 0 &&
6778                             ctl->widget->bindas == sc->chans[pdevinfo->play].as) ||
6779                             (pdevinfo->rec >= 0 &&
6780                             ctl->widget->bindas == sc->chans[pdevinfo->rec].as) ||
6781                             (ctl->widget->bindas == -2 && pdevinfo->index == 0)))
6782                                 continue;
6783                         if ((ctl->ossmask & (1 << j)) == 0)
6784                                 continue;
6785
6786                         if (printed == 0) {
6787                                 device_printf(pdevinfo->dev, "\n");
6788                                 if (banner != NULL) {
6789                                         device_printf(pdevinfo->dev, "%s", banner);
6790                                 } else {
6791                                         device_printf(pdevinfo->dev, "Unknown Ctl");
6792                                 }
6793                                 printf(" (OSS: %s)\n",
6794                                     hdac_audio_ctl_ossmixer_mask2allname(1 << j,
6795                                     buf, sizeof(buf)));
6796                                 device_printf(pdevinfo->dev, "   |\n");
6797                                 printed = 1;
6798                         }
6799                         device_printf(pdevinfo->dev, "   +- ctl %2d (nid %3d %s", i,
6800                                 ctl->widget->nid,
6801                                 (ctl->ndir == HDA_CTL_IN)?"in ":"out");
6802                         if (ctl->ndir == HDA_CTL_IN && ctl->ndir == ctl->dir)
6803                                 printf(" %2d): ", ctl->index);
6804                         else
6805                                 printf("):    ");
6806                         if (ctl->step > 0) {
6807                                 printf("%+d/%+ddB (%d steps)%s\n",
6808                                     (0 - ctl->offset) * (ctl->size + 1) / 4,
6809                                     (ctl->step - ctl->offset) * (ctl->size + 1) / 4,
6810                                     ctl->step + 1,
6811                                     ctl->mute?" + mute":"");
6812                         } else
6813                                 printf("%s\n", ctl->mute?"mute":"");
6814                 }
6815         }
6816 }
6817
6818 static void
6819 hdac_dump_audio_formats(device_t dev, uint32_t fcap, uint32_t pcmcap)
6820 {
6821         uint32_t cap;
6822
6823         cap = fcap;
6824         if (cap != 0) {
6825                 device_printf(dev, "     Stream cap: 0x%08x\n", cap);
6826                 device_printf(dev, "                ");
6827                 if (HDA_PARAM_SUPP_STREAM_FORMATS_AC3(cap))
6828                         printf(" AC3");
6829                 if (HDA_PARAM_SUPP_STREAM_FORMATS_FLOAT32(cap))
6830                         printf(" FLOAT32");
6831                 if (HDA_PARAM_SUPP_STREAM_FORMATS_PCM(cap))
6832                         printf(" PCM");
6833                 printf("\n");
6834         }
6835         cap = pcmcap;
6836         if (cap != 0) {
6837                 device_printf(dev, "        PCM cap: 0x%08x\n", cap);
6838                 device_printf(dev, "                ");
6839                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_8BIT(cap))
6840                         printf(" 8");
6841                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_16BIT(cap))
6842                         printf(" 16");
6843                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_20BIT(cap))
6844                         printf(" 20");
6845                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_24BIT(cap))
6846                         printf(" 24");
6847                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT(cap))
6848                         printf(" 32");
6849                 printf(" bits,");
6850                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_8KHZ(cap))
6851                         printf(" 8");
6852                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_11KHZ(cap))
6853                         printf(" 11");
6854                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_16KHZ(cap))
6855                         printf(" 16");
6856                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_22KHZ(cap))
6857                         printf(" 22");
6858                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_32KHZ(cap))
6859                         printf(" 32");
6860                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_44KHZ(cap))
6861                         printf(" 44");
6862                 printf(" 48");
6863                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_88KHZ(cap))
6864                         printf(" 88");
6865                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_96KHZ(cap))
6866                         printf(" 96");
6867                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_176KHZ(cap))
6868                         printf(" 176");
6869                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_192KHZ(cap))
6870                         printf(" 192");
6871                 printf(" KHz\n");
6872         }
6873 }
6874
6875 static void
6876 hdac_dump_pin(struct hdac_softc *sc, struct hdac_widget *w)
6877 {
6878         uint32_t pincap;
6879
6880         pincap = w->wclass.pin.cap;
6881
6882         device_printf(sc->dev, "        Pin cap: 0x%08x\n", pincap);
6883         device_printf(sc->dev, "                ");
6884         if (HDA_PARAM_PIN_CAP_IMP_SENSE_CAP(pincap))
6885                 printf(" ISC");
6886         if (HDA_PARAM_PIN_CAP_TRIGGER_REQD(pincap))
6887                 printf(" TRQD");
6888         if (HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP(pincap))
6889                 printf(" PDC");
6890         if (HDA_PARAM_PIN_CAP_HEADPHONE_CAP(pincap))
6891                 printf(" HP");
6892         if (HDA_PARAM_PIN_CAP_OUTPUT_CAP(pincap))
6893                 printf(" OUT");
6894         if (HDA_PARAM_PIN_CAP_INPUT_CAP(pincap))
6895                 printf(" IN");
6896         if (HDA_PARAM_PIN_CAP_BALANCED_IO_PINS(pincap))
6897                 printf(" BAL");
6898         if (HDA_PARAM_PIN_CAP_HDMI(pincap))
6899                 printf(" HDMI");
6900         if (HDA_PARAM_PIN_CAP_VREF_CTRL(pincap)) {
6901                 printf(" VREF[");
6902                 if (HDA_PARAM_PIN_CAP_VREF_CTRL_50(pincap))
6903                         printf(" 50");
6904                 if (HDA_PARAM_PIN_CAP_VREF_CTRL_80(pincap))
6905                         printf(" 80");
6906                 if (HDA_PARAM_PIN_CAP_VREF_CTRL_100(pincap))
6907                         printf(" 100");
6908                 if (HDA_PARAM_PIN_CAP_VREF_CTRL_GROUND(pincap))
6909                         printf(" GROUND");
6910                 if (HDA_PARAM_PIN_CAP_VREF_CTRL_HIZ(pincap))
6911                         printf(" HIZ");
6912                 printf(" ]");
6913         }
6914         if (HDA_PARAM_PIN_CAP_EAPD_CAP(pincap))
6915                 printf(" EAPD");
6916         if (HDA_PARAM_PIN_CAP_DP(pincap))
6917                 printf(" DP");
6918         if (HDA_PARAM_PIN_CAP_HBR(pincap))
6919                 printf(" HBR");
6920         printf("\n");
6921         device_printf(sc->dev, "     Pin config: 0x%08x\n",
6922             w->wclass.pin.config);
6923         device_printf(sc->dev, "    Pin control: 0x%08x", w->wclass.pin.ctrl);
6924         if (w->wclass.pin.ctrl & HDA_CMD_SET_PIN_WIDGET_CTRL_HPHN_ENABLE)
6925                 printf(" HP");
6926         if (w->wclass.pin.ctrl & HDA_CMD_SET_PIN_WIDGET_CTRL_IN_ENABLE)
6927                 printf(" IN");
6928         if (w->wclass.pin.ctrl & HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE)
6929                 printf(" OUT");
6930         if (w->wclass.pin.ctrl & HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK)
6931                 printf(" VREFs");
6932         printf("\n");
6933 }
6934
6935 static void
6936 hdac_dump_pin_config(struct hdac_widget *w, uint32_t conf)
6937 {
6938         struct hdac_softc *sc = w->devinfo->codec->sc;
6939
6940         device_printf(sc->dev, " nid %d 0x%08x as %2d seq %2d %13s %5s "
6941             "jack %2d loc %2d color %7s misc %d%s\n",
6942             w->nid, conf,
6943             HDA_CONFIG_DEFAULTCONF_ASSOCIATION(conf),
6944             HDA_CONFIG_DEFAULTCONF_SEQUENCE(conf),
6945             HDA_DEVS[HDA_CONFIG_DEFAULTCONF_DEVICE(conf)],
6946             HDA_CONNS[HDA_CONFIG_DEFAULTCONF_CONNECTIVITY(conf)],
6947             HDA_CONFIG_DEFAULTCONF_CONNECTION_TYPE(conf),
6948             HDA_CONFIG_DEFAULTCONF_LOCATION(conf),
6949             HDA_COLORS[HDA_CONFIG_DEFAULTCONF_COLOR(conf)],
6950             HDA_CONFIG_DEFAULTCONF_MISC(conf),
6951             (w->enable == 0)?" [DISABLED]":"");
6952 }
6953
6954 static void
6955 hdac_dump_pin_configs(struct hdac_devinfo *devinfo)
6956 {
6957         struct hdac_widget *w;
6958         int i;
6959
6960         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
6961                 w = hdac_widget_get(devinfo, i);
6962                 if (w == NULL)
6963                         continue;
6964                 if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
6965                         continue;
6966                 hdac_dump_pin_config(w, w->wclass.pin.config);
6967         }
6968 }
6969
6970 static void
6971 hdac_dump_amp(struct hdac_softc *sc, uint32_t cap, char *banner)
6972 {
6973         device_printf(sc->dev, "     %s amp: 0x%08x\n", banner, cap);
6974         device_printf(sc->dev, "                 "
6975             "mute=%d step=%d size=%d offset=%d\n",
6976             HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP(cap),
6977             HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS(cap),
6978             HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE(cap),
6979             HDA_PARAM_OUTPUT_AMP_CAP_OFFSET(cap));
6980 }
6981
6982 static void
6983 hdac_dump_nodes(struct hdac_devinfo *devinfo)
6984 {
6985         struct hdac_softc *sc = devinfo->codec->sc;
6986         static char *ossname[] = SOUND_DEVICE_NAMES;
6987         struct hdac_widget *w, *cw;
6988         char buf[64];
6989         int i, j;
6990
6991         device_printf(sc->dev, "\n");
6992         device_printf(sc->dev, "Default Parameter\n");
6993         device_printf(sc->dev, "-----------------\n");
6994         hdac_dump_audio_formats(sc->dev,
6995             devinfo->function.audio.supp_stream_formats,
6996             devinfo->function.audio.supp_pcm_size_rate);
6997         device_printf(sc->dev, "         IN amp: 0x%08x\n",
6998             devinfo->function.audio.inamp_cap);
6999         device_printf(sc->dev, "        OUT amp: 0x%08x\n",
7000             devinfo->function.audio.outamp_cap);
7001         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
7002                 w = hdac_widget_get(devinfo, i);
7003                 if (w == NULL) {
7004                         device_printf(sc->dev, "Ghost widget nid=%d\n", i);
7005                         continue;
7006                 }
7007                 device_printf(sc->dev, "\n");
7008                 device_printf(sc->dev, "            nid: %d%s\n", w->nid,
7009                     (w->enable == 0) ? " [DISABLED]" : "");
7010                 device_printf(sc->dev, "           Name: %s\n", w->name);
7011                 device_printf(sc->dev, "     Widget cap: 0x%08x\n",
7012                     w->param.widget_cap);
7013                 if (w->param.widget_cap & 0x0ee1) {
7014                         device_printf(sc->dev, "                ");
7015                         if (HDA_PARAM_AUDIO_WIDGET_CAP_LR_SWAP(w->param.widget_cap))
7016                             printf(" LRSWAP");
7017                         if (HDA_PARAM_AUDIO_WIDGET_CAP_POWER_CTRL(w->param.widget_cap))
7018                             printf(" PWR");
7019                         if (HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL(w->param.widget_cap))
7020                             printf(" DIGITAL");
7021                         if (HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP(w->param.widget_cap))
7022                             printf(" UNSOL");
7023                         if (HDA_PARAM_AUDIO_WIDGET_CAP_PROC_WIDGET(w->param.widget_cap))
7024                             printf(" PROC");
7025                         if (HDA_PARAM_AUDIO_WIDGET_CAP_STRIPE(w->param.widget_cap))
7026                             printf(" STRIPE");
7027                         j = HDA_PARAM_AUDIO_WIDGET_CAP_CC(w->param.widget_cap);
7028                         if (j == 1)
7029                             printf(" STEREO");
7030                         else if (j > 1)
7031                             printf(" %dCH", j + 1);
7032                         printf("\n");
7033                 }
7034                 if (w->bindas != -1) {
7035                         device_printf(sc->dev, "    Association: %d (0x%08x)\n",
7036                             w->bindas, w->bindseqmask);
7037                 }
7038                 if (w->ossmask != 0 || w->ossdev >= 0) {
7039                         device_printf(sc->dev, "            OSS: %s",
7040                             hdac_audio_ctl_ossmixer_mask2allname(w->ossmask, buf, sizeof(buf)));
7041                         if (w->ossdev >= 0)
7042                             printf(" (%s)", ossname[w->ossdev]);
7043                         printf("\n");
7044                 }
7045                 if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT ||
7046                     w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT) {
7047                         hdac_dump_audio_formats(sc->dev,
7048                             w->param.supp_stream_formats,
7049                             w->param.supp_pcm_size_rate);
7050                 } else if (w->type ==
7051                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
7052                         hdac_dump_pin(sc, w);
7053                 if (w->param.eapdbtl != HDAC_INVALID)
7054                         device_printf(sc->dev, "           EAPD: 0x%08x\n",
7055                             w->param.eapdbtl);
7056                 if (HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP(w->param.widget_cap) &&
7057                     w->param.outamp_cap != 0)
7058                         hdac_dump_amp(sc, w->param.outamp_cap, "Output");
7059                 if (HDA_PARAM_AUDIO_WIDGET_CAP_IN_AMP(w->param.widget_cap) &&
7060                     w->param.inamp_cap != 0)
7061                         hdac_dump_amp(sc, w->param.inamp_cap, " Input");
7062                 if (w->nconns > 0) {
7063                         device_printf(sc->dev, "    connections: %d\n", w->nconns);
7064                         device_printf(sc->dev, "          |\n");
7065                 }
7066                 for (j = 0; j < w->nconns; j++) {
7067                         cw = hdac_widget_get(devinfo, w->conns[j]);
7068                         device_printf(sc->dev, "          + %s<- nid=%d [%s]",
7069                             (w->connsenable[j] == 0)?"[DISABLED] ":"",
7070                             w->conns[j], (cw == NULL) ? "GHOST!" : cw->name);
7071                         if (cw == NULL)
7072                                 printf(" [UNKNOWN]");
7073                         else if (cw->enable == 0)
7074                                 printf(" [DISABLED]");
7075                         if (w->nconns > 1 && w->selconn == j && w->type !=
7076                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER)
7077                                 printf(" (selected)");
7078                         printf("\n");
7079                 }
7080         }
7081
7082 }
7083
7084 static void
7085 hdac_dump_dst_nid(struct hdac_pcm_devinfo *pdevinfo, nid_t nid, int depth)
7086 {
7087         struct hdac_devinfo *devinfo = pdevinfo->devinfo;
7088         struct hdac_widget *w, *cw;
7089         char buf[64];
7090         int i, printed = 0;
7091
7092         if (depth > HDA_PARSE_MAXDEPTH)
7093                 return;
7094
7095         w = hdac_widget_get(devinfo, nid);
7096         if (w == NULL || w->enable == 0)
7097                 return;
7098
7099         if (depth == 0)
7100                 device_printf(pdevinfo->dev, "%*s", 4, "");
7101         else
7102                 device_printf(pdevinfo->dev, "%*s  + <- ", 4 + (depth - 1) * 7, "");
7103         printf("nid=%d [%s]", w->nid, w->name);
7104
7105         if (depth > 0) {
7106                 if (w->ossmask == 0) {
7107                         printf("\n");
7108                         return;
7109                 }
7110                 printf(" [src: %s]",
7111                     hdac_audio_ctl_ossmixer_mask2allname(
7112                         w->ossmask, buf, sizeof(buf)));
7113                 if (w->ossdev >= 0) {
7114                         printf("\n");
7115                         return;
7116                 }
7117         }
7118         printf("\n");
7119
7120         for (i = 0; i < w->nconns; i++) {
7121                 if (w->connsenable[i] == 0)
7122                         continue;
7123                 cw = hdac_widget_get(devinfo, w->conns[i]);
7124                 if (cw == NULL || cw->enable == 0 || cw->bindas == -1)
7125                         continue;
7126                 if (printed == 0) {
7127                         device_printf(pdevinfo->dev, "%*s  |\n", 4 + (depth) * 7, "");
7128                         printed = 1;
7129                 }
7130                 hdac_dump_dst_nid(pdevinfo, w->conns[i], depth + 1);
7131         }
7132
7133 }
7134
7135 static void
7136 hdac_dump_dac(struct hdac_pcm_devinfo *pdevinfo)
7137 {
7138         struct hdac_devinfo *devinfo = pdevinfo->devinfo;
7139         struct hdac_softc *sc = devinfo->codec->sc;
7140         struct hdac_audio_as *as;
7141         struct hdac_widget *w;
7142         int i, printed = 0;
7143
7144         if (pdevinfo->play < 0)
7145                 return;
7146
7147         as = &devinfo->function.audio.as[sc->chans[pdevinfo->play].as];
7148         for (i = 0; i < 16; i++) {
7149                 if (as->pins[i] <= 0)
7150                         continue;
7151                 w = hdac_widget_get(devinfo, as->pins[i]);
7152                 if (w == NULL || w->enable == 0)
7153                         continue;
7154                 if (printed == 0) {
7155                         printed = 1;
7156                         device_printf(pdevinfo->dev, "\n");
7157                         device_printf(pdevinfo->dev, "Playback:\n");
7158                 }
7159                 device_printf(pdevinfo->dev, "\n");
7160                 hdac_dump_dst_nid(pdevinfo, as->pins[i], 0);
7161         }
7162 }
7163
7164 static void
7165 hdac_dump_adc(struct hdac_pcm_devinfo *pdevinfo)
7166 {
7167         struct hdac_devinfo *devinfo = pdevinfo->devinfo;
7168         struct hdac_softc *sc = devinfo->codec->sc;
7169         struct hdac_widget *w;
7170         int i;
7171         int printed = 0;
7172
7173         if (pdevinfo->rec < 0)
7174                 return;
7175
7176         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
7177                 w = hdac_widget_get(devinfo, i);
7178                 if (w == NULL || w->enable == 0)
7179                         continue;
7180                 if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT)
7181                         continue;
7182                 if (w->bindas != sc->chans[pdevinfo->rec].as)
7183                         continue;
7184                 if (printed == 0) {
7185                         printed = 1;
7186                         device_printf(pdevinfo->dev, "\n");
7187                         device_printf(pdevinfo->dev, "Record:\n");
7188                 }
7189                 device_printf(pdevinfo->dev, "\n");
7190                 hdac_dump_dst_nid(pdevinfo, i, 0);
7191         }
7192 }
7193
7194 static void
7195 hdac_dump_mix(struct hdac_pcm_devinfo *pdevinfo)
7196 {
7197         struct hdac_devinfo *devinfo = pdevinfo->devinfo;
7198         struct hdac_widget *w;
7199         int i;
7200         int printed = 0;
7201
7202         if (pdevinfo->index != 0)
7203                 return;
7204
7205         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
7206                 w = hdac_widget_get(devinfo, i);
7207                 if (w == NULL || w->enable == 0)
7208                         continue;
7209                 if (w->ossdev != SOUND_MIXER_IMIX)
7210                         continue;
7211                 if (printed == 0) {
7212                         printed = 1;
7213                         device_printf(pdevinfo->dev, "\n");
7214                         device_printf(pdevinfo->dev, "Input Mix:\n");
7215                 }
7216                 device_printf(pdevinfo->dev, "\n");
7217                 hdac_dump_dst_nid(pdevinfo, i, 0);
7218         }
7219 }
7220
7221 static void
7222 hdac_dump_pcmchannels(struct hdac_pcm_devinfo *pdevinfo)
7223 {
7224         struct hdac_softc *sc = pdevinfo->devinfo->codec->sc;
7225         nid_t *nids;
7226         int i;
7227
7228         if (pdevinfo->play >= 0) {
7229                 i = pdevinfo->play;
7230                 device_printf(pdevinfo->dev, "\n");
7231                 device_printf(pdevinfo->dev, "Playback:\n");
7232                 device_printf(pdevinfo->dev, "\n");
7233                 hdac_dump_audio_formats(pdevinfo->dev, sc->chans[i].supp_stream_formats,
7234                     sc->chans[i].supp_pcm_size_rate);
7235                 device_printf(pdevinfo->dev, "            DAC:");
7236                 for (nids = sc->chans[i].io; *nids != -1; nids++)
7237                         printf(" %d", *nids);
7238                 printf("\n");
7239         }
7240         if (pdevinfo->rec >= 0) {
7241                 i = pdevinfo->rec;
7242                 device_printf(pdevinfo->dev, "\n");
7243                 device_printf(pdevinfo->dev, "Record:\n");
7244                 device_printf(pdevinfo->dev, "\n");
7245                 hdac_dump_audio_formats(pdevinfo->dev, sc->chans[i].supp_stream_formats,
7246                     sc->chans[i].supp_pcm_size_rate);
7247                 device_printf(pdevinfo->dev, "            ADC:");
7248                 for (nids = sc->chans[i].io; *nids != -1; nids++)
7249                         printf(" %d", *nids);
7250                 printf("\n");
7251         }
7252 }
7253
7254 static void
7255 hdac_release_resources(struct hdac_softc *sc)
7256 {
7257         int i, j;
7258
7259         if (sc == NULL)
7260                 return;
7261
7262         hdac_lock(sc);
7263         sc->polling = 0;
7264         sc->poll_ival = 0;
7265         callout_stop(&sc->poll_hda);
7266         callout_stop(&sc->poll_hdac);
7267         callout_stop(&sc->poll_jack);
7268         hdac_reset(sc, 0);
7269         hdac_unlock(sc);
7270         taskqueue_drain(taskqueue_thread, &sc->unsolq_task);
7271         callout_drain(&sc->poll_hda);
7272         callout_drain(&sc->poll_hdac);
7273         callout_drain(&sc->poll_jack);
7274
7275         hdac_irq_free(sc);
7276
7277         for (i = 0; i < HDAC_CODEC_MAX; i++) {
7278                 if (sc->codecs[i] == NULL)
7279                         continue;
7280                 for (j = 0; j < sc->codecs[i]->num_fgs; j++) {
7281                         free(sc->codecs[i]->fgs[j].widget, M_HDAC);
7282                         if (sc->codecs[i]->fgs[j].node_type ==
7283                             HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO) {
7284                                 free(sc->codecs[i]->fgs[j].function.audio.ctl,
7285                                     M_HDAC);
7286                                 free(sc->codecs[i]->fgs[j].function.audio.as,
7287                                     M_HDAC);
7288                                 free(sc->codecs[i]->fgs[j].function.audio.devs,
7289                                     M_HDAC);
7290                         }
7291                 }
7292                 free(sc->codecs[i]->fgs, M_HDAC);
7293                 free(sc->codecs[i], M_HDAC);
7294                 sc->codecs[i] = NULL;
7295         }
7296
7297         hdac_dma_free(sc, &sc->pos_dma);
7298         hdac_dma_free(sc, &sc->rirb_dma);
7299         hdac_dma_free(sc, &sc->corb_dma);
7300         for (i = 0; i < sc->num_chans; i++) {
7301                 if (sc->chans[i].blkcnt > 0)
7302                         hdac_dma_free(sc, &sc->chans[i].bdl_dma);
7303         }
7304         free(sc->chans, M_HDAC);
7305         if (sc->chan_dmat != NULL) {
7306                 bus_dma_tag_destroy(sc->chan_dmat);
7307                 sc->chan_dmat = NULL;
7308         }
7309         hdac_mem_free(sc);
7310         snd_mtxfree(sc->lock);
7311 }
7312
7313 /* This function surely going to make its way into upper level someday. */
7314 static void
7315 hdac_config_fetch(struct hdac_softc *sc, uint32_t *on, uint32_t *off)
7316 {
7317         const char *res = NULL;
7318         int i = 0, j, k, len, inv;
7319
7320         if (on != NULL)
7321                 *on = 0;
7322         if (off != NULL)
7323                 *off = 0;
7324         if (sc == NULL)
7325                 return;
7326         if (resource_string_value(device_get_name(sc->dev),
7327             device_get_unit(sc->dev), "config", &res) != 0)
7328                 return;
7329         if (!(res != NULL && strlen(res) > 0))
7330                 return;
7331         HDA_BOOTVERBOSE(
7332                 device_printf(sc->dev, "HDA Config:");
7333         );
7334         for (;;) {
7335                 while (res[i] != '\0' &&
7336                     (res[i] == ',' || isspace(res[i]) != 0))
7337                         i++;
7338                 if (res[i] == '\0') {
7339                         HDA_BOOTVERBOSE(
7340                                 printf("\n");
7341                         );
7342                         return;
7343                 }
7344                 j = i;
7345                 while (res[j] != '\0' &&
7346                     !(res[j] == ',' || isspace(res[j]) != 0))
7347                         j++;
7348                 len = j - i;
7349                 if (len > 2 && strncmp(res + i, "no", 2) == 0)
7350                         inv = 2;
7351                 else
7352                         inv = 0;
7353                 for (k = 0; len > inv && k < HDAC_QUIRKS_TAB_LEN; k++) {
7354                         if (strncmp(res + i + inv,
7355                             hdac_quirks_tab[k].key, len - inv) != 0)
7356                                 continue;
7357                         if (len - inv != strlen(hdac_quirks_tab[k].key))
7358                                 continue;
7359                         HDA_BOOTVERBOSE(
7360                                 printf(" %s%s", (inv != 0) ? "no" : "",
7361                                     hdac_quirks_tab[k].key);
7362                         );
7363                         if (inv == 0 && on != NULL)
7364                                 *on |= hdac_quirks_tab[k].value;
7365                         else if (inv != 0 && off != NULL)
7366                                 *off |= hdac_quirks_tab[k].value;
7367                         break;
7368                 }
7369                 i = j;
7370         }
7371 }
7372
7373 static int
7374 sysctl_hdac_polling(SYSCTL_HANDLER_ARGS)
7375 {
7376         struct hdac_softc *sc;
7377         device_t dev;
7378         uint32_t ctl;
7379         int err, val;
7380
7381         dev = oidp->oid_arg1;
7382         sc = device_get_softc(dev);
7383         if (sc == NULL)
7384                 return (EINVAL);
7385         hdac_lock(sc);
7386         val = sc->polling;
7387         hdac_unlock(sc);
7388         err = sysctl_handle_int(oidp, &val, 0, req);
7389
7390         if (err != 0 || req->newptr == NULL)
7391                 return (err);
7392         if (val < 0 || val > 1)
7393                 return (EINVAL);
7394
7395         hdac_lock(sc);
7396         if (val != sc->polling) {
7397                 if (val == 0) {
7398                         callout_stop(&sc->poll_hda);
7399                         callout_stop(&sc->poll_hdac);
7400                         hdac_unlock(sc);
7401                         callout_drain(&sc->poll_hda);
7402                         callout_drain(&sc->poll_hdac);
7403                         hdac_lock(sc);
7404                         sc->polling = 0;
7405                         ctl = HDAC_READ_4(&sc->mem, HDAC_INTCTL);
7406                         ctl |= HDAC_INTCTL_GIE;
7407                         HDAC_WRITE_4(&sc->mem, HDAC_INTCTL, ctl);
7408                 } else {
7409                         ctl = HDAC_READ_4(&sc->mem, HDAC_INTCTL);
7410                         ctl &= ~HDAC_INTCTL_GIE;
7411                         HDAC_WRITE_4(&sc->mem, HDAC_INTCTL, ctl);
7412                         hdac_unlock(sc);
7413                         taskqueue_drain(taskqueue_thread, &sc->unsolq_task);
7414                         hdac_lock(sc);
7415                         sc->polling = 1;
7416                         hdac_poll_reinit(sc);
7417                         callout_reset(&sc->poll_hdac, 1, hdac_poll_callback, sc);
7418                 }
7419         }
7420         hdac_unlock(sc);
7421
7422         return (err);
7423 }
7424
7425 static int
7426 sysctl_hdac_polling_interval(SYSCTL_HANDLER_ARGS)
7427 {
7428         struct hdac_softc *sc;
7429         device_t dev;
7430         int err, val;
7431
7432         dev = oidp->oid_arg1;
7433         sc = device_get_softc(dev);
7434         if (sc == NULL)
7435                 return (EINVAL);
7436         hdac_lock(sc);
7437         val = ((uint64_t)sc->poll_ival * 1000) / hz;
7438         hdac_unlock(sc);
7439         err = sysctl_handle_int(oidp, &val, 0, req);
7440
7441         if (err != 0 || req->newptr == NULL)
7442                 return (err);
7443
7444         if (val < 1)
7445                 val = 1;
7446         if (val > 5000)
7447                 val = 5000;
7448         val = ((uint64_t)val * hz) / 1000;
7449         if (val < 1)
7450                 val = 1;
7451         if (val > (hz * 5))
7452                 val = hz * 5;
7453
7454         hdac_lock(sc);
7455         sc->poll_ival = val;
7456         hdac_unlock(sc);
7457
7458         return (err);
7459 }
7460
7461 static int
7462 sysctl_hdac_pindump(SYSCTL_HANDLER_ARGS)
7463 {
7464         struct hdac_softc *sc;
7465         struct hdac_codec *codec;
7466         struct hdac_devinfo *devinfo;
7467         struct hdac_widget *w;
7468         device_t dev;
7469         uint32_t res, pincap, delay;
7470         int codec_index, fg_index;
7471         int i, err, val;
7472         nid_t cad;
7473
7474         dev = oidp->oid_arg1;
7475         sc = device_get_softc(dev);
7476         if (sc == NULL)
7477                 return (EINVAL);
7478         val = 0;
7479         err = sysctl_handle_int(oidp, &val, 0, req);
7480         if (err != 0 || req->newptr == NULL || val == 0)
7481                 return (err);
7482
7483         /* XXX: Temporary. For debugging. */
7484         if (val == 100) {
7485                 hdac_suspend(dev);
7486                 return (0);
7487         } else if (val == 101) {
7488                 hdac_resume(dev);
7489                 return (0);
7490         }
7491
7492         hdac_lock(sc);
7493         for (codec_index = 0; codec_index < HDAC_CODEC_MAX; codec_index++) {
7494                 codec = sc->codecs[codec_index];
7495                 if (codec == NULL)
7496                         continue;
7497                 cad = codec->cad;
7498                 for (fg_index = 0; fg_index < codec->num_fgs; fg_index++) {
7499                         devinfo = &codec->fgs[fg_index];
7500                         if (devinfo->node_type !=
7501                             HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO)
7502                                 continue;
7503
7504                         device_printf(dev, "Dumping AFG cad=%d nid=%d pins:\n",
7505                             codec_index, devinfo->nid);
7506                         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
7507                                         w = hdac_widget_get(devinfo, i);
7508                                 if (w == NULL || w->type !=
7509                                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
7510                                         continue;
7511                                 hdac_dump_pin_config(w, w->wclass.pin.config);
7512                                 pincap = w->wclass.pin.cap;
7513                                 device_printf(dev, "       Caps: %2s %3s %2s %4s %4s",
7514                                     HDA_PARAM_PIN_CAP_INPUT_CAP(pincap)?"IN":"",
7515                                     HDA_PARAM_PIN_CAP_OUTPUT_CAP(pincap)?"OUT":"",
7516                                     HDA_PARAM_PIN_CAP_HEADPHONE_CAP(pincap)?"HP":"",
7517                                     HDA_PARAM_PIN_CAP_EAPD_CAP(pincap)?"EAPD":"",
7518                                     HDA_PARAM_PIN_CAP_VREF_CTRL(pincap)?"VREF":"");
7519                                 if (HDA_PARAM_PIN_CAP_IMP_SENSE_CAP(pincap) ||
7520                                     HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP(pincap)) {
7521                                         if (HDA_PARAM_PIN_CAP_TRIGGER_REQD(pincap)) {
7522                                                 delay = 0;
7523                                                 hdac_command(sc,
7524                                                     HDA_CMD_SET_PIN_SENSE(cad, w->nid, 0), cad);
7525                                                 do {
7526                                                         res = hdac_command(sc,
7527                                                             HDA_CMD_GET_PIN_SENSE(cad, w->nid), cad);
7528                                                         if (res != 0x7fffffff && res != 0xffffffff)
7529                                                                 break;
7530                                                         DELAY(10);
7531                                                 } while (++delay < 10000);
7532                                         } else {
7533                                                 delay = 0;
7534                                                 res = hdac_command(sc, HDA_CMD_GET_PIN_SENSE(cad,
7535                                                     w->nid), cad);
7536                                         }
7537                                         printf(" Sense: 0x%08x", res);
7538                                         if (delay > 0)
7539                                                 printf(" delay %dus", delay * 10);
7540                                 }
7541                                 printf("\n");
7542                         }
7543                         device_printf(dev,
7544                             "NumGPIO=%d NumGPO=%d NumGPI=%d GPIWake=%d GPIUnsol=%d\n",
7545                             HDA_PARAM_GPIO_COUNT_NUM_GPIO(devinfo->function.audio.gpio),
7546                             HDA_PARAM_GPIO_COUNT_NUM_GPO(devinfo->function.audio.gpio),
7547                             HDA_PARAM_GPIO_COUNT_NUM_GPI(devinfo->function.audio.gpio),
7548                             HDA_PARAM_GPIO_COUNT_GPI_WAKE(devinfo->function.audio.gpio),
7549                             HDA_PARAM_GPIO_COUNT_GPI_UNSOL(devinfo->function.audio.gpio));
7550                         if (HDA_PARAM_GPIO_COUNT_NUM_GPI(devinfo->function.audio.gpio) > 0) {
7551                                 device_printf(dev, " GPI:");
7552                                 res = hdac_command(sc,
7553                                     HDA_CMD_GET_GPI_DATA(cad, devinfo->nid), cad);
7554                                 printf(" data=0x%08x", res);
7555                                 res = hdac_command(sc,
7556                                     HDA_CMD_GET_GPI_WAKE_ENABLE_MASK(cad, devinfo->nid),
7557                                     cad);
7558                                 printf(" wake=0x%08x", res);
7559                                 res = hdac_command(sc,
7560                                     HDA_CMD_GET_GPI_UNSOLICITED_ENABLE_MASK(cad, devinfo->nid),
7561                                     cad);
7562                                 printf(" unsol=0x%08x", res);
7563                                 res = hdac_command(sc,
7564                                     HDA_CMD_GET_GPI_STICKY_MASK(cad, devinfo->nid), cad);
7565                                 printf(" sticky=0x%08x\n", res);
7566                         }
7567                         if (HDA_PARAM_GPIO_COUNT_NUM_GPO(devinfo->function.audio.gpio) > 0) {
7568                                 device_printf(dev, " GPO:");
7569                                 res = hdac_command(sc,
7570                                     HDA_CMD_GET_GPO_DATA(cad, devinfo->nid), cad);
7571                                 printf(" data=0x%08x\n", res);
7572                         }
7573                         if (HDA_PARAM_GPIO_COUNT_NUM_GPIO(devinfo->function.audio.gpio) > 0) {
7574                                 device_printf(dev, "GPIO:");
7575                                 res = hdac_command(sc,
7576                                     HDA_CMD_GET_GPIO_DATA(cad, devinfo->nid), cad);
7577                                 printf(" data=0x%08x", res);
7578                                 res = hdac_command(sc,
7579                                     HDA_CMD_GET_GPIO_ENABLE_MASK(cad, devinfo->nid), cad);
7580                                 printf(" enable=0x%08x", res);
7581                                 res = hdac_command(sc,
7582                                     HDA_CMD_GET_GPIO_DIRECTION(cad, devinfo->nid), cad);
7583                                 printf(" direction=0x%08x\n", res);
7584                                 res = hdac_command(sc,
7585                                     HDA_CMD_GET_GPIO_WAKE_ENABLE_MASK(cad, devinfo->nid), cad);
7586                                 device_printf(dev, "      wake=0x%08x", res);
7587                                 res = hdac_command(sc,
7588                                     HDA_CMD_GET_GPIO_UNSOLICITED_ENABLE_MASK(cad, devinfo->nid),
7589                                     cad);
7590                                 printf("  unsol=0x%08x", res);
7591                                 res = hdac_command(sc,
7592                                     HDA_CMD_GET_GPIO_STICKY_MASK(cad, devinfo->nid), cad);
7593                                 printf("    sticky=0x%08x\n", res);
7594                         }
7595                 }
7596         }
7597         hdac_unlock(sc);
7598         return (0);
7599 }
7600
7601 static void
7602 hdac_attach2(void *arg)
7603 {
7604         struct hdac_codec *codec;
7605         struct hdac_softc *sc;
7606         struct hdac_audio_ctl *ctl;
7607         uint32_t quirks_on, quirks_off;
7608         int codec_index, fg_index;
7609         int i, dmaalloc = 0;
7610         struct hdac_devinfo *devinfo;
7611
7612         sc = (struct hdac_softc *)arg;
7613
7614         hdac_config_fetch(sc, &quirks_on, &quirks_off);
7615
7616         HDA_BOOTHVERBOSE(
7617                 device_printf(sc->dev, "HDA Config: on=0x%08x off=0x%08x\n",
7618                     quirks_on, quirks_off);
7619         );
7620
7621         hdac_lock(sc);
7622
7623         /* Remove ourselves from the config hooks */
7624         if (sc->intrhook.ich_func != NULL) {
7625                 config_intrhook_disestablish(&sc->intrhook);
7626                 sc->intrhook.ich_func = NULL;
7627         }
7628
7629         /* Start the corb and rirb engines */
7630         HDA_BOOTHVERBOSE(
7631                 device_printf(sc->dev, "Starting CORB Engine...\n");
7632         );
7633         hdac_corb_start(sc);
7634         HDA_BOOTHVERBOSE(
7635                 device_printf(sc->dev, "Starting RIRB Engine...\n");
7636         );
7637         hdac_rirb_start(sc);
7638
7639         HDA_BOOTHVERBOSE(
7640                 device_printf(sc->dev,
7641                     "Enabling controller interrupt...\n");
7642         );
7643         HDAC_WRITE_4(&sc->mem, HDAC_GCTL, HDAC_READ_4(&sc->mem, HDAC_GCTL) |
7644             HDAC_GCTL_UNSOL);
7645         if (sc->polling == 0) {
7646                 HDAC_WRITE_4(&sc->mem, HDAC_INTCTL,
7647                     HDAC_INTCTL_CIE | HDAC_INTCTL_GIE);
7648         } else {
7649                 callout_reset(&sc->poll_hdac, 1, hdac_poll_callback, sc);
7650         }
7651         DELAY(1000);
7652
7653         HDA_BOOTHVERBOSE(
7654                 device_printf(sc->dev,
7655                     "Scanning HDA codecs ...\n");
7656         );
7657         hdac_scan_codecs(sc);
7658
7659         for (codec_index = 0; codec_index < HDAC_CODEC_MAX; codec_index++) {
7660                 codec = sc->codecs[codec_index];
7661                 if (codec == NULL)
7662                         continue;
7663                 for (fg_index = 0; fg_index < codec->num_fgs; fg_index++) {
7664                         devinfo = &codec->fgs[fg_index];
7665                         HDA_BOOTVERBOSE(
7666                                 device_printf(sc->dev, "\n");
7667                                 device_printf(sc->dev,
7668                                     "Processing %s FG cad=%d nid=%d...\n",
7669                                     (devinfo->node_type == HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO) ? "audio":
7670                                     (devinfo->node_type == HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_MODEM) ? "modem":
7671                                     "unknown",
7672                                     devinfo->codec->cad, devinfo->nid);
7673                         );
7674                         if (devinfo->node_type !=
7675                             HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO) {
7676                                 HDA_BOOTHVERBOSE(
7677                                         device_printf(sc->dev,
7678                                             "Powering down...\n");
7679                                 );
7680                                 hdac_command(sc,
7681                                     HDA_CMD_SET_POWER_STATE(codec->cad,
7682                                     devinfo->nid, HDA_CMD_POWER_STATE_D3),
7683                                     codec->cad);
7684                                 continue;
7685                         }
7686
7687                         HDA_BOOTHVERBOSE(
7688                                 device_printf(sc->dev, "Powering up...\n");
7689                         );
7690                         hdac_powerup(devinfo);
7691                         HDA_BOOTHVERBOSE(
7692                                 device_printf(sc->dev, "Parsing audio FG...\n");
7693                         );
7694                         hdac_audio_parse(devinfo);
7695                         HDA_BOOTHVERBOSE(
7696                                 device_printf(sc->dev, "Parsing Ctls...\n");
7697                         );
7698                         hdac_audio_ctl_parse(devinfo);
7699                         HDA_BOOTHVERBOSE(
7700                                 device_printf(sc->dev, "Parsing vendor patch...\n");
7701                         );
7702                         hdac_vendor_patch_parse(devinfo);
7703                         devinfo->function.audio.quirks |= quirks_on;
7704                         devinfo->function.audio.quirks &= ~quirks_off;
7705
7706                         HDA_BOOTHVERBOSE(
7707                                 device_printf(sc->dev, "Disabling nonaudio...\n");
7708                         );
7709                         hdac_audio_disable_nonaudio(devinfo);
7710                         HDA_BOOTHVERBOSE(
7711                                 device_printf(sc->dev, "Disabling useless...\n");
7712                         );
7713                         hdac_audio_disable_useless(devinfo);
7714                         HDA_BOOTVERBOSE(
7715                                 device_printf(sc->dev, "Patched pins configuration:\n");
7716                                 hdac_dump_pin_configs(devinfo);
7717                         );
7718                         HDA_BOOTHVERBOSE(
7719                                 device_printf(sc->dev, "Parsing pin associations...\n");
7720                         );
7721                         hdac_audio_as_parse(devinfo);
7722                         HDA_BOOTHVERBOSE(
7723                                 device_printf(sc->dev, "Building AFG tree...\n");
7724                         );
7725                         hdac_audio_build_tree(devinfo);
7726                         HDA_BOOTHVERBOSE(
7727                                 device_printf(sc->dev, "Disabling unassociated "
7728                                     "widgets...\n");
7729                         );
7730                         hdac_audio_disable_unas(devinfo);
7731                         HDA_BOOTHVERBOSE(
7732                                 device_printf(sc->dev, "Disabling nonselected "
7733                                     "inputs...\n");
7734                         );
7735                         hdac_audio_disable_notselected(devinfo);
7736                         HDA_BOOTHVERBOSE(
7737                                 device_printf(sc->dev, "Disabling useless...\n");
7738                         );
7739                         hdac_audio_disable_useless(devinfo);
7740                         HDA_BOOTHVERBOSE(
7741                                 device_printf(sc->dev, "Disabling "
7742                                     "crossassociatement connections...\n");
7743                         );
7744                         hdac_audio_disable_crossas(devinfo);
7745                         HDA_BOOTHVERBOSE(
7746                                 device_printf(sc->dev, "Disabling useless...\n");
7747                         );
7748                         hdac_audio_disable_useless(devinfo);
7749                         HDA_BOOTHVERBOSE(
7750                                 device_printf(sc->dev, "Binding associations to channels...\n");
7751                         );
7752                         hdac_audio_bind_as(devinfo);
7753                         HDA_BOOTHVERBOSE(
7754                                 device_printf(sc->dev, "Assigning names to signal sources...\n");
7755                         );
7756                         hdac_audio_assign_names(devinfo);
7757                         HDA_BOOTHVERBOSE(
7758                                 device_printf(sc->dev, "Assigning mixers to the tree...\n");
7759                         );
7760                         hdac_audio_assign_mixers(devinfo);
7761                         HDA_BOOTHVERBOSE(
7762                                 device_printf(sc->dev, "Preparing pin controls...\n");
7763                         );
7764                         hdac_audio_prepare_pin_ctrl(devinfo);
7765                         HDA_BOOTHVERBOSE(
7766                                 device_printf(sc->dev, "AFG commit...\n");
7767                         );
7768                         hdac_audio_commit(devinfo);
7769                         HDA_BOOTHVERBOSE(
7770                                 device_printf(sc->dev, "HP switch init...\n");
7771                         );
7772                         hdac_hp_switch_init(devinfo);
7773
7774                         if ((devinfo->function.audio.quirks & HDA_QUIRK_DMAPOS) &&
7775                             dmaalloc == 0) {
7776                                 if (hdac_dma_alloc(sc, &sc->pos_dma,
7777                                     (sc->num_iss + sc->num_oss + sc->num_bss) * 8) != 0) {
7778                                         HDA_BOOTVERBOSE(
7779                                                 device_printf(sc->dev, "Failed to "
7780                                                     "allocate DMA pos buffer "
7781                                                     "(non-fatal)\n");
7782                                         );
7783                                 } else
7784                                         dmaalloc = 1;
7785                         }
7786
7787                         HDA_BOOTHVERBOSE(
7788                                 device_printf(sc->dev, "Creating PCM devices...\n");
7789                         );
7790                         hdac_create_pcms(devinfo);
7791
7792                         HDA_BOOTVERBOSE(
7793                                 if (devinfo->function.audio.quirks != 0) {
7794                                         device_printf(sc->dev, "FG config/quirks:");
7795                                         for (i = 0; i < HDAC_QUIRKS_TAB_LEN; i++) {
7796                                                 if ((devinfo->function.audio.quirks &
7797                                                     hdac_quirks_tab[i].value) ==
7798                                                     hdac_quirks_tab[i].value)
7799                                                         printf(" %s", hdac_quirks_tab[i].key);
7800                                         }
7801                                         printf("\n");
7802                                 }
7803
7804                                 device_printf(sc->dev, "\n");
7805                                 device_printf(sc->dev, "+-------------------+\n");
7806                                 device_printf(sc->dev, "| DUMPING HDA NODES |\n");
7807                                 device_printf(sc->dev, "+-------------------+\n");
7808                                 hdac_dump_nodes(devinfo);
7809                         );
7810
7811                         HDA_BOOTHVERBOSE(
7812                                 device_printf(sc->dev, "\n");
7813                                 device_printf(sc->dev, "+------------------------+\n");
7814                                 device_printf(sc->dev, "| DUMPING HDA AMPLIFIERS |\n");
7815                                 device_printf(sc->dev, "+------------------------+\n");
7816                                 device_printf(sc->dev, "\n");
7817                                 i = 0;
7818                                 while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
7819                                         device_printf(sc->dev, "%3d: nid %3d %s (%s) index %d", i,
7820                                             (ctl->widget != NULL) ? ctl->widget->nid : -1,
7821                                             (ctl->ndir == HDA_CTL_IN)?"in ":"out",
7822                                             (ctl->dir == HDA_CTL_IN)?"in ":"out",
7823                                             ctl->index);
7824                                         if (ctl->childwidget != NULL)
7825                                                 printf(" cnid %3d", ctl->childwidget->nid);
7826                                         else
7827                                                 printf("         ");
7828                                         printf(" ossmask=0x%08x\n",
7829                                             ctl->ossmask);
7830                                         device_printf(sc->dev,
7831                                             "       mute: %d step: %3d size: %3d off: %3d%s\n",
7832                                             ctl->mute, ctl->step, ctl->size, ctl->offset,
7833                                             (ctl->enable == 0) ? " [DISABLED]" :
7834                                             ((ctl->ossmask == 0) ? " [UNUSED]" : ""));
7835                                 }
7836                         );
7837                 }
7838         }
7839         hdac_unlock(sc);
7840
7841         HDA_BOOTVERBOSE(
7842                 device_printf(sc->dev, "\n");
7843         );
7844
7845         bus_generic_attach(sc->dev);
7846
7847         SYSCTL_ADD_PROC(device_get_sysctl_ctx(sc->dev),
7848             SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev)), OID_AUTO,
7849             "polling", CTLTYPE_INT | CTLFLAG_RW, sc->dev, sizeof(sc->dev),
7850             sysctl_hdac_polling, "I", "Enable polling mode");
7851         SYSCTL_ADD_PROC(device_get_sysctl_ctx(sc->dev),
7852             SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev)), OID_AUTO,
7853             "polling_interval", CTLTYPE_INT | CTLFLAG_RW, sc->dev,
7854             sizeof(sc->dev), sysctl_hdac_polling_interval, "I",
7855             "Controller/Jack Sense polling interval (1-1000 ms)");
7856         SYSCTL_ADD_PROC(device_get_sysctl_ctx(sc->dev),
7857             SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev)), OID_AUTO,
7858             "pindump", CTLTYPE_INT | CTLFLAG_RW, sc->dev, sizeof(sc->dev),
7859             sysctl_hdac_pindump, "I", "Dump pin states/data");
7860 }
7861
7862 /****************************************************************************
7863  * int hdac_suspend(device_t)
7864  *
7865  * Suspend and power down HDA bus and codecs.
7866  ****************************************************************************/
7867 static int
7868 hdac_suspend(device_t dev)
7869 {
7870         struct hdac_softc *sc;
7871         struct hdac_codec *codec;
7872         struct hdac_devinfo *devinfo;
7873         int codec_index, fg_index, i;
7874
7875         HDA_BOOTHVERBOSE(
7876                 device_printf(dev, "Suspend...\n");
7877         );
7878
7879         sc = device_get_softc(dev);
7880         hdac_lock(sc);
7881
7882         HDA_BOOTHVERBOSE(
7883                 device_printf(dev, "Stop streams...\n");
7884         );
7885         for (i = 0; i < sc->num_chans; i++) {
7886                 if (sc->chans[i].flags & HDAC_CHN_RUNNING) {
7887                         sc->chans[i].flags |= HDAC_CHN_SUSPEND;
7888                         hdac_channel_stop(sc, &sc->chans[i]);
7889                 }
7890         }
7891
7892         for (codec_index = 0; codec_index < HDAC_CODEC_MAX; codec_index++) {
7893                 codec = sc->codecs[codec_index];
7894                 if (codec == NULL)
7895                         continue;
7896                 for (fg_index = 0; fg_index < codec->num_fgs; fg_index++) {
7897                         devinfo = &codec->fgs[fg_index];
7898                         HDA_BOOTHVERBOSE(
7899                                 device_printf(dev,
7900                                     "Power down FG"
7901                                     " cad=%d nid=%d to the D3 state...\n",
7902                                     codec->cad, devinfo->nid);
7903                         );
7904                         hdac_command(sc,
7905                             HDA_CMD_SET_POWER_STATE(codec->cad,
7906                             devinfo->nid, HDA_CMD_POWER_STATE_D3),
7907                             codec->cad);
7908                 }
7909         }
7910
7911         HDA_BOOTHVERBOSE(
7912                 device_printf(dev, "Reset controller...\n");
7913         );
7914         callout_stop(&sc->poll_hda);
7915         callout_stop(&sc->poll_hdac);
7916         callout_stop(&sc->poll_jack);
7917         hdac_reset(sc, 0);
7918         hdac_unlock(sc);
7919         taskqueue_drain(taskqueue_thread, &sc->unsolq_task);
7920         callout_drain(&sc->poll_hda);
7921         callout_drain(&sc->poll_hdac);
7922         callout_drain(&sc->poll_jack);
7923
7924         HDA_BOOTHVERBOSE(
7925                 device_printf(dev, "Suspend done\n");
7926         );
7927
7928         return (0);
7929 }
7930
7931 /****************************************************************************
7932  * int hdac_resume(device_t)
7933  *
7934  * Powerup and restore HDA bus and codecs state.
7935  ****************************************************************************/
7936 static int
7937 hdac_resume(device_t dev)
7938 {
7939         struct hdac_softc *sc;
7940         struct hdac_codec *codec;
7941         struct hdac_devinfo *devinfo;
7942         int codec_index, fg_index, i;
7943
7944         HDA_BOOTHVERBOSE(
7945                 device_printf(dev, "Resume...\n");
7946         );
7947
7948         sc = device_get_softc(dev);
7949         hdac_lock(sc);
7950
7951         /* Quiesce everything */
7952         HDA_BOOTHVERBOSE(
7953                 device_printf(dev, "Reset controller...\n");
7954         );
7955         hdac_reset(sc, 1);
7956
7957         /* Initialize the CORB and RIRB */
7958         hdac_corb_init(sc);
7959         hdac_rirb_init(sc);
7960
7961         /* Start the corb and rirb engines */
7962         HDA_BOOTHVERBOSE(
7963                 device_printf(dev, "Starting CORB Engine...\n");
7964         );
7965         hdac_corb_start(sc);
7966         HDA_BOOTHVERBOSE(
7967                 device_printf(dev, "Starting RIRB Engine...\n");
7968         );
7969         hdac_rirb_start(sc);
7970
7971         HDA_BOOTHVERBOSE(
7972                 device_printf(dev,
7973                     "Enabling controller interrupt...\n");
7974         );
7975         HDAC_WRITE_4(&sc->mem, HDAC_GCTL, HDAC_READ_4(&sc->mem, HDAC_GCTL) |
7976             HDAC_GCTL_UNSOL);
7977         if (sc->polling == 0) {
7978                 HDAC_WRITE_4(&sc->mem, HDAC_INTCTL,
7979                     HDAC_INTCTL_CIE | HDAC_INTCTL_GIE);
7980         } else {
7981                 callout_reset(&sc->poll_hdac, 1, hdac_poll_callback, sc);
7982         }
7983         DELAY(1000);
7984
7985         for (codec_index = 0; codec_index < HDAC_CODEC_MAX; codec_index++) {
7986                 codec = sc->codecs[codec_index];
7987                 if (codec == NULL)
7988                         continue;
7989                 for (fg_index = 0; fg_index < codec->num_fgs; fg_index++) {
7990                         devinfo = &codec->fgs[fg_index];
7991                         if (devinfo->node_type !=
7992                             HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO) {
7993                                 HDA_BOOTHVERBOSE(
7994                                         device_printf(dev,
7995                                             "Power down unsupported non-audio FG"
7996                                             " cad=%d nid=%d to the D3 state...\n",
7997                                             codec->cad, devinfo->nid);
7998                                 );
7999                                 hdac_command(sc,
8000                                     HDA_CMD_SET_POWER_STATE(codec->cad,
8001                                     devinfo->nid, HDA_CMD_POWER_STATE_D3),
8002                                     codec->cad);
8003                                 continue;
8004                         }
8005
8006                         HDA_BOOTHVERBOSE(
8007                                 device_printf(dev,
8008                                     "Power up audio FG cad=%d nid=%d...\n",
8009                                     devinfo->codec->cad, devinfo->nid);
8010                         );
8011                         hdac_powerup(devinfo);
8012                         HDA_BOOTHVERBOSE(
8013                                 device_printf(dev, "AFG commit...\n");
8014                         );
8015                         hdac_audio_commit(devinfo);
8016                         HDA_BOOTHVERBOSE(
8017                                 device_printf(dev, "HP switch init...\n");
8018                         );
8019                         hdac_hp_switch_init(devinfo);
8020
8021                         hdac_unlock(sc);
8022                         for (i = 0; i < devinfo->function.audio.num_devs; i++) {
8023                                 struct hdac_pcm_devinfo *pdevinfo =
8024                                     &devinfo->function.audio.devs[i];
8025                                 HDA_BOOTHVERBOSE(
8026                                         device_printf(pdevinfo->dev,
8027                                             "OSS mixer reinitialization...\n");
8028                                 );
8029                                 if (mixer_reinit(pdevinfo->dev) == -1)
8030                                         device_printf(pdevinfo->dev,
8031                                             "unable to reinitialize the mixer\n");
8032                         }
8033                         hdac_lock(sc);
8034                 }
8035         }
8036
8037         HDA_BOOTHVERBOSE(
8038                 device_printf(dev, "Start streams...\n");
8039         );
8040         for (i = 0; i < sc->num_chans; i++) {
8041                 if (sc->chans[i].flags & HDAC_CHN_SUSPEND) {
8042                         sc->chans[i].flags &= ~HDAC_CHN_SUSPEND;
8043                         hdac_channel_start(sc, &sc->chans[i]);
8044                 }
8045         }
8046
8047         hdac_unlock(sc);
8048
8049         HDA_BOOTHVERBOSE(
8050                 device_printf(dev, "Resume done\n");
8051         );
8052
8053         return (0);
8054 }
8055 /****************************************************************************
8056  * int hdac_detach(device_t)
8057  *
8058  * Detach and free up resources utilized by the hdac device.
8059  ****************************************************************************/
8060 static int
8061 hdac_detach(device_t dev)
8062 {
8063         struct hdac_softc *sc;
8064         device_t *devlist;
8065         int i, devcount, error;
8066
8067         if ((error = device_get_children(dev, &devlist, &devcount)) != 0)
8068                 return (error);
8069         for (i = 0; i < devcount; i++) {
8070                 if ((error = device_delete_child(dev, devlist[i])) != 0) {
8071                         free(devlist, M_TEMP);
8072                         return (error);
8073                 }
8074         }
8075         free(devlist, M_TEMP);
8076
8077         sc = device_get_softc(dev);
8078         hdac_release_resources(sc);
8079
8080         return (0);
8081 }
8082
8083 static int
8084 hdac_print_child(device_t dev, device_t child)
8085 {
8086         struct hdac_pcm_devinfo *pdevinfo =
8087             (struct hdac_pcm_devinfo *)device_get_ivars(child);
8088         int retval;
8089
8090         retval = bus_print_child_header(dev, child);
8091         retval += printf(" at cad %d nid %d",
8092             pdevinfo->devinfo->codec->cad, pdevinfo->devinfo->nid);
8093         retval += bus_print_child_footer(dev, child);
8094
8095         return (retval);
8096 }
8097
8098 static device_method_t hdac_methods[] = {
8099         /* device interface */
8100         DEVMETHOD(device_probe,         hdac_probe),
8101         DEVMETHOD(device_attach,        hdac_attach),
8102         DEVMETHOD(device_detach,        hdac_detach),
8103         DEVMETHOD(device_suspend,       hdac_suspend),
8104         DEVMETHOD(device_resume,        hdac_resume),
8105         /* Bus interface */
8106         DEVMETHOD(bus_print_child,      hdac_print_child),
8107         { 0, 0 }
8108 };
8109
8110 static driver_t hdac_driver = {
8111         "hdac",
8112         hdac_methods,
8113         sizeof(struct hdac_softc),
8114 };
8115
8116 static devclass_t hdac_devclass;
8117
8118 DRIVER_MODULE(snd_hda, pci, hdac_driver, hdac_devclass, 0, 0);
8119 MODULE_DEPEND(snd_hda, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER);
8120 MODULE_VERSION(snd_hda, 1);
8121
8122 static int
8123 hdac_pcm_probe(device_t dev)
8124 {
8125         struct hdac_pcm_devinfo *pdevinfo =
8126             (struct hdac_pcm_devinfo *)device_get_ivars(dev);
8127         char buf[128];
8128
8129         snprintf(buf, sizeof(buf), "HDA %s PCM #%d %s",
8130             hdac_codec_name(pdevinfo->devinfo->codec),
8131             pdevinfo->index,
8132             (pdevinfo->digital == 3)?"DisplayPort":
8133             ((pdevinfo->digital == 2)?"HDMI":
8134             ((pdevinfo->digital)?"Digital":"Analog")));
8135         device_set_desc_copy(dev, buf);
8136         return (0);
8137 }
8138
8139 static int
8140 hdac_pcm_attach(device_t dev)
8141 {
8142         struct hdac_pcm_devinfo *pdevinfo =
8143             (struct hdac_pcm_devinfo *)device_get_ivars(dev);
8144         struct hdac_softc *sc = pdevinfo->devinfo->codec->sc;
8145         char status[SND_STATUSLEN];
8146         int i;
8147
8148         pdevinfo->chan_size = pcm_getbuffersize(dev,
8149             HDA_BUFSZ_MIN, HDA_BUFSZ_DEFAULT, HDA_BUFSZ_MAX);
8150
8151         HDA_BOOTVERBOSE(
8152                 device_printf(dev, "+--------------------------------------+\n");
8153                 device_printf(dev, "| DUMPING PCM Playback/Record Channels |\n");
8154                 device_printf(dev, "+--------------------------------------+\n");
8155                 hdac_dump_pcmchannels(pdevinfo);
8156                 device_printf(dev, "\n");
8157                 device_printf(dev, "+-------------------------------+\n");
8158                 device_printf(dev, "| DUMPING Playback/Record Paths |\n");
8159                 device_printf(dev, "+-------------------------------+\n");
8160                 hdac_dump_dac(pdevinfo);
8161                 hdac_dump_adc(pdevinfo);
8162                 hdac_dump_mix(pdevinfo);
8163                 device_printf(dev, "\n");
8164                 device_printf(dev, "+-------------------------+\n");
8165                 device_printf(dev, "| DUMPING Volume Controls |\n");
8166                 device_printf(dev, "+-------------------------+\n");
8167                 hdac_dump_ctls(pdevinfo, "Master Volume", SOUND_MASK_VOLUME);
8168                 hdac_dump_ctls(pdevinfo, "PCM Volume", SOUND_MASK_PCM);
8169                 hdac_dump_ctls(pdevinfo, "CD Volume", SOUND_MASK_CD);
8170                 hdac_dump_ctls(pdevinfo, "Microphone Volume", SOUND_MASK_MIC);
8171                 hdac_dump_ctls(pdevinfo, "Microphone2 Volume", SOUND_MASK_MONITOR);
8172                 hdac_dump_ctls(pdevinfo, "Line-in Volume", SOUND_MASK_LINE);
8173                 hdac_dump_ctls(pdevinfo, "Speaker/Beep Volume", SOUND_MASK_SPEAKER);
8174                 hdac_dump_ctls(pdevinfo, "Recording Level", SOUND_MASK_RECLEV);
8175                 hdac_dump_ctls(pdevinfo, "Input Mix Level", SOUND_MASK_IMIX);
8176                 hdac_dump_ctls(pdevinfo, "Input Monitoring Level", SOUND_MASK_IGAIN);
8177                 hdac_dump_ctls(pdevinfo, NULL, 0);
8178                 device_printf(dev, "\n");
8179         );
8180
8181         if (resource_int_value(device_get_name(dev),
8182             device_get_unit(dev), "blocksize", &i) == 0 && i > 0) {
8183                 i &= HDA_BLK_ALIGN;
8184                 if (i < HDA_BLK_MIN)
8185                         i = HDA_BLK_MIN;
8186                 pdevinfo->chan_blkcnt = pdevinfo->chan_size / i;
8187                 i = 0;
8188                 while (pdevinfo->chan_blkcnt >> i)
8189                         i++;
8190                 pdevinfo->chan_blkcnt = 1 << (i - 1);
8191                 if (pdevinfo->chan_blkcnt < HDA_BDL_MIN)
8192                         pdevinfo->chan_blkcnt = HDA_BDL_MIN;
8193                 else if (pdevinfo->chan_blkcnt > HDA_BDL_MAX)
8194                         pdevinfo->chan_blkcnt = HDA_BDL_MAX;
8195         } else
8196                 pdevinfo->chan_blkcnt = HDA_BDL_DEFAULT;
8197
8198         /*
8199          * We don't register interrupt handler with snd_setup_intr
8200          * in pcm device. Mark pcm device as MPSAFE manually.
8201          */
8202         pcm_setflags(dev, pcm_getflags(dev) | SD_F_MPSAFE);
8203
8204         HDA_BOOTHVERBOSE(
8205                 device_printf(dev, "OSS mixer initialization...\n");
8206         );
8207         if (mixer_init(dev, &hdac_audio_ctl_ossmixer_class, pdevinfo) != 0)
8208                 device_printf(dev, "Can't register mixer\n");
8209
8210         HDA_BOOTHVERBOSE(
8211                 device_printf(dev, "Registering PCM channels...\n");
8212         );
8213         if (pcm_register(dev, pdevinfo, (pdevinfo->play >= 0)?1:0,
8214             (pdevinfo->rec >= 0)?1:0) != 0)
8215                 device_printf(dev, "Can't register PCM\n");
8216
8217         pdevinfo->registered++;
8218
8219         if (pdevinfo->play >= 0)
8220                 pcm_addchan(dev, PCMDIR_PLAY, &hdac_channel_class, pdevinfo);
8221         if (pdevinfo->rec >= 0)
8222                 pcm_addchan(dev, PCMDIR_REC, &hdac_channel_class, pdevinfo);
8223
8224         snprintf(status, SND_STATUSLEN, "at cad %d nid %d on %s %s",
8225             pdevinfo->devinfo->codec->cad, pdevinfo->devinfo->nid,
8226             device_get_nameunit(sc->dev), PCM_KLDSTRING(snd_hda));
8227         pcm_setstatus(dev, status);
8228
8229         return (0);
8230 }
8231
8232 static int
8233 hdac_pcm_detach(device_t dev)
8234 {
8235         struct hdac_pcm_devinfo *pdevinfo =
8236             (struct hdac_pcm_devinfo *)device_get_ivars(dev);
8237         int err;
8238
8239         if (pdevinfo->registered > 0) {
8240                 err = pcm_unregister(dev);
8241                 if (err != 0)
8242                         return (err);
8243         }
8244
8245         return (0);
8246 }
8247
8248 static device_method_t hdac_pcm_methods[] = {
8249         /* device interface */
8250         DEVMETHOD(device_probe,         hdac_pcm_probe),
8251         DEVMETHOD(device_attach,        hdac_pcm_attach),
8252         DEVMETHOD(device_detach,        hdac_pcm_detach),
8253         { 0, 0 }
8254 };
8255
8256 static driver_t hdac_pcm_driver = {
8257         "pcm",
8258         hdac_pcm_methods,
8259         PCM_SOFTC_SIZE,
8260 };
8261
8262 DRIVER_MODULE(snd_hda_pcm, hdac, hdac_pcm_driver, pcm_devclass, 0, 0);
8263