2 * Copyright (c) 1997, 1998, 1999, 2000-2003
3 * Bill Paul <wpaul@windriver.com>. All rights reserved.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by Bill Paul.
16 * 4. Neither the name of the author nor the names of any co-contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
33 #include <sys/cdefs.h>
34 __FBSDID("$FreeBSD$");
37 * ASIX Electronics AX88172/AX88178/AX88778 USB 2.0 ethernet driver.
38 * Used in the LinkSys USB200M and various other adapters.
40 * Manuals available from:
41 * http://www.asix.com.tw/datasheet/mac/Ax88172.PDF
42 * Note: you need the manual for the AX88170 chip (USB 1.x ethernet
43 * controller) to find the definitions for the RX control register.
44 * http://www.asix.com.tw/datasheet/mac/Ax88170.PDF
46 * Written by Bill Paul <wpaul@windriver.com>
52 * The AX88172 provides USB ethernet supports at 10 and 100Mbps.
53 * It uses an external PHY (reference designs use a RealTek chip),
54 * and has a 64-bit multicast hash filter. There is some information
55 * missing from the manual which one needs to know in order to make
58 * - You must set bit 7 in the RX control register, otherwise the
59 * chip won't receive any packets.
60 * - You must initialize all 3 IPG registers, or you won't be able
61 * to send any packets.
63 * Note that this device appears to only support loading the station
64 * address via autload from the EEPROM (i.e. there's no way to manaully
67 * (Adam Weinberger wanted me to name this driver if_gir.c.)
71 * Ax88178 and Ax88772 support backported from the OpenBSD driver.
72 * 2007/02/12, J.R. Oldroyd, fbsd@opal.com
75 * http://www.asix.com.tw/FrootAttach/datasheet/AX88178_datasheet_Rev10.pdf
76 * http://www.asix.com.tw/FrootAttach/datasheet/AX88772_datasheet_Rev10.pdf
79 #include <sys/stdint.h>
80 #include <sys/stddef.h>
81 #include <sys/param.h>
82 #include <sys/queue.h>
83 #include <sys/types.h>
84 #include <sys/systm.h>
85 #include <sys/kernel.h>
87 #include <sys/linker_set.h>
88 #include <sys/module.h>
90 #include <sys/mutex.h>
91 #include <sys/condvar.h>
92 #include <sys/sysctl.h>
94 #include <sys/unistd.h>
95 #include <sys/callout.h>
96 #include <sys/malloc.h>
99 #include <dev/usb/usb.h>
100 #include <dev/usb/usbdi.h>
101 #include <dev/usb/usbdi_util.h>
104 #define USB_DEBUG_VAR axe_debug
105 #include <dev/usb/usb_debug.h>
106 #include <dev/usb/usb_process.h>
108 #include <dev/usb/net/usb_ethernet.h>
109 #include <dev/usb/net/if_axereg.h>
112 * AXE_178_MAX_FRAME_BURST
113 * max frame burst size for Ax88178 and Ax88772
118 * use the largest your system can handle without USB stalling.
120 * NB: 88772 parts appear to generate lots of input errors with
121 * a 2K rx buffer and 8K is only slightly faster than 4K on an
122 * EHCI port on a T42 so change at your own risk.
124 #define AXE_178_MAX_FRAME_BURST 1
127 static int axe_debug = 0;
129 SYSCTL_NODE(_hw_usb, OID_AUTO, axe, CTLFLAG_RW, 0, "USB axe");
130 SYSCTL_INT(_hw_usb_axe, OID_AUTO, debug, CTLFLAG_RW, &axe_debug, 0,
135 * Various supported device vendors/products.
137 static const struct usb_device_id axe_devs[] = {
138 #define AXE_DEV(v,p,i) { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, i) }
139 AXE_DEV(ABOCOM, UF200, 0),
140 AXE_DEV(ACERCM, EP1427X2, 0),
141 AXE_DEV(APPLE, ETHERNET, AXE_FLAG_772),
142 AXE_DEV(ASIX, AX88172, 0),
143 AXE_DEV(ASIX, AX88178, AXE_FLAG_178),
144 AXE_DEV(ASIX, AX88772, AXE_FLAG_772),
145 AXE_DEV(ASIX, AX88772A, AXE_FLAG_772),
146 AXE_DEV(ATEN, UC210T, 0),
147 AXE_DEV(BELKIN, F5D5055, AXE_FLAG_178),
148 AXE_DEV(BILLIONTON, USB2AR, 0),
149 AXE_DEV(CISCOLINKSYS, USB200MV2, AXE_FLAG_772),
150 AXE_DEV(COREGA, FETHER_USB2_TX, 0),
151 AXE_DEV(DLINK, DUBE100, 0),
152 AXE_DEV(DLINK, DUBE100B1, AXE_FLAG_772),
153 AXE_DEV(GOODWAY, GWUSB2E, 0),
154 AXE_DEV(IODATA, ETGUS2, AXE_FLAG_178),
155 AXE_DEV(JVC, MP_PRX1, 0),
156 AXE_DEV(LINKSYS2, USB200M, 0),
157 AXE_DEV(LINKSYS4, USB1000, AXE_FLAG_178),
158 AXE_DEV(LOGITEC, LAN_GTJU2A, AXE_FLAG_178),
159 AXE_DEV(MELCO, LUAU2KTX, 0),
160 AXE_DEV(MELCO, LUA3U2AGT, AXE_FLAG_178),
161 AXE_DEV(NETGEAR, FA120, 0),
162 AXE_DEV(OQO, ETHER01PLUS, AXE_FLAG_772),
163 AXE_DEV(PLANEX3, GU1000T, AXE_FLAG_178),
164 AXE_DEV(SITECOM, LN029, 0),
165 AXE_DEV(SITECOMEU, LN028, AXE_FLAG_178),
166 AXE_DEV(SYSTEMTALKS, SGCX2UL, 0),
170 static device_probe_t axe_probe;
171 static device_attach_t axe_attach;
172 static device_detach_t axe_detach;
174 static usb_callback_t axe_bulk_read_callback;
175 static usb_callback_t axe_bulk_write_callback;
177 static miibus_readreg_t axe_miibus_readreg;
178 static miibus_writereg_t axe_miibus_writereg;
179 static miibus_statchg_t axe_miibus_statchg;
181 static uether_fn_t axe_attach_post;
182 static uether_fn_t axe_init;
183 static uether_fn_t axe_stop;
184 static uether_fn_t axe_start;
185 static uether_fn_t axe_tick;
186 static uether_fn_t axe_setmulti;
187 static uether_fn_t axe_setpromisc;
189 static int axe_ifmedia_upd(struct ifnet *);
190 static void axe_ifmedia_sts(struct ifnet *, struct ifmediareq *);
191 static int axe_cmd(struct axe_softc *, int, int, int, void *);
192 static void axe_ax88178_init(struct axe_softc *);
193 static void axe_ax88772_init(struct axe_softc *);
194 static int axe_get_phyno(struct axe_softc *, int);
196 static const struct usb_config axe_config[AXE_N_TRANSFER] = {
200 .endpoint = UE_ADDR_ANY,
201 .direction = UE_DIR_OUT,
202 .bufsize = AXE_BULK_BUF_SIZE,
203 .flags = {.pipe_bof = 1,.force_short_xfer = 1,},
204 .callback = axe_bulk_write_callback,
205 .timeout = 10000, /* 10 seconds */
210 .endpoint = UE_ADDR_ANY,
211 .direction = UE_DIR_IN,
212 .bufsize = 16384, /* bytes */
213 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
214 .callback = axe_bulk_read_callback,
215 .timeout = 0, /* no timeout */
219 static device_method_t axe_methods[] = {
220 /* Device interface */
221 DEVMETHOD(device_probe, axe_probe),
222 DEVMETHOD(device_attach, axe_attach),
223 DEVMETHOD(device_detach, axe_detach),
226 DEVMETHOD(bus_print_child, bus_generic_print_child),
227 DEVMETHOD(bus_driver_added, bus_generic_driver_added),
230 DEVMETHOD(miibus_readreg, axe_miibus_readreg),
231 DEVMETHOD(miibus_writereg, axe_miibus_writereg),
232 DEVMETHOD(miibus_statchg, axe_miibus_statchg),
237 static driver_t axe_driver = {
239 .methods = axe_methods,
240 .size = sizeof(struct axe_softc),
243 static devclass_t axe_devclass;
245 DRIVER_MODULE(axe, uhub, axe_driver, axe_devclass, NULL, 0);
246 DRIVER_MODULE(miibus, axe, miibus_driver, miibus_devclass, 0, 0);
247 MODULE_DEPEND(axe, uether, 1, 1, 1);
248 MODULE_DEPEND(axe, usb, 1, 1, 1);
249 MODULE_DEPEND(axe, ether, 1, 1, 1);
250 MODULE_DEPEND(axe, miibus, 1, 1, 1);
251 MODULE_VERSION(axe, 1);
253 static const struct usb_ether_methods axe_ue_methods = {
254 .ue_attach_post = axe_attach_post,
255 .ue_start = axe_start,
259 .ue_setmulti = axe_setmulti,
260 .ue_setpromisc = axe_setpromisc,
261 .ue_mii_upd = axe_ifmedia_upd,
262 .ue_mii_sts = axe_ifmedia_sts,
266 axe_cmd(struct axe_softc *sc, int cmd, int index, int val, void *buf)
268 struct usb_device_request req;
271 AXE_LOCK_ASSERT(sc, MA_OWNED);
273 req.bmRequestType = (AXE_CMD_IS_WRITE(cmd) ?
274 UT_WRITE_VENDOR_DEVICE :
275 UT_READ_VENDOR_DEVICE);
276 req.bRequest = AXE_CMD_CMD(cmd);
277 USETW(req.wValue, val);
278 USETW(req.wIndex, index);
279 USETW(req.wLength, AXE_CMD_LEN(cmd));
281 err = uether_do_request(&sc->sc_ue, &req, buf, 1000);
287 axe_miibus_readreg(device_t dev, int phy, int reg)
289 struct axe_softc *sc = device_get_softc(dev);
293 if (sc->sc_phyno != phy)
296 locked = mtx_owned(&sc->sc_mtx);
300 axe_cmd(sc, AXE_CMD_MII_OPMODE_SW, 0, 0, NULL);
301 axe_cmd(sc, AXE_CMD_MII_READ_REG, reg, phy, &val);
302 axe_cmd(sc, AXE_CMD_MII_OPMODE_HW, 0, 0, NULL);
305 if ((sc->sc_flags & AXE_FLAG_772) != 0 && reg == MII_BMSR) {
307 * BMSR of AX88772 indicates that it supports extended
308 * capability but the extended status register is
309 * revered for embedded ethernet PHY. So clear the
310 * extended capability bit of BMSR.
321 axe_miibus_writereg(device_t dev, int phy, int reg, int val)
323 struct axe_softc *sc = device_get_softc(dev);
328 if (sc->sc_phyno != phy)
331 locked = mtx_owned(&sc->sc_mtx);
335 axe_cmd(sc, AXE_CMD_MII_OPMODE_SW, 0, 0, NULL);
336 axe_cmd(sc, AXE_CMD_MII_WRITE_REG, reg, phy, &val);
337 axe_cmd(sc, AXE_CMD_MII_OPMODE_HW, 0, 0, NULL);
345 axe_miibus_statchg(device_t dev)
347 struct axe_softc *sc = device_get_softc(dev);
348 struct mii_data *mii = GET_MII(sc);
353 locked = mtx_owned(&sc->sc_mtx);
357 ifp = uether_getifp(&sc->sc_ue);
358 if (mii == NULL || ifp == NULL ||
359 (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
362 sc->sc_flags &= ~AXE_FLAG_LINK;
363 if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) ==
364 (IFM_ACTIVE | IFM_AVALID)) {
365 switch (IFM_SUBTYPE(mii->mii_media_active)) {
368 sc->sc_flags |= AXE_FLAG_LINK;
371 if ((sc->sc_flags & AXE_FLAG_178) == 0)
373 sc->sc_flags |= AXE_FLAG_LINK;
380 /* Lost link, do nothing. */
381 if ((sc->sc_flags & AXE_FLAG_LINK) == 0)
385 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0)
386 val |= AXE_MEDIA_FULL_DUPLEX;
387 if (sc->sc_flags & (AXE_FLAG_178 | AXE_FLAG_772)) {
388 val |= AXE_178_MEDIA_RX_EN | AXE_178_MEDIA_MAGIC;
389 if ((sc->sc_flags & AXE_FLAG_178) != 0)
390 val |= AXE_178_MEDIA_ENCK;
391 switch (IFM_SUBTYPE(mii->mii_media_active)) {
393 val |= AXE_178_MEDIA_GMII | AXE_178_MEDIA_ENCK;
396 val |= AXE_178_MEDIA_100TX;
399 /* doesn't need to be handled */
403 err = axe_cmd(sc, AXE_CMD_WRITE_MEDIA, 0, val, NULL);
405 device_printf(dev, "media change failed, error %d\n", err);
415 axe_ifmedia_upd(struct ifnet *ifp)
417 struct axe_softc *sc = ifp->if_softc;
418 struct mii_data *mii = GET_MII(sc);
421 AXE_LOCK_ASSERT(sc, MA_OWNED);
423 if (mii->mii_instance) {
424 struct mii_softc *miisc;
426 LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
427 mii_phy_reset(miisc);
429 error = mii_mediachg(mii);
434 * Report current media status.
437 axe_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
439 struct axe_softc *sc = ifp->if_softc;
440 struct mii_data *mii = GET_MII(sc);
445 ifmr->ifm_active = mii->mii_media_active;
446 ifmr->ifm_status = mii->mii_media_status;
450 axe_setmulti(struct usb_ether *ue)
452 struct axe_softc *sc = uether_getsc(ue);
453 struct ifnet *ifp = uether_getifp(ue);
454 struct ifmultiaddr *ifma;
457 uint8_t hashtbl[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
459 AXE_LOCK_ASSERT(sc, MA_OWNED);
461 axe_cmd(sc, AXE_CMD_RXCTL_READ, 0, 0, &rxmode);
462 rxmode = le16toh(rxmode);
464 if (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC)) {
465 rxmode |= AXE_RXCMD_ALLMULTI;
466 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL);
469 rxmode &= ~AXE_RXCMD_ALLMULTI;
472 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link)
474 if (ifma->ifma_addr->sa_family != AF_LINK)
476 h = ether_crc32_be(LLADDR((struct sockaddr_dl *)
477 ifma->ifma_addr), ETHER_ADDR_LEN) >> 26;
478 hashtbl[h / 8] |= 1 << (h % 8);
480 if_maddr_runlock(ifp);
482 axe_cmd(sc, AXE_CMD_WRITE_MCAST, 0, 0, (void *)&hashtbl);
483 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL);
487 axe_get_phyno(struct axe_softc *sc, int sel)
491 switch (AXE_PHY_TYPE(sc->sc_phyaddrs[sel])) {
492 case PHY_TYPE_100_HOME:
494 phyno = AXE_PHY_NO(sc->sc_phyaddrs[sel]);
496 case PHY_TYPE_SPECIAL:
500 case PHY_TYPE_NON_SUP:
510 #define AXE_GPIO_WRITE(x, y) do { \
511 axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, (x), NULL); \
512 uether_pause(ue, (y)); \
516 axe_ax88178_init(struct axe_softc *sc)
518 struct usb_ether *ue;
520 uint16_t eeprom, val;
523 axe_cmd(sc, AXE_CMD_SROM_WR_ENABLE, 0, 0, NULL);
525 axe_cmd(sc, AXE_CMD_SROM_READ, 0, 0x0017, &eeprom);
526 eeprom = le16toh(eeprom);
527 axe_cmd(sc, AXE_CMD_SROM_WR_DISABLE, 0, 0, NULL);
529 /* if EEPROM is invalid we have to use to GPIO0 */
530 if (eeprom == 0xffff) {
531 phymode = AXE_PHY_MODE_MARVELL;
534 phymode = eeprom & 0x7f;
535 gpio0 = (eeprom & 0x80) ? 0 : 1;
539 device_printf(sc->sc_ue.ue_dev, "EEPROM data : 0x%04x\n",
541 /* Program GPIOs depending on PHY hardware. */
543 case AXE_PHY_MODE_MARVELL:
545 AXE_GPIO_WRITE(AXE_GPIO_RELOAD_EEPROM | AXE_GPIO0_EN,
547 AXE_GPIO_WRITE(AXE_GPIO0_EN | AXE_GPIO2 | AXE_GPIO2_EN,
549 AXE_GPIO_WRITE(AXE_GPIO0_EN | AXE_GPIO2_EN, hz / 4);
550 AXE_GPIO_WRITE(AXE_GPIO0_EN | AXE_GPIO2 | AXE_GPIO2_EN,
553 AXE_GPIO_WRITE(AXE_GPIO_RELOAD_EEPROM | AXE_GPIO1 |
554 AXE_GPIO1_EN, hz / 32);
556 case AXE_PHY_MODE_CICADA:
558 AXE_GPIO_WRITE(AXE_GPIO_RELOAD_EEPROM | AXE_GPIO0 |
559 AXE_GPIO0_EN, hz / 32);
561 AXE_GPIO_WRITE(AXE_GPIO_RELOAD_EEPROM | AXE_GPIO1 |
562 AXE_GPIO1_EN, hz / 32);
564 case AXE_PHY_MODE_AGERE:
565 AXE_GPIO_WRITE(AXE_GPIO_RELOAD_EEPROM | AXE_GPIO1 |
566 AXE_GPIO1_EN, hz / 32);
567 AXE_GPIO_WRITE(AXE_GPIO1 | AXE_GPIO1_EN | AXE_GPIO2 |
568 AXE_GPIO2_EN, hz / 32);
569 AXE_GPIO_WRITE(AXE_GPIO1 | AXE_GPIO1_EN | AXE_GPIO2_EN, hz / 4);
570 AXE_GPIO_WRITE(AXE_GPIO1 | AXE_GPIO1_EN | AXE_GPIO2 |
571 AXE_GPIO2_EN, hz / 32);
573 case AXE_PHY_MODE_REALTEK_8211CL:
574 case AXE_PHY_MODE_REALTEK_8211BN:
575 case AXE_PHY_MODE_REALTEK_8251CL:
576 val = gpio0 == 1 ? AXE_GPIO0 | AXE_GPIO0_EN :
577 AXE_GPIO1 | AXE_GPIO1_EN;
578 AXE_GPIO_WRITE(val, hz / 32);
579 AXE_GPIO_WRITE(val | AXE_GPIO2 | AXE_GPIO2_EN, hz / 32);
580 AXE_GPIO_WRITE(val | AXE_GPIO2_EN, hz / 4);
581 AXE_GPIO_WRITE(val | AXE_GPIO2 | AXE_GPIO2_EN, hz / 32);
582 if (phymode == AXE_PHY_MODE_REALTEK_8211CL) {
583 axe_miibus_writereg(ue->ue_dev, sc->sc_phyno,
585 axe_miibus_writereg(ue->ue_dev, sc->sc_phyno,
587 val = axe_miibus_readreg(ue->ue_dev, sc->sc_phyno,
589 axe_miibus_writereg(ue->ue_dev, sc->sc_phyno,
591 axe_miibus_writereg(ue->ue_dev, sc->sc_phyno,
596 /* Unknown PHY model or no need to program GPIOs. */
601 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_CLEAR, NULL);
602 uether_pause(ue, hz / 4);
604 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0,
605 AXE_SW_RESET_PRL | AXE_178_RESET_MAGIC, NULL);
606 uether_pause(ue, hz / 4);
607 /* Enable MII/GMII/RGMII interface to work with external PHY. */
608 axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0, NULL);
609 uether_pause(ue, hz / 4);
611 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, 0, NULL);
613 #undef AXE_GPIO_WRITE
616 axe_ax88772_init(struct axe_softc *sc)
618 axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x00b0, NULL);
619 uether_pause(&sc->sc_ue, hz / 16);
621 if (sc->sc_phyno == AXE_772_PHY_NO_EPHY) {
622 /* ask for the embedded PHY */
623 axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0x01, NULL);
624 uether_pause(&sc->sc_ue, hz / 64);
626 /* power down and reset state, pin reset state */
627 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0,
628 AXE_SW_RESET_CLEAR, NULL);
629 uether_pause(&sc->sc_ue, hz / 16);
631 /* power down/reset state, pin operating state */
632 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0,
633 AXE_SW_RESET_IPPD | AXE_SW_RESET_PRL, NULL);
634 uether_pause(&sc->sc_ue, hz / 4);
636 /* power up, reset */
637 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_PRL, NULL);
639 /* power up, operating */
640 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0,
641 AXE_SW_RESET_IPRL | AXE_SW_RESET_PRL, NULL);
643 /* ask for external PHY */
644 axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0x00, NULL);
645 uether_pause(&sc->sc_ue, hz / 64);
647 /* power down internal PHY */
648 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0,
649 AXE_SW_RESET_IPPD | AXE_SW_RESET_PRL, NULL);
652 uether_pause(&sc->sc_ue, hz / 4);
653 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, 0, NULL);
657 axe_reset(struct axe_softc *sc)
659 struct usb_config_descriptor *cd;
662 cd = usbd_get_config_descriptor(sc->sc_ue.ue_udev);
664 err = usbd_req_set_config(sc->sc_ue.ue_udev, &sc->sc_mtx,
665 cd->bConfigurationValue);
667 DPRINTF("reset failed (ignored)\n");
669 /* Wait a little while for the chip to get its brains in order. */
670 uether_pause(&sc->sc_ue, hz / 100);
674 axe_attach_post(struct usb_ether *ue)
676 struct axe_softc *sc = uether_getsc(ue);
679 * Load PHY indexes first. Needed by axe_xxx_init().
681 axe_cmd(sc, AXE_CMD_READ_PHYID, 0, 0, sc->sc_phyaddrs);
683 device_printf(sc->sc_ue.ue_dev, "PHYADDR 0x%02x:0x%02x\n",
684 sc->sc_phyaddrs[0], sc->sc_phyaddrs[1]);
685 sc->sc_phyno = axe_get_phyno(sc, AXE_PHY_SEL_PRI);
686 if (sc->sc_phyno == -1)
687 sc->sc_phyno = axe_get_phyno(sc, AXE_PHY_SEL_SEC);
688 if (sc->sc_phyno == -1) {
689 device_printf(sc->sc_ue.ue_dev,
690 "no valid PHY address found, assuming PHY address 0\n");
694 if (sc->sc_flags & AXE_FLAG_178)
695 axe_ax88178_init(sc);
696 else if (sc->sc_flags & AXE_FLAG_772)
697 axe_ax88772_init(sc);
700 * Get station address.
702 if (sc->sc_flags & (AXE_FLAG_178 | AXE_FLAG_772))
703 axe_cmd(sc, AXE_178_CMD_READ_NODEID, 0, 0, ue->ue_eaddr);
705 axe_cmd(sc, AXE_172_CMD_READ_NODEID, 0, 0, ue->ue_eaddr);
710 axe_cmd(sc, AXE_CMD_READ_IPG012, 0, 0, sc->sc_ipgs);
714 * Probe for a AX88172 chip.
717 axe_probe(device_t dev)
719 struct usb_attach_arg *uaa = device_get_ivars(dev);
721 if (uaa->usb_mode != USB_MODE_HOST)
723 if (uaa->info.bConfigIndex != AXE_CONFIG_IDX)
725 if (uaa->info.bIfaceIndex != AXE_IFACE_IDX)
728 return (usbd_lookup_id_by_uaa(axe_devs, sizeof(axe_devs), uaa));
732 * Attach the interface. Allocate softc structures, do ifmedia
733 * setup and ethernet/BPF attach.
736 axe_attach(device_t dev)
738 struct usb_attach_arg *uaa = device_get_ivars(dev);
739 struct axe_softc *sc = device_get_softc(dev);
740 struct usb_ether *ue = &sc->sc_ue;
744 sc->sc_flags = USB_GET_DRIVER_INFO(uaa);
746 device_set_usb_desc(dev);
748 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF);
750 iface_index = AXE_IFACE_IDX;
751 error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer,
752 axe_config, AXE_N_TRANSFER, sc, &sc->sc_mtx);
754 device_printf(dev, "allocating USB transfers failed\n");
760 ue->ue_udev = uaa->device;
761 ue->ue_mtx = &sc->sc_mtx;
762 ue->ue_methods = &axe_ue_methods;
764 error = uether_ifattach(ue);
766 device_printf(dev, "could not attach interface\n");
769 return (0); /* success */
773 return (ENXIO); /* failure */
777 axe_detach(device_t dev)
779 struct axe_softc *sc = device_get_softc(dev);
780 struct usb_ether *ue = &sc->sc_ue;
782 usbd_transfer_unsetup(sc->sc_xfer, AXE_N_TRANSFER);
784 mtx_destroy(&sc->sc_mtx);
789 #if (AXE_BULK_BUF_SIZE >= 0x10000)
790 #error "Please update axe_bulk_read_callback()!"
794 axe_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error)
796 struct axe_softc *sc = usbd_xfer_softc(xfer);
797 struct usb_ether *ue = &sc->sc_ue;
798 struct ifnet *ifp = uether_getifp(ue);
799 struct axe_sframe_hdr hdr;
800 struct usb_page_cache *pc;
804 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
806 switch (USB_GET_STATE(xfer)) {
807 case USB_ST_TRANSFERRED:
812 pc = usbd_xfer_get_frame(xfer, 0);
813 if (sc->sc_flags & (AXE_FLAG_772 | AXE_FLAG_178)) {
814 while (pos < actlen) {
815 if ((pos + sizeof(hdr)) > actlen) {
816 /* too little data */
820 usbd_copy_out(pc, pos, &hdr, sizeof(hdr));
822 if ((hdr.len ^ hdr.ilen) != 0xFFFF) {
829 len = le16toh(hdr.len);
830 if ((pos + len) > actlen) {
835 uether_rxbuf(ue, pc, pos, len);
837 pos += len + (len % 2);
840 uether_rxbuf(ue, pc, 0, actlen);
848 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
849 usbd_transfer_submit(xfer);
854 DPRINTF("bulk read error, %s\n", usbd_errstr(error));
856 if (error != USB_ERR_CANCELLED) {
857 /* try to clear stall first */
858 usbd_xfer_set_stall(xfer);
866 #if ((AXE_BULK_BUF_SIZE >= 0x10000) || (AXE_BULK_BUF_SIZE < (MCLBYTES+4)))
867 #error "Please update axe_bulk_write_callback()!"
871 axe_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error)
873 struct axe_softc *sc = usbd_xfer_softc(xfer);
874 struct axe_sframe_hdr hdr;
875 struct ifnet *ifp = uether_getifp(&sc->sc_ue);
876 struct usb_page_cache *pc;
880 switch (USB_GET_STATE(xfer)) {
881 case USB_ST_TRANSFERRED:
882 DPRINTFN(11, "transfer complete\n");
883 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
887 if ((sc->sc_flags & AXE_FLAG_LINK) == 0 ||
888 (ifp->if_drv_flags & IFF_DRV_OACTIVE) != 0) {
890 * Don't send anything if there is no link or
891 * controller is busy.
896 pc = usbd_xfer_get_frame(xfer, 0);
900 IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
904 break; /* send out data */
907 if (m->m_pkthdr.len > MCLBYTES) {
908 m->m_pkthdr.len = MCLBYTES;
910 if (sc->sc_flags & (AXE_FLAG_772 | AXE_FLAG_178)) {
912 hdr.len = htole16(m->m_pkthdr.len);
915 usbd_copy_in(pc, pos, &hdr, sizeof(hdr));
920 * NOTE: Some drivers force a short packet
921 * by appending a dummy header with zero
922 * length at then end of the USB transfer.
923 * This driver uses the
924 * USB_FORCE_SHORT_XFER flag instead.
927 usbd_m_copy_in(pc, pos, m, 0, m->m_pkthdr.len);
928 pos += m->m_pkthdr.len;
932 * Update TX packet counter here. This is not
933 * correct way but it seems that there is no way
934 * to know how many packets are sent at the end
935 * of transfer because controller combines
936 * multiple writes into single one if there is
937 * room in TX buffer of controller.
942 * if there's a BPF listener, bounce a copy
943 * of this frame to him:
949 if (sc->sc_flags & (AXE_FLAG_772 | AXE_FLAG_178)) {
950 if (pos > (AXE_BULK_BUF_SIZE - MCLBYTES - sizeof(hdr))) {
951 /* send out frame(s) */
960 usbd_xfer_set_frame_len(xfer, 0, pos);
961 usbd_transfer_submit(xfer);
962 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
966 DPRINTFN(11, "transfer error, %s\n",
970 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
972 if (error != USB_ERR_CANCELLED) {
973 /* try to clear stall first */
974 usbd_xfer_set_stall(xfer);
983 axe_tick(struct usb_ether *ue)
985 struct axe_softc *sc = uether_getsc(ue);
986 struct mii_data *mii = GET_MII(sc);
988 AXE_LOCK_ASSERT(sc, MA_OWNED);
991 if ((sc->sc_flags & AXE_FLAG_LINK) == 0) {
992 axe_miibus_statchg(ue->ue_dev);
993 if ((sc->sc_flags & AXE_FLAG_LINK) != 0)
999 axe_start(struct usb_ether *ue)
1001 struct axe_softc *sc = uether_getsc(ue);
1004 * start the USB transfers, if not already started:
1006 usbd_transfer_start(sc->sc_xfer[AXE_BULK_DT_RD]);
1007 usbd_transfer_start(sc->sc_xfer[AXE_BULK_DT_WR]);
1011 axe_init(struct usb_ether *ue)
1013 struct axe_softc *sc = uether_getsc(ue);
1014 struct ifnet *ifp = uether_getifp(ue);
1017 AXE_LOCK_ASSERT(sc, MA_OWNED);
1019 /* Cancel pending I/O */
1022 /* Set MAC address. */
1023 if (sc->sc_flags & (AXE_FLAG_178 | AXE_FLAG_772))
1024 axe_cmd(sc, AXE_178_CMD_WRITE_NODEID, 0, 0, IF_LLADDR(ifp));
1026 axe_cmd(sc, AXE_172_CMD_WRITE_NODEID, 0, 0, IF_LLADDR(ifp));
1028 /* Set transmitter IPG values */
1029 if (sc->sc_flags & (AXE_FLAG_178 | AXE_FLAG_772)) {
1030 axe_cmd(sc, AXE_178_CMD_WRITE_IPG012, sc->sc_ipgs[2],
1031 (sc->sc_ipgs[1] << 8) | (sc->sc_ipgs[0]), NULL);
1033 axe_cmd(sc, AXE_172_CMD_WRITE_IPG0, 0, sc->sc_ipgs[0], NULL);
1034 axe_cmd(sc, AXE_172_CMD_WRITE_IPG1, 0, sc->sc_ipgs[1], NULL);
1035 axe_cmd(sc, AXE_172_CMD_WRITE_IPG2, 0, sc->sc_ipgs[2], NULL);
1038 /* Enable receiver, set RX mode */
1039 rxmode = (AXE_RXCMD_MULTICAST | AXE_RXCMD_ENABLE);
1040 if (sc->sc_flags & (AXE_FLAG_178 | AXE_FLAG_772)) {
1042 rxmode |= AXE_178_RXCMD_MFB_2048; /* chip default */
1045 * Default Rx buffer size is too small to get
1046 * maximum performance.
1048 rxmode |= AXE_178_RXCMD_MFB_16384;
1051 rxmode |= AXE_172_RXCMD_UNICAST;
1054 /* If we want promiscuous mode, set the allframes bit. */
1055 if (ifp->if_flags & IFF_PROMISC)
1056 rxmode |= AXE_RXCMD_PROMISC;
1058 if (ifp->if_flags & IFF_BROADCAST)
1059 rxmode |= AXE_RXCMD_BROADCAST;
1061 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL);
1063 /* Load the multicast filter. */
1066 usbd_xfer_set_stall(sc->sc_xfer[AXE_BULK_DT_WR]);
1068 ifp->if_drv_flags |= IFF_DRV_RUNNING;
1073 axe_setpromisc(struct usb_ether *ue)
1075 struct axe_softc *sc = uether_getsc(ue);
1076 struct ifnet *ifp = uether_getifp(ue);
1079 axe_cmd(sc, AXE_CMD_RXCTL_READ, 0, 0, &rxmode);
1081 rxmode = le16toh(rxmode);
1083 if (ifp->if_flags & IFF_PROMISC) {
1084 rxmode |= AXE_RXCMD_PROMISC;
1086 rxmode &= ~AXE_RXCMD_PROMISC;
1089 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL);
1095 axe_stop(struct usb_ether *ue)
1097 struct axe_softc *sc = uether_getsc(ue);
1098 struct ifnet *ifp = uether_getifp(ue);
1100 AXE_LOCK_ASSERT(sc, MA_OWNED);
1102 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
1103 sc->sc_flags &= ~AXE_FLAG_LINK;
1106 * stop all the transfers, if not already stopped:
1108 usbd_transfer_stop(sc->sc_xfer[AXE_BULK_DT_WR]);
1109 usbd_transfer_stop(sc->sc_xfer[AXE_BULK_DT_RD]);