2 * Copyright (c) 2001 Jake Burkholder.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 #ifndef _MACHINE_SMP_H_
30 #define _MACHINE_SMP_H_
34 #define CPU_TICKSYNC 1
35 #define CPU_STICKSYNC 2
37 #define CPU_BOOTSTRAP 4
42 #include <sys/sched.h>
44 #include <machine/intr_machdep.h>
45 #include <machine/pcb.h>
46 #include <machine/tte.h>
48 #define IDR_BUSY 0x0000000000000001ULL
49 #define IDR_NACK 0x0000000000000002ULL
50 #define IDR_CHEETAH_ALL_BUSY 0x5555555555555555ULL
51 #define IDR_CHEETAH_ALL_NACK (~IDR_CHEETAH_ALL_BUSY)
52 #define IDR_CHEETAH_MAX_BN_PAIRS 32
53 #define IDR_JALAPENO_MAX_BN_PAIRS 4
55 #define IDC_ITID_SHIFT 14
56 #define IDC_BN_SHIFT 24
58 #define IPI_AST PIL_AST
59 #define IPI_RENDEZVOUS PIL_RENDEZVOUS
60 #define IPI_PREEMPT PIL_PREEMPT
61 #define IPI_STOP PIL_STOP
62 #define IPI_STOP_HARD PIL_STOP
64 #define IPI_RETRIES 5000
66 struct cpu_start_args {
74 struct tte csa_ttes[PCPU_PAGES];
77 struct ipi_cache_args {
89 struct pmap *ita_pmap;
93 #define ita_va ita_start
97 extern struct pcb stoppcbs[];
99 void cpu_mp_bootstrap(struct pcpu *pc);
100 void cpu_mp_shutdown(void);
102 typedef void cpu_ipi_selected_t(u_int, u_long, u_long, u_long);
103 extern cpu_ipi_selected_t *cpu_ipi_selected;
104 typedef void cpu_ipi_single_t(u_int, u_long, u_long, u_long);
105 extern cpu_ipi_single_t *cpu_ipi_single;
107 void mp_init(u_int cpu_impl);
109 extern struct mtx ipi_mtx;
110 extern struct ipi_cache_args ipi_cache_args;
111 extern struct ipi_rd_args ipi_rd_args;
112 extern struct ipi_tlb_args ipi_tlb_args;
114 extern char *mp_tramp_code;
115 extern u_long mp_tramp_code_len;
116 extern u_long mp_tramp_tlb_slots;
117 extern u_long mp_tramp_func;
119 extern void mp_startup(void);
121 extern char tl_ipi_cheetah_dcache_page_inval[];
122 extern char tl_ipi_spitfire_dcache_page_inval[];
123 extern char tl_ipi_spitfire_icache_page_inval[];
125 extern char tl_ipi_level[];
127 extern char tl_ipi_stick_rd[];
128 extern char tl_ipi_tick_rd[];
130 extern char tl_ipi_tlb_context_demap[];
131 extern char tl_ipi_tlb_page_demap[];
132 extern char tl_ipi_tlb_range_demap[];
135 ipi_all_but_self(u_int ipi)
138 cpu_ipi_selected(PCPU_GET(other_cpus), 0, (u_long)tl_ipi_level, ipi);
142 ipi_selected(u_int cpus, u_int ipi)
145 cpu_ipi_selected(cpus, 0, (u_long)tl_ipi_level, ipi);
149 ipi_cpu(int cpu, u_int ipi)
152 cpu_ipi_single(cpu, 0, (u_long)tl_ipi_level, ipi);
155 #if defined(_MACHINE_PMAP_H_) && defined(_SYS_MUTEX_H_)
157 static __inline void *
158 ipi_dcache_page_inval(void *func, vm_paddr_t pa)
160 struct ipi_cache_args *ica;
165 ica = &ipi_cache_args;
166 mtx_lock_spin(&ipi_mtx);
167 ica->ica_mask = all_cpus;
169 cpu_ipi_selected(PCPU_GET(other_cpus), 0, (u_long)func, (u_long)ica);
170 return (&ica->ica_mask);
173 static __inline void *
174 ipi_icache_page_inval(void *func, vm_paddr_t pa)
176 struct ipi_cache_args *ica;
181 ica = &ipi_cache_args;
182 mtx_lock_spin(&ipi_mtx);
183 ica->ica_mask = all_cpus;
185 cpu_ipi_selected(PCPU_GET(other_cpus), 0, (u_long)func, (u_long)ica);
186 return (&ica->ica_mask);
189 static __inline void *
190 ipi_rd(u_int cpu, void *func, u_long *val)
192 struct ipi_rd_args *ira;
198 mtx_lock_spin(&ipi_mtx);
199 ira->ira_mask = 1 << cpu | PCPU_GET(cpumask);
201 cpu_ipi_single(cpu, 0, (u_long)func, (u_long)ira);
202 return (&ira->ira_mask);
205 static __inline void *
206 ipi_tlb_context_demap(struct pmap *pm)
208 struct ipi_tlb_args *ita;
214 if ((cpus = (pm->pm_active & PCPU_GET(other_cpus))) == 0) {
219 mtx_lock_spin(&ipi_mtx);
220 ita->ita_mask = cpus | PCPU_GET(cpumask);
222 cpu_ipi_selected(cpus, 0, (u_long)tl_ipi_tlb_context_demap,
224 return (&ita->ita_mask);
227 static __inline void *
228 ipi_tlb_page_demap(struct pmap *pm, vm_offset_t va)
230 struct ipi_tlb_args *ita;
236 if ((cpus = (pm->pm_active & PCPU_GET(other_cpus))) == 0) {
241 mtx_lock_spin(&ipi_mtx);
242 ita->ita_mask = cpus | PCPU_GET(cpumask);
245 cpu_ipi_selected(cpus, 0, (u_long)tl_ipi_tlb_page_demap, (u_long)ita);
246 return (&ita->ita_mask);
249 static __inline void *
250 ipi_tlb_range_demap(struct pmap *pm, vm_offset_t start, vm_offset_t end)
252 struct ipi_tlb_args *ita;
258 if ((cpus = (pm->pm_active & PCPU_GET(other_cpus))) == 0) {
263 mtx_lock_spin(&ipi_mtx);
264 ita->ita_mask = cpus | PCPU_GET(cpumask);
266 ita->ita_start = start;
268 cpu_ipi_selected(cpus, 0, (u_long)tl_ipi_tlb_range_demap,
270 return (&ita->ita_mask);
274 ipi_wait(void *cookie)
276 volatile cpumask_t *mask;
278 if ((mask = cookie) != NULL) {
279 atomic_clear_int(mask, PCPU_GET(cpumask));
282 mtx_unlock_spin(&ipi_mtx);
287 #endif /* _MACHINE_PMAP_H_ && _SYS_MUTEX_H_ */
295 static __inline void *
296 ipi_dcache_page_inval(void *func __unused, vm_paddr_t pa __unused)
302 static __inline void *
303 ipi_icache_page_inval(void *func __unused, vm_paddr_t pa __unused)
309 static __inline void *
310 ipi_rd(u_int cpu __unused, void *func __unused, u_long *val __unused)
316 static __inline void *
317 ipi_tlb_context_demap(struct pmap *pm __unused)
323 static __inline void *
324 ipi_tlb_page_demap(struct pmap *pm __unused, vm_offset_t va __unused)
330 static __inline void *
331 ipi_tlb_range_demap(struct pmap *pm __unused, vm_offset_t start __unused,
332 __unused vm_offset_t end)
339 ipi_wait(void *cookie)
345 tl_ipi_cheetah_dcache_page_inval(void)
351 tl_ipi_spitfire_dcache_page_inval(void)
357 tl_ipi_spitfire_icache_page_inval(void)
366 #endif /* !_MACHINE_SMP_H_ */