2 * Copyright (c) 2008 Hans Petter Selasky. All rights reserved.
3 * Copyright (c) 2004 The NetBSD Foundation, Inc. All rights reserved.
4 * Copyright (c) 2004 Lennart Augustsson. All rights reserved.
5 * Copyright (c) 2004 Charles M. Hannum. All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
32 * The EHCI 0.96 spec can be found at
33 * http://developer.intel.com/technology/usb/download/ehci-r096.pdf
34 * The EHCI 1.0 spec can be found at
35 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf
36 * and the USB 2.0 spec at
37 * http://www.usb.org/developers/docs/usb_20.zip
43 * 1) command failures are not recovered correctly
46 #include <sys/cdefs.h>
47 __FBSDID("$FreeBSD$");
49 #include <sys/stdint.h>
50 #include <sys/stddef.h>
51 #include <sys/param.h>
52 #include <sys/queue.h>
53 #include <sys/types.h>
54 #include <sys/systm.h>
55 #include <sys/kernel.h>
57 #include <sys/linker_set.h>
58 #include <sys/module.h>
60 #include <sys/mutex.h>
61 #include <sys/condvar.h>
62 #include <sys/sysctl.h>
64 #include <sys/unistd.h>
65 #include <sys/callout.h>
66 #include <sys/malloc.h>
69 #include <dev/usb/usb.h>
70 #include <dev/usb/usbdi.h>
72 #define USB_DEBUG_VAR ehcidebug
74 #include <dev/usb/usb_core.h>
75 #include <dev/usb/usb_debug.h>
76 #include <dev/usb/usb_busdma.h>
77 #include <dev/usb/usb_process.h>
78 #include <dev/usb/usb_transfer.h>
79 #include <dev/usb/usb_device.h>
80 #include <dev/usb/usb_hub.h>
81 #include <dev/usb/usb_util.h>
83 #include <dev/usb/usb_controller.h>
84 #include <dev/usb/usb_bus.h>
85 #include <dev/usb/controller/ehci.h>
86 #include <dev/usb/controller/ehcireg.h>
88 #define EHCI_BUS2SC(bus) \
89 ((ehci_softc_t *)(((uint8_t *)(bus)) - \
90 ((uint8_t *)&(((ehci_softc_t *)0)->sc_bus))))
93 static int ehcidebug = 0;
94 static int ehcinohighspeed = 0;
95 static int ehciiaadbug = 0;
96 static int ehcilostintrbug = 0;
98 SYSCTL_NODE(_hw_usb, OID_AUTO, ehci, CTLFLAG_RW, 0, "USB ehci");
99 SYSCTL_INT(_hw_usb_ehci, OID_AUTO, debug, CTLFLAG_RW,
100 &ehcidebug, 0, "Debug level");
101 SYSCTL_INT(_hw_usb_ehci, OID_AUTO, no_hs, CTLFLAG_RW,
102 &ehcinohighspeed, 0, "Disable High Speed USB");
103 SYSCTL_INT(_hw_usb_ehci, OID_AUTO, iaadbug, CTLFLAG_RW,
104 &ehciiaadbug, 0, "Enable doorbell bug workaround");
105 SYSCTL_INT(_hw_usb_ehci, OID_AUTO, lostintrbug, CTLFLAG_RW,
106 &ehcilostintrbug, 0, "Enable lost interrupt bug workaround");
108 TUNABLE_INT("hw.usb.ehci.debug", &ehcidebug);
109 TUNABLE_INT("hw.usb.ehci.no_hs", &ehcinohighspeed);
110 TUNABLE_INT("hw.usb.ehci.iaadbug", &ehciiaadbug);
111 TUNABLE_INT("hw.usb.ehci.lostintrbug", &ehcilostintrbug);
113 static void ehci_dump_regs(ehci_softc_t *sc);
114 static void ehci_dump_sqh(ehci_softc_t *sc, ehci_qh_t *sqh);
118 #define EHCI_INTR_ENDPT 1
120 extern struct usb_bus_methods ehci_bus_methods;
121 extern struct usb_pipe_methods ehci_device_bulk_methods;
122 extern struct usb_pipe_methods ehci_device_ctrl_methods;
123 extern struct usb_pipe_methods ehci_device_intr_methods;
124 extern struct usb_pipe_methods ehci_device_isoc_fs_methods;
125 extern struct usb_pipe_methods ehci_device_isoc_hs_methods;
127 static void ehci_do_poll(struct usb_bus *);
128 static void ehci_device_done(struct usb_xfer *, usb_error_t);
129 static uint8_t ehci_check_transfer(struct usb_xfer *);
130 static void ehci_timeout(void *);
131 static void ehci_poll_timeout(void *);
133 static void ehci_root_intr(ehci_softc_t *sc);
135 struct ehci_std_temp {
137 struct usb_page_cache *pc;
143 uint16_t max_frame_size;
145 uint8_t auto_data_toggle;
146 uint8_t setup_alt_next;
151 ehci_iterate_hw_softc(struct usb_bus *bus, usb_bus_mem_sub_cb_t *cb)
153 ehci_softc_t *sc = EHCI_BUS2SC(bus);
156 cb(bus, &sc->sc_hw.pframes_pc, &sc->sc_hw.pframes_pg,
157 sizeof(uint32_t) * EHCI_FRAMELIST_COUNT, EHCI_FRAMELIST_ALIGN);
159 cb(bus, &sc->sc_hw.terminate_pc, &sc->sc_hw.terminate_pg,
160 sizeof(struct ehci_qh_sub), EHCI_QH_ALIGN);
162 cb(bus, &sc->sc_hw.async_start_pc, &sc->sc_hw.async_start_pg,
163 sizeof(ehci_qh_t), EHCI_QH_ALIGN);
165 for (i = 0; i != EHCI_VIRTUAL_FRAMELIST_COUNT; i++) {
166 cb(bus, sc->sc_hw.intr_start_pc + i,
167 sc->sc_hw.intr_start_pg + i,
168 sizeof(ehci_qh_t), EHCI_QH_ALIGN);
171 for (i = 0; i != EHCI_VIRTUAL_FRAMELIST_COUNT; i++) {
172 cb(bus, sc->sc_hw.isoc_hs_start_pc + i,
173 sc->sc_hw.isoc_hs_start_pg + i,
174 sizeof(ehci_itd_t), EHCI_ITD_ALIGN);
177 for (i = 0; i != EHCI_VIRTUAL_FRAMELIST_COUNT; i++) {
178 cb(bus, sc->sc_hw.isoc_fs_start_pc + i,
179 sc->sc_hw.isoc_fs_start_pg + i,
180 sizeof(ehci_sitd_t), EHCI_SITD_ALIGN);
185 ehci_reset(ehci_softc_t *sc)
190 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
191 for (i = 0; i < 100; i++) {
192 usb_pause_mtx(NULL, hz / 1000);
193 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET;
195 if (sc->sc_flags & (EHCI_SCFLG_SETMODE | EHCI_SCFLG_BIGEMMIO)) {
197 * Force USBMODE as requested. Controllers
198 * may have multiple operating modes.
200 uint32_t usbmode = EOREAD4(sc, EHCI_USBMODE);
201 if (sc->sc_flags & EHCI_SCFLG_SETMODE) {
202 usbmode = (usbmode &~ EHCI_UM_CM) | EHCI_UM_CM_HOST;
203 device_printf(sc->sc_bus.bdev,
204 "set host controller mode\n");
206 if (sc->sc_flags & EHCI_SCFLG_BIGEMMIO) {
207 usbmode = (usbmode &~ EHCI_UM_ES) | EHCI_UM_ES_BE;
208 device_printf(sc->sc_bus.bdev,
209 "set big-endian mode\n");
211 EOWRITE4(sc, EHCI_USBMODE, usbmode);
216 device_printf(sc->sc_bus.bdev, "reset timeout\n");
217 return (USB_ERR_IOERROR);
221 ehci_hcreset(ehci_softc_t *sc)
226 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */
227 for (i = 0; i < 100; i++) {
228 usb_pause_mtx(NULL, hz / 1000);
229 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
235 * Fall through and try reset anyway even though
236 * Table 2-9 in the EHCI spec says this will result
237 * in undefined behavior.
239 device_printf(sc->sc_bus.bdev, "stop timeout\n");
241 return ehci_reset(sc);
245 ehci_init(ehci_softc_t *sc)
247 struct usb_page_search buf_res;
260 usb_callout_init_mtx(&sc->sc_tmo_pcd, &sc->sc_bus.bus_mtx, 0);
261 usb_callout_init_mtx(&sc->sc_tmo_poll, &sc->sc_bus.bus_mtx, 0);
265 sc->sc_flags |= EHCI_SCFLG_IAADBUG;
267 sc->sc_flags |= EHCI_SCFLG_LOSTINTRBUG;
273 sc->sc_offs = EHCI_CAPLENGTH(EREAD4(sc, EHCI_CAPLEN_HCIVERSION));
275 version = EHCI_HCIVERSION(EREAD4(sc, EHCI_CAPLEN_HCIVERSION));
276 device_printf(sc->sc_bus.bdev, "EHCI version %x.%x\n",
277 version >> 8, version & 0xff);
279 sparams = EREAD4(sc, EHCI_HCSPARAMS);
280 DPRINTF("sparams=0x%x\n", sparams);
282 sc->sc_noport = EHCI_HCS_N_PORTS(sparams);
283 cparams = EREAD4(sc, EHCI_HCCPARAMS);
284 DPRINTF("cparams=0x%x\n", cparams);
286 if (EHCI_HCC_64BIT(cparams)) {
287 DPRINTF("HCC uses 64-bit structures\n");
289 /* MUST clear segment register if 64 bit capable */
290 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
292 sc->sc_bus.usbrev = USB_REV_2_0;
294 /* Reset the controller */
295 DPRINTF("%s: resetting\n", device_get_nameunit(sc->sc_bus.bdev));
297 err = ehci_hcreset(sc);
299 device_printf(sc->sc_bus.bdev, "reset timeout\n");
303 * use current frame-list-size selection 0: 1024*4 bytes 1: 512*4
304 * bytes 2: 256*4 bytes 3: unknown
306 if (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD)) == 3) {
307 device_printf(sc->sc_bus.bdev, "invalid frame-list-size\n");
308 return (USB_ERR_IOERROR);
310 /* set up the bus struct */
311 sc->sc_bus.methods = &ehci_bus_methods;
313 sc->sc_eintrs = EHCI_NORMAL_INTRS;
316 struct ehci_qh_sub *qh;
318 usbd_get_page(&sc->sc_hw.terminate_pc, 0, &buf_res);
322 sc->sc_terminate_self = htohc32(sc, buf_res.physaddr);
324 /* init terminate TD */
326 htohc32(sc, EHCI_LINK_TERMINATE);
328 htohc32(sc, EHCI_LINK_TERMINATE);
330 htohc32(sc, EHCI_QTD_HALTED);
333 for (i = 0; i < EHCI_VIRTUAL_FRAMELIST_COUNT; i++) {
336 usbd_get_page(sc->sc_hw.intr_start_pc + i, 0, &buf_res);
340 /* initialize page cache pointer */
342 qh->page_cache = sc->sc_hw.intr_start_pc + i;
344 /* store a pointer to queue head */
346 sc->sc_intr_p_last[i] = qh;
349 htohc32(sc, buf_res.physaddr) |
350 htohc32(sc, EHCI_LINK_QH);
353 htohc32(sc, EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH));
355 htohc32(sc, EHCI_QH_SET_MULT(1));
358 qh->qh_qtd.qtd_next =
359 htohc32(sc, EHCI_LINK_TERMINATE);
360 qh->qh_qtd.qtd_altnext =
361 htohc32(sc, EHCI_LINK_TERMINATE);
362 qh->qh_qtd.qtd_status =
363 htohc32(sc, EHCI_QTD_HALTED);
367 * the QHs are arranged to give poll intervals that are
368 * powers of 2 times 1ms
370 bit = EHCI_VIRTUAL_FRAMELIST_COUNT / 2;
377 y = (x ^ bit) | (bit / 2);
379 qh_x = sc->sc_intr_p_last[x];
380 qh_y = sc->sc_intr_p_last[y];
383 * the next QH has half the poll interval
385 qh_x->qh_link = qh_y->qh_self;
395 qh = sc->sc_intr_p_last[0];
397 /* the last (1ms) QH terminates */
398 qh->qh_link = htohc32(sc, EHCI_LINK_TERMINATE);
400 for (i = 0; i < EHCI_VIRTUAL_FRAMELIST_COUNT; i++) {
404 usbd_get_page(sc->sc_hw.isoc_fs_start_pc + i, 0, &buf_res);
406 sitd = buf_res.buffer;
408 /* initialize page cache pointer */
410 sitd->page_cache = sc->sc_hw.isoc_fs_start_pc + i;
412 /* store a pointer to the transfer descriptor */
414 sc->sc_isoc_fs_p_last[i] = sitd;
416 /* initialize full speed isochronous */
419 htohc32(sc, buf_res.physaddr) |
420 htohc32(sc, EHCI_LINK_SITD);
423 htohc32(sc, EHCI_LINK_TERMINATE);
426 sc->sc_intr_p_last[i | (EHCI_VIRTUAL_FRAMELIST_COUNT / 2)]->qh_self;
429 usbd_get_page(sc->sc_hw.isoc_hs_start_pc + i, 0, &buf_res);
431 itd = buf_res.buffer;
433 /* initialize page cache pointer */
435 itd->page_cache = sc->sc_hw.isoc_hs_start_pc + i;
437 /* store a pointer to the transfer descriptor */
439 sc->sc_isoc_hs_p_last[i] = itd;
441 /* initialize high speed isochronous */
444 htohc32(sc, buf_res.physaddr) |
445 htohc32(sc, EHCI_LINK_ITD);
451 usbd_get_page(&sc->sc_hw.pframes_pc, 0, &buf_res);
456 pframes = buf_res.buffer;
460 * pframes -> high speed isochronous ->
461 * full speed isochronous -> interrupt QH's
463 for (i = 0; i < EHCI_FRAMELIST_COUNT; i++) {
464 pframes[i] = sc->sc_isoc_hs_p_last
465 [i & (EHCI_VIRTUAL_FRAMELIST_COUNT - 1)]->itd_self;
468 /* setup sync list pointer */
469 EOWRITE4(sc, EHCI_PERIODICLISTBASE, buf_res.physaddr);
471 usbd_get_page(&sc->sc_hw.async_start_pc, 0, &buf_res);
479 /* initialize page cache pointer */
481 qh->page_cache = &sc->sc_hw.async_start_pc;
483 /* store a pointer to the queue head */
485 sc->sc_async_p_last = qh;
487 /* init dummy QH that starts the async list */
490 htohc32(sc, buf_res.physaddr) |
491 htohc32(sc, EHCI_LINK_QH);
495 htohc32(sc, EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL);
496 qh->qh_endphub = htohc32(sc, EHCI_QH_SET_MULT(1));
497 qh->qh_link = qh->qh_self;
500 /* fill the overlay qTD */
501 qh->qh_qtd.qtd_next = htohc32(sc, EHCI_LINK_TERMINATE);
502 qh->qh_qtd.qtd_altnext = htohc32(sc, EHCI_LINK_TERMINATE);
503 qh->qh_qtd.qtd_status = htohc32(sc, EHCI_QTD_HALTED);
505 /* flush all cache into memory */
507 usb_bus_mem_flush_all(&sc->sc_bus, &ehci_iterate_hw_softc);
511 ehci_dump_sqh(sc, sc->sc_async_p_last);
515 /* setup async list pointer */
516 EOWRITE4(sc, EHCI_ASYNCLISTADDR, buf_res.physaddr | EHCI_LINK_QH);
519 /* enable interrupts */
520 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
522 /* turn on controller */
523 EOWRITE4(sc, EHCI_USBCMD,
524 EHCI_CMD_ITC_1 | /* 1 microframes interrupt delay */
525 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) |
530 /* Take over port ownership */
531 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF);
533 for (i = 0; i < 100; i++) {
534 usb_pause_mtx(NULL, hz / 1000);
535 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
541 device_printf(sc->sc_bus.bdev, "run timeout\n");
542 return (USB_ERR_IOERROR);
546 /* catch any lost interrupts */
547 ehci_do_poll(&sc->sc_bus);
553 * shut down the controller when the system is going down
556 ehci_detach(ehci_softc_t *sc)
558 USB_BUS_LOCK(&sc->sc_bus);
560 usb_callout_stop(&sc->sc_tmo_pcd);
561 usb_callout_stop(&sc->sc_tmo_poll);
563 EOWRITE4(sc, EHCI_USBINTR, 0);
564 USB_BUS_UNLOCK(&sc->sc_bus);
566 if (ehci_hcreset(sc)) {
567 DPRINTF("reset failed!\n");
570 /* XXX let stray task complete */
571 usb_pause_mtx(NULL, hz / 20);
573 usb_callout_drain(&sc->sc_tmo_pcd);
574 usb_callout_drain(&sc->sc_tmo_poll);
578 ehci_suspend(ehci_softc_t *sc)
584 USB_BUS_LOCK(&sc->sc_bus);
586 for (i = 1; i <= sc->sc_noport; i++) {
587 cmd = EOREAD4(sc, EHCI_PORTSC(i));
588 if (((cmd & EHCI_PS_PO) == 0) &&
589 ((cmd & EHCI_PS_PE) == EHCI_PS_PE)) {
590 EOWRITE4(sc, EHCI_PORTSC(i),
595 sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD);
597 cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE);
598 EOWRITE4(sc, EHCI_USBCMD, cmd);
600 for (i = 0; i < 100; i++) {
601 hcr = EOREAD4(sc, EHCI_USBSTS) &
602 (EHCI_STS_ASS | EHCI_STS_PSS);
607 usb_pause_mtx(&sc->sc_bus.bus_mtx, hz / 1000);
611 device_printf(sc->sc_bus.bdev, "reset timeout\n");
614 EOWRITE4(sc, EHCI_USBCMD, cmd);
616 for (i = 0; i < 100; i++) {
617 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
618 if (hcr == EHCI_STS_HCH) {
621 usb_pause_mtx(&sc->sc_bus.bus_mtx, hz / 1000);
624 if (hcr != EHCI_STS_HCH) {
625 device_printf(sc->sc_bus.bdev,
628 USB_BUS_UNLOCK(&sc->sc_bus);
632 ehci_resume(ehci_softc_t *sc)
634 struct usb_page_search buf_res;
639 USB_BUS_LOCK(&sc->sc_bus);
641 /* restore things in case the bios doesn't */
642 EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
644 usbd_get_page(&sc->sc_hw.pframes_pc, 0, &buf_res);
645 EOWRITE4(sc, EHCI_PERIODICLISTBASE, buf_res.physaddr);
647 usbd_get_page(&sc->sc_hw.async_start_pc, 0, &buf_res);
648 EOWRITE4(sc, EHCI_ASYNCLISTADDR, buf_res.physaddr | EHCI_LINK_QH);
650 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
653 for (i = 1; i <= sc->sc_noport; i++) {
654 cmd = EOREAD4(sc, EHCI_PORTSC(i));
655 if (((cmd & EHCI_PS_PO) == 0) &&
656 ((cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP)) {
657 EOWRITE4(sc, EHCI_PORTSC(i),
664 usb_pause_mtx(&sc->sc_bus.bus_mtx,
665 USB_MS_TO_TICKS(USB_RESUME_WAIT));
667 for (i = 1; i <= sc->sc_noport; i++) {
668 cmd = EOREAD4(sc, EHCI_PORTSC(i));
669 if (((cmd & EHCI_PS_PO) == 0) &&
670 ((cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP)) {
671 EOWRITE4(sc, EHCI_PORTSC(i),
676 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd);
678 for (i = 0; i < 100; i++) {
679 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
680 if (hcr != EHCI_STS_HCH) {
683 usb_pause_mtx(&sc->sc_bus.bus_mtx, hz / 1000);
685 if (hcr == EHCI_STS_HCH) {
686 device_printf(sc->sc_bus.bdev, "config timeout\n");
689 USB_BUS_UNLOCK(&sc->sc_bus);
692 USB_MS_TO_TICKS(USB_RESUME_WAIT));
694 /* catch any lost interrupts */
695 ehci_do_poll(&sc->sc_bus);
699 ehci_shutdown(ehci_softc_t *sc)
701 DPRINTF("stopping the HC\n");
703 if (ehci_hcreset(sc)) {
704 DPRINTF("reset failed!\n");
710 ehci_dump_regs(ehci_softc_t *sc)
714 i = EOREAD4(sc, EHCI_USBCMD);
715 printf("cmd=0x%08x\n", i);
717 if (i & EHCI_CMD_ITC_1)
718 printf(" EHCI_CMD_ITC_1\n");
719 if (i & EHCI_CMD_ITC_2)
720 printf(" EHCI_CMD_ITC_2\n");
721 if (i & EHCI_CMD_ITC_4)
722 printf(" EHCI_CMD_ITC_4\n");
723 if (i & EHCI_CMD_ITC_8)
724 printf(" EHCI_CMD_ITC_8\n");
725 if (i & EHCI_CMD_ITC_16)
726 printf(" EHCI_CMD_ITC_16\n");
727 if (i & EHCI_CMD_ITC_32)
728 printf(" EHCI_CMD_ITC_32\n");
729 if (i & EHCI_CMD_ITC_64)
730 printf(" EHCI_CMD_ITC_64\n");
731 if (i & EHCI_CMD_ASPME)
732 printf(" EHCI_CMD_ASPME\n");
733 if (i & EHCI_CMD_ASPMC)
734 printf(" EHCI_CMD_ASPMC\n");
735 if (i & EHCI_CMD_LHCR)
736 printf(" EHCI_CMD_LHCR\n");
737 if (i & EHCI_CMD_IAAD)
738 printf(" EHCI_CMD_IAAD\n");
739 if (i & EHCI_CMD_ASE)
740 printf(" EHCI_CMD_ASE\n");
741 if (i & EHCI_CMD_PSE)
742 printf(" EHCI_CMD_PSE\n");
743 if (i & EHCI_CMD_FLS_M)
744 printf(" EHCI_CMD_FLS_M\n");
745 if (i & EHCI_CMD_HCRESET)
746 printf(" EHCI_CMD_HCRESET\n");
748 printf(" EHCI_CMD_RS\n");
750 i = EOREAD4(sc, EHCI_USBSTS);
752 printf("sts=0x%08x\n", i);
754 if (i & EHCI_STS_ASS)
755 printf(" EHCI_STS_ASS\n");
756 if (i & EHCI_STS_PSS)
757 printf(" EHCI_STS_PSS\n");
758 if (i & EHCI_STS_REC)
759 printf(" EHCI_STS_REC\n");
760 if (i & EHCI_STS_HCH)
761 printf(" EHCI_STS_HCH\n");
762 if (i & EHCI_STS_IAA)
763 printf(" EHCI_STS_IAA\n");
764 if (i & EHCI_STS_HSE)
765 printf(" EHCI_STS_HSE\n");
766 if (i & EHCI_STS_FLR)
767 printf(" EHCI_STS_FLR\n");
768 if (i & EHCI_STS_PCD)
769 printf(" EHCI_STS_PCD\n");
770 if (i & EHCI_STS_ERRINT)
771 printf(" EHCI_STS_ERRINT\n");
772 if (i & EHCI_STS_INT)
773 printf(" EHCI_STS_INT\n");
775 printf("ien=0x%08x\n",
776 EOREAD4(sc, EHCI_USBINTR));
777 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n",
778 EOREAD4(sc, EHCI_FRINDEX),
779 EOREAD4(sc, EHCI_CTRLDSSEGMENT),
780 EOREAD4(sc, EHCI_PERIODICLISTBASE),
781 EOREAD4(sc, EHCI_ASYNCLISTADDR));
782 for (i = 1; i <= sc->sc_noport; i++) {
783 printf("port %d status=0x%08x\n", i,
784 EOREAD4(sc, EHCI_PORTSC(i)));
789 ehci_dump_link(ehci_softc_t *sc, uint32_t link, int type)
791 link = hc32toh(sc, link);
792 printf("0x%08x", link);
793 if (link & EHCI_LINK_TERMINATE)
798 switch (EHCI_LINK_TYPE(link)) {
818 ehci_dump_qtd(ehci_softc_t *sc, ehci_qtd_t *qtd)
823 ehci_dump_link(sc, qtd->qtd_next, 0);
825 ehci_dump_link(sc, qtd->qtd_altnext, 0);
827 s = hc32toh(sc, qtd->qtd_status);
828 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n",
829 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s),
830 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s));
831 printf(" cerr=%d pid=%d stat=%s%s%s%s%s%s%s%s\n",
832 EHCI_QTD_GET_CERR(s), EHCI_QTD_GET_PID(s),
833 (s & EHCI_QTD_ACTIVE) ? "ACTIVE" : "NOT_ACTIVE",
834 (s & EHCI_QTD_HALTED) ? "-HALTED" : "",
835 (s & EHCI_QTD_BUFERR) ? "-BUFERR" : "",
836 (s & EHCI_QTD_BABBLE) ? "-BABBLE" : "",
837 (s & EHCI_QTD_XACTERR) ? "-XACTERR" : "",
838 (s & EHCI_QTD_MISSEDMICRO) ? "-MISSED" : "",
839 (s & EHCI_QTD_SPLITXSTATE) ? "-SPLIT" : "",
840 (s & EHCI_QTD_PINGSTATE) ? "-PING" : "");
842 for (s = 0; s < 5; s++) {
843 printf(" buffer[%d]=0x%08x\n", s,
844 hc32toh(sc, qtd->qtd_buffer[s]));
846 for (s = 0; s < 5; s++) {
847 printf(" buffer_hi[%d]=0x%08x\n", s,
848 hc32toh(sc, qtd->qtd_buffer_hi[s]));
853 ehci_dump_sqtd(ehci_softc_t *sc, ehci_qtd_t *sqtd)
857 usb_pc_cpu_invalidate(sqtd->page_cache);
858 printf("QTD(%p) at 0x%08x:\n", sqtd, hc32toh(sc, sqtd->qtd_self));
859 ehci_dump_qtd(sc, sqtd);
860 temp = (sqtd->qtd_next & htohc32(sc, EHCI_LINK_TERMINATE)) ? 1 : 0;
865 ehci_dump_sqtds(ehci_softc_t *sc, ehci_qtd_t *sqtd)
871 for (i = 0; sqtd && (i < 20) && !stop; sqtd = sqtd->obj_next, i++) {
872 stop = ehci_dump_sqtd(sc, sqtd);
875 printf("dump aborted, too many TDs\n");
880 ehci_dump_sqh(ehci_softc_t *sc, ehci_qh_t *qh)
885 usb_pc_cpu_invalidate(qh->page_cache);
886 printf("QH(%p) at 0x%08x:\n", qh, hc32toh(sc, qh->qh_self) & ~0x1F);
888 ehci_dump_link(sc, qh->qh_link, 1);
890 endp = hc32toh(sc, qh->qh_endp);
891 printf(" endp=0x%08x\n", endp);
892 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n",
893 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp),
894 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp),
895 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp));
896 printf(" mpl=0x%x ctl=%d nrl=%d\n",
897 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp),
898 EHCI_QH_GET_NRL(endp));
899 endphub = hc32toh(sc, qh->qh_endphub);
900 printf(" endphub=0x%08x\n", endphub);
901 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n",
902 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub),
903 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub),
904 EHCI_QH_GET_MULT(endphub));
906 ehci_dump_link(sc, qh->qh_curqtd, 0);
908 printf("Overlay qTD:\n");
909 ehci_dump_qtd(sc, (void *)&qh->qh_qtd);
913 ehci_dump_sitd(ehci_softc_t *sc, ehci_sitd_t *sitd)
915 usb_pc_cpu_invalidate(sitd->page_cache);
916 printf("SITD(%p) at 0x%08x\n", sitd, hc32toh(sc, sitd->sitd_self) & ~0x1F);
917 printf(" next=0x%08x\n", hc32toh(sc, sitd->sitd_next));
918 printf(" portaddr=0x%08x dir=%s addr=%d endpt=0x%x port=0x%x huba=0x%x\n",
919 hc32toh(sc, sitd->sitd_portaddr),
920 (sitd->sitd_portaddr & htohc32(sc, EHCI_SITD_SET_DIR_IN))
922 EHCI_SITD_GET_ADDR(hc32toh(sc, sitd->sitd_portaddr)),
923 EHCI_SITD_GET_ENDPT(hc32toh(sc, sitd->sitd_portaddr)),
924 EHCI_SITD_GET_PORT(hc32toh(sc, sitd->sitd_portaddr)),
925 EHCI_SITD_GET_HUBA(hc32toh(sc, sitd->sitd_portaddr)));
926 printf(" mask=0x%08x\n", hc32toh(sc, sitd->sitd_mask));
927 printf(" status=0x%08x <%s> len=0x%x\n", hc32toh(sc, sitd->sitd_status),
928 (sitd->sitd_status & htohc32(sc, EHCI_SITD_ACTIVE)) ? "ACTIVE" : "",
929 EHCI_SITD_GET_LEN(hc32toh(sc, sitd->sitd_status)));
930 printf(" back=0x%08x, bp=0x%08x,0x%08x,0x%08x,0x%08x\n",
931 hc32toh(sc, sitd->sitd_back),
932 hc32toh(sc, sitd->sitd_bp[0]),
933 hc32toh(sc, sitd->sitd_bp[1]),
934 hc32toh(sc, sitd->sitd_bp_hi[0]),
935 hc32toh(sc, sitd->sitd_bp_hi[1]));
939 ehci_dump_itd(ehci_softc_t *sc, ehci_itd_t *itd)
941 usb_pc_cpu_invalidate(itd->page_cache);
942 printf("ITD(%p) at 0x%08x\n", itd, hc32toh(sc, itd->itd_self) & ~0x1F);
943 printf(" next=0x%08x\n", hc32toh(sc, itd->itd_next));
944 printf(" status[0]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[0]),
945 (itd->itd_status[0] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
946 printf(" status[1]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[1]),
947 (itd->itd_status[1] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
948 printf(" status[2]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[2]),
949 (itd->itd_status[2] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
950 printf(" status[3]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[3]),
951 (itd->itd_status[3] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
952 printf(" status[4]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[4]),
953 (itd->itd_status[4] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
954 printf(" status[5]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[5]),
955 (itd->itd_status[5] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
956 printf(" status[6]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[6]),
957 (itd->itd_status[6] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
958 printf(" status[7]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[7]),
959 (itd->itd_status[7] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
960 printf(" bp[0]=0x%08x\n", hc32toh(sc, itd->itd_bp[0]));
961 printf(" addr=0x%02x; endpt=0x%01x\n",
962 EHCI_ITD_GET_ADDR(hc32toh(sc, itd->itd_bp[0])),
963 EHCI_ITD_GET_ENDPT(hc32toh(sc, itd->itd_bp[0])));
964 printf(" bp[1]=0x%08x\n", hc32toh(sc, itd->itd_bp[1]));
965 printf(" dir=%s; mpl=0x%02x\n",
966 (hc32toh(sc, itd->itd_bp[1]) & EHCI_ITD_SET_DIR_IN) ? "in" : "out",
967 EHCI_ITD_GET_MPL(hc32toh(sc, itd->itd_bp[1])));
968 printf(" bp[2..6]=0x%08x,0x%08x,0x%08x,0x%08x,0x%08x\n",
969 hc32toh(sc, itd->itd_bp[2]),
970 hc32toh(sc, itd->itd_bp[3]),
971 hc32toh(sc, itd->itd_bp[4]),
972 hc32toh(sc, itd->itd_bp[5]),
973 hc32toh(sc, itd->itd_bp[6]));
974 printf(" bp_hi=0x%08x,0x%08x,0x%08x,0x%08x,\n"
975 " 0x%08x,0x%08x,0x%08x\n",
976 hc32toh(sc, itd->itd_bp_hi[0]),
977 hc32toh(sc, itd->itd_bp_hi[1]),
978 hc32toh(sc, itd->itd_bp_hi[2]),
979 hc32toh(sc, itd->itd_bp_hi[3]),
980 hc32toh(sc, itd->itd_bp_hi[4]),
981 hc32toh(sc, itd->itd_bp_hi[5]),
982 hc32toh(sc, itd->itd_bp_hi[6]));
986 ehci_dump_isoc(ehci_softc_t *sc)
993 pos = (EOREAD4(sc, EHCI_FRINDEX) / 8) &
994 (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
996 printf("%s: isochronous dump from frame 0x%03x:\n",
999 itd = sc->sc_isoc_hs_p_last[pos];
1000 sitd = sc->sc_isoc_fs_p_last[pos];
1002 while (itd && max && max--) {
1003 ehci_dump_itd(sc, itd);
1007 while (sitd && max && max--) {
1008 ehci_dump_sitd(sc, sitd);
1016 ehci_transfer_intr_enqueue(struct usb_xfer *xfer)
1018 /* check for early completion */
1019 if (ehci_check_transfer(xfer)) {
1022 /* put transfer on interrupt queue */
1023 usbd_transfer_enqueue(&xfer->xroot->bus->intr_q, xfer);
1025 /* start timeout, if any */
1026 if (xfer->timeout != 0) {
1027 usbd_transfer_timeout_ms(xfer, &ehci_timeout, xfer->timeout);
1031 #define EHCI_APPEND_FS_TD(std,last) (last) = _ehci_append_fs_td(std,last)
1032 static ehci_sitd_t *
1033 _ehci_append_fs_td(ehci_sitd_t *std, ehci_sitd_t *last)
1035 DPRINTFN(11, "%p to %p\n", std, last);
1037 /* (sc->sc_bus.mtx) must be locked */
1039 std->next = last->next;
1040 std->sitd_next = last->sitd_next;
1044 usb_pc_cpu_flush(std->page_cache);
1047 * the last->next->prev is never followed: std->next->prev = std;
1050 last->sitd_next = std->sitd_self;
1052 usb_pc_cpu_flush(last->page_cache);
1057 #define EHCI_APPEND_HS_TD(std,last) (last) = _ehci_append_hs_td(std,last)
1059 _ehci_append_hs_td(ehci_itd_t *std, ehci_itd_t *last)
1061 DPRINTFN(11, "%p to %p\n", std, last);
1063 /* (sc->sc_bus.mtx) must be locked */
1065 std->next = last->next;
1066 std->itd_next = last->itd_next;
1070 usb_pc_cpu_flush(std->page_cache);
1073 * the last->next->prev is never followed: std->next->prev = std;
1076 last->itd_next = std->itd_self;
1078 usb_pc_cpu_flush(last->page_cache);
1083 #define EHCI_APPEND_QH(sqh,last) (last) = _ehci_append_qh(sqh,last)
1085 _ehci_append_qh(ehci_qh_t *sqh, ehci_qh_t *last)
1087 DPRINTFN(11, "%p to %p\n", sqh, last);
1089 if (sqh->prev != NULL) {
1090 /* should not happen */
1091 DPRINTFN(0, "QH already linked!\n");
1094 /* (sc->sc_bus.mtx) must be locked */
1096 sqh->next = last->next;
1097 sqh->qh_link = last->qh_link;
1101 usb_pc_cpu_flush(sqh->page_cache);
1104 * the last->next->prev is never followed: sqh->next->prev = sqh;
1108 last->qh_link = sqh->qh_self;
1110 usb_pc_cpu_flush(last->page_cache);
1115 #define EHCI_REMOVE_FS_TD(std,last) (last) = _ehci_remove_fs_td(std,last)
1116 static ehci_sitd_t *
1117 _ehci_remove_fs_td(ehci_sitd_t *std, ehci_sitd_t *last)
1119 DPRINTFN(11, "%p from %p\n", std, last);
1121 /* (sc->sc_bus.mtx) must be locked */
1123 std->prev->next = std->next;
1124 std->prev->sitd_next = std->sitd_next;
1126 usb_pc_cpu_flush(std->prev->page_cache);
1129 std->next->prev = std->prev;
1130 usb_pc_cpu_flush(std->next->page_cache);
1132 return ((last == std) ? std->prev : last);
1135 #define EHCI_REMOVE_HS_TD(std,last) (last) = _ehci_remove_hs_td(std,last)
1137 _ehci_remove_hs_td(ehci_itd_t *std, ehci_itd_t *last)
1139 DPRINTFN(11, "%p from %p\n", std, last);
1141 /* (sc->sc_bus.mtx) must be locked */
1143 std->prev->next = std->next;
1144 std->prev->itd_next = std->itd_next;
1146 usb_pc_cpu_flush(std->prev->page_cache);
1149 std->next->prev = std->prev;
1150 usb_pc_cpu_flush(std->next->page_cache);
1152 return ((last == std) ? std->prev : last);
1155 #define EHCI_REMOVE_QH(sqh,last) (last) = _ehci_remove_qh(sqh,last)
1157 _ehci_remove_qh(ehci_qh_t *sqh, ehci_qh_t *last)
1159 DPRINTFN(11, "%p from %p\n", sqh, last);
1161 /* (sc->sc_bus.mtx) must be locked */
1163 /* only remove if not removed from a queue */
1166 sqh->prev->next = sqh->next;
1167 sqh->prev->qh_link = sqh->qh_link;
1169 usb_pc_cpu_flush(sqh->prev->page_cache);
1172 sqh->next->prev = sqh->prev;
1173 usb_pc_cpu_flush(sqh->next->page_cache);
1175 last = ((last == sqh) ? sqh->prev : last);
1179 usb_pc_cpu_flush(sqh->page_cache);
1185 ehci_non_isoc_done_sub(struct usb_xfer *xfer)
1187 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
1189 ehci_qtd_t *td_alt_next;
1193 td = xfer->td_transfer_cache;
1194 td_alt_next = td->alt_next;
1196 if (xfer->aframes != xfer->nframes) {
1197 usbd_xfer_set_frame_len(xfer, xfer->aframes, 0);
1201 usb_pc_cpu_invalidate(td->page_cache);
1202 status = hc32toh(sc, td->qtd_status);
1204 len = EHCI_QTD_GET_BYTES(status);
1207 * Verify the status length and
1208 * add the length to "frlengths[]":
1210 if (len > td->len) {
1211 /* should not happen */
1212 DPRINTF("Invalid status length, "
1213 "0x%04x/0x%04x bytes\n", len, td->len);
1214 status |= EHCI_QTD_HALTED;
1215 } else if (xfer->aframes != xfer->nframes) {
1216 xfer->frlengths[xfer->aframes] += td->len - len;
1218 /* Check for last transfer */
1219 if (((void *)td) == xfer->td_transfer_last) {
1223 /* Check for transfer error */
1224 if (status & EHCI_QTD_HALTED) {
1225 /* the transfer is finished */
1229 /* Check for short transfer */
1231 if (xfer->flags_int.short_frames_ok) {
1232 /* follow alt next */
1235 /* the transfer is finished */
1242 if (td->alt_next != td_alt_next) {
1243 /* this USB frame is complete */
1248 /* update transfer cache */
1250 xfer->td_transfer_cache = td;
1253 if (status & EHCI_QTD_STATERRS) {
1254 DPRINTFN(11, "error, addr=%d, endpt=0x%02x, frame=0x%02x"
1255 "status=%s%s%s%s%s%s%s%s\n",
1256 xfer->address, xfer->endpointno, xfer->aframes,
1257 (status & EHCI_QTD_ACTIVE) ? "[ACTIVE]" : "[NOT_ACTIVE]",
1258 (status & EHCI_QTD_HALTED) ? "[HALTED]" : "",
1259 (status & EHCI_QTD_BUFERR) ? "[BUFERR]" : "",
1260 (status & EHCI_QTD_BABBLE) ? "[BABBLE]" : "",
1261 (status & EHCI_QTD_XACTERR) ? "[XACTERR]" : "",
1262 (status & EHCI_QTD_MISSEDMICRO) ? "[MISSED]" : "",
1263 (status & EHCI_QTD_SPLITXSTATE) ? "[SPLIT]" : "",
1264 (status & EHCI_QTD_PINGSTATE) ? "[PING]" : "");
1268 return ((status & EHCI_QTD_HALTED) ?
1269 USB_ERR_STALLED : USB_ERR_NORMAL_COMPLETION);
1273 ehci_non_isoc_done(struct usb_xfer *xfer)
1275 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
1278 usb_error_t err = 0;
1280 DPRINTFN(13, "xfer=%p endpoint=%p transfer done\n",
1281 xfer, xfer->endpoint);
1284 if (ehcidebug > 10) {
1285 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
1287 ehci_dump_sqtds(sc, xfer->td_transfer_first);
1291 /* extract data toggle directly from the QH's overlay area */
1293 qh = xfer->qh_start[xfer->flags_int.curr_dma_set];
1295 usb_pc_cpu_invalidate(qh->page_cache);
1297 status = hc32toh(sc, qh->qh_qtd.qtd_status);
1299 xfer->endpoint->toggle_next =
1300 (status & EHCI_QTD_TOGGLE_MASK) ? 1 : 0;
1304 xfer->td_transfer_cache = xfer->td_transfer_first;
1306 if (xfer->flags_int.control_xfr) {
1308 if (xfer->flags_int.control_hdr) {
1310 err = ehci_non_isoc_done_sub(xfer);
1314 if (xfer->td_transfer_cache == NULL) {
1318 while (xfer->aframes != xfer->nframes) {
1320 err = ehci_non_isoc_done_sub(xfer);
1323 if (xfer->td_transfer_cache == NULL) {
1328 if (xfer->flags_int.control_xfr &&
1329 !xfer->flags_int.control_act) {
1331 err = ehci_non_isoc_done_sub(xfer);
1334 ehci_device_done(xfer, err);
1337 /*------------------------------------------------------------------------*
1338 * ehci_check_transfer
1341 * 0: USB transfer is not finished
1342 * Else: USB transfer is finished
1343 *------------------------------------------------------------------------*/
1345 ehci_check_transfer(struct usb_xfer *xfer)
1347 struct usb_pipe_methods *methods = xfer->endpoint->methods;
1348 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
1352 DPRINTFN(13, "xfer=%p checking transfer\n", xfer);
1354 if (methods == &ehci_device_isoc_fs_methods) {
1357 /* isochronous full speed transfer */
1359 td = xfer->td_transfer_last;
1360 usb_pc_cpu_invalidate(td->page_cache);
1361 status = hc32toh(sc, td->sitd_status);
1363 /* also check if first is complete */
1365 td = xfer->td_transfer_first;
1366 usb_pc_cpu_invalidate(td->page_cache);
1367 status |= hc32toh(sc, td->sitd_status);
1369 if (!(status & EHCI_SITD_ACTIVE)) {
1370 ehci_device_done(xfer, USB_ERR_NORMAL_COMPLETION);
1373 } else if (methods == &ehci_device_isoc_hs_methods) {
1376 /* isochronous high speed transfer */
1378 /* check last transfer */
1379 td = xfer->td_transfer_last;
1380 usb_pc_cpu_invalidate(td->page_cache);
1381 status = td->itd_status[0];
1382 status |= td->itd_status[1];
1383 status |= td->itd_status[2];
1384 status |= td->itd_status[3];
1385 status |= td->itd_status[4];
1386 status |= td->itd_status[5];
1387 status |= td->itd_status[6];
1388 status |= td->itd_status[7];
1390 /* also check first transfer */
1391 td = xfer->td_transfer_first;
1392 usb_pc_cpu_invalidate(td->page_cache);
1393 status |= td->itd_status[0];
1394 status |= td->itd_status[1];
1395 status |= td->itd_status[2];
1396 status |= td->itd_status[3];
1397 status |= td->itd_status[4];
1398 status |= td->itd_status[5];
1399 status |= td->itd_status[6];
1400 status |= td->itd_status[7];
1402 /* if no transactions are active we continue */
1403 if (!(status & htohc32(sc, EHCI_ITD_ACTIVE))) {
1404 ehci_device_done(xfer, USB_ERR_NORMAL_COMPLETION);
1411 /* non-isochronous transfer */
1414 * check whether there is an error somewhere in the middle,
1415 * or whether there was a short packet (SPD and not ACTIVE)
1417 td = xfer->td_transfer_cache;
1419 qh = xfer->qh_start[xfer->flags_int.curr_dma_set];
1421 usb_pc_cpu_invalidate(qh->page_cache);
1423 status = hc32toh(sc, qh->qh_qtd.qtd_status);
1424 if (status & EHCI_QTD_ACTIVE) {
1425 /* transfer is pending */
1430 usb_pc_cpu_invalidate(td->page_cache);
1431 status = hc32toh(sc, td->qtd_status);
1434 * Check if there is an active TD which
1435 * indicates that the transfer isn't done.
1437 if (status & EHCI_QTD_ACTIVE) {
1439 xfer->td_transfer_cache = td;
1443 * last transfer descriptor makes the transfer done
1445 if (((void *)td) == xfer->td_transfer_last) {
1449 * any kind of error makes the transfer done
1451 if (status & EHCI_QTD_HALTED) {
1455 * if there is no alternate next transfer, a short
1456 * packet also makes the transfer done
1458 if (EHCI_QTD_GET_BYTES(status)) {
1459 if (xfer->flags_int.short_frames_ok) {
1460 /* follow alt next */
1466 /* transfer is done */
1471 ehci_non_isoc_done(xfer);
1476 DPRINTFN(13, "xfer=%p is still active\n", xfer);
1484 ehci_pcd_enable(ehci_softc_t *sc)
1486 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1488 sc->sc_eintrs |= EHCI_STS_PCD;
1489 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
1491 /* acknowledge any PCD interrupt */
1492 EOWRITE4(sc, EHCI_USBSTS, EHCI_STS_PCD);
1498 ehci_interrupt_poll(ehci_softc_t *sc)
1500 struct usb_xfer *xfer;
1503 TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
1505 * check if transfer is transferred
1507 if (ehci_check_transfer(xfer)) {
1508 /* queue has been modified */
1515 * Some EHCI chips from VIA / ATI seem to trigger interrupts before
1516 * writing back the qTD status, or miss signalling occasionally under
1517 * heavy load. If the host machine is too fast, we can miss
1518 * transaction completion - when we scan the active list the
1519 * transaction still seems to be active. This generally exhibits
1520 * itself as a umass stall that never recovers.
1522 * We work around this behaviour by setting up this callback after any
1523 * softintr that completes with transactions still pending, giving us
1524 * another chance to check for completion after the writeback has
1528 ehci_poll_timeout(void *arg)
1530 ehci_softc_t *sc = arg;
1533 ehci_interrupt_poll(sc);
1536 /*------------------------------------------------------------------------*
1537 * ehci_interrupt - EHCI interrupt handler
1539 * NOTE: Do not access "sc->sc_bus.bdev" inside the interrupt handler,
1540 * hence the interrupt handler will be setup before "sc->sc_bus.bdev"
1542 *------------------------------------------------------------------------*/
1544 ehci_interrupt(ehci_softc_t *sc)
1548 USB_BUS_LOCK(&sc->sc_bus);
1550 DPRINTFN(16, "real interrupt\n");
1553 if (ehcidebug > 15) {
1558 status = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
1560 /* the interrupt was not for us */
1563 if (!(status & sc->sc_eintrs)) {
1566 EOWRITE4(sc, EHCI_USBSTS, status); /* acknowledge */
1568 status &= sc->sc_eintrs;
1570 if (status & EHCI_STS_HSE) {
1571 printf("%s: unrecoverable error, "
1572 "controller halted\n", __FUNCTION__);
1578 if (status & EHCI_STS_PCD) {
1580 * Disable PCD interrupt for now, because it will be
1581 * on until the port has been reset.
1583 sc->sc_eintrs &= ~EHCI_STS_PCD;
1584 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
1588 /* do not allow RHSC interrupts > 1 per second */
1589 usb_callout_reset(&sc->sc_tmo_pcd, hz,
1590 (void *)&ehci_pcd_enable, sc);
1592 status &= ~(EHCI_STS_INT | EHCI_STS_ERRINT | EHCI_STS_PCD | EHCI_STS_IAA);
1595 /* block unprocessed interrupts */
1596 sc->sc_eintrs &= ~status;
1597 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
1598 printf("%s: blocking interrupts 0x%x\n", __FUNCTION__, status);
1600 /* poll all the USB transfers */
1601 ehci_interrupt_poll(sc);
1603 if (sc->sc_flags & EHCI_SCFLG_LOSTINTRBUG) {
1604 usb_callout_reset(&sc->sc_tmo_poll, hz / 128,
1605 (void *)&ehci_poll_timeout, sc);
1609 USB_BUS_UNLOCK(&sc->sc_bus);
1613 * called when a request does not complete
1616 ehci_timeout(void *arg)
1618 struct usb_xfer *xfer = arg;
1620 DPRINTF("xfer=%p\n", xfer);
1622 USB_BUS_LOCK_ASSERT(xfer->xroot->bus, MA_OWNED);
1624 /* transfer is transferred */
1625 ehci_device_done(xfer, USB_ERR_TIMEOUT);
1629 ehci_do_poll(struct usb_bus *bus)
1631 ehci_softc_t *sc = EHCI_BUS2SC(bus);
1633 USB_BUS_LOCK(&sc->sc_bus);
1634 ehci_interrupt_poll(sc);
1635 USB_BUS_UNLOCK(&sc->sc_bus);
1639 ehci_setup_standard_chain_sub(struct ehci_std_temp *temp)
1641 struct usb_page_search buf_res;
1643 ehci_qtd_t *td_next;
1644 ehci_qtd_t *td_alt_next;
1645 uint32_t buf_offset;
1649 uint32_t qtd_altnext;
1650 uint8_t shortpkt_old;
1653 terminate = temp->sc->sc_terminate_self;
1654 qtd_altnext = temp->sc->sc_terminate_self;
1657 shortpkt_old = temp->shortpkt;
1658 len_old = temp->len;
1664 td_next = temp->td_next;
1668 if (temp->len == 0) {
1670 if (temp->shortpkt) {
1673 /* send a Zero Length Packet, ZLP, last */
1680 average = temp->average;
1682 if (temp->len < average) {
1683 if (temp->len % temp->max_frame_size) {
1686 average = temp->len;
1690 if (td_next == NULL) {
1691 panic("%s: out of EHCI transfer descriptors!", __FUNCTION__);
1696 td_next = td->obj_next;
1698 /* check if we are pre-computing */
1702 /* update remaining length */
1704 temp->len -= average;
1708 /* fill out current TD */
1712 htohc32(temp->sc, EHCI_QTD_IOC |
1713 EHCI_QTD_SET_BYTES(average));
1717 if (temp->auto_data_toggle == 0) {
1719 /* update data toggle, ZLP case */
1722 htohc32(temp->sc, EHCI_QTD_TOGGLE_MASK);
1726 td->qtd_buffer[0] = 0;
1727 td->qtd_buffer_hi[0] = 0;
1729 td->qtd_buffer[1] = 0;
1730 td->qtd_buffer_hi[1] = 0;
1736 if (temp->auto_data_toggle == 0) {
1738 /* update data toggle */
1740 if (((average + temp->max_frame_size - 1) /
1741 temp->max_frame_size) & 1) {
1743 htohc32(temp->sc, EHCI_QTD_TOGGLE_MASK);
1748 /* update remaining length */
1750 temp->len -= average;
1752 /* fill out buffer pointers */
1754 usbd_get_page(temp->pc, buf_offset, &buf_res);
1756 htohc32(temp->sc, buf_res.physaddr);
1757 td->qtd_buffer_hi[0] = 0;
1761 while (average > EHCI_PAGE_SIZE) {
1762 average -= EHCI_PAGE_SIZE;
1763 buf_offset += EHCI_PAGE_SIZE;
1764 usbd_get_page(temp->pc, buf_offset, &buf_res);
1767 buf_res.physaddr & (~0xFFF));
1768 td->qtd_buffer_hi[x] = 0;
1773 * NOTE: The "average" variable is never zero after
1774 * exiting the loop above !
1776 * NOTE: We have to subtract one from the offset to
1777 * ensure that we are computing the physical address
1780 buf_offset += average;
1781 usbd_get_page(temp->pc, buf_offset - 1, &buf_res);
1784 buf_res.physaddr & (~0xFFF));
1785 td->qtd_buffer_hi[x] = 0;
1789 /* link the current TD with the next one */
1790 td->qtd_next = td_next->qtd_self;
1792 td->qtd_altnext = qtd_altnext;
1793 td->alt_next = td_alt_next;
1795 usb_pc_cpu_flush(td->page_cache);
1801 /* setup alt next pointer, if any */
1802 if (temp->last_frame) {
1804 qtd_altnext = terminate;
1806 /* we use this field internally */
1807 td_alt_next = td_next;
1808 if (temp->setup_alt_next) {
1809 qtd_altnext = td_next->qtd_self;
1811 qtd_altnext = terminate;
1816 temp->shortpkt = shortpkt_old;
1817 temp->len = len_old;
1821 temp->td_next = td_next;
1825 ehci_setup_standard_chain(struct usb_xfer *xfer, ehci_qh_t **qh_last)
1827 struct ehci_std_temp temp;
1828 struct usb_pipe_methods *methods;
1832 uint32_t qh_endphub;
1835 DPRINTFN(9, "addr=%d endpt=%d sumlen=%d speed=%d\n",
1836 xfer->address, UE_GET_ADDR(xfer->endpointno),
1837 xfer->sumlen, usbd_get_speed(xfer->xroot->udev));
1839 temp.average = xfer->max_hc_frame_size;
1840 temp.max_frame_size = xfer->max_frame_size;
1841 temp.sc = EHCI_BUS2SC(xfer->xroot->bus);
1843 /* toggle the DMA set we are using */
1844 xfer->flags_int.curr_dma_set ^= 1;
1846 /* get next DMA set */
1847 td = xfer->td_start[xfer->flags_int.curr_dma_set];
1849 xfer->td_transfer_first = td;
1850 xfer->td_transfer_cache = td;
1854 temp.qtd_status = 0;
1855 temp.last_frame = 0;
1856 temp.setup_alt_next = xfer->flags_int.short_frames_ok;
1858 if (xfer->flags_int.control_xfr) {
1859 if (xfer->endpoint->toggle_next) {
1862 htohc32(temp.sc, EHCI_QTD_SET_TOGGLE(1));
1864 temp.auto_data_toggle = 0;
1866 temp.auto_data_toggle = 1;
1869 if ((xfer->xroot->udev->parent_hs_hub != NULL) ||
1870 (xfer->xroot->udev->address != 0)) {
1873 htohc32(temp.sc, EHCI_QTD_SET_CERR(3));
1875 /* check if we should prepend a setup message */
1877 if (xfer->flags_int.control_xfr) {
1878 if (xfer->flags_int.control_hdr) {
1881 htohc32(temp.sc, EHCI_QTD_SET_CERR(3));
1882 temp.qtd_status |= htohc32(temp.sc,
1884 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) |
1885 EHCI_QTD_SET_TOGGLE(0));
1887 temp.len = xfer->frlengths[0];
1888 temp.pc = xfer->frbuffers + 0;
1889 temp.shortpkt = temp.len ? 1 : 0;
1890 /* check for last frame */
1891 if (xfer->nframes == 1) {
1892 /* no STATUS stage yet, SETUP is last */
1893 if (xfer->flags_int.control_act) {
1894 temp.last_frame = 1;
1895 temp.setup_alt_next = 0;
1898 ehci_setup_standard_chain_sub(&temp);
1905 while (x != xfer->nframes) {
1907 /* DATA0 / DATA1 message */
1909 temp.len = xfer->frlengths[x];
1910 temp.pc = xfer->frbuffers + x;
1914 if (x == xfer->nframes) {
1915 if (xfer->flags_int.control_xfr) {
1916 /* no STATUS stage yet, DATA is last */
1917 if (xfer->flags_int.control_act) {
1918 temp.last_frame = 1;
1919 temp.setup_alt_next = 0;
1922 temp.last_frame = 1;
1923 temp.setup_alt_next = 0;
1926 /* keep previous data toggle and error count */
1929 htohc32(temp.sc, EHCI_QTD_SET_CERR(3) |
1930 EHCI_QTD_SET_TOGGLE(1));
1932 if (temp.len == 0) {
1934 /* make sure that we send an USB packet */
1940 /* regular data transfer */
1942 temp.shortpkt = (xfer->flags.force_short_xfer) ? 0 : 1;
1945 /* set endpoint direction */
1948 (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN) ?
1949 htohc32(temp.sc, EHCI_QTD_ACTIVE |
1950 EHCI_QTD_SET_PID(EHCI_QTD_PID_IN)) :
1951 htohc32(temp.sc, EHCI_QTD_ACTIVE |
1952 EHCI_QTD_SET_PID(EHCI_QTD_PID_OUT));
1954 ehci_setup_standard_chain_sub(&temp);
1957 /* check if we should append a status stage */
1959 if (xfer->flags_int.control_xfr &&
1960 !xfer->flags_int.control_act) {
1963 * Send a DATA1 message and invert the current endpoint
1967 temp.qtd_status &= htohc32(temp.sc, EHCI_QTD_SET_CERR(3) |
1968 EHCI_QTD_SET_TOGGLE(1));
1970 (UE_GET_DIR(xfer->endpointno) == UE_DIR_OUT) ?
1971 htohc32(temp.sc, EHCI_QTD_ACTIVE |
1972 EHCI_QTD_SET_PID(EHCI_QTD_PID_IN) |
1973 EHCI_QTD_SET_TOGGLE(1)) :
1974 htohc32(temp.sc, EHCI_QTD_ACTIVE |
1975 EHCI_QTD_SET_PID(EHCI_QTD_PID_OUT) |
1976 EHCI_QTD_SET_TOGGLE(1));
1981 temp.last_frame = 1;
1982 temp.setup_alt_next = 0;
1984 ehci_setup_standard_chain_sub(&temp);
1988 /* the last TD terminates the transfer: */
1989 td->qtd_next = htohc32(temp.sc, EHCI_LINK_TERMINATE);
1990 td->qtd_altnext = htohc32(temp.sc, EHCI_LINK_TERMINATE);
1992 usb_pc_cpu_flush(td->page_cache);
1994 /* must have at least one frame! */
1996 xfer->td_transfer_last = td;
1999 if (ehcidebug > 8) {
2000 DPRINTF("nexttog=%d; data before transfer:\n",
2001 xfer->endpoint->toggle_next);
2002 ehci_dump_sqtds(temp.sc,
2003 xfer->td_transfer_first);
2007 methods = xfer->endpoint->methods;
2009 qh = xfer->qh_start[xfer->flags_int.curr_dma_set];
2011 /* the "qh_link" field is filled when the QH is added */
2014 (EHCI_QH_SET_ADDR(xfer->address) |
2015 EHCI_QH_SET_ENDPT(UE_GET_ADDR(xfer->endpointno)) |
2016 EHCI_QH_SET_MPL(xfer->max_packet_size));
2018 if (usbd_get_speed(xfer->xroot->udev) == USB_SPEED_HIGH) {
2019 qh_endp |= EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH);
2020 if (methods != &ehci_device_intr_methods)
2021 qh_endp |= EHCI_QH_SET_NRL(8);
2024 if (usbd_get_speed(xfer->xroot->udev) == USB_SPEED_FULL) {
2025 qh_endp |= EHCI_QH_SET_EPS(EHCI_QH_SPEED_FULL);
2027 qh_endp |= EHCI_QH_SET_EPS(EHCI_QH_SPEED_LOW);
2030 if (methods == &ehci_device_ctrl_methods) {
2031 qh_endp |= EHCI_QH_CTL;
2033 if (methods != &ehci_device_intr_methods) {
2034 /* Only try one time per microframe! */
2035 qh_endp |= EHCI_QH_SET_NRL(1);
2039 if (temp.auto_data_toggle == 0) {
2040 /* software computes the data toggle */
2041 qh_endp |= EHCI_QH_DTC;
2044 qh->qh_endp = htohc32(temp.sc, qh_endp);
2047 (EHCI_QH_SET_MULT(xfer->max_packet_count & 3) |
2048 EHCI_QH_SET_CMASK(xfer->endpoint->usb_cmask) |
2049 EHCI_QH_SET_SMASK(xfer->endpoint->usb_smask) |
2050 EHCI_QH_SET_HUBA(xfer->xroot->udev->hs_hub_addr) |
2051 EHCI_QH_SET_PORT(xfer->xroot->udev->hs_port_no));
2053 qh->qh_endphub = htohc32(temp.sc, qh_endphub);
2056 /* fill the overlay qTD */
2058 if (temp.auto_data_toggle && xfer->endpoint->toggle_next) {
2060 qh->qh_qtd.qtd_status = htohc32(temp.sc, EHCI_QTD_SET_TOGGLE(1));
2062 qh->qh_qtd.qtd_status = 0;
2065 td = xfer->td_transfer_first;
2067 qh->qh_qtd.qtd_next = td->qtd_self;
2068 qh->qh_qtd.qtd_altnext =
2069 htohc32(temp.sc, EHCI_LINK_TERMINATE);
2071 usb_pc_cpu_flush(qh->page_cache);
2073 if (xfer->xroot->udev->flags.self_suspended == 0) {
2074 EHCI_APPEND_QH(qh, *qh_last);
2079 ehci_root_intr(ehci_softc_t *sc)
2084 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
2086 /* clear any old interrupt data */
2087 memset(sc->sc_hub_idata, 0, sizeof(sc->sc_hub_idata));
2090 m = (sc->sc_noport + 1);
2091 if (m > (8 * sizeof(sc->sc_hub_idata))) {
2092 m = (8 * sizeof(sc->sc_hub_idata));
2094 for (i = 1; i < m; i++) {
2095 /* pick out CHANGE bits from the status register */
2096 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) {
2097 sc->sc_hub_idata[i / 8] |= 1 << (i % 8);
2098 DPRINTF("port %d changed\n", i);
2101 uhub_root_intr(&sc->sc_bus, sc->sc_hub_idata,
2102 sizeof(sc->sc_hub_idata));
2106 ehci_isoc_fs_done(ehci_softc_t *sc, struct usb_xfer *xfer)
2108 uint32_t nframes = xfer->nframes;
2110 uint32_t *plen = xfer->frlengths;
2112 ehci_sitd_t *td = xfer->td_transfer_first;
2113 ehci_sitd_t **pp_last = &sc->sc_isoc_fs_p_last[xfer->qh_pos];
2115 DPRINTFN(13, "xfer=%p endpoint=%p transfer done\n",
2116 xfer, xfer->endpoint);
2120 panic("%s:%d: out of TD's\n",
2121 __FUNCTION__, __LINE__);
2123 if (pp_last >= &sc->sc_isoc_fs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT]) {
2124 pp_last = &sc->sc_isoc_fs_p_last[0];
2127 if (ehcidebug > 15) {
2128 DPRINTF("isoc FS-TD\n");
2129 ehci_dump_sitd(sc, td);
2132 usb_pc_cpu_invalidate(td->page_cache);
2133 status = hc32toh(sc, td->sitd_status);
2135 len = EHCI_SITD_GET_LEN(status);
2137 DPRINTFN(2, "status=0x%08x, rem=%u\n", status, len);
2147 /* remove FS-TD from schedule */
2148 EHCI_REMOVE_FS_TD(td, *pp_last);
2155 xfer->aframes = xfer->nframes;
2159 ehci_isoc_hs_done(ehci_softc_t *sc, struct usb_xfer *xfer)
2161 uint32_t nframes = xfer->nframes;
2163 uint32_t *plen = xfer->frlengths;
2166 ehci_itd_t *td = xfer->td_transfer_first;
2167 ehci_itd_t **pp_last = &sc->sc_isoc_hs_p_last[xfer->qh_pos];
2169 DPRINTFN(13, "xfer=%p endpoint=%p transfer done\n",
2170 xfer, xfer->endpoint);
2174 panic("%s:%d: out of TD's\n",
2175 __FUNCTION__, __LINE__);
2177 if (pp_last >= &sc->sc_isoc_hs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT]) {
2178 pp_last = &sc->sc_isoc_hs_p_last[0];
2181 if (ehcidebug > 15) {
2182 DPRINTF("isoc HS-TD\n");
2183 ehci_dump_itd(sc, td);
2187 usb_pc_cpu_invalidate(td->page_cache);
2188 status = hc32toh(sc, td->itd_status[td_no]);
2190 len = EHCI_ITD_GET_LEN(status);
2192 DPRINTFN(2, "status=0x%08x, len=%u\n", status, len);
2194 if (xfer->endpoint->usb_smask & (1 << td_no)) {
2198 * The length is valid. NOTE: The
2199 * complete length is written back
2200 * into the status field, and not the
2201 * remainder like with other transfer
2205 /* Invalid length - truncate */
2216 if ((td_no == 8) || (nframes == 0)) {
2217 /* remove HS-TD from schedule */
2218 EHCI_REMOVE_HS_TD(td, *pp_last);
2225 xfer->aframes = xfer->nframes;
2228 /* NOTE: "done" can be run two times in a row,
2229 * from close and from interrupt
2232 ehci_device_done(struct usb_xfer *xfer, usb_error_t error)
2234 struct usb_pipe_methods *methods = xfer->endpoint->methods;
2235 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2237 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
2239 DPRINTFN(2, "xfer=%p, endpoint=%p, error=%d\n",
2240 xfer, xfer->endpoint, error);
2242 if ((methods == &ehci_device_bulk_methods) ||
2243 (methods == &ehci_device_ctrl_methods)) {
2245 if (ehcidebug > 8) {
2246 DPRINTF("nexttog=%d; data after transfer:\n",
2247 xfer->endpoint->toggle_next);
2249 xfer->td_transfer_first);
2253 EHCI_REMOVE_QH(xfer->qh_start[xfer->flags_int.curr_dma_set],
2254 sc->sc_async_p_last);
2256 if (methods == &ehci_device_intr_methods) {
2257 EHCI_REMOVE_QH(xfer->qh_start[xfer->flags_int.curr_dma_set],
2258 sc->sc_intr_p_last[xfer->qh_pos]);
2261 * Only finish isochronous transfers once which will update
2262 * "xfer->frlengths".
2264 if (xfer->td_transfer_first &&
2265 xfer->td_transfer_last) {
2266 if (methods == &ehci_device_isoc_fs_methods) {
2267 ehci_isoc_fs_done(sc, xfer);
2269 if (methods == &ehci_device_isoc_hs_methods) {
2270 ehci_isoc_hs_done(sc, xfer);
2272 xfer->td_transfer_first = NULL;
2273 xfer->td_transfer_last = NULL;
2275 /* dequeue transfer and start next transfer */
2276 usbd_transfer_done(xfer, error);
2279 /*------------------------------------------------------------------------*
2281 *------------------------------------------------------------------------*/
2283 ehci_device_bulk_open(struct usb_xfer *xfer)
2289 ehci_device_bulk_close(struct usb_xfer *xfer)
2291 ehci_device_done(xfer, USB_ERR_CANCELLED);
2295 ehci_device_bulk_enter(struct usb_xfer *xfer)
2301 ehci_device_bulk_start(struct usb_xfer *xfer)
2303 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2306 /* setup TD's and QH */
2307 ehci_setup_standard_chain(xfer, &sc->sc_async_p_last);
2309 /* put transfer on interrupt queue */
2310 ehci_transfer_intr_enqueue(xfer);
2313 * XXX Certain nVidia chipsets choke when using the IAAD
2314 * feature too frequently.
2316 if (sc->sc_flags & EHCI_SCFLG_IAADBUG)
2319 /* XXX Performance quirk: Some Host Controllers have a too low
2320 * interrupt rate. Issue an IAAD to stimulate the Host
2321 * Controller after queueing the BULK transfer.
2323 temp = EOREAD4(sc, EHCI_USBCMD);
2324 if (!(temp & EHCI_CMD_IAAD))
2325 EOWRITE4(sc, EHCI_USBCMD, temp | EHCI_CMD_IAAD);
2328 struct usb_pipe_methods ehci_device_bulk_methods =
2330 .open = ehci_device_bulk_open,
2331 .close = ehci_device_bulk_close,
2332 .enter = ehci_device_bulk_enter,
2333 .start = ehci_device_bulk_start,
2336 /*------------------------------------------------------------------------*
2337 * ehci control support
2338 *------------------------------------------------------------------------*/
2340 ehci_device_ctrl_open(struct usb_xfer *xfer)
2346 ehci_device_ctrl_close(struct usb_xfer *xfer)
2348 ehci_device_done(xfer, USB_ERR_CANCELLED);
2352 ehci_device_ctrl_enter(struct usb_xfer *xfer)
2358 ehci_device_ctrl_start(struct usb_xfer *xfer)
2360 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2362 /* setup TD's and QH */
2363 ehci_setup_standard_chain(xfer, &sc->sc_async_p_last);
2365 /* put transfer on interrupt queue */
2366 ehci_transfer_intr_enqueue(xfer);
2369 struct usb_pipe_methods ehci_device_ctrl_methods =
2371 .open = ehci_device_ctrl_open,
2372 .close = ehci_device_ctrl_close,
2373 .enter = ehci_device_ctrl_enter,
2374 .start = ehci_device_ctrl_start,
2377 /*------------------------------------------------------------------------*
2378 * ehci interrupt support
2379 *------------------------------------------------------------------------*/
2381 ehci_device_intr_open(struct usb_xfer *xfer)
2383 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2388 usb_hs_bandwidth_alloc(xfer);
2391 * Find the best QH position corresponding to the given interval:
2395 bit = EHCI_VIRTUAL_FRAMELIST_COUNT / 2;
2397 if (xfer->interval >= bit) {
2401 if (sc->sc_intr_stat[x] <
2402 sc->sc_intr_stat[best]) {
2412 sc->sc_intr_stat[best]++;
2413 xfer->qh_pos = best;
2415 DPRINTFN(3, "best=%d interval=%d\n",
2416 best, xfer->interval);
2420 ehci_device_intr_close(struct usb_xfer *xfer)
2422 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2424 sc->sc_intr_stat[xfer->qh_pos]--;
2426 ehci_device_done(xfer, USB_ERR_CANCELLED);
2428 /* bandwidth must be freed after device done */
2429 usb_hs_bandwidth_free(xfer);
2433 ehci_device_intr_enter(struct usb_xfer *xfer)
2439 ehci_device_intr_start(struct usb_xfer *xfer)
2441 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2443 /* setup TD's and QH */
2444 ehci_setup_standard_chain(xfer, &sc->sc_intr_p_last[xfer->qh_pos]);
2446 /* put transfer on interrupt queue */
2447 ehci_transfer_intr_enqueue(xfer);
2450 struct usb_pipe_methods ehci_device_intr_methods =
2452 .open = ehci_device_intr_open,
2453 .close = ehci_device_intr_close,
2454 .enter = ehci_device_intr_enter,
2455 .start = ehci_device_intr_start,
2458 /*------------------------------------------------------------------------*
2459 * ehci full speed isochronous support
2460 *------------------------------------------------------------------------*/
2462 ehci_device_isoc_fs_open(struct usb_xfer *xfer)
2464 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2466 uint32_t sitd_portaddr;
2470 EHCI_SITD_SET_ADDR(xfer->address) |
2471 EHCI_SITD_SET_ENDPT(UE_GET_ADDR(xfer->endpointno)) |
2472 EHCI_SITD_SET_HUBA(xfer->xroot->udev->hs_hub_addr) |
2473 EHCI_SITD_SET_PORT(xfer->xroot->udev->hs_port_no);
2475 if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN) {
2476 sitd_portaddr |= EHCI_SITD_SET_DIR_IN;
2478 sitd_portaddr = htohc32(sc, sitd_portaddr);
2480 /* initialize all TD's */
2482 for (ds = 0; ds != 2; ds++) {
2484 for (td = xfer->td_start[ds]; td; td = td->obj_next) {
2486 td->sitd_portaddr = sitd_portaddr;
2489 * TODO: make some kind of automatic
2490 * SMASK/CMASK selection based on micro-frame
2493 * micro-frame usage (8 microframes per 1ms)
2495 td->sitd_back = htohc32(sc, EHCI_LINK_TERMINATE);
2497 usb_pc_cpu_flush(td->page_cache);
2503 ehci_device_isoc_fs_close(struct usb_xfer *xfer)
2505 ehci_device_done(xfer, USB_ERR_CANCELLED);
2509 ehci_device_isoc_fs_enter(struct usb_xfer *xfer)
2511 struct usb_page_search buf_res;
2512 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2513 struct usb_fs_isoc_schedule *fss_start;
2514 struct usb_fs_isoc_schedule *fss_end;
2515 struct usb_fs_isoc_schedule *fss;
2517 ehci_sitd_t *td_last = NULL;
2518 ehci_sitd_t **pp_last;
2520 uint32_t buf_offset;
2534 DPRINTFN(6, "xfer=%p next=%d nframes=%d\n",
2535 xfer, xfer->endpoint->isoc_next, xfer->nframes);
2537 /* get the current frame index */
2539 nframes = EOREAD4(sc, EHCI_FRINDEX) / 8;
2542 * check if the frame index is within the window where the frames
2545 buf_offset = (nframes - xfer->endpoint->isoc_next) &
2546 (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2548 if ((xfer->endpoint->is_synced == 0) ||
2549 (buf_offset < xfer->nframes)) {
2551 * If there is data underflow or the pipe queue is empty we
2552 * schedule the transfer a few frames ahead of the current
2553 * frame position. Else two isochronous transfers might
2556 xfer->endpoint->isoc_next = (nframes + 3) &
2557 (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2558 xfer->endpoint->is_synced = 1;
2559 DPRINTFN(3, "start next=%d\n", xfer->endpoint->isoc_next);
2562 * compute how many milliseconds the insertion is ahead of the
2563 * current frame position:
2565 buf_offset = (xfer->endpoint->isoc_next - nframes) &
2566 (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2569 * pre-compute when the isochronous transfer will be finished:
2571 xfer->isoc_time_complete =
2572 usbd_fs_isoc_schedule_isoc_time_expand
2573 (xfer->xroot->udev, &fss_start, &fss_end, nframes) + buf_offset +
2576 /* get the real number of frames */
2578 nframes = xfer->nframes;
2582 plen = xfer->frlengths;
2584 /* toggle the DMA set we are using */
2585 xfer->flags_int.curr_dma_set ^= 1;
2587 /* get next DMA set */
2588 td = xfer->td_start[xfer->flags_int.curr_dma_set];
2589 xfer->td_transfer_first = td;
2591 pp_last = &sc->sc_isoc_fs_p_last[xfer->endpoint->isoc_next];
2593 /* store starting position */
2595 xfer->qh_pos = xfer->endpoint->isoc_next;
2597 fss = fss_start + (xfer->qh_pos % USB_ISOC_TIME_MAX);
2601 panic("%s:%d: out of TD's\n",
2602 __FUNCTION__, __LINE__);
2604 if (pp_last >= &sc->sc_isoc_fs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT]) {
2605 pp_last = &sc->sc_isoc_fs_p_last[0];
2607 if (fss >= fss_end) {
2610 /* reuse sitd_portaddr and sitd_back from last transfer */
2612 if (*plen > xfer->max_frame_size) {
2616 printf("%s: frame length(%d) exceeds %d "
2617 "bytes (frame truncated)\n",
2618 __FUNCTION__, *plen,
2619 xfer->max_frame_size);
2622 *plen = xfer->max_frame_size;
2625 * We currently don't care if the ISOCHRONOUS schedule is
2628 error = usbd_fs_isoc_schedule_alloc(fss, &sa, *plen);
2631 * The FULL speed schedule is FULL! Set length
2638 * only call "usbd_get_page()" when we have a
2641 usbd_get_page(xfer->frbuffers, buf_offset, &buf_res);
2642 td->sitd_bp[0] = htohc32(sc, buf_res.physaddr);
2643 buf_offset += *plen;
2645 * NOTE: We need to subtract one from the offset so
2646 * that we are on a valid page!
2648 usbd_get_page(xfer->frbuffers, buf_offset - 1,
2650 temp = buf_res.physaddr & ~0xFFF;
2656 if (UE_GET_DIR(xfer->endpointno) == UE_DIR_OUT) {
2659 temp |= 1; /* T-count = 1, TP = ALL */
2664 temp |= tlen; /* T-count = [1..6] */
2665 temp |= 8; /* TP = Begin */
2677 sa = (sb - sa) & 0x3F;
2680 sb = (-(4 << sa)) & 0xFE;
2681 sa = (1 << sa) & 0x3F;
2684 sitd_mask = (EHCI_SITD_SET_SMASK(sa) |
2685 EHCI_SITD_SET_CMASK(sb));
2687 td->sitd_bp[1] = htohc32(sc, temp);
2689 td->sitd_mask = htohc32(sc, sitd_mask);
2692 td->sitd_status = htohc32(sc,
2695 EHCI_SITD_SET_LEN(*plen));
2697 td->sitd_status = htohc32(sc,
2699 EHCI_SITD_SET_LEN(*plen));
2701 usb_pc_cpu_flush(td->page_cache);
2704 if (ehcidebug > 15) {
2705 DPRINTF("FS-TD %d\n", nframes);
2706 ehci_dump_sitd(sc, td);
2709 /* insert TD into schedule */
2710 EHCI_APPEND_FS_TD(td, *pp_last);
2719 xfer->td_transfer_last = td_last;
2721 /* update isoc_next */
2722 xfer->endpoint->isoc_next = (pp_last - &sc->sc_isoc_fs_p_last[0]) &
2723 (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2727 ehci_device_isoc_fs_start(struct usb_xfer *xfer)
2729 /* put transfer on interrupt queue */
2730 ehci_transfer_intr_enqueue(xfer);
2733 struct usb_pipe_methods ehci_device_isoc_fs_methods =
2735 .open = ehci_device_isoc_fs_open,
2736 .close = ehci_device_isoc_fs_close,
2737 .enter = ehci_device_isoc_fs_enter,
2738 .start = ehci_device_isoc_fs_start,
2741 /*------------------------------------------------------------------------*
2742 * ehci high speed isochronous support
2743 *------------------------------------------------------------------------*/
2745 ehci_device_isoc_hs_open(struct usb_xfer *xfer)
2747 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2752 usb_hs_bandwidth_alloc(xfer);
2754 /* initialize all TD's */
2756 for (ds = 0; ds != 2; ds++) {
2758 for (td = xfer->td_start[ds]; td; td = td->obj_next) {
2760 /* set TD inactive */
2761 td->itd_status[0] = 0;
2762 td->itd_status[1] = 0;
2763 td->itd_status[2] = 0;
2764 td->itd_status[3] = 0;
2765 td->itd_status[4] = 0;
2766 td->itd_status[5] = 0;
2767 td->itd_status[6] = 0;
2768 td->itd_status[7] = 0;
2770 /* set endpoint and address */
2771 td->itd_bp[0] = htohc32(sc,
2772 EHCI_ITD_SET_ADDR(xfer->address) |
2773 EHCI_ITD_SET_ENDPT(UE_GET_ADDR(xfer->endpointno)));
2776 EHCI_ITD_SET_MPL(xfer->max_packet_size & 0x7FF);
2779 if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN) {
2780 temp |= EHCI_ITD_SET_DIR_IN;
2782 /* set maximum packet size */
2783 td->itd_bp[1] = htohc32(sc, temp);
2785 /* set transfer multiplier */
2786 td->itd_bp[2] = htohc32(sc, xfer->max_packet_count & 3);
2788 usb_pc_cpu_flush(td->page_cache);
2794 ehci_device_isoc_hs_close(struct usb_xfer *xfer)
2796 ehci_device_done(xfer, USB_ERR_CANCELLED);
2798 /* bandwidth must be freed after device done */
2799 usb_hs_bandwidth_free(xfer);
2803 ehci_device_isoc_hs_enter(struct usb_xfer *xfer)
2805 struct usb_page_search buf_res;
2806 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2808 ehci_itd_t *td_last = NULL;
2809 ehci_itd_t **pp_last;
2810 bus_size_t page_addr;
2813 uint32_t buf_offset;
2815 uint32_t itd_offset[8 + 1];
2819 uint8_t shift = usbd_xfer_get_fps_shift(xfer);
2826 DPRINTFN(6, "xfer=%p next=%d nframes=%d shift=%d\n",
2827 xfer, xfer->endpoint->isoc_next, xfer->nframes, (int)shift);
2829 /* get the current frame index */
2831 nframes = EOREAD4(sc, EHCI_FRINDEX) / 8;
2834 * check if the frame index is within the window where the frames
2837 buf_offset = (nframes - xfer->endpoint->isoc_next) &
2838 (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2840 if ((xfer->endpoint->is_synced == 0) ||
2841 (buf_offset < (((xfer->nframes << shift) + 7) / 8))) {
2843 * If there is data underflow or the pipe queue is empty we
2844 * schedule the transfer a few frames ahead of the current
2845 * frame position. Else two isochronous transfers might
2848 xfer->endpoint->isoc_next = (nframes + 3) &
2849 (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2850 xfer->endpoint->is_synced = 1;
2851 DPRINTFN(3, "start next=%d\n", xfer->endpoint->isoc_next);
2854 * compute how many milliseconds the insertion is ahead of the
2855 * current frame position:
2857 buf_offset = (xfer->endpoint->isoc_next - nframes) &
2858 (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2861 * pre-compute when the isochronous transfer will be finished:
2863 xfer->isoc_time_complete =
2864 usb_isoc_time_expand(&sc->sc_bus, nframes) + buf_offset +
2865 (((xfer->nframes << shift) + 7) / 8);
2867 /* get the real number of frames */
2869 nframes = xfer->nframes;
2874 plen = xfer->frlengths;
2876 /* toggle the DMA set we are using */
2877 xfer->flags_int.curr_dma_set ^= 1;
2879 /* get next DMA set */
2880 td = xfer->td_start[xfer->flags_int.curr_dma_set];
2881 xfer->td_transfer_first = td;
2883 pp_last = &sc->sc_isoc_hs_p_last[xfer->endpoint->isoc_next];
2885 /* store starting position */
2887 xfer->qh_pos = xfer->endpoint->isoc_next;
2891 panic("%s:%d: out of TD's\n",
2892 __FUNCTION__, __LINE__);
2894 if (pp_last >= &sc->sc_isoc_hs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT]) {
2895 pp_last = &sc->sc_isoc_hs_p_last[0];
2898 if (*plen > xfer->max_frame_size) {
2902 printf("%s: frame length(%d) exceeds %d bytes "
2903 "(frame truncated)\n",
2904 __FUNCTION__, *plen, xfer->max_frame_size);
2907 *plen = xfer->max_frame_size;
2910 if (xfer->endpoint->usb_smask & (1 << td_no)) {
2911 status = (EHCI_ITD_SET_LEN(*plen) |
2913 EHCI_ITD_SET_PG(0));
2914 td->itd_status[td_no] = htohc32(sc, status);
2915 itd_offset[td_no] = buf_offset;
2916 buf_offset += *plen;
2920 td->itd_status[td_no] = 0; /* not active */
2921 itd_offset[td_no] = buf_offset;
2926 if ((td_no == 8) || (nframes == 0)) {
2928 /* the rest of the transfers are not active, if any */
2929 for (x = td_no; x != 8; x++) {
2930 td->itd_status[x] = 0; /* not active */
2933 /* check if there is any data to be transferred */
2934 if (itd_offset[0] != buf_offset) {
2936 itd_offset[td_no] = buf_offset;
2938 /* get first page offset */
2939 usbd_get_page(xfer->frbuffers, itd_offset[0], &buf_res);
2940 /* get page address */
2941 page_addr = buf_res.physaddr & ~0xFFF;
2942 /* update page address */
2943 td->itd_bp[0] &= htohc32(sc, 0xFFF);
2944 td->itd_bp[0] |= htohc32(sc, page_addr);
2946 for (x = 0; x != td_no; x++) {
2947 /* set page number and page offset */
2948 status = (EHCI_ITD_SET_PG(page_no) |
2949 (buf_res.physaddr & 0xFFF));
2950 td->itd_status[x] |= htohc32(sc, status);
2952 /* get next page offset */
2953 if (itd_offset[x + 1] == buf_offset) {
2955 * We subtract one so that
2956 * we don't go off the last
2959 usbd_get_page(xfer->frbuffers, buf_offset - 1, &buf_res);
2961 usbd_get_page(xfer->frbuffers, itd_offset[x + 1], &buf_res);
2964 /* check if we need a new page */
2965 if ((buf_res.physaddr ^ page_addr) & ~0xFFF) {
2966 /* new page needed */
2967 page_addr = buf_res.physaddr & ~0xFFF;
2969 panic("%s: too many pages\n", __FUNCTION__);
2972 /* update page address */
2973 td->itd_bp[page_no] &= htohc32(sc, 0xFFF);
2974 td->itd_bp[page_no] |= htohc32(sc, page_addr);
2978 /* set IOC bit if we are complete */
2980 td->itd_status[td_no - 1] |= htohc32(sc, EHCI_ITD_IOC);
2982 usb_pc_cpu_flush(td->page_cache);
2984 if (ehcidebug > 15) {
2985 DPRINTF("HS-TD %d\n", nframes);
2986 ehci_dump_itd(sc, td);
2989 /* insert TD into schedule */
2990 EHCI_APPEND_HS_TD(td, *pp_last);
2999 xfer->td_transfer_last = td_last;
3001 /* update isoc_next */
3002 xfer->endpoint->isoc_next = (pp_last - &sc->sc_isoc_hs_p_last[0]) &
3003 (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
3007 ehci_device_isoc_hs_start(struct usb_xfer *xfer)
3009 /* put transfer on interrupt queue */
3010 ehci_transfer_intr_enqueue(xfer);
3013 struct usb_pipe_methods ehci_device_isoc_hs_methods =
3015 .open = ehci_device_isoc_hs_open,
3016 .close = ehci_device_isoc_hs_close,
3017 .enter = ehci_device_isoc_hs_enter,
3018 .start = ehci_device_isoc_hs_start,
3021 /*------------------------------------------------------------------------*
3022 * ehci root control support
3023 *------------------------------------------------------------------------*
3024 * Simulate a hardware hub by handling all the necessary requests.
3025 *------------------------------------------------------------------------*/
3028 struct usb_device_descriptor ehci_devd =
3030 sizeof(struct usb_device_descriptor),
3031 UDESC_DEVICE, /* type */
3032 {0x00, 0x02}, /* USB version */
3033 UDCLASS_HUB, /* class */
3034 UDSUBCLASS_HUB, /* subclass */
3035 UDPROTO_HSHUBSTT, /* protocol */
3036 64, /* max packet */
3037 {0}, {0}, {0x00, 0x01}, /* device id */
3038 1, 2, 0, /* string indicies */
3039 1 /* # of configurations */
3043 struct usb_device_qualifier ehci_odevd =
3045 sizeof(struct usb_device_qualifier),
3046 UDESC_DEVICE_QUALIFIER, /* type */
3047 {0x00, 0x02}, /* USB version */
3048 UDCLASS_HUB, /* class */
3049 UDSUBCLASS_HUB, /* subclass */
3050 UDPROTO_FSHUB, /* protocol */
3052 0, /* # of configurations */
3056 static const struct ehci_config_desc ehci_confd = {
3058 .bLength = sizeof(struct usb_config_descriptor),
3059 .bDescriptorType = UDESC_CONFIG,
3060 .wTotalLength[0] = sizeof(ehci_confd),
3062 .bConfigurationValue = 1,
3063 .iConfiguration = 0,
3064 .bmAttributes = UC_SELF_POWERED,
3065 .bMaxPower = 0 /* max power */
3068 .bLength = sizeof(struct usb_interface_descriptor),
3069 .bDescriptorType = UDESC_INTERFACE,
3071 .bInterfaceClass = UICLASS_HUB,
3072 .bInterfaceSubClass = UISUBCLASS_HUB,
3073 .bInterfaceProtocol = 0,
3076 .bLength = sizeof(struct usb_endpoint_descriptor),
3077 .bDescriptorType = UDESC_ENDPOINT,
3078 .bEndpointAddress = UE_DIR_IN | EHCI_INTR_ENDPT,
3079 .bmAttributes = UE_INTERRUPT,
3080 .wMaxPacketSize[0] = 8, /* max packet (63 ports) */
3086 struct usb_hub_descriptor ehci_hubd =
3088 0, /* dynamic length */
3098 ehci_disown(ehci_softc_t *sc, uint16_t index, uint8_t lowspeed)
3103 DPRINTF("index=%d lowspeed=%d\n", index, lowspeed);
3105 port = EHCI_PORTSC(index);
3106 v = EOREAD4(sc, port) & ~EHCI_PS_CLEAR;
3107 EOWRITE4(sc, port, v | EHCI_PS_PO);
3111 ehci_roothub_exec(struct usb_device *udev,
3112 struct usb_device_request *req, const void **pptr, uint16_t *plength)
3114 ehci_softc_t *sc = EHCI_BUS2SC(udev->bus);
3115 const char *str_ptr;
3125 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
3128 ptr = (const void *)&sc->sc_hub_desc;
3132 value = UGETW(req->wValue);
3133 index = UGETW(req->wIndex);
3135 DPRINTFN(3, "type=0x%02x request=0x%02x wLen=0x%04x "
3136 "wValue=0x%04x wIndex=0x%04x\n",
3137 req->bmRequestType, req->bRequest,
3138 UGETW(req->wLength), value, index);
3140 #define C(x,y) ((x) | ((y) << 8))
3141 switch (C(req->bRequest, req->bmRequestType)) {
3142 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
3143 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
3144 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
3146 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
3147 * for the integrated root hub.
3150 case C(UR_GET_CONFIG, UT_READ_DEVICE):
3152 sc->sc_hub_desc.temp[0] = sc->sc_conf;
3154 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
3155 switch (value >> 8) {
3157 if ((value & 0xff) != 0) {
3158 err = USB_ERR_IOERROR;
3161 len = sizeof(ehci_devd);
3162 ptr = (const void *)&ehci_devd;
3165 * We can't really operate at another speed,
3166 * but the specification says we need this
3169 case UDESC_DEVICE_QUALIFIER:
3170 if ((value & 0xff) != 0) {
3171 err = USB_ERR_IOERROR;
3174 len = sizeof(ehci_odevd);
3175 ptr = (const void *)&ehci_odevd;
3179 if ((value & 0xff) != 0) {
3180 err = USB_ERR_IOERROR;
3183 len = sizeof(ehci_confd);
3184 ptr = (const void *)&ehci_confd;
3188 switch (value & 0xff) {
3189 case 0: /* Language table */
3193 case 1: /* Vendor */
3194 str_ptr = sc->sc_vendor;
3197 case 2: /* Product */
3198 str_ptr = "EHCI root HUB";
3206 len = usb_make_str_desc(
3207 sc->sc_hub_desc.temp,
3208 sizeof(sc->sc_hub_desc.temp),
3212 err = USB_ERR_IOERROR;
3216 case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
3218 sc->sc_hub_desc.temp[0] = 0;
3220 case C(UR_GET_STATUS, UT_READ_DEVICE):
3222 USETW(sc->sc_hub_desc.stat.wStatus, UDS_SELF_POWERED);
3224 case C(UR_GET_STATUS, UT_READ_INTERFACE):
3225 case C(UR_GET_STATUS, UT_READ_ENDPOINT):
3227 USETW(sc->sc_hub_desc.stat.wStatus, 0);
3229 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
3230 if (value >= EHCI_MAX_DEVICES) {
3231 err = USB_ERR_IOERROR;
3234 sc->sc_addr = value;
3236 case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
3237 if ((value != 0) && (value != 1)) {
3238 err = USB_ERR_IOERROR;
3241 sc->sc_conf = value;
3243 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
3245 case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
3246 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
3247 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
3248 err = USB_ERR_IOERROR;
3250 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
3252 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
3255 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
3257 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
3258 DPRINTFN(9, "UR_CLEAR_PORT_FEATURE\n");
3261 (index > sc->sc_noport)) {
3262 err = USB_ERR_IOERROR;
3265 port = EHCI_PORTSC(index);
3266 v = EOREAD4(sc, port) & ~EHCI_PS_CLEAR;
3268 case UHF_PORT_ENABLE:
3269 EOWRITE4(sc, port, v & ~EHCI_PS_PE);
3271 case UHF_PORT_SUSPEND:
3272 if ((v & EHCI_PS_SUSP) && (!(v & EHCI_PS_FPR))) {
3275 * waking up a High Speed device is rather
3278 EOWRITE4(sc, port, v | EHCI_PS_FPR);
3280 /* wait 20ms for resume sequence to complete */
3281 usb_pause_mtx(&sc->sc_bus.bus_mtx, hz / 50);
3283 EOWRITE4(sc, port, v & ~(EHCI_PS_SUSP |
3284 EHCI_PS_FPR | (3 << 10) /* High Speed */ ));
3286 /* 4ms settle time */
3287 usb_pause_mtx(&sc->sc_bus.bus_mtx, hz / 250);
3289 case UHF_PORT_POWER:
3290 EOWRITE4(sc, port, v & ~EHCI_PS_PP);
3293 DPRINTFN(3, "clear port test "
3296 case UHF_PORT_INDICATOR:
3297 DPRINTFN(3, "clear port ind "
3299 EOWRITE4(sc, port, v & ~EHCI_PS_PIC);
3301 case UHF_C_PORT_CONNECTION:
3302 EOWRITE4(sc, port, v | EHCI_PS_CSC);
3304 case UHF_C_PORT_ENABLE:
3305 EOWRITE4(sc, port, v | EHCI_PS_PEC);
3307 case UHF_C_PORT_SUSPEND:
3308 EOWRITE4(sc, port, v | EHCI_PS_SUSP);
3310 case UHF_C_PORT_OVER_CURRENT:
3311 EOWRITE4(sc, port, v | EHCI_PS_OCC);
3313 case UHF_C_PORT_RESET:
3317 err = USB_ERR_IOERROR;
3321 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
3322 if ((value & 0xff) != 0) {
3323 err = USB_ERR_IOERROR;
3326 v = EREAD4(sc, EHCI_HCSPARAMS);
3328 sc->sc_hub_desc.hubd = ehci_hubd;
3329 sc->sc_hub_desc.hubd.bNbrPorts = sc->sc_noport;
3331 if (EHCI_HCS_PPC(v))
3332 i = UHD_PWR_INDIVIDUAL;
3334 i = UHD_PWR_NO_SWITCH;
3336 if (EHCI_HCS_P_INDICATOR(v))
3339 USETW(sc->sc_hub_desc.hubd.wHubCharacteristics, i);
3340 /* XXX can't find out? */
3341 sc->sc_hub_desc.hubd.bPwrOn2PwrGood = 200;
3342 /* XXX don't know if ports are removable or not */
3343 sc->sc_hub_desc.hubd.bDescLength =
3344 8 + ((sc->sc_noport + 7) / 8);
3345 len = sc->sc_hub_desc.hubd.bDescLength;
3347 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
3349 bzero(sc->sc_hub_desc.temp, 16);
3351 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
3352 DPRINTFN(9, "get port status i=%d\n",
3355 (index > sc->sc_noport)) {
3356 err = USB_ERR_IOERROR;
3359 v = EOREAD4(sc, EHCI_PORTSC(index));
3360 DPRINTFN(9, "port status=0x%04x\n", v);
3361 if (sc->sc_flags & (EHCI_SCFLG_FORCESPEED | EHCI_SCFLG_TT)) {
3362 if ((v & 0xc000000) == 0x8000000)
3364 else if ((v & 0xc000000) == 0x4000000)
3372 i |= UPS_CURRENT_CONNECT_STATUS;
3374 i |= UPS_PORT_ENABLED;
3375 if ((v & EHCI_PS_SUSP) && !(v & EHCI_PS_FPR))
3377 if (v & EHCI_PS_OCA)
3378 i |= UPS_OVERCURRENT_INDICATOR;
3382 i |= UPS_PORT_POWER;
3383 USETW(sc->sc_hub_desc.ps.wPortStatus, i);
3385 if (v & EHCI_PS_CSC)
3386 i |= UPS_C_CONNECT_STATUS;
3387 if (v & EHCI_PS_PEC)
3388 i |= UPS_C_PORT_ENABLED;
3389 if (v & EHCI_PS_OCC)
3390 i |= UPS_C_OVERCURRENT_INDICATOR;
3391 if (v & EHCI_PS_FPR)
3394 i |= UPS_C_PORT_RESET;
3395 USETW(sc->sc_hub_desc.ps.wPortChange, i);
3396 len = sizeof(sc->sc_hub_desc.ps);
3398 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
3399 err = USB_ERR_IOERROR;
3401 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
3403 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
3405 (index > sc->sc_noport)) {
3406 err = USB_ERR_IOERROR;
3409 port = EHCI_PORTSC(index);
3410 v = EOREAD4(sc, port) & ~EHCI_PS_CLEAR;
3412 case UHF_PORT_ENABLE:
3413 EOWRITE4(sc, port, v | EHCI_PS_PE);
3415 case UHF_PORT_SUSPEND:
3416 EOWRITE4(sc, port, v | EHCI_PS_SUSP);
3418 case UHF_PORT_RESET:
3419 DPRINTFN(6, "reset port %d\n", index);
3421 if (ehcinohighspeed) {
3423 * Connect USB device to companion
3426 ehci_disown(sc, index, 1);
3430 if (EHCI_PS_IS_LOWSPEED(v) &&
3431 (sc->sc_flags & EHCI_SCFLG_TT) == 0) {
3432 /* Low speed device, give up ownership. */
3433 ehci_disown(sc, index, 1);
3436 /* Start reset sequence. */
3437 v &= ~(EHCI_PS_PE | EHCI_PS_PR);
3438 EOWRITE4(sc, port, v | EHCI_PS_PR);
3440 /* Wait for reset to complete. */
3441 usb_pause_mtx(&sc->sc_bus.bus_mtx,
3442 USB_MS_TO_TICKS(USB_PORT_ROOT_RESET_DELAY));
3444 /* Terminate reset sequence. */
3445 if (!(sc->sc_flags & EHCI_SCFLG_NORESTERM))
3446 EOWRITE4(sc, port, v);
3448 /* Wait for HC to complete reset. */
3449 usb_pause_mtx(&sc->sc_bus.bus_mtx,
3450 USB_MS_TO_TICKS(EHCI_PORT_RESET_COMPLETE));
3452 v = EOREAD4(sc, port);
3453 DPRINTF("ehci after reset, status=0x%08x\n", v);
3454 if (v & EHCI_PS_PR) {
3455 device_printf(sc->sc_bus.bdev,
3456 "port reset timeout\n");
3457 err = USB_ERR_TIMEOUT;
3460 if (!(v & EHCI_PS_PE) &&
3461 (sc->sc_flags & EHCI_SCFLG_TT) == 0) {
3462 /* Not a high speed device, give up ownership.*/
3463 ehci_disown(sc, index, 0);
3467 DPRINTF("ehci port %d reset, status = 0x%08x\n",
3471 case UHF_PORT_POWER:
3472 DPRINTFN(3, "set port power %d\n", index);
3473 EOWRITE4(sc, port, v | EHCI_PS_PP);
3477 DPRINTFN(3, "set port test %d\n", index);
3480 case UHF_PORT_INDICATOR:
3481 DPRINTFN(3, "set port ind %d\n", index);
3482 EOWRITE4(sc, port, v | EHCI_PS_PIC);
3486 err = USB_ERR_IOERROR;
3490 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER):
3491 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER):
3492 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER):
3493 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER):
3496 err = USB_ERR_IOERROR;
3506 ehci_xfer_setup(struct usb_setup_params *parm)
3508 struct usb_page_search page_info;
3509 struct usb_page_cache *pc;
3511 struct usb_xfer *xfer;
3519 sc = EHCI_BUS2SC(parm->udev->bus);
3520 xfer = parm->curr_xfer;
3528 * compute maximum number of some structures
3530 if (parm->methods == &ehci_device_ctrl_methods) {
3533 * The proof for the "nqtd" formula is illustrated like
3536 * +------------------------------------+
3540 * | | xxx | x | frm 0 |
3542 * | | xxx | xx | frm 1 |
3545 * +------------------------------------+
3547 * "xxx" means a completely full USB transfer descriptor
3549 * "x" and "xx" means a short USB packet
3551 * For the remainder of an USB transfer modulo
3552 * "max_data_length" we need two USB transfer descriptors.
3553 * One to transfer the remaining data and one to finalise
3554 * with a zero length packet in case the "force_short_xfer"
3555 * flag is set. We only need two USB transfer descriptors in
3556 * the case where the transfer length of the first one is a
3557 * factor of "max_frame_size". The rest of the needed USB
3558 * transfer descriptors is given by the buffer size divided
3559 * by the maximum data payload.
3561 parm->hc_max_packet_size = 0x400;
3562 parm->hc_max_packet_count = 1;
3563 parm->hc_max_frame_size = EHCI_QTD_PAYLOAD_MAX;
3564 xfer->flags_int.bdma_enable = 1;
3566 usbd_transfer_setup_sub(parm);
3569 nqtd = ((2 * xfer->nframes) + 1 /* STATUS */
3570 + (xfer->max_data_length / xfer->max_hc_frame_size));
3572 } else if (parm->methods == &ehci_device_bulk_methods) {
3574 parm->hc_max_packet_size = 0x400;
3575 parm->hc_max_packet_count = 1;
3576 parm->hc_max_frame_size = EHCI_QTD_PAYLOAD_MAX;
3577 xfer->flags_int.bdma_enable = 1;
3579 usbd_transfer_setup_sub(parm);
3582 nqtd = ((2 * xfer->nframes)
3583 + (xfer->max_data_length / xfer->max_hc_frame_size));
3585 } else if (parm->methods == &ehci_device_intr_methods) {
3587 if (parm->speed == USB_SPEED_HIGH) {
3588 parm->hc_max_packet_size = 0x400;
3589 parm->hc_max_packet_count = 3;
3590 } else if (parm->speed == USB_SPEED_FULL) {
3591 parm->hc_max_packet_size = USB_FS_BYTES_PER_HS_UFRAME;
3592 parm->hc_max_packet_count = 1;
3594 parm->hc_max_packet_size = USB_FS_BYTES_PER_HS_UFRAME / 8;
3595 parm->hc_max_packet_count = 1;
3598 parm->hc_max_frame_size = EHCI_QTD_PAYLOAD_MAX;
3599 xfer->flags_int.bdma_enable = 1;
3601 usbd_transfer_setup_sub(parm);
3604 nqtd = ((2 * xfer->nframes)
3605 + (xfer->max_data_length / xfer->max_hc_frame_size));
3607 } else if (parm->methods == &ehci_device_isoc_fs_methods) {
3609 parm->hc_max_packet_size = 0x3FF;
3610 parm->hc_max_packet_count = 1;
3611 parm->hc_max_frame_size = 0x3FF;
3612 xfer->flags_int.bdma_enable = 1;
3614 usbd_transfer_setup_sub(parm);
3616 nsitd = xfer->nframes;
3618 } else if (parm->methods == &ehci_device_isoc_hs_methods) {
3620 parm->hc_max_packet_size = 0x400;
3621 parm->hc_max_packet_count = 3;
3622 parm->hc_max_frame_size = 0xC00;
3623 xfer->flags_int.bdma_enable = 1;
3625 usbd_transfer_setup_sub(parm);
3627 nitd = ((xfer->nframes + 7) / 8) <<
3628 usbd_xfer_get_fps_shift(xfer);
3632 parm->hc_max_packet_size = 0x400;
3633 parm->hc_max_packet_count = 1;
3634 parm->hc_max_frame_size = 0x400;
3636 usbd_transfer_setup_sub(parm);
3645 * Allocate queue heads and transfer descriptors
3649 if (usbd_transfer_setup_sub_malloc(
3650 parm, &pc, sizeof(ehci_itd_t),
3651 EHCI_ITD_ALIGN, nitd)) {
3652 parm->err = USB_ERR_NOMEM;
3656 for (n = 0; n != nitd; n++) {
3659 usbd_get_page(pc + n, 0, &page_info);
3661 td = page_info.buffer;
3664 td->itd_self = htohc32(sc, page_info.physaddr | EHCI_LINK_ITD);
3665 td->obj_next = last_obj;
3666 td->page_cache = pc + n;
3670 usb_pc_cpu_flush(pc + n);
3673 if (usbd_transfer_setup_sub_malloc(
3674 parm, &pc, sizeof(ehci_sitd_t),
3675 EHCI_SITD_ALIGN, nsitd)) {
3676 parm->err = USB_ERR_NOMEM;
3680 for (n = 0; n != nsitd; n++) {
3683 usbd_get_page(pc + n, 0, &page_info);
3685 td = page_info.buffer;
3688 td->sitd_self = htohc32(sc, page_info.physaddr | EHCI_LINK_SITD);
3689 td->obj_next = last_obj;
3690 td->page_cache = pc + n;
3694 usb_pc_cpu_flush(pc + n);
3697 if (usbd_transfer_setup_sub_malloc(
3698 parm, &pc, sizeof(ehci_qtd_t),
3699 EHCI_QTD_ALIGN, nqtd)) {
3700 parm->err = USB_ERR_NOMEM;
3704 for (n = 0; n != nqtd; n++) {
3707 usbd_get_page(pc + n, 0, &page_info);
3709 qtd = page_info.buffer;
3712 qtd->qtd_self = htohc32(sc, page_info.physaddr);
3713 qtd->obj_next = last_obj;
3714 qtd->page_cache = pc + n;
3718 usb_pc_cpu_flush(pc + n);
3721 xfer->td_start[xfer->flags_int.curr_dma_set] = last_obj;
3725 if (usbd_transfer_setup_sub_malloc(
3726 parm, &pc, sizeof(ehci_qh_t),
3727 EHCI_QH_ALIGN, nqh)) {
3728 parm->err = USB_ERR_NOMEM;
3732 for (n = 0; n != nqh; n++) {
3735 usbd_get_page(pc + n, 0, &page_info);
3737 qh = page_info.buffer;
3740 qh->qh_self = htohc32(sc, page_info.physaddr | EHCI_LINK_QH);
3741 qh->obj_next = last_obj;
3742 qh->page_cache = pc + n;
3746 usb_pc_cpu_flush(pc + n);
3749 xfer->qh_start[xfer->flags_int.curr_dma_set] = last_obj;
3751 if (!xfer->flags_int.curr_dma_set) {
3752 xfer->flags_int.curr_dma_set = 1;
3758 ehci_xfer_unsetup(struct usb_xfer *xfer)
3764 ehci_ep_init(struct usb_device *udev, struct usb_endpoint_descriptor *edesc,
3765 struct usb_endpoint *ep)
3767 ehci_softc_t *sc = EHCI_BUS2SC(udev->bus);
3769 DPRINTFN(2, "endpoint=%p, addr=%d, endpt=%d, mode=%d (%d)\n",
3771 edesc->bEndpointAddress, udev->flags.usb_mode,
3774 if (udev->flags.usb_mode != USB_MODE_HOST) {
3778 if (udev->device_index != sc->sc_addr) {
3780 if ((udev->speed != USB_SPEED_HIGH) &&
3781 ((udev->hs_hub_addr == 0) ||
3782 (udev->hs_port_no == 0) ||
3783 (udev->parent_hs_hub == NULL) ||
3784 (udev->parent_hs_hub->hub == NULL))) {
3785 /* We need a transaction translator */
3788 switch (edesc->bmAttributes & UE_XFERTYPE) {
3790 ep->methods = &ehci_device_ctrl_methods;
3793 ep->methods = &ehci_device_intr_methods;
3795 case UE_ISOCHRONOUS:
3796 if (udev->speed == USB_SPEED_HIGH) {
3797 ep->methods = &ehci_device_isoc_hs_methods;
3798 } else if (udev->speed == USB_SPEED_FULL) {
3799 ep->methods = &ehci_device_isoc_fs_methods;
3803 ep->methods = &ehci_device_bulk_methods;
3815 ehci_get_dma_delay(struct usb_device *udev, uint32_t *pus)
3818 * Wait until the hardware has finished any possible use of
3819 * the transfer descriptor(s) and QH
3821 *pus = (188); /* microseconds */
3825 ehci_device_resume(struct usb_device *udev)
3827 ehci_softc_t *sc = EHCI_BUS2SC(udev->bus);
3828 struct usb_xfer *xfer;
3829 struct usb_pipe_methods *methods;
3833 USB_BUS_LOCK(udev->bus);
3835 TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
3837 if (xfer->xroot->udev == udev) {
3839 methods = xfer->endpoint->methods;
3841 if ((methods == &ehci_device_bulk_methods) ||
3842 (methods == &ehci_device_ctrl_methods)) {
3843 EHCI_APPEND_QH(xfer->qh_start[xfer->flags_int.curr_dma_set],
3844 sc->sc_async_p_last);
3846 if (methods == &ehci_device_intr_methods) {
3847 EHCI_APPEND_QH(xfer->qh_start[xfer->flags_int.curr_dma_set],
3848 sc->sc_intr_p_last[xfer->qh_pos]);
3853 USB_BUS_UNLOCK(udev->bus);
3859 ehci_device_suspend(struct usb_device *udev)
3861 ehci_softc_t *sc = EHCI_BUS2SC(udev->bus);
3862 struct usb_xfer *xfer;
3863 struct usb_pipe_methods *methods;
3867 USB_BUS_LOCK(udev->bus);
3869 TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
3871 if (xfer->xroot->udev == udev) {
3873 methods = xfer->endpoint->methods;
3875 if ((methods == &ehci_device_bulk_methods) ||
3876 (methods == &ehci_device_ctrl_methods)) {
3877 EHCI_REMOVE_QH(xfer->qh_start[xfer->flags_int.curr_dma_set],
3878 sc->sc_async_p_last);
3880 if (methods == &ehci_device_intr_methods) {
3881 EHCI_REMOVE_QH(xfer->qh_start[xfer->flags_int.curr_dma_set],
3882 sc->sc_intr_p_last[xfer->qh_pos]);
3887 USB_BUS_UNLOCK(udev->bus);
3893 ehci_set_hw_power(struct usb_bus *bus)
3895 ehci_softc_t *sc = EHCI_BUS2SC(bus);
3903 flags = bus->hw_power_state;
3905 temp = EOREAD4(sc, EHCI_USBCMD);
3907 temp &= ~(EHCI_CMD_ASE | EHCI_CMD_PSE);
3909 if (flags & (USB_HW_POWER_CONTROL |
3910 USB_HW_POWER_BULK)) {
3911 DPRINTF("Async is active\n");
3912 temp |= EHCI_CMD_ASE;
3914 if (flags & (USB_HW_POWER_INTERRUPT |
3915 USB_HW_POWER_ISOC)) {
3916 DPRINTF("Periodic is active\n");
3917 temp |= EHCI_CMD_PSE;
3919 EOWRITE4(sc, EHCI_USBCMD, temp);
3921 USB_BUS_UNLOCK(bus);
3926 struct usb_bus_methods ehci_bus_methods =
3928 .endpoint_init = ehci_ep_init,
3929 .xfer_setup = ehci_xfer_setup,
3930 .xfer_unsetup = ehci_xfer_unsetup,
3931 .get_dma_delay = ehci_get_dma_delay,
3932 .device_resume = ehci_device_resume,
3933 .device_suspend = ehci_device_suspend,
3934 .set_hw_power = ehci_set_hw_power,
3935 .roothub_exec = ehci_roothub_exec,
3936 .xfer_poll = ehci_do_poll,