3 * Copyright (c) 2001 The NetBSD Foundation, Inc.
6 * This code is derived from software contributed to The NetBSD Foundation
7 * by Lennart Augustsson (lennart@augustsson.net).
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the NetBSD
20 * Foundation, Inc. and its contributors.
21 * 4. Neither the name of The NetBSD Foundation nor the names of its
22 * contributors may be used to endorse or promote products derived
23 * from this software without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
26 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
41 #define EHCI_MAX_DEVICES MIN(USB_MAX_DEVICES, 128)
44 * Alignment NOTE: structures must be aligned so that the hardware can index
45 * without performing addition.
47 #define EHCI_FRAMELIST_ALIGN 0x1000 /* bytes */
48 #define EHCI_FRAMELIST_COUNT 1024 /* units */
49 #define EHCI_VIRTUAL_FRAMELIST_COUNT 128 /* units */
51 #if ((8*EHCI_VIRTUAL_FRAMELIST_COUNT) < USB_MAX_HS_ISOC_FRAMES_PER_XFER)
52 #error "maximum number of high-speed isochronous frames is higher than supported!"
55 #if (EHCI_VIRTUAL_FRAMELIST_COUNT < USB_MAX_FS_ISOC_FRAMES_PER_XFER)
56 #error "maximum number of full-speed isochronous frames is higher than supported!"
60 #define EHCI_LINK_TERMINATE 0x00000001
61 #define EHCI_LINK_TYPE(x) ((x) & 0x00000006)
62 #define EHCI_LINK_ITD 0x0
63 #define EHCI_LINK_QH 0x2
64 #define EHCI_LINK_SITD 0x4
65 #define EHCI_LINK_FSTN 0x6
66 #define EHCI_LINK_ADDR(x) ((x) &~ 0x1f)
68 /* Structures alignment (bytes) */
69 #define EHCI_ITD_ALIGN 128
70 #define EHCI_SITD_ALIGN 64
71 #define EHCI_QTD_ALIGN 64
72 #define EHCI_QH_ALIGN 128
73 #define EHCI_FSTN_ALIGN 32
74 /* Data buffers are divided into one or more pages */
75 #define EHCI_PAGE_SIZE 0x1000
76 #if ((USB_PAGE_SIZE < EHCI_PAGE_SIZE) || (EHCI_PAGE_SIZE == 0) || \
77 (USB_PAGE_SIZE < EHCI_ITD_ALIGN) || (EHCI_ITD_ALIGN == 0) || \
78 (USB_PAGE_SIZE < EHCI_SITD_ALIGN) || (EHCI_SITD_ALIGN == 0) || \
79 (USB_PAGE_SIZE < EHCI_QTD_ALIGN) || (EHCI_QTD_ALIGN == 0) || \
80 (USB_PAGE_SIZE < EHCI_QH_ALIGN) || (EHCI_QH_ALIGN == 0) || \
81 (USB_PAGE_SIZE < EHCI_FSTN_ALIGN) || (EHCI_FSTN_ALIGN == 0))
82 #error "Invalid USB page size!"
87 * Isochronous Transfer Descriptor. This descriptor is used for high speed
91 volatile uint32_t itd_next;
92 volatile uint32_t itd_status[8];
93 #define EHCI_ITD_SET_LEN(x) ((x) << 16)
94 #define EHCI_ITD_GET_LEN(x) (((x) >> 16) & 0xFFF)
95 #define EHCI_ITD_IOC (1 << 15)
96 #define EHCI_ITD_SET_PG(x) ((x) << 12)
97 #define EHCI_ITD_GET_PG(x) (((x) >> 12) & 0x7)
98 #define EHCI_ITD_SET_OFFS(x) (x)
99 #define EHCI_ITD_GET_OFFS(x) (((x) >> 0) & 0xFFF)
100 #define EHCI_ITD_ACTIVE (1 << 31)
101 #define EHCI_ITD_DATABUFERR (1 << 30)
102 #define EHCI_ITD_BABBLE (1 << 29)
103 #define EHCI_ITD_XACTERR (1 << 28)
104 volatile uint32_t itd_bp[7];
106 #define EHCI_ITD_SET_ADDR(x) (x)
107 #define EHCI_ITD_GET_ADDR(x) (((x) >> 0) & 0x7F)
108 #define EHCI_ITD_SET_ENDPT(x) ((x) << 8)
109 #define EHCI_ITD_GET_ENDPT(x) (((x) >> 8) & 0xF)
111 #define EHCI_ITD_SET_DIR_IN (1 << 11)
112 #define EHCI_ITD_SET_DIR_OUT (0 << 11)
113 #define EHCI_ITD_SET_MPL(x) (x)
114 #define EHCI_ITD_GET_MPL(x) (((x) >> 0) & 0x7FF)
115 volatile uint32_t itd_bp_hi[7];
117 * Extra information needed:
120 struct ehci_itd *next;
121 struct ehci_itd *prev;
122 struct ehci_itd *obj_next;
123 struct usb_page_cache *page_cache;
124 } __aligned(EHCI_ITD_ALIGN);
126 typedef struct ehci_itd ehci_itd_t;
129 * Split Transaction Isochronous Transfer Descriptor. This descriptor is used
130 * for full speed transfers only.
133 volatile uint32_t sitd_next;
134 volatile uint32_t sitd_portaddr;
135 #define EHCI_SITD_SET_DIR_OUT (0 << 31)
136 #define EHCI_SITD_SET_DIR_IN (1 << 31)
137 #define EHCI_SITD_SET_ADDR(x) (x)
138 #define EHCI_SITD_GET_ADDR(x) ((x) & 0x7F)
139 #define EHCI_SITD_SET_ENDPT(x) ((x) << 8)
140 #define EHCI_SITD_GET_ENDPT(x) (((x) >> 8) & 0xF)
141 #define EHCI_SITD_GET_DIR(x) ((x) >> 31)
142 #define EHCI_SITD_SET_PORT(x) ((x) << 24)
143 #define EHCI_SITD_GET_PORT(x) (((x) >> 24) & 0x7F)
144 #define EHCI_SITD_SET_HUBA(x) ((x) << 16)
145 #define EHCI_SITD_GET_HUBA(x) (((x) >> 16) & 0x7F)
146 volatile uint32_t sitd_mask;
147 #define EHCI_SITD_SET_SMASK(x) (x)
148 #define EHCI_SITD_SET_CMASK(x) ((x) << 8)
149 volatile uint32_t sitd_status;
150 #define EHCI_SITD_COMPLETE_SPLIT (1<<1)
151 #define EHCI_SITD_START_SPLIT (0<<1)
152 #define EHCI_SITD_MISSED_MICRO_FRAME (1<<2)
153 #define EHCI_SITD_XACTERR (1<<3)
154 #define EHCI_SITD_BABBLE (1<<4)
155 #define EHCI_SITD_DATABUFERR (1<<5)
156 #define EHCI_SITD_ERROR (1<<6)
157 #define EHCI_SITD_ACTIVE (1<<7)
158 #define EHCI_SITD_IOC (1<<31)
159 #define EHCI_SITD_SET_LEN(len) ((len)<<16)
160 #define EHCI_SITD_GET_LEN(x) (((x)>>16) & 0x3FF)
161 volatile uint32_t sitd_bp[2];
162 volatile uint32_t sitd_back;
163 volatile uint32_t sitd_bp_hi[2];
165 * Extra information needed:
168 struct ehci_sitd *next;
169 struct ehci_sitd *prev;
170 struct ehci_sitd *obj_next;
171 struct usb_page_cache *page_cache;
172 } __aligned(EHCI_SITD_ALIGN);
174 typedef struct ehci_sitd ehci_sitd_t;
176 /* Queue Element Transfer Descriptor */
178 volatile uint32_t qtd_next;
179 volatile uint32_t qtd_altnext;
180 volatile uint32_t qtd_status;
181 #define EHCI_QTD_GET_STATUS(x) (((x) >> 0) & 0xff)
182 #define EHCI_QTD_SET_STATUS(x) ((x) << 0)
183 #define EHCI_QTD_ACTIVE 0x80
184 #define EHCI_QTD_HALTED 0x40
185 #define EHCI_QTD_BUFERR 0x20
186 #define EHCI_QTD_BABBLE 0x10
187 #define EHCI_QTD_XACTERR 0x08
188 #define EHCI_QTD_MISSEDMICRO 0x04
189 #define EHCI_QTD_SPLITXSTATE 0x02
190 #define EHCI_QTD_PINGSTATE 0x01
191 #define EHCI_QTD_STATERRS 0x74
192 #define EHCI_QTD_GET_PID(x) (((x) >> 8) & 0x3)
193 #define EHCI_QTD_SET_PID(x) ((x) << 8)
194 #define EHCI_QTD_PID_OUT 0x0
195 #define EHCI_QTD_PID_IN 0x1
196 #define EHCI_QTD_PID_SETUP 0x2
197 #define EHCI_QTD_GET_CERR(x) (((x) >> 10) & 0x3)
198 #define EHCI_QTD_SET_CERR(x) ((x) << 10)
199 #define EHCI_QTD_GET_C_PAGE(x) (((x) >> 12) & 0x7)
200 #define EHCI_QTD_SET_C_PAGE(x) ((x) << 12)
201 #define EHCI_QTD_GET_IOC(x) (((x) >> 15) & 0x1)
202 #define EHCI_QTD_IOC 0x00008000
203 #define EHCI_QTD_GET_BYTES(x) (((x) >> 16) & 0x7fff)
204 #define EHCI_QTD_SET_BYTES(x) ((x) << 16)
205 #define EHCI_QTD_GET_TOGGLE(x) (((x) >> 31) & 0x1)
206 #define EHCI_QTD_SET_TOGGLE(x) ((x) << 31)
207 #define EHCI_QTD_TOGGLE_MASK 0x80000000
208 #define EHCI_QTD_NBUFFERS 5
209 #define EHCI_QTD_PAYLOAD_MAX ((EHCI_QTD_NBUFFERS-1)*EHCI_PAGE_SIZE)
210 volatile uint32_t qtd_buffer[EHCI_QTD_NBUFFERS];
211 volatile uint32_t qtd_buffer_hi[EHCI_QTD_NBUFFERS];
213 * Extra information needed:
215 struct ehci_qtd *alt_next;
216 struct ehci_qtd *obj_next;
217 struct usb_page_cache *page_cache;
220 } __aligned(EHCI_QTD_ALIGN);
222 typedef struct ehci_qtd ehci_qtd_t;
224 /* Queue Head Sub Structure */
226 volatile uint32_t qtd_next;
227 volatile uint32_t qtd_altnext;
228 volatile uint32_t qtd_status;
229 volatile uint32_t qtd_buffer[EHCI_QTD_NBUFFERS];
230 volatile uint32_t qtd_buffer_hi[EHCI_QTD_NBUFFERS];
235 volatile uint32_t qh_link;
236 volatile uint32_t qh_endp;
237 #define EHCI_QH_GET_ADDR(x) (((x) >> 0) & 0x7f) /* endpoint addr */
238 #define EHCI_QH_SET_ADDR(x) (x)
239 #define EHCI_QH_ADDRMASK 0x0000007f
240 #define EHCI_QH_GET_INACT(x) (((x) >> 7) & 0x01) /* inactivate on next */
241 #define EHCI_QH_INACT 0x00000080
242 #define EHCI_QH_GET_ENDPT(x) (((x) >> 8) & 0x0f) /* endpoint no */
243 #define EHCI_QH_SET_ENDPT(x) ((x) << 8)
244 #define EHCI_QH_GET_EPS(x) (((x) >> 12) & 0x03) /* endpoint speed */
245 #define EHCI_QH_SET_EPS(x) ((x) << 12)
246 #define EHCI_QH_SPEED_FULL 0x0
247 #define EHCI_QH_SPEED_LOW 0x1
248 #define EHCI_QH_SPEED_HIGH 0x2
249 #define EHCI_QH_GET_DTC(x) (((x) >> 14) & 0x01) /* data toggle control */
250 #define EHCI_QH_DTC 0x00004000
251 #define EHCI_QH_GET_HRECL(x) (((x) >> 15) & 0x01) /* head of reclamation */
252 #define EHCI_QH_HRECL 0x00008000
253 #define EHCI_QH_GET_MPL(x) (((x) >> 16) & 0x7ff) /* max packet len */
254 #define EHCI_QH_SET_MPL(x) ((x) << 16)
255 #define EHCI_QH_MPLMASK 0x07ff0000
256 #define EHCI_QH_GET_CTL(x) (((x) >> 27) & 0x01) /* control endpoint */
257 #define EHCI_QH_CTL 0x08000000
258 #define EHCI_QH_GET_NRL(x) (((x) >> 28) & 0x0f) /* NAK reload */
259 #define EHCI_QH_SET_NRL(x) ((x) << 28)
260 volatile uint32_t qh_endphub;
261 #define EHCI_QH_GET_SMASK(x) (((x) >> 0) & 0xff) /* intr sched mask */
262 #define EHCI_QH_SET_SMASK(x) ((x) << 0)
263 #define EHCI_QH_GET_CMASK(x) (((x) >> 8) & 0xff) /* split completion mask */
264 #define EHCI_QH_SET_CMASK(x) ((x) << 8)
265 #define EHCI_QH_GET_HUBA(x) (((x) >> 16) & 0x7f) /* hub address */
266 #define EHCI_QH_SET_HUBA(x) ((x) << 16)
267 #define EHCI_QH_GET_PORT(x) (((x) >> 23) & 0x7f) /* hub port */
268 #define EHCI_QH_SET_PORT(x) ((x) << 23)
269 #define EHCI_QH_GET_MULT(x) (((x) >> 30) & 0x03) /* pipe multiplier */
270 #define EHCI_QH_SET_MULT(x) ((x) << 30)
271 volatile uint32_t qh_curqtd;
272 struct ehci_qh_sub qh_qtd;
274 * Extra information needed:
276 struct ehci_qh *next;
277 struct ehci_qh *prev;
278 struct ehci_qh *obj_next;
279 struct usb_page_cache *page_cache;
281 } __aligned(EHCI_QH_ALIGN);
283 typedef struct ehci_qh ehci_qh_t;
285 /* Periodic Frame Span Traversal Node */
287 volatile uint32_t fstn_link;
288 volatile uint32_t fstn_back;
289 } __aligned(EHCI_FSTN_ALIGN);
291 typedef struct ehci_fstn ehci_fstn_t;
293 struct ehci_hw_softc {
294 struct usb_page_cache pframes_pc;
295 struct usb_page_cache terminate_pc;
296 struct usb_page_cache async_start_pc;
297 struct usb_page_cache intr_start_pc[EHCI_VIRTUAL_FRAMELIST_COUNT];
298 struct usb_page_cache isoc_hs_start_pc[EHCI_VIRTUAL_FRAMELIST_COUNT];
299 struct usb_page_cache isoc_fs_start_pc[EHCI_VIRTUAL_FRAMELIST_COUNT];
301 struct usb_page pframes_pg;
302 struct usb_page terminate_pg;
303 struct usb_page async_start_pg;
304 struct usb_page intr_start_pg[EHCI_VIRTUAL_FRAMELIST_COUNT];
305 struct usb_page isoc_hs_start_pg[EHCI_VIRTUAL_FRAMELIST_COUNT];
306 struct usb_page isoc_fs_start_pg[EHCI_VIRTUAL_FRAMELIST_COUNT];
309 struct ehci_config_desc {
310 struct usb_config_descriptor confd;
311 struct usb_interface_descriptor ifcd;
312 struct usb_endpoint_descriptor endpd;
315 union ehci_hub_desc {
316 struct usb_status stat;
317 struct usb_port_status ps;
318 struct usb_hub_descriptor hubd;
322 typedef struct ehci_softc {
323 struct ehci_hw_softc sc_hw;
324 struct usb_bus sc_bus; /* base device */
325 struct usb_callout sc_tmo_pcd;
326 struct usb_callout sc_tmo_poll;
327 union ehci_hub_desc sc_hub_desc;
329 struct usb_device *sc_devices[EHCI_MAX_DEVICES];
330 struct resource *sc_io_res;
331 struct resource *sc_irq_res;
332 struct ehci_qh *sc_async_p_last;
333 struct ehci_qh *sc_intr_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT];
334 struct ehci_sitd *sc_isoc_fs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT];
335 struct ehci_itd *sc_isoc_hs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT];
337 bus_size_t sc_io_size;
338 bus_space_tag_t sc_io_tag;
339 bus_space_handle_t sc_io_hdl;
341 uint32_t sc_terminate_self; /* TD short packet termination pointer */
343 uint32_t sc_cmd; /* shadow of cmd register during
346 uint16_t sc_intr_stat[EHCI_VIRTUAL_FRAMELIST_COUNT];
347 uint16_t sc_id_vendor; /* vendor ID for root hub */
348 uint16_t sc_flags; /* chip specific flags */
349 #define EHCI_SCFLG_SETMODE 0x0001 /* set bridge mode again after init */
350 #define EHCI_SCFLG_FORCESPEED 0x0002 /* force speed */
351 #define EHCI_SCFLG_NORESTERM 0x0004 /* don't terminate reset sequence */
352 #define EHCI_SCFLG_BIGEDESC 0x0008 /* big-endian byte order descriptors */
353 #define EHCI_SCFLG_BIGEMMIO 0x0010 /* big-endian byte order MMIO */
354 #define EHCI_SCFLG_TT 0x0020 /* transaction translator present */
355 #define EHCI_SCFLG_LOSTINTRBUG 0x0040 /* workaround for VIA / ATI chipsets */
356 #define EHCI_SCFLG_IAADBUG 0x0080 /* workaround for nVidia chipsets */
358 uint8_t sc_offs; /* offset to operational registers */
359 uint8_t sc_doorbell_disable; /* set on doorbell failure */
361 uint8_t sc_addr; /* device address */
362 uint8_t sc_conf; /* device configuration */
364 uint8_t sc_hub_idata[8];
366 char sc_vendor[16]; /* vendor string for root hub */
370 #define EREAD1(sc, a) bus_space_read_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (a))
371 #define EREAD2(sc, a) bus_space_read_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (a))
372 #define EREAD4(sc, a) bus_space_read_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (a))
373 #define EWRITE1(sc, a, x) \
374 bus_space_write_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (a), (x))
375 #define EWRITE2(sc, a, x) \
376 bus_space_write_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (a), (x))
377 #define EWRITE4(sc, a, x) \
378 bus_space_write_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (a), (x))
379 #define EOREAD1(sc, a) \
380 bus_space_read_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a))
381 #define EOREAD2(sc, a) \
382 bus_space_read_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a))
383 #define EOREAD4(sc, a) \
384 bus_space_read_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a))
385 #define EOWRITE1(sc, a, x) \
386 bus_space_write_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a), (x))
387 #define EOWRITE2(sc, a, x) \
388 bus_space_write_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a), (x))
389 #define EOWRITE4(sc, a, x) \
390 bus_space_write_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a), (x))
392 #ifdef USB_EHCI_BIG_ENDIAN_DESC
394 * Handle byte order conversion between host and ``host controller''.
395 * Typically the latter is little-endian but some controllers require
396 * big-endian in which case we may need to manually swap.
398 static __inline uint32_t
399 htohc32(const struct ehci_softc *sc, const uint32_t v)
401 return sc->sc_flags & EHCI_SCFLG_BIGEDESC ? htobe32(v) : htole32(v);
404 static __inline uint16_t
405 htohc16(const struct ehci_softc *sc, const uint16_t v)
407 return sc->sc_flags & EHCI_SCFLG_BIGEDESC ? htobe16(v) : htole16(v);
410 static __inline uint32_t
411 hc32toh(const struct ehci_softc *sc, const uint32_t v)
413 return sc->sc_flags & EHCI_SCFLG_BIGEDESC ? be32toh(v) : le32toh(v);
416 static __inline uint16_t
417 hc16toh(const struct ehci_softc *sc, const uint16_t v)
419 return sc->sc_flags & EHCI_SCFLG_BIGEDESC ? be16toh(v) : le16toh(v);
423 * Normal little-endian only conversion routines.
425 static __inline uint32_t
426 htohc32(const struct ehci_softc *sc, const uint32_t v)
431 static __inline uint16_t
432 htohc16(const struct ehci_softc *sc, const uint16_t v)
437 static __inline uint32_t
438 hc32toh(const struct ehci_softc *sc, const uint32_t v)
443 static __inline uint16_t
444 hc16toh(const struct ehci_softc *sc, const uint16_t v)
450 usb_bus_mem_cb_t ehci_iterate_hw_softc;
452 usb_error_t ehci_reset(ehci_softc_t *sc);
453 usb_error_t ehci_init(ehci_softc_t *sc);
454 void ehci_detach(struct ehci_softc *sc);
455 void ehci_suspend(struct ehci_softc *sc);
456 void ehci_resume(struct ehci_softc *sc);
457 void ehci_shutdown(ehci_softc_t *sc);
458 void ehci_interrupt(ehci_softc_t *sc);
460 #endif /* _EHCI_H_ */