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41 /*------------------------------------------------------------------
42 * octeon_fau.h Fetch & Add Unit
44 *------------------------------------------------------------------
48 #ifndef ___OCTEON_FAU__H___
49 #define ___OCTEON_FAU__H___
55 OCTEON_FAU_OP_SIZE_8 = 0,
56 OCTEON_FAU_OP_SIZE_16 = 1,
57 OCTEON_FAU_OP_SIZE_32 = 2,
58 OCTEON_FAU_OP_SIZE_64 = 3
59 } octeon_fau_op_size_t;
63 #define OCTEON_FAU_LOAD_IO_ADDRESS octeon_build_io_address(0x1e, 0)
64 #define OCTEON_FAU_BITS_SCRADDR 63,56
65 #define OCTEON_FAU_BITS_LEN 55,48
66 #define OCTEON_FAU_BITS_INEVAL 35,14
67 #define OCTEON_FAU_BITS_TAGWAIT 13,13
68 #define OCTEON_FAU_BITS_NOADD 13,13
69 #define OCTEON_FAU_BITS_SIZE 12,11
70 #define OCTEON_FAU_BITS_REGISTER 10,0
72 #define OCTEON_FAU_REG_64_ADDR(x) ((x <<3) + OCTEON_FAU_REG_64_START)
75 OCTEON_FAU_REG_64_START = 0,
76 OCTEON_FAU_REG_OQ_ADDR_INDEX = OCTEON_FAU_REG_64_ADDR(0),
77 OCTEON_FAU_REG_OQ_ADDR_END = OCTEON_FAU_REG_64_ADDR(31),
78 OCTEON_FAU_REG_64_END = OCTEON_FAU_REG_64_ADDR(39),
79 } octeon_fau_reg_64_t;
81 #define OCTEON_FAU_REG_32_ADDR(x) ((x <<2) + OCTEON_FAU_REG_32_START)
84 OCTEON_FAU_REG_32_START = OCTEON_FAU_REG_64_END,
85 OCTEON_FAU_REG_32_END = OCTEON_FAU_REG_32_ADDR(0),
86 } octeon_fau_reg_32_t;
91 * octeon_fau_atomic_address
93 * Builds a I/O address for accessing the FAU
95 * @param tagwait Should the atomic add wait for the current tag switch
96 * operation to complete.
98 * - 1 = Wait for tag switch to complete
99 * @param reg FAU atomic register to access. 0 <= reg < 4096.
100 * - Step by 2 for 16 bit access.
101 * - Step by 4 for 32 bit access.
102 * - Step by 8 for 64 bit access.
103 * @param value Signed value to add.
104 * Note: When performing 32 and 64 bit access, only the low
105 * 22 bits are available.
106 * @return Address to read from for atomic update
108 static inline uint64_t octeon_fau_atomic_address (uint64_t tagwait, uint64_t reg,
111 return (OCTEON_ADD_IO_SEG(OCTEON_FAU_LOAD_IO_ADDRESS) |
112 octeon_build_bits(OCTEON_FAU_BITS_INEVAL, value) |
113 octeon_build_bits(OCTEON_FAU_BITS_TAGWAIT, tagwait) |
114 octeon_build_bits(OCTEON_FAU_BITS_REGISTER, reg));
119 * octeon_fau_store_address
121 * Builds a store I/O address for writing to the FAU
123 * noadd 0 = Store value is atomically added to the current value
124 * 1 = Store value is atomically written over the current value
125 * reg FAU atomic register to access. 0 <= reg < 4096.
126 * - Step by 2 for 16 bit access.
127 * - Step by 4 for 32 bit access.
128 * - Step by 8 for 64 bit access.
129 * Returns Address to store for atomic update
131 static inline uint64_t octeon_fau_store_address (uint64_t noadd, uint64_t reg)
133 return (OCTEON_ADD_IO_SEG(OCTEON_FAU_LOAD_IO_ADDRESS) |
134 octeon_build_bits(OCTEON_FAU_BITS_NOADD, noadd) |
135 octeon_build_bits(OCTEON_FAU_BITS_REGISTER, reg));
140 * octeon_fau_atomic_add32
142 * Perform an atomic 32 bit add
144 * @param reg FAU atomic register to access. 0 <= reg < 4096.
145 * - Step by 4 for 32 bit access.
146 * @param value Signed value to add.
148 static inline void octeon_fau_atomic_add32 (octeon_fau_reg_32_t reg, int32_t value)
150 oct_write32(octeon_fau_store_address(0, reg), value);
154 * octeon_fau_fetch_and_add
156 * reg FAU atomic register to access. 0 <= reg < 4096.
157 * - Step by 8 for 64 bit access.
158 * value Signed value to add.
159 * Note: Only the low 22 bits are available.
160 * returns Value of the register before the update
162 static inline int64_t octeon_fau_fetch_and_add64 (octeon_fau_reg_64_t reg,
166 return (oct_read64(octeon_fau_atomic_address(0, reg, val64)));
170 * octeon_fau_fetch_and_add32
172 * reg FAU atomic register to access. 0 <= reg < 4096.
173 * - Step by 8 for 64 bit access.
174 * value Signed value to add.
175 * Note: Only the low 22 bits are available.
176 * returns Value of the register before the update
178 static inline int32_t octeon_fau_fetch_and_add32 (octeon_fau_reg_64_t reg,
181 return (oct_read32(octeon_fau_atomic_address(0, reg, val32)));
185 * octeon_fau_atomic_write32
187 * Perform an atomic 32 bit write
189 * @param reg FAU atomic register to access. 0 <= reg < 4096.
190 * - Step by 4 for 32 bit access.
191 * @param value Signed value to write.
193 static inline void octeon_fau_atomic_write32(octeon_fau_reg_32_t reg, int32_t value)
195 oct_write32(octeon_fau_store_address(1, reg), value);
200 * octeon_fau_atomic_write64
202 * Perform an atomic 32 bit write
204 * reg FAU atomic register to access. 0 <= reg < 4096.
205 * - Step by 8 for 64 bit access.
206 * value Signed value to write.
208 static inline void octeon_fau_atomic_write64 (octeon_fau_reg_64_t reg, int64_t value)
210 oct_write64(octeon_fau_store_address(1, reg), value);
214 static inline void octeon_fau_atomic_add64 (octeon_fau_reg_64_t reg, int64_t value)
216 oct_write64_int64(octeon_fau_store_address(0, reg), value);
220 #endif /* ___OCTEON_FAU__H___ */