2 * Copyright (c) 2011 NetApp, Inc.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
32 #include <sys/param.h>
33 #include <sys/sysctl.h>
34 #include <sys/ioctl.h>
36 #include <sys/_iovec.h>
37 #include <sys/cpuset.h>
39 #include <x86/segments.h>
40 #include <machine/specialreg.h>
41 #include <machine/param.h>
52 #include <machine/vmm.h>
53 #include <machine/vmm_dev.h>
57 #define MB (1024 * 1024UL)
58 #define GB (1024 * 1024 * 1024UL)
62 uint32_t lowmem_limit;
63 enum vm_mmap_style vms;
72 #define CREATE(x) sysctlbyname("hw.vmm.create", NULL, NULL, (x), strlen((x)))
73 #define DESTROY(x) sysctlbyname("hw.vmm.destroy", NULL, NULL, (x), strlen((x)))
76 vm_device_open(const char *name)
81 len = strlen("/dev/vmm/") + strlen(name) + 1;
83 assert(vmfile != NULL);
84 snprintf(vmfile, len, "/dev/vmm/%s", name);
86 /* Open the device file */
87 fd = open(vmfile, O_RDWR, 0);
94 vm_create(const char *name)
97 return (CREATE((char *)name));
101 vm_open(const char *name)
105 vm = malloc(sizeof(struct vmctx) + strlen(name) + 1);
110 vm->lowmem_limit = 3 * GB;
111 vm->name = (char *)(vm + 1);
112 strcpy(vm->name, name);
114 if ((vm->fd = vm_device_open(vm->name)) < 0)
124 vm_destroy(struct vmctx *vm)
136 vm_parse_memsize(const char *optarg, size_t *ret_memsize)
142 optval = strtoul(optarg, &endptr, 0);
143 if (*optarg != '\0' && *endptr == '\0') {
145 * For the sake of backward compatibility if the memory size
146 * specified on the command line is less than a megabyte then
147 * it is interpreted as being in units of MB.
151 *ret_memsize = optval;
154 error = expand_number(optarg, ret_memsize);
160 vm_get_memory_seg(struct vmctx *ctx, vm_paddr_t gpa, size_t *ret_len,
164 struct vm_memory_segment seg;
166 bzero(&seg, sizeof(seg));
168 error = ioctl(ctx->fd, VM_GET_MEMORY_SEG, &seg);
176 vm_get_lowmem_limit(struct vmctx *ctx)
179 return (ctx->lowmem_limit);
183 vm_set_lowmem_limit(struct vmctx *ctx, uint32_t limit)
186 ctx->lowmem_limit = limit;
190 vm_set_memflags(struct vmctx *ctx, int flags)
193 ctx->memflags = flags;
197 setup_memory_segment(struct vmctx *ctx, vm_paddr_t gpa, size_t len, char **addr)
199 int error, mmap_flags;
200 struct vm_memory_segment seg;
203 * Create and optionally map 'len' bytes of memory at guest
204 * physical address 'gpa'
206 bzero(&seg, sizeof(seg));
209 error = ioctl(ctx->fd, VM_MAP_MEMORY, &seg);
210 if (error == 0 && addr != NULL) {
211 mmap_flags = MAP_SHARED;
212 if ((ctx->memflags & VM_MEM_F_INCORE) == 0)
213 mmap_flags |= MAP_NOCORE;
214 *addr = mmap(NULL, len, PROT_READ | PROT_WRITE, mmap_flags,
221 vm_setup_memory(struct vmctx *ctx, size_t memsize, enum vm_mmap_style vms)
226 /* XXX VM_MMAP_SPARSE not implemented yet */
227 assert(vms == VM_MMAP_NONE || vms == VM_MMAP_ALL);
231 * If 'memsize' cannot fit entirely in the 'lowmem' segment then
232 * create another 'highmem' segment above 4GB for the remainder.
234 if (memsize > ctx->lowmem_limit) {
235 ctx->lowmem = ctx->lowmem_limit;
236 ctx->highmem = memsize - ctx->lowmem;
238 ctx->lowmem = memsize;
242 if (ctx->lowmem > 0) {
243 addr = (vms == VM_MMAP_ALL) ? &ctx->lowmem_addr : NULL;
244 error = setup_memory_segment(ctx, 0, ctx->lowmem, addr);
249 if (ctx->highmem > 0) {
250 addr = (vms == VM_MMAP_ALL) ? &ctx->highmem_addr : NULL;
251 error = setup_memory_segment(ctx, 4*GB, ctx->highmem, addr);
260 vm_map_gpa(struct vmctx *ctx, vm_paddr_t gaddr, size_t len)
263 /* XXX VM_MMAP_SPARSE not implemented yet */
264 assert(ctx->vms == VM_MMAP_ALL);
266 if (gaddr < ctx->lowmem && gaddr + len <= ctx->lowmem)
267 return ((void *)(ctx->lowmem_addr + gaddr));
271 if (gaddr < ctx->highmem && gaddr + len <= ctx->highmem)
272 return ((void *)(ctx->highmem_addr + gaddr));
279 vm_get_lowmem_size(struct vmctx *ctx)
282 return (ctx->lowmem);
286 vm_get_highmem_size(struct vmctx *ctx)
289 return (ctx->highmem);
293 vm_set_desc(struct vmctx *ctx, int vcpu, int reg,
294 uint64_t base, uint32_t limit, uint32_t access)
297 struct vm_seg_desc vmsegdesc;
299 bzero(&vmsegdesc, sizeof(vmsegdesc));
300 vmsegdesc.cpuid = vcpu;
301 vmsegdesc.regnum = reg;
302 vmsegdesc.desc.base = base;
303 vmsegdesc.desc.limit = limit;
304 vmsegdesc.desc.access = access;
306 error = ioctl(ctx->fd, VM_SET_SEGMENT_DESCRIPTOR, &vmsegdesc);
311 vm_get_desc(struct vmctx *ctx, int vcpu, int reg,
312 uint64_t *base, uint32_t *limit, uint32_t *access)
315 struct vm_seg_desc vmsegdesc;
317 bzero(&vmsegdesc, sizeof(vmsegdesc));
318 vmsegdesc.cpuid = vcpu;
319 vmsegdesc.regnum = reg;
321 error = ioctl(ctx->fd, VM_GET_SEGMENT_DESCRIPTOR, &vmsegdesc);
323 *base = vmsegdesc.desc.base;
324 *limit = vmsegdesc.desc.limit;
325 *access = vmsegdesc.desc.access;
331 vm_get_seg_desc(struct vmctx *ctx, int vcpu, int reg, struct seg_desc *seg_desc)
335 error = vm_get_desc(ctx, vcpu, reg, &seg_desc->base, &seg_desc->limit,
341 vm_set_register(struct vmctx *ctx, int vcpu, int reg, uint64_t val)
344 struct vm_register vmreg;
346 bzero(&vmreg, sizeof(vmreg));
351 error = ioctl(ctx->fd, VM_SET_REGISTER, &vmreg);
356 vm_get_register(struct vmctx *ctx, int vcpu, int reg, uint64_t *ret_val)
359 struct vm_register vmreg;
361 bzero(&vmreg, sizeof(vmreg));
365 error = ioctl(ctx->fd, VM_GET_REGISTER, &vmreg);
366 *ret_val = vmreg.regval;
371 vm_run(struct vmctx *ctx, int vcpu, uint64_t rip, struct vm_exit *vmexit)
376 bzero(&vmrun, sizeof(vmrun));
380 error = ioctl(ctx->fd, VM_RUN, &vmrun);
381 bcopy(&vmrun.vm_exit, vmexit, sizeof(struct vm_exit));
386 vm_suspend(struct vmctx *ctx, enum vm_suspend_how how)
388 struct vm_suspend vmsuspend;
390 bzero(&vmsuspend, sizeof(vmsuspend));
392 return (ioctl(ctx->fd, VM_SUSPEND, &vmsuspend));
396 vm_reinit(struct vmctx *ctx)
399 return (ioctl(ctx->fd, VM_REINIT, 0));
403 vm_inject_exception_real(struct vmctx *ctx, int vcpu, int vector,
404 int error_code, int error_code_valid)
406 struct vm_exception exc;
408 bzero(&exc, sizeof(exc));
411 exc.error_code = error_code;
412 exc.error_code_valid = error_code_valid;
414 return (ioctl(ctx->fd, VM_INJECT_EXCEPTION, &exc));
418 vm_inject_exception(struct vmctx *ctx, int vcpu, int vector)
421 return (vm_inject_exception_real(ctx, vcpu, vector, 0, 0));
425 vm_inject_exception2(struct vmctx *ctx, int vcpu, int vector, int errcode)
428 return (vm_inject_exception_real(ctx, vcpu, vector, errcode, 1));
432 vm_apicid2vcpu(struct vmctx *ctx, int apicid)
435 * The apic id associated with the 'vcpu' has the same numerical value
436 * as the 'vcpu' itself.
442 vm_lapic_irq(struct vmctx *ctx, int vcpu, int vector)
444 struct vm_lapic_irq vmirq;
446 bzero(&vmirq, sizeof(vmirq));
448 vmirq.vector = vector;
450 return (ioctl(ctx->fd, VM_LAPIC_IRQ, &vmirq));
454 vm_lapic_local_irq(struct vmctx *ctx, int vcpu, int vector)
456 struct vm_lapic_irq vmirq;
458 bzero(&vmirq, sizeof(vmirq));
460 vmirq.vector = vector;
462 return (ioctl(ctx->fd, VM_LAPIC_LOCAL_IRQ, &vmirq));
466 vm_lapic_msi(struct vmctx *ctx, uint64_t addr, uint64_t msg)
468 struct vm_lapic_msi vmmsi;
470 bzero(&vmmsi, sizeof(vmmsi));
474 return (ioctl(ctx->fd, VM_LAPIC_MSI, &vmmsi));
478 vm_ioapic_assert_irq(struct vmctx *ctx, int irq)
480 struct vm_ioapic_irq ioapic_irq;
482 bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq));
483 ioapic_irq.irq = irq;
485 return (ioctl(ctx->fd, VM_IOAPIC_ASSERT_IRQ, &ioapic_irq));
489 vm_ioapic_deassert_irq(struct vmctx *ctx, int irq)
491 struct vm_ioapic_irq ioapic_irq;
493 bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq));
494 ioapic_irq.irq = irq;
496 return (ioctl(ctx->fd, VM_IOAPIC_DEASSERT_IRQ, &ioapic_irq));
500 vm_ioapic_pulse_irq(struct vmctx *ctx, int irq)
502 struct vm_ioapic_irq ioapic_irq;
504 bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq));
505 ioapic_irq.irq = irq;
507 return (ioctl(ctx->fd, VM_IOAPIC_PULSE_IRQ, &ioapic_irq));
511 vm_ioapic_pincount(struct vmctx *ctx, int *pincount)
514 return (ioctl(ctx->fd, VM_IOAPIC_PINCOUNT, pincount));
518 vm_isa_assert_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq)
520 struct vm_isa_irq isa_irq;
522 bzero(&isa_irq, sizeof(struct vm_isa_irq));
523 isa_irq.atpic_irq = atpic_irq;
524 isa_irq.ioapic_irq = ioapic_irq;
526 return (ioctl(ctx->fd, VM_ISA_ASSERT_IRQ, &isa_irq));
530 vm_isa_deassert_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq)
532 struct vm_isa_irq isa_irq;
534 bzero(&isa_irq, sizeof(struct vm_isa_irq));
535 isa_irq.atpic_irq = atpic_irq;
536 isa_irq.ioapic_irq = ioapic_irq;
538 return (ioctl(ctx->fd, VM_ISA_DEASSERT_IRQ, &isa_irq));
542 vm_isa_pulse_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq)
544 struct vm_isa_irq isa_irq;
546 bzero(&isa_irq, sizeof(struct vm_isa_irq));
547 isa_irq.atpic_irq = atpic_irq;
548 isa_irq.ioapic_irq = ioapic_irq;
550 return (ioctl(ctx->fd, VM_ISA_PULSE_IRQ, &isa_irq));
554 vm_isa_set_irq_trigger(struct vmctx *ctx, int atpic_irq,
555 enum vm_intr_trigger trigger)
557 struct vm_isa_irq_trigger isa_irq_trigger;
559 bzero(&isa_irq_trigger, sizeof(struct vm_isa_irq_trigger));
560 isa_irq_trigger.atpic_irq = atpic_irq;
561 isa_irq_trigger.trigger = trigger;
563 return (ioctl(ctx->fd, VM_ISA_SET_IRQ_TRIGGER, &isa_irq_trigger));
567 vm_inject_nmi(struct vmctx *ctx, int vcpu)
571 bzero(&vmnmi, sizeof(vmnmi));
574 return (ioctl(ctx->fd, VM_INJECT_NMI, &vmnmi));
581 { "hlt_exit", VM_CAP_HALT_EXIT },
582 { "mtrap_exit", VM_CAP_MTRAP_EXIT },
583 { "pause_exit", VM_CAP_PAUSE_EXIT },
584 { "unrestricted_guest", VM_CAP_UNRESTRICTED_GUEST },
585 { "enable_invpcid", VM_CAP_ENABLE_INVPCID },
590 vm_capability_name2type(const char *capname)
594 for (i = 0; capstrmap[i].name != NULL && capname != NULL; i++) {
595 if (strcmp(capstrmap[i].name, capname) == 0)
596 return (capstrmap[i].type);
603 vm_capability_type2name(int type)
607 for (i = 0; capstrmap[i].name != NULL; i++) {
608 if (capstrmap[i].type == type)
609 return (capstrmap[i].name);
616 vm_get_capability(struct vmctx *ctx, int vcpu, enum vm_cap_type cap,
620 struct vm_capability vmcap;
622 bzero(&vmcap, sizeof(vmcap));
626 error = ioctl(ctx->fd, VM_GET_CAPABILITY, &vmcap);
627 *retval = vmcap.capval;
632 vm_set_capability(struct vmctx *ctx, int vcpu, enum vm_cap_type cap, int val)
634 struct vm_capability vmcap;
636 bzero(&vmcap, sizeof(vmcap));
641 return (ioctl(ctx->fd, VM_SET_CAPABILITY, &vmcap));
645 vm_assign_pptdev(struct vmctx *ctx, int bus, int slot, int func)
647 struct vm_pptdev pptdev;
649 bzero(&pptdev, sizeof(pptdev));
654 return (ioctl(ctx->fd, VM_BIND_PPTDEV, &pptdev));
658 vm_unassign_pptdev(struct vmctx *ctx, int bus, int slot, int func)
660 struct vm_pptdev pptdev;
662 bzero(&pptdev, sizeof(pptdev));
667 return (ioctl(ctx->fd, VM_UNBIND_PPTDEV, &pptdev));
671 vm_map_pptdev_mmio(struct vmctx *ctx, int bus, int slot, int func,
672 vm_paddr_t gpa, size_t len, vm_paddr_t hpa)
674 struct vm_pptdev_mmio pptmmio;
676 bzero(&pptmmio, sizeof(pptmmio));
684 return (ioctl(ctx->fd, VM_MAP_PPTDEV_MMIO, &pptmmio));
688 vm_setup_pptdev_msi(struct vmctx *ctx, int vcpu, int bus, int slot, int func,
689 uint64_t addr, uint64_t msg, int numvec)
691 struct vm_pptdev_msi pptmsi;
693 bzero(&pptmsi, sizeof(pptmsi));
700 pptmsi.numvec = numvec;
702 return (ioctl(ctx->fd, VM_PPTDEV_MSI, &pptmsi));
706 vm_setup_pptdev_msix(struct vmctx *ctx, int vcpu, int bus, int slot, int func,
707 int idx, uint64_t addr, uint64_t msg, uint32_t vector_control)
709 struct vm_pptdev_msix pptmsix;
711 bzero(&pptmsix, sizeof(pptmsix));
719 pptmsix.vector_control = vector_control;
721 return ioctl(ctx->fd, VM_PPTDEV_MSIX, &pptmsix);
725 vm_get_stats(struct vmctx *ctx, int vcpu, struct timeval *ret_tv,
730 static struct vm_stats vmstats;
732 vmstats.cpuid = vcpu;
734 error = ioctl(ctx->fd, VM_STATS, &vmstats);
737 *ret_entries = vmstats.num_entries;
739 *ret_tv = vmstats.tv;
740 return (vmstats.statbuf);
746 vm_get_stat_desc(struct vmctx *ctx, int index)
748 static struct vm_stat_desc statdesc;
750 statdesc.index = index;
751 if (ioctl(ctx->fd, VM_STAT_DESC, &statdesc) == 0)
752 return (statdesc.desc);
758 vm_get_x2apic_state(struct vmctx *ctx, int vcpu, enum x2apic_state *state)
761 struct vm_x2apic x2apic;
763 bzero(&x2apic, sizeof(x2apic));
766 error = ioctl(ctx->fd, VM_GET_X2APIC_STATE, &x2apic);
767 *state = x2apic.state;
772 vm_set_x2apic_state(struct vmctx *ctx, int vcpu, enum x2apic_state state)
775 struct vm_x2apic x2apic;
777 bzero(&x2apic, sizeof(x2apic));
779 x2apic.state = state;
781 error = ioctl(ctx->fd, VM_SET_X2APIC_STATE, &x2apic);
788 * Table 9-1. IA-32 Processor States Following Power-up, Reset or INIT
791 vcpu_reset(struct vmctx *vmctx, int vcpu)
794 uint64_t rflags, rip, cr0, cr4, zero, desc_base, rdx;
795 uint32_t desc_access, desc_limit;
801 error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RFLAGS, rflags);
806 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RIP, rip)) != 0)
810 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR0, cr0)) != 0)
813 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR3, zero)) != 0)
817 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR4, cr4)) != 0)
821 * CS: present, r/w, accessed, 16-bit, byte granularity, usable
823 desc_base = 0xffff0000;
825 desc_access = 0x0093;
826 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_CS,
827 desc_base, desc_limit, desc_access);
832 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CS, sel)) != 0)
836 * SS,DS,ES,FS,GS: present, r/w, accessed, 16-bit, byte granularity
840 desc_access = 0x0093;
841 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_SS,
842 desc_base, desc_limit, desc_access);
846 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_DS,
847 desc_base, desc_limit, desc_access);
851 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_ES,
852 desc_base, desc_limit, desc_access);
856 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_FS,
857 desc_base, desc_limit, desc_access);
861 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_GS,
862 desc_base, desc_limit, desc_access);
867 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_SS, sel)) != 0)
869 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_DS, sel)) != 0)
871 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_ES, sel)) != 0)
873 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_FS, sel)) != 0)
875 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_GS, sel)) != 0)
878 /* General purpose registers */
880 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RAX, zero)) != 0)
882 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RBX, zero)) != 0)
884 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RCX, zero)) != 0)
886 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RDX, rdx)) != 0)
888 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RSI, zero)) != 0)
890 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RDI, zero)) != 0)
892 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RBP, zero)) != 0)
894 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RSP, zero)) != 0)
901 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_GDTR,
902 desc_base, desc_limit, desc_access);
906 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_IDTR,
907 desc_base, desc_limit, desc_access);
914 desc_access = 0x0000008b;
915 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_TR, 0, 0, desc_access);
920 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_TR, sel)) != 0)
926 desc_access = 0x00000082;
927 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_LDTR, desc_base,
928 desc_limit, desc_access);
933 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_LDTR, 0)) != 0)
936 /* XXX cr2, debug registers */
944 vm_get_gpa_pmap(struct vmctx *ctx, uint64_t gpa, uint64_t *pte, int *num)
947 struct vm_gpa_pte gpapte;
949 bzero(&gpapte, sizeof(gpapte));
952 error = ioctl(ctx->fd, VM_GET_GPA_PMAP, &gpapte);
955 *num = gpapte.ptenum;
956 for (i = 0; i < gpapte.ptenum; i++)
957 pte[i] = gpapte.pte[i];
964 vm_get_hpet_capabilities(struct vmctx *ctx, uint32_t *capabilities)
967 struct vm_hpet_cap cap;
969 bzero(&cap, sizeof(struct vm_hpet_cap));
970 error = ioctl(ctx->fd, VM_GET_HPET_CAPABILITIES, &cap);
971 if (capabilities != NULL)
972 *capabilities = cap.capabilities;
977 gla2gpa(struct vmctx *ctx, int vcpu, struct vm_guest_paging *paging,
978 uint64_t gla, int prot, int *fault, uint64_t *gpa)
980 struct vm_gla2gpa gg;
983 bzero(&gg, sizeof(struct vm_gla2gpa));
989 error = ioctl(ctx->fd, VM_GLA2GPA, &gg);
998 #define min(a,b) (((a) < (b)) ? (a) : (b))
1002 vm_copy_setup(struct vmctx *ctx, int vcpu, struct vm_guest_paging *paging,
1003 uint64_t gla, size_t len, int prot, struct iovec *iov, int iovcnt)
1006 int error, fault, i, n, off;
1008 for (i = 0; i < iovcnt; i++) {
1009 iov[i].iov_base = 0;
1015 error = gla2gpa(ctx, vcpu, paging, gla, prot, &fault, &gpa);
1021 off = gpa & PAGE_MASK;
1022 n = min(len, PAGE_SIZE - off);
1024 iov->iov_base = (void *)gpa;
1036 vm_copyin(struct vmctx *ctx, int vcpu, struct iovec *iov, void *vp, size_t len)
1045 assert(iov->iov_len);
1046 gpa = (uint64_t)iov->iov_base;
1047 n = min(len, iov->iov_len);
1048 src = vm_map_gpa(ctx, gpa, n);
1058 vm_copyout(struct vmctx *ctx, int vcpu, const void *vp, struct iovec *iov,
1068 assert(iov->iov_len);
1069 gpa = (uint64_t)iov->iov_base;
1070 n = min(len, iov->iov_len);
1071 dst = vm_map_gpa(ctx, gpa, n);
1081 vm_get_cpus(struct vmctx *ctx, int which, cpuset_t *cpus)
1083 struct vm_cpuset vm_cpuset;
1086 bzero(&vm_cpuset, sizeof(struct vm_cpuset));
1087 vm_cpuset.which = which;
1088 vm_cpuset.cpusetsize = sizeof(cpuset_t);
1089 vm_cpuset.cpus = cpus;
1091 error = ioctl(ctx->fd, VM_GET_CPUS, &vm_cpuset);
1096 vm_active_cpus(struct vmctx *ctx, cpuset_t *cpus)
1099 return (vm_get_cpus(ctx, VM_ACTIVE_CPUS, cpus));
1103 vm_suspended_cpus(struct vmctx *ctx, cpuset_t *cpus)
1106 return (vm_get_cpus(ctx, VM_SUSPENDED_CPUS, cpus));
1110 vm_activate_cpu(struct vmctx *ctx, int vcpu)
1112 struct vm_activate_cpu ac;
1115 bzero(&ac, sizeof(struct vm_activate_cpu));
1117 error = ioctl(ctx->fd, VM_ACTIVATE_CPU, &ac);
1122 vm_get_intinfo(struct vmctx *ctx, int vcpu, uint64_t *info1, uint64_t *info2)
1124 struct vm_intinfo vmii;
1127 bzero(&vmii, sizeof(struct vm_intinfo));
1129 error = ioctl(ctx->fd, VM_GET_INTINFO, &vmii);
1131 *info1 = vmii.info1;
1132 *info2 = vmii.info2;
1138 vm_set_intinfo(struct vmctx *ctx, int vcpu, uint64_t info1)
1140 struct vm_intinfo vmii;
1143 bzero(&vmii, sizeof(struct vm_intinfo));
1146 error = ioctl(ctx->fd, VM_SET_INTINFO, &vmii);