2 * Copyright (c) 2006 M. Warner Losh. All rights reserved.
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
13 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 #include <sys/cdefs.h>
27 __FBSDID("$FreeBSD$");
29 #include <sys/param.h>
30 #include <sys/systm.h>
33 #include <sys/kernel.h>
36 #include <sys/malloc.h>
37 #include <sys/module.h>
38 #include <sys/mutex.h>
40 #include <machine/bus.h>
42 #include <arm/at91/at91reg.h>
43 #include <arm/at91/at91_pioreg.h>
44 #include <arm/at91/at91_piovar.h>
48 device_t dev; /* Myself */
49 void *intrhand; /* Interrupt handle */
50 struct resource *irq_res; /* IRQ resource */
51 struct resource *mem_res; /* Memory resource */
52 struct mtx sc_mtx; /* basically a perimeter lock */
58 static inline uint32_t
59 RD4(struct at91_pio_softc *sc, bus_size_t off)
61 return (bus_read_4(sc->mem_res, off));
65 WR4(struct at91_pio_softc *sc, bus_size_t off, uint32_t val)
67 bus_write_4(sc->mem_res, off, val);
70 #define AT91_PIO_LOCK(_sc) mtx_lock_spin(&(_sc)->sc_mtx)
71 #define AT91_PIO_UNLOCK(_sc) mtx_unlock_spin(&(_sc)->sc_mtx)
72 #define AT91_PIO_LOCK_INIT(_sc) \
73 mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->dev), \
75 #define AT91_PIO_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx);
76 #define AT91_PIO_ASSERT_LOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_OWNED);
77 #define AT91_PIO_ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_NOTOWNED);
78 #define CDEV2SOFTC(dev) ((dev)->si_drv1)
80 static devclass_t at91_pio_devclass;
82 /* bus entry points */
84 static int at91_pio_probe(device_t dev);
85 static int at91_pio_attach(device_t dev);
86 static int at91_pio_detach(device_t dev);
87 static int at91_pio_intr(void *);
90 static int at91_pio_activate(device_t dev);
91 static void at91_pio_deactivate(device_t dev);
94 static d_open_t at91_pio_open;
95 static d_close_t at91_pio_close;
96 static d_ioctl_t at91_pio_ioctl;
98 static struct cdevsw at91_pio_cdevsw =
100 .d_version = D_VERSION,
101 .d_open = at91_pio_open,
102 .d_close = at91_pio_close,
103 .d_ioctl = at91_pio_ioctl
107 at91_pio_probe(device_t dev)
111 switch (device_get_unit(dev)) {
128 device_set_desc(dev, name);
133 at91_pio_attach(device_t dev)
135 struct at91_pio_softc *sc = device_get_softc(dev);
139 err = at91_pio_activate(dev);
143 device_printf(dev, "ABSR: %#x OSR: %#x PSR:%#x ODSR: %#x\n",
144 RD4(sc, PIO_ABSR), RD4(sc, PIO_OSR), RD4(sc, PIO_PSR),
146 AT91_PIO_LOCK_INIT(sc);
149 * Activate the interrupt, but disable all interrupts in the hardware
151 WR4(sc, PIO_IDR, 0xffffffff);
152 err = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC,
153 at91_pio_intr, NULL, sc, &sc->intrhand);
155 AT91_PIO_LOCK_DESTROY(sc);
158 sc->cdev = make_dev(&at91_pio_cdevsw, device_get_unit(dev), UID_ROOT,
159 GID_WHEEL, 0600, "pio%d", device_get_unit(dev));
160 if (sc->cdev == NULL) {
164 sc->cdev->si_drv1 = sc;
167 at91_pio_deactivate(dev);
172 at91_pio_detach(device_t dev)
174 return (EBUSY); /* XXX */
178 at91_pio_activate(device_t dev)
180 struct at91_pio_softc *sc;
183 sc = device_get_softc(dev);
185 sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
187 if (sc->mem_res == NULL)
190 sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
191 RF_ACTIVE | RF_SHAREABLE);
192 if (sc->irq_res == NULL)
196 at91_pio_deactivate(dev);
201 at91_pio_deactivate(device_t dev)
203 struct at91_pio_softc *sc;
205 sc = device_get_softc(dev);
207 bus_teardown_intr(dev, sc->irq_res, sc->intrhand);
209 bus_generic_detach(sc->dev);
211 bus_release_resource(dev, SYS_RES_IOPORT,
212 rman_get_rid(sc->mem_res), sc->mem_res);
215 bus_release_resource(dev, SYS_RES_IRQ,
216 rman_get_rid(sc->irq_res), sc->irq_res);
222 at91_pio_intr(void *xsc)
224 struct at91_pio_softc *sc = xsc;
228 /* Reading the status also clears the interrupt */
229 status = RD4(sc, PIO_SR);
236 return (FILTER_HANDLED);
240 at91_pio_open(struct cdev *dev, int oflags, int devtype, struct thread *td)
242 struct at91_pio_softc *sc;
244 sc = CDEV2SOFTC(dev);
246 if (!(sc->flags & OPENED)) {
257 at91_pio_close(struct cdev *dev, int fflag, int devtype, struct thread *td)
259 struct at91_pio_softc *sc;
261 sc = CDEV2SOFTC(dev);
263 sc->flags &= ~OPENED;
265 // Disable interrupts
272 at91_pio_ioctl(struct cdev *dev, u_long cmd, caddr_t data, int fflag,
279 * The following functions are called early in the boot process, so
280 * don't use bus_space, as that isn't yet available when we need to use
284 at91_pio_use_periph_a(uint32_t pio, uint32_t periph_a_mask, int use_pullup)
286 uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
288 PIO[PIO_ASR / 4] = periph_a_mask;
289 PIO[PIO_PDR / 4] = periph_a_mask;
291 PIO[PIO_PUER / 4] = periph_a_mask;
293 PIO[PIO_PUDR / 4] = periph_a_mask;
297 at91_pio_use_periph_b(uint32_t pio, uint32_t periph_b_mask, int use_pullup)
299 uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
301 PIO[PIO_BSR / 4] = periph_b_mask;
302 PIO[PIO_PDR / 4] = periph_b_mask;
304 PIO[PIO_PUER / 4] = periph_b_mask;
306 PIO[PIO_PUDR / 4] = periph_b_mask;
310 at91_pio_use_gpio(uint32_t pio, uint32_t gpio_mask)
312 uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
314 PIO[PIO_PER / 4] = gpio_mask;
318 at91_pio_gpio_input(uint32_t pio, uint32_t input_enable_mask)
320 uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
322 PIO[PIO_ODR / 4] = input_enable_mask;
326 at91_pio_gpio_output(uint32_t pio, uint32_t output_enable_mask, int use_pullup)
328 uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
330 PIO[PIO_OER / 4] = output_enable_mask;
332 PIO[PIO_PUER / 4] = output_enable_mask;
334 PIO[PIO_PUDR / 4] = output_enable_mask;
338 at91_pio_gpio_set(uint32_t pio, uint32_t data_mask)
340 uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
342 PIO[PIO_SODR / 4] = data_mask;
346 at91_pio_gpio_clear(uint32_t pio, uint32_t data_mask)
348 uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
350 PIO[PIO_CODR / 4] = data_mask;
354 at91_pio_gpio_get(uint32_t pio, uint32_t data_mask)
356 uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
358 data_mask &= PIO[PIO_PDSR / 4];
360 return (data_mask ? 1 : 0);
364 at91_pio_gpio_set_deglitch(uint32_t pio, uint32_t data_mask, int use_deglitch)
366 uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
369 PIO[PIO_IFER / 4] = data_mask;
371 PIO[PIO_IFDR / 4] = data_mask;
376 at91_pio_gpio_set_interrupt(uint32_t pio, uint32_t data_mask,
377 int enable_interrupt)
379 uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
381 if (enable_interrupt)
382 PIO[PIO_IER / 4] = data_mask;
384 PIO[PIO_IDR / 4] = data_mask;
389 at91_pio_gpio_clear_interrupt(uint32_t pio)
391 uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
392 /* reading this register will clear the interrupts */
393 return (PIO[PIO_ISR / 4]);
396 static device_method_t at91_pio_methods[] = {
397 /* Device interface */
398 DEVMETHOD(device_probe, at91_pio_probe),
399 DEVMETHOD(device_attach, at91_pio_attach),
400 DEVMETHOD(device_detach, at91_pio_detach),
405 static driver_t at91_pio_driver = {
408 sizeof(struct at91_pio_softc),
411 DRIVER_MODULE(at91_pio, atmelarm, at91_pio_driver, at91_pio_devclass, 0, 0);