2 * Copyright (C) 2013-2014 Daisuke Aoyama <aoyama@peach.ne.jp>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
31 #include <sys/param.h>
32 #include <sys/systm.h>
35 #include <sys/kernel.h>
37 #include <sys/malloc.h>
38 #include <sys/module.h>
39 #include <sys/mutex.h>
41 #include <sys/sysctl.h>
43 #include <machine/bus.h>
44 #include <machine/cpu.h>
45 #include <machine/intr.h>
47 #include <dev/fdt/fdt_common.h>
49 #include <dev/ofw/ofw_bus.h>
50 #include <dev/ofw/ofw_bus_subr.h>
52 #include <arm/broadcom/bcm2835/bcm2835_mbox.h>
53 #include <arm/broadcom/bcm2835/bcm2835_mbox_prop.h>
54 #include <arm/broadcom/bcm2835/bcm2835_vcbus.h>
56 #include "cpufreq_if.h"
60 #define DPRINTF(fmt, ...) do { \
61 printf("%s:%u: ", __func__, __LINE__); \
62 printf(fmt, ##__VA_ARGS__); \
65 #define DPRINTF(fmt, ...)
68 #define HZ2MHZ(freq) ((freq) / (1000 * 1000))
69 #define MHZ2HZ(freq) ((freq) * (1000 * 1000))
70 #define OFFSET2MVOLT(val) (1200 + ((val) * 25))
71 #define MVOLT2OFFSET(val) (((val) - 1200) / 25)
73 #define DEFAULT_ARM_FREQUENCY 700
74 #define DEFAULT_CORE_FREQUENCY 250
75 #define DEFAULT_SDRAM_FREQUENCY 400
76 #define DEFAULT_LOWEST_FREQ 300
77 #define TRANSITION_LATENCY 1000
78 #define MIN_OVER_VOLTAGE -16
79 #define MAX_OVER_VOLTAGE 6
80 #define MSG_ERROR -999999999
82 #define HZSTEP (MHZ2HZ(MHZSTEP))
85 #define VC_LOCK(sc) do { \
86 sema_wait(&vc_sema); \
88 #define VC_UNLOCK(sc) do { \
89 sema_post(&vc_sema); \
92 /* ARM->VC mailbox property semaphore */
93 static struct sema vc_sema;
95 static struct sysctl_ctx_list bcm2835_sysctl_ctx;
97 struct bcm2835_cpufreq_softc {
105 int max_voltage_core;
106 int min_voltage_core;
108 /* the values written in mbox */
116 /* initial hook for waiting mbox intr */
117 struct intr_config_hook init_hook;
120 static struct ofw_compat_data compat_data[] = {
121 { "broadcom,bcm2835-vc", 1 },
122 { "broadcom,bcm2708-vc", 1 },
123 { "brcm,bcm2709", 1 },
127 static int cpufreq_verbose = 0;
128 TUNABLE_INT("hw.bcm2835.cpufreq.verbose", &cpufreq_verbose);
129 static int cpufreq_lowest_freq = DEFAULT_LOWEST_FREQ;
130 TUNABLE_INT("hw.bcm2835.cpufreq.lowest_freq", &cpufreq_lowest_freq);
134 bcm2835_dump(const void *data, int len)
136 const uint8_t *p = (const uint8_t*)data;
139 printf("dump @ %p:\n", data);
140 for (i = 0; i < len; i++) {
141 printf("%2.2x ", p[i]);
152 bcm2835_cpufreq_get_clock_rate(struct bcm2835_cpufreq_softc *sc,
155 struct msg_get_clock_rate msg;
173 /* setup single tag buffer */
174 memset(&msg, 0, sizeof(msg));
175 msg.hdr.buf_size = sizeof(msg);
176 msg.hdr.code = BCM2835_MBOX_CODE_REQ;
177 msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_CLOCK_RATE;
178 msg.tag_hdr.val_buf_size = sizeof(msg.body);
179 msg.tag_hdr.val_len = sizeof(msg.body.req);
180 msg.body.req.clock_id = clock_id;
183 /* call mailbox property */
184 err = bcm2835_mbox_property(&msg, sizeof(msg));
186 device_printf(sc->dev, "can't get clock rate (id=%u)\n",
192 rate = (int)msg.body.resp.rate_hz;
193 DPRINTF("clock = %d(Hz)\n", rate);
198 bcm2835_cpufreq_get_max_clock_rate(struct bcm2835_cpufreq_softc *sc,
201 struct msg_get_max_clock_rate msg;
219 /* setup single tag buffer */
220 memset(&msg, 0, sizeof(msg));
221 msg.hdr.buf_size = sizeof(msg);
222 msg.hdr.code = BCM2835_MBOX_CODE_REQ;
223 msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_MAX_CLOCK_RATE;
224 msg.tag_hdr.val_buf_size = sizeof(msg.body);
225 msg.tag_hdr.val_len = sizeof(msg.body.req);
226 msg.body.req.clock_id = clock_id;
229 /* call mailbox property */
230 err = bcm2835_mbox_property(&msg, sizeof(msg));
232 device_printf(sc->dev, "can't get max clock rate (id=%u)\n",
238 rate = (int)msg.body.resp.rate_hz;
239 DPRINTF("clock = %d(Hz)\n", rate);
244 bcm2835_cpufreq_get_min_clock_rate(struct bcm2835_cpufreq_softc *sc,
247 struct msg_get_min_clock_rate msg;
265 /* setup single tag buffer */
266 memset(&msg, 0, sizeof(msg));
267 msg.hdr.buf_size = sizeof(msg);
268 msg.hdr.code = BCM2835_MBOX_CODE_REQ;
269 msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_MIN_CLOCK_RATE;
270 msg.tag_hdr.val_buf_size = sizeof(msg.body);
271 msg.tag_hdr.val_len = sizeof(msg.body.req);
272 msg.body.req.clock_id = clock_id;
275 /* call mailbox property */
276 err = bcm2835_mbox_property(&msg, sizeof(msg));
278 device_printf(sc->dev, "can't get min clock rate (id=%u)\n",
284 rate = (int)msg.body.resp.rate_hz;
285 DPRINTF("clock = %d(Hz)\n", rate);
290 bcm2835_cpufreq_set_clock_rate(struct bcm2835_cpufreq_softc *sc,
291 uint32_t clock_id, uint32_t rate_hz)
293 struct msg_set_clock_rate msg;
312 /* setup single tag buffer */
313 memset(&msg, 0, sizeof(msg));
314 msg.hdr.buf_size = sizeof(msg);
315 msg.hdr.code = BCM2835_MBOX_CODE_REQ;
316 msg.tag_hdr.tag = BCM2835_MBOX_TAG_SET_CLOCK_RATE;
317 msg.tag_hdr.val_buf_size = sizeof(msg.body);
318 msg.tag_hdr.val_len = sizeof(msg.body.req);
319 msg.body.req.clock_id = clock_id;
320 msg.body.req.rate_hz = rate_hz;
323 /* call mailbox property */
324 err = bcm2835_mbox_property(&msg, sizeof(msg));
326 device_printf(sc->dev, "can't set clock rate (id=%u)\n",
331 /* workaround for core clock */
332 if (clock_id == BCM2835_MBOX_CLOCK_ID_CORE) {
333 /* for safety (may change voltage without changing clock) */
334 DELAY(TRANSITION_LATENCY);
337 * XXX: the core clock is unable to change at once,
338 * to change certainly, write it twice now.
341 /* setup single tag buffer */
342 memset(&msg, 0, sizeof(msg));
343 msg.hdr.buf_size = sizeof(msg);
344 msg.hdr.code = BCM2835_MBOX_CODE_REQ;
345 msg.tag_hdr.tag = BCM2835_MBOX_TAG_SET_CLOCK_RATE;
346 msg.tag_hdr.val_buf_size = sizeof(msg.body);
347 msg.tag_hdr.val_len = sizeof(msg.body.req);
348 msg.body.req.clock_id = clock_id;
349 msg.body.req.rate_hz = rate_hz;
352 /* call mailbox property */
353 err = bcm2835_mbox_property(&msg, sizeof(msg));
355 device_printf(sc->dev,
356 "can't set clock rate (id=%u)\n", clock_id);
362 rate = (int)msg.body.resp.rate_hz;
363 DPRINTF("clock = %d(Hz)\n", rate);
368 bcm2835_cpufreq_get_turbo(struct bcm2835_cpufreq_softc *sc)
370 struct msg_get_turbo msg;
388 /* setup single tag buffer */
389 memset(&msg, 0, sizeof(msg));
390 msg.hdr.buf_size = sizeof(msg);
391 msg.hdr.code = BCM2835_MBOX_CODE_REQ;
392 msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_TURBO;
393 msg.tag_hdr.val_buf_size = sizeof(msg.body);
394 msg.tag_hdr.val_len = sizeof(msg.body.req);
398 /* call mailbox property */
399 err = bcm2835_mbox_property(&msg, sizeof(msg));
401 device_printf(sc->dev, "can't get turbo\n");
405 /* result 0=non-turbo, 1=turbo */
406 level = (int)msg.body.resp.level;
407 DPRINTF("level = %d\n", level);
412 bcm2835_cpufreq_set_turbo(struct bcm2835_cpufreq_softc *sc, uint32_t level)
414 struct msg_set_turbo msg;
433 /* replace unknown value to OFF */
434 if (level != BCM2835_MBOX_TURBO_ON && level != BCM2835_MBOX_TURBO_OFF)
435 level = BCM2835_MBOX_TURBO_OFF;
437 /* setup single tag buffer */
438 memset(&msg, 0, sizeof(msg));
439 msg.hdr.buf_size = sizeof(msg);
440 msg.hdr.code = BCM2835_MBOX_CODE_REQ;
441 msg.tag_hdr.tag = BCM2835_MBOX_TAG_SET_TURBO;
442 msg.tag_hdr.val_buf_size = sizeof(msg.body);
443 msg.tag_hdr.val_len = sizeof(msg.body.req);
445 msg.body.req.level = level;
448 /* call mailbox property */
449 err = bcm2835_mbox_property(&msg, sizeof(msg));
451 device_printf(sc->dev, "can't set turbo\n");
455 /* result 0=non-turbo, 1=turbo */
456 value = (int)msg.body.resp.level;
457 DPRINTF("level = %d\n", value);
462 bcm2835_cpufreq_get_voltage(struct bcm2835_cpufreq_softc *sc,
465 struct msg_get_voltage msg;
480 * u32: value (offset from 1.2V in units of 0.025V)
483 /* setup single tag buffer */
484 memset(&msg, 0, sizeof(msg));
485 msg.hdr.buf_size = sizeof(msg);
486 msg.hdr.code = BCM2835_MBOX_CODE_REQ;
487 msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_VOLTAGE;
488 msg.tag_hdr.val_buf_size = sizeof(msg.body);
489 msg.tag_hdr.val_len = sizeof(msg.body.req);
490 msg.body.req.voltage_id = voltage_id;
493 /* call mailbox property */
494 err = bcm2835_mbox_property(&msg, sizeof(msg));
496 device_printf(sc->dev, "can't get voltage\n");
500 /* result (offset from 1.2V) */
501 value = (int)msg.body.resp.value;
502 DPRINTF("value = %d\n", value);
507 bcm2835_cpufreq_get_max_voltage(struct bcm2835_cpufreq_softc *sc,
510 struct msg_get_max_voltage msg;
525 * u32: value (offset from 1.2V in units of 0.025V)
528 /* setup single tag buffer */
529 memset(&msg, 0, sizeof(msg));
530 msg.hdr.buf_size = sizeof(msg);
531 msg.hdr.code = BCM2835_MBOX_CODE_REQ;
532 msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_MAX_VOLTAGE;
533 msg.tag_hdr.val_buf_size = sizeof(msg.body);
534 msg.tag_hdr.val_len = sizeof(msg.body.req);
535 msg.body.req.voltage_id = voltage_id;
538 /* call mailbox property */
539 err = bcm2835_mbox_property(&msg, sizeof(msg));
541 device_printf(sc->dev, "can't get max voltage\n");
545 /* result (offset from 1.2V) */
546 value = (int)msg.body.resp.value;
547 DPRINTF("value = %d\n", value);
551 bcm2835_cpufreq_get_min_voltage(struct bcm2835_cpufreq_softc *sc,
554 struct msg_get_min_voltage msg;
569 * u32: value (offset from 1.2V in units of 0.025V)
572 /* setup single tag buffer */
573 memset(&msg, 0, sizeof(msg));
574 msg.hdr.buf_size = sizeof(msg);
575 msg.hdr.code = BCM2835_MBOX_CODE_REQ;
576 msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_MIN_VOLTAGE;
577 msg.tag_hdr.val_buf_size = sizeof(msg.body);
578 msg.tag_hdr.val_len = sizeof(msg.body.req);
579 msg.body.req.voltage_id = voltage_id;
582 /* call mailbox property */
583 err = bcm2835_mbox_property(&msg, sizeof(msg));
585 device_printf(sc->dev, "can't get min voltage\n");
589 /* result (offset from 1.2V) */
590 value = (int)msg.body.resp.value;
591 DPRINTF("value = %d\n", value);
596 bcm2835_cpufreq_set_voltage(struct bcm2835_cpufreq_softc *sc,
597 uint32_t voltage_id, int32_t value)
599 struct msg_set_voltage msg;
609 * u32: value (offset from 1.2V in units of 0.025V)
614 * u32: value (offset from 1.2V in units of 0.025V)
619 * 0 (1.2 V). Values above 6 are only allowed when force_turbo or
620 * current_limit_override are specified (which set the warranty bit).
622 if (value > MAX_OVER_VOLTAGE || value < MIN_OVER_VOLTAGE) {
623 /* currently not supported */
624 device_printf(sc->dev, "not supported voltage: %d\n", value);
628 /* setup single tag buffer */
629 memset(&msg, 0, sizeof(msg));
630 msg.hdr.buf_size = sizeof(msg);
631 msg.hdr.code = BCM2835_MBOX_CODE_REQ;
632 msg.tag_hdr.tag = BCM2835_MBOX_TAG_SET_VOLTAGE;
633 msg.tag_hdr.val_buf_size = sizeof(msg.body);
634 msg.tag_hdr.val_len = sizeof(msg.body.req);
635 msg.body.req.voltage_id = voltage_id;
636 msg.body.req.value = (uint32_t)value;
639 /* call mailbox property */
640 err = bcm2835_mbox_property(&msg, sizeof(msg));
642 device_printf(sc->dev, "can't set voltage\n");
646 /* result (offset from 1.2V) */
647 value = (int)msg.body.resp.value;
648 DPRINTF("value = %d\n", value);
653 bcm2835_cpufreq_get_temperature(struct bcm2835_cpufreq_softc *sc)
655 struct msg_get_temperature msg;
665 * u32: temperature id
669 * u32: temperature id
673 /* setup single tag buffer */
674 memset(&msg, 0, sizeof(msg));
675 msg.hdr.buf_size = sizeof(msg);
676 msg.hdr.code = BCM2835_MBOX_CODE_REQ;
677 msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_TEMPERATURE;
678 msg.tag_hdr.val_buf_size = sizeof(msg.body);
679 msg.tag_hdr.val_len = sizeof(msg.body.req);
680 msg.body.req.temperature_id = 0;
683 /* call mailbox property */
684 err = bcm2835_mbox_property(&msg, sizeof(msg));
686 device_printf(sc->dev, "can't get temperature\n");
690 /* result (temperature of degree C) */
691 value = (int)msg.body.resp.value;
692 DPRINTF("value = %d\n", value);
699 sysctl_bcm2835_cpufreq_arm_freq(SYSCTL_HANDLER_ARGS)
701 struct bcm2835_cpufreq_softc *sc = arg1;
705 /* get realtime value */
707 val = bcm2835_cpufreq_get_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_ARM);
709 if (val == MSG_ERROR)
712 err = sysctl_handle_int(oidp, &val, 0, req);
713 if (err || !req->newptr) /* error || read request */
718 err = bcm2835_cpufreq_set_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_ARM,
721 if (err == MSG_ERROR) {
722 device_printf(sc->dev, "set clock arm_freq error\n");
725 DELAY(TRANSITION_LATENCY);
731 sysctl_bcm2835_cpufreq_core_freq(SYSCTL_HANDLER_ARGS)
733 struct bcm2835_cpufreq_softc *sc = arg1;
737 /* get realtime value */
739 val = bcm2835_cpufreq_get_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_CORE);
741 if (val == MSG_ERROR)
744 err = sysctl_handle_int(oidp, &val, 0, req);
745 if (err || !req->newptr) /* error || read request */
750 err = bcm2835_cpufreq_set_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_CORE,
752 if (err == MSG_ERROR) {
754 device_printf(sc->dev, "set clock core_freq error\n");
758 DELAY(TRANSITION_LATENCY);
764 sysctl_bcm2835_cpufreq_sdram_freq(SYSCTL_HANDLER_ARGS)
766 struct bcm2835_cpufreq_softc *sc = arg1;
770 /* get realtime value */
772 val = bcm2835_cpufreq_get_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_SDRAM);
774 if (val == MSG_ERROR)
777 err = sysctl_handle_int(oidp, &val, 0, req);
778 if (err || !req->newptr) /* error || read request */
783 err = bcm2835_cpufreq_set_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_SDRAM,
786 if (err == MSG_ERROR) {
787 device_printf(sc->dev, "set clock sdram_freq error\n");
790 DELAY(TRANSITION_LATENCY);
796 sysctl_bcm2835_cpufreq_turbo(SYSCTL_HANDLER_ARGS)
798 struct bcm2835_cpufreq_softc *sc = arg1;
802 /* get realtime value */
804 val = bcm2835_cpufreq_get_turbo(sc);
806 if (val == MSG_ERROR)
809 err = sysctl_handle_int(oidp, &val, 0, req);
810 if (err || !req->newptr) /* error || read request */
815 sc->turbo_mode = BCM2835_MBOX_TURBO_ON;
817 sc->turbo_mode = BCM2835_MBOX_TURBO_OFF;
820 err = bcm2835_cpufreq_set_turbo(sc, sc->turbo_mode);
822 if (err == MSG_ERROR) {
823 device_printf(sc->dev, "set turbo error\n");
826 DELAY(TRANSITION_LATENCY);
832 sysctl_bcm2835_cpufreq_voltage_core(SYSCTL_HANDLER_ARGS)
834 struct bcm2835_cpufreq_softc *sc = arg1;
838 /* get realtime value */
840 val = bcm2835_cpufreq_get_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_CORE);
842 if (val == MSG_ERROR)
845 err = sysctl_handle_int(oidp, &val, 0, req);
846 if (err || !req->newptr) /* error || read request */
850 if (val > MAX_OVER_VOLTAGE || val < MIN_OVER_VOLTAGE)
852 sc->voltage_core = val;
855 err = bcm2835_cpufreq_set_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_CORE,
858 if (err == MSG_ERROR) {
859 device_printf(sc->dev, "set voltage core error\n");
862 DELAY(TRANSITION_LATENCY);
868 sysctl_bcm2835_cpufreq_voltage_sdram_c(SYSCTL_HANDLER_ARGS)
870 struct bcm2835_cpufreq_softc *sc = arg1;
874 /* get realtime value */
876 val = bcm2835_cpufreq_get_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_C);
878 if (val == MSG_ERROR)
881 err = sysctl_handle_int(oidp, &val, 0, req);
882 if (err || !req->newptr) /* error || read request */
886 if (val > MAX_OVER_VOLTAGE || val < MIN_OVER_VOLTAGE)
888 sc->voltage_sdram_c = val;
891 err = bcm2835_cpufreq_set_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_C,
892 sc->voltage_sdram_c);
894 if (err == MSG_ERROR) {
895 device_printf(sc->dev, "set voltage sdram_c error\n");
898 DELAY(TRANSITION_LATENCY);
904 sysctl_bcm2835_cpufreq_voltage_sdram_i(SYSCTL_HANDLER_ARGS)
906 struct bcm2835_cpufreq_softc *sc = arg1;
910 /* get realtime value */
912 val = bcm2835_cpufreq_get_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_I);
914 if (val == MSG_ERROR)
917 err = sysctl_handle_int(oidp, &val, 0, req);
918 if (err || !req->newptr) /* error || read request */
922 if (val > MAX_OVER_VOLTAGE || val < MIN_OVER_VOLTAGE)
924 sc->voltage_sdram_i = val;
927 err = bcm2835_cpufreq_set_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_I,
928 sc->voltage_sdram_i);
930 if (err == MSG_ERROR) {
931 device_printf(sc->dev, "set voltage sdram_i error\n");
934 DELAY(TRANSITION_LATENCY);
940 sysctl_bcm2835_cpufreq_voltage_sdram_p(SYSCTL_HANDLER_ARGS)
942 struct bcm2835_cpufreq_softc *sc = arg1;
946 /* get realtime value */
948 val = bcm2835_cpufreq_get_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_P);
950 if (val == MSG_ERROR)
953 err = sysctl_handle_int(oidp, &val, 0, req);
954 if (err || !req->newptr) /* error || read request */
958 if (val > MAX_OVER_VOLTAGE || val < MIN_OVER_VOLTAGE)
960 sc->voltage_sdram_p = val;
963 err = bcm2835_cpufreq_set_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_P,
964 sc->voltage_sdram_p);
966 if (err == MSG_ERROR) {
967 device_printf(sc->dev, "set voltage sdram_p error\n");
970 DELAY(TRANSITION_LATENCY);
976 sysctl_bcm2835_cpufreq_voltage_sdram(SYSCTL_HANDLER_ARGS)
978 struct bcm2835_cpufreq_softc *sc = arg1;
982 /* multiple write only */
986 err = sysctl_handle_int(oidp, &val, 0, req);
991 if (val > MAX_OVER_VOLTAGE || val < MIN_OVER_VOLTAGE)
993 sc->voltage_sdram = val;
996 err = bcm2835_cpufreq_set_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_C,
998 if (err == MSG_ERROR) {
1000 device_printf(sc->dev, "set voltage sdram_c error\n");
1003 err = bcm2835_cpufreq_set_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_I,
1005 if (err == MSG_ERROR) {
1007 device_printf(sc->dev, "set voltage sdram_i error\n");
1010 err = bcm2835_cpufreq_set_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_P,
1012 if (err == MSG_ERROR) {
1014 device_printf(sc->dev, "set voltage sdram_p error\n");
1018 DELAY(TRANSITION_LATENCY);
1024 sysctl_bcm2835_cpufreq_temperature(SYSCTL_HANDLER_ARGS)
1026 struct bcm2835_cpufreq_softc *sc = arg1;
1030 /* get realtime value */
1032 val = bcm2835_cpufreq_get_temperature(sc);
1034 if (val == MSG_ERROR)
1037 err = sysctl_handle_int(oidp, &val, 0, req);
1038 if (err || !req->newptr) /* error || read request */
1046 sysctl_bcm2835_devcpu_temperature(SYSCTL_HANDLER_ARGS)
1048 struct bcm2835_cpufreq_softc *sc = arg1;
1052 /* get realtime value */
1054 val = bcm2835_cpufreq_get_temperature(sc);
1056 if (val == MSG_ERROR)
1059 /* 1/1000 celsius (raw) to 1/10 kelvin */
1060 val = val / 100 + TZ_ZEROC;
1062 err = sysctl_handle_int(oidp, &val, 0, req);
1063 if (err || !req->newptr) /* error || read request */
1072 bcm2835_cpufreq_init(void *arg)
1074 struct bcm2835_cpufreq_softc *sc = arg;
1075 struct sysctl_ctx_list *ctx;
1077 int arm_freq, core_freq, sdram_freq;
1078 int arm_max_freq, arm_min_freq, core_max_freq, core_min_freq;
1079 int sdram_max_freq, sdram_min_freq;
1080 int voltage_core, voltage_sdram_c, voltage_sdram_i, voltage_sdram_p;
1081 int max_voltage_core, min_voltage_core;
1082 int max_voltage_sdram_c, min_voltage_sdram_c;
1083 int max_voltage_sdram_i, min_voltage_sdram_i;
1084 int max_voltage_sdram_p, min_voltage_sdram_p;
1085 int turbo, temperature;
1090 arm_freq = bcm2835_cpufreq_get_clock_rate(sc,
1091 BCM2835_MBOX_CLOCK_ID_ARM);
1092 core_freq = bcm2835_cpufreq_get_clock_rate(sc,
1093 BCM2835_MBOX_CLOCK_ID_CORE);
1094 sdram_freq = bcm2835_cpufreq_get_clock_rate(sc,
1095 BCM2835_MBOX_CLOCK_ID_SDRAM);
1098 arm_max_freq = bcm2835_cpufreq_get_max_clock_rate(sc,
1099 BCM2835_MBOX_CLOCK_ID_ARM);
1100 arm_min_freq = bcm2835_cpufreq_get_min_clock_rate(sc,
1101 BCM2835_MBOX_CLOCK_ID_ARM);
1102 core_max_freq = bcm2835_cpufreq_get_max_clock_rate(sc,
1103 BCM2835_MBOX_CLOCK_ID_CORE);
1104 core_min_freq = bcm2835_cpufreq_get_min_clock_rate(sc,
1105 BCM2835_MBOX_CLOCK_ID_CORE);
1106 sdram_max_freq = bcm2835_cpufreq_get_max_clock_rate(sc,
1107 BCM2835_MBOX_CLOCK_ID_SDRAM);
1108 sdram_min_freq = bcm2835_cpufreq_get_min_clock_rate(sc,
1109 BCM2835_MBOX_CLOCK_ID_SDRAM);
1112 turbo = bcm2835_cpufreq_get_turbo(sc);
1114 sc->turbo_mode = BCM2835_MBOX_TURBO_ON;
1116 sc->turbo_mode = BCM2835_MBOX_TURBO_OFF;
1119 voltage_core = bcm2835_cpufreq_get_voltage(sc,
1120 BCM2835_MBOX_VOLTAGE_ID_CORE);
1121 voltage_sdram_c = bcm2835_cpufreq_get_voltage(sc,
1122 BCM2835_MBOX_VOLTAGE_ID_SDRAM_C);
1123 voltage_sdram_i = bcm2835_cpufreq_get_voltage(sc,
1124 BCM2835_MBOX_VOLTAGE_ID_SDRAM_I);
1125 voltage_sdram_p = bcm2835_cpufreq_get_voltage(sc,
1126 BCM2835_MBOX_VOLTAGE_ID_SDRAM_P);
1128 /* current values (offset from 1.2V) */
1129 sc->voltage_core = voltage_core;
1130 sc->voltage_sdram = voltage_sdram_c;
1131 sc->voltage_sdram_c = voltage_sdram_c;
1132 sc->voltage_sdram_i = voltage_sdram_i;
1133 sc->voltage_sdram_p = voltage_sdram_p;
1135 /* max/min voltage */
1136 max_voltage_core = bcm2835_cpufreq_get_max_voltage(sc,
1137 BCM2835_MBOX_VOLTAGE_ID_CORE);
1138 min_voltage_core = bcm2835_cpufreq_get_min_voltage(sc,
1139 BCM2835_MBOX_VOLTAGE_ID_CORE);
1140 max_voltage_sdram_c = bcm2835_cpufreq_get_max_voltage(sc,
1141 BCM2835_MBOX_VOLTAGE_ID_SDRAM_C);
1142 max_voltage_sdram_i = bcm2835_cpufreq_get_max_voltage(sc,
1143 BCM2835_MBOX_VOLTAGE_ID_SDRAM_I);
1144 max_voltage_sdram_p = bcm2835_cpufreq_get_max_voltage(sc,
1145 BCM2835_MBOX_VOLTAGE_ID_SDRAM_P);
1146 min_voltage_sdram_c = bcm2835_cpufreq_get_min_voltage(sc,
1147 BCM2835_MBOX_VOLTAGE_ID_SDRAM_C);
1148 min_voltage_sdram_i = bcm2835_cpufreq_get_min_voltage(sc,
1149 BCM2835_MBOX_VOLTAGE_ID_SDRAM_I);
1150 min_voltage_sdram_p = bcm2835_cpufreq_get_min_voltage(sc,
1151 BCM2835_MBOX_VOLTAGE_ID_SDRAM_P);
1154 temperature = bcm2835_cpufreq_get_temperature(sc);
1157 if (cpufreq_verbose || bootverbose) {
1158 device_printf(sc->dev, "Boot settings:\n");
1159 device_printf(sc->dev,
1160 "current ARM %dMHz, Core %dMHz, SDRAM %dMHz, Turbo %s\n",
1161 HZ2MHZ(arm_freq), HZ2MHZ(core_freq), HZ2MHZ(sdram_freq),
1162 (sc->turbo_mode == BCM2835_MBOX_TURBO_ON) ? "ON" : "OFF");
1164 device_printf(sc->dev,
1165 "max/min ARM %d/%dMHz, Core %d/%dMHz, SDRAM %d/%dMHz\n",
1166 HZ2MHZ(arm_max_freq), HZ2MHZ(arm_min_freq),
1167 HZ2MHZ(core_max_freq), HZ2MHZ(core_min_freq),
1168 HZ2MHZ(sdram_max_freq), HZ2MHZ(sdram_min_freq));
1170 device_printf(sc->dev,
1171 "current Core %dmV, SDRAM_C %dmV, SDRAM_I %dmV, "
1173 OFFSET2MVOLT(voltage_core), OFFSET2MVOLT(voltage_sdram_c),
1174 OFFSET2MVOLT(voltage_sdram_i),
1175 OFFSET2MVOLT(voltage_sdram_p));
1177 device_printf(sc->dev,
1178 "max/min Core %d/%dmV, SDRAM_C %d/%dmV, SDRAM_I %d/%dmV, "
1179 "SDRAM_P %d/%dmV\n",
1180 OFFSET2MVOLT(max_voltage_core),
1181 OFFSET2MVOLT(min_voltage_core),
1182 OFFSET2MVOLT(max_voltage_sdram_c),
1183 OFFSET2MVOLT(min_voltage_sdram_c),
1184 OFFSET2MVOLT(max_voltage_sdram_i),
1185 OFFSET2MVOLT(min_voltage_sdram_i),
1186 OFFSET2MVOLT(max_voltage_sdram_p),
1187 OFFSET2MVOLT(min_voltage_sdram_p));
1189 device_printf(sc->dev,
1190 "Temperature %d.%dC\n", (temperature / 1000),
1191 (temperature % 1000) / 100);
1192 } else { /* !cpufreq_verbose && !bootverbose */
1193 device_printf(sc->dev,
1194 "ARM %dMHz, Core %dMHz, SDRAM %dMHz, Turbo %s\n",
1195 HZ2MHZ(arm_freq), HZ2MHZ(core_freq), HZ2MHZ(sdram_freq),
1196 (sc->turbo_mode == BCM2835_MBOX_TURBO_ON) ? "ON" : "OFF");
1199 /* keep in softc (MHz/mV) */
1200 sc->arm_max_freq = HZ2MHZ(arm_max_freq);
1201 sc->arm_min_freq = HZ2MHZ(arm_min_freq);
1202 sc->core_max_freq = HZ2MHZ(core_max_freq);
1203 sc->core_min_freq = HZ2MHZ(core_min_freq);
1204 sc->sdram_max_freq = HZ2MHZ(sdram_max_freq);
1205 sc->sdram_min_freq = HZ2MHZ(sdram_min_freq);
1206 sc->max_voltage_core = OFFSET2MVOLT(max_voltage_core);
1207 sc->min_voltage_core = OFFSET2MVOLT(min_voltage_core);
1209 /* if turbo is on, set to max values */
1210 if (sc->turbo_mode == BCM2835_MBOX_TURBO_ON) {
1211 bcm2835_cpufreq_set_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_ARM,
1213 DELAY(TRANSITION_LATENCY);
1214 bcm2835_cpufreq_set_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_CORE,
1216 DELAY(TRANSITION_LATENCY);
1217 bcm2835_cpufreq_set_clock_rate(sc,
1218 BCM2835_MBOX_CLOCK_ID_SDRAM, sdram_max_freq);
1219 DELAY(TRANSITION_LATENCY);
1221 bcm2835_cpufreq_set_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_ARM,
1223 DELAY(TRANSITION_LATENCY);
1224 bcm2835_cpufreq_set_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_CORE,
1226 DELAY(TRANSITION_LATENCY);
1227 bcm2835_cpufreq_set_clock_rate(sc,
1228 BCM2835_MBOX_CLOCK_ID_SDRAM, sdram_min_freq);
1229 DELAY(TRANSITION_LATENCY);
1234 /* add human readable temperature to dev.cpu node */
1235 cpu = device_get_parent(sc->dev);
1237 ctx = device_get_sysctl_ctx(cpu);
1238 SYSCTL_ADD_PROC(ctx,
1239 SYSCTL_CHILDREN(device_get_sysctl_tree(cpu)), OID_AUTO,
1240 "temperature", CTLTYPE_INT | CTLFLAG_RD, sc, 0,
1241 sysctl_bcm2835_devcpu_temperature, "IK",
1242 "Current SoC temperature");
1245 /* release this hook (continue boot) */
1246 config_intrhook_disestablish(&sc->init_hook);
1250 bcm2835_cpufreq_identify(driver_t *driver, device_t parent)
1252 const struct ofw_compat_data *compat;
1255 root = OF_finddevice("/");
1256 for (compat = compat_data; compat->ocd_str != NULL; compat++)
1257 if (fdt_is_compatible(root, compat->ocd_str))
1260 if (compat->ocd_data == 0)
1263 DPRINTF("driver=%p, parent=%p\n", driver, parent);
1264 if (device_find_child(parent, "bcm2835_cpufreq", -1) != NULL)
1266 if (BUS_ADD_CHILD(parent, 0, "bcm2835_cpufreq", -1) == NULL)
1267 device_printf(parent, "add child failed\n");
1271 bcm2835_cpufreq_probe(device_t dev)
1274 device_set_desc(dev, "CPU Frequency Control");
1279 bcm2835_cpufreq_attach(device_t dev)
1281 struct bcm2835_cpufreq_softc *sc;
1282 struct sysctl_oid *oid;
1285 sc = device_get_softc(dev);
1288 /* initial values */
1289 sc->arm_max_freq = -1;
1290 sc->arm_min_freq = -1;
1291 sc->core_max_freq = -1;
1292 sc->core_min_freq = -1;
1293 sc->sdram_max_freq = -1;
1294 sc->sdram_min_freq = -1;
1295 sc->max_voltage_core = 0;
1296 sc->min_voltage_core = 0;
1298 /* setup sysctl at first device */
1299 if (device_get_unit(dev) == 0) {
1300 sysctl_ctx_init(&bcm2835_sysctl_ctx);
1301 /* create node for hw.cpufreq */
1302 oid = SYSCTL_ADD_NODE(&bcm2835_sysctl_ctx,
1303 SYSCTL_STATIC_CHILDREN(_hw), OID_AUTO, "cpufreq",
1304 CTLFLAG_RD, NULL, "");
1306 /* Frequency (Hz) */
1307 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1308 OID_AUTO, "arm_freq", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
1309 sysctl_bcm2835_cpufreq_arm_freq, "IU",
1310 "ARM frequency (Hz)");
1311 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1312 OID_AUTO, "core_freq", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
1313 sysctl_bcm2835_cpufreq_core_freq, "IU",
1314 "Core frequency (Hz)");
1315 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1316 OID_AUTO, "sdram_freq", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
1317 sysctl_bcm2835_cpufreq_sdram_freq, "IU",
1318 "SDRAM frequency (Hz)");
1321 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1322 OID_AUTO, "turbo", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
1323 sysctl_bcm2835_cpufreq_turbo, "IU",
1324 "Disables dynamic clocking");
1326 /* Voltage (offset from 1.2V in units of 0.025V) */
1327 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1328 OID_AUTO, "voltage_core", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
1329 sysctl_bcm2835_cpufreq_voltage_core, "I",
1330 "ARM/GPU core voltage"
1331 "(offset from 1.2V in units of 0.025V)");
1332 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1333 OID_AUTO, "voltage_sdram", CTLTYPE_INT | CTLFLAG_WR, sc,
1334 0, sysctl_bcm2835_cpufreq_voltage_sdram, "I",
1335 "SDRAM voltage (offset from 1.2V in units of 0.025V)");
1337 /* Voltage individual SDRAM */
1338 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1339 OID_AUTO, "voltage_sdram_c", CTLTYPE_INT | CTLFLAG_RW, sc,
1340 0, sysctl_bcm2835_cpufreq_voltage_sdram_c, "I",
1341 "SDRAM controller voltage"
1342 "(offset from 1.2V in units of 0.025V)");
1343 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1344 OID_AUTO, "voltage_sdram_i", CTLTYPE_INT | CTLFLAG_RW, sc,
1345 0, sysctl_bcm2835_cpufreq_voltage_sdram_i, "I",
1346 "SDRAM I/O voltage (offset from 1.2V in units of 0.025V)");
1347 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1348 OID_AUTO, "voltage_sdram_p", CTLTYPE_INT | CTLFLAG_RW, sc,
1349 0, sysctl_bcm2835_cpufreq_voltage_sdram_p, "I",
1350 "SDRAM phy voltage (offset from 1.2V in units of 0.025V)");
1353 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1354 OID_AUTO, "temperature", CTLTYPE_INT | CTLFLAG_RD, sc, 0,
1355 sysctl_bcm2835_cpufreq_temperature, "I",
1356 "SoC temperature (thousandths of a degree C)");
1360 sema_init(&vc_sema, 1, "vcsema");
1362 /* register callback for using mbox when interrupts are enabled */
1363 sc->init_hook.ich_func = bcm2835_cpufreq_init;
1364 sc->init_hook.ich_arg = sc;
1366 if (config_intrhook_establish(&sc->init_hook) != 0) {
1367 device_printf(dev, "config_intrhook_establish failed\n");
1371 /* this device is controlled by cpufreq(4) */
1372 cpufreq_register(dev);
1378 bcm2835_cpufreq_detach(device_t dev)
1380 struct bcm2835_cpufreq_softc *sc;
1382 sc = device_get_softc(dev);
1384 sema_destroy(&vc_sema);
1386 return (cpufreq_unregister(dev));
1390 bcm2835_cpufreq_set(device_t dev, const struct cf_setting *cf)
1392 struct bcm2835_cpufreq_softc *sc;
1393 uint32_t rate_hz, rem;
1394 int cur_freq, resp_freq, arm_freq, min_freq, core_freq;
1396 if (cf == NULL || cf->freq < 0)
1399 sc = device_get_softc(dev);
1401 /* setting clock (Hz) */
1402 rate_hz = (uint32_t)MHZ2HZ(cf->freq);
1403 rem = rate_hz % HZSTEP;
1408 /* adjust min freq */
1409 min_freq = sc->arm_min_freq;
1410 if (sc->turbo_mode != BCM2835_MBOX_TURBO_ON)
1411 if (min_freq > cpufreq_lowest_freq)
1412 min_freq = cpufreq_lowest_freq;
1414 if (rate_hz < MHZ2HZ(min_freq) || rate_hz > MHZ2HZ(sc->arm_max_freq))
1417 /* set new value and verify it */
1419 cur_freq = bcm2835_cpufreq_get_clock_rate(sc,
1420 BCM2835_MBOX_CLOCK_ID_ARM);
1421 resp_freq = bcm2835_cpufreq_set_clock_rate(sc,
1422 BCM2835_MBOX_CLOCK_ID_ARM, rate_hz);
1423 DELAY(TRANSITION_LATENCY);
1424 arm_freq = bcm2835_cpufreq_get_clock_rate(sc,
1425 BCM2835_MBOX_CLOCK_ID_ARM);
1428 * if non-turbo and lower than or equal min_freq,
1429 * clock down core and sdram to default first.
1431 if (sc->turbo_mode != BCM2835_MBOX_TURBO_ON) {
1432 core_freq = bcm2835_cpufreq_get_clock_rate(sc,
1433 BCM2835_MBOX_CLOCK_ID_CORE);
1434 if (rate_hz > MHZ2HZ(sc->arm_min_freq)) {
1435 bcm2835_cpufreq_set_clock_rate(sc,
1436 BCM2835_MBOX_CLOCK_ID_CORE,
1437 MHZ2HZ(sc->core_max_freq));
1438 DELAY(TRANSITION_LATENCY);
1439 bcm2835_cpufreq_set_clock_rate(sc,
1440 BCM2835_MBOX_CLOCK_ID_SDRAM,
1441 MHZ2HZ(sc->sdram_max_freq));
1442 DELAY(TRANSITION_LATENCY);
1444 if (sc->core_min_freq < DEFAULT_CORE_FREQUENCY &&
1445 core_freq > DEFAULT_CORE_FREQUENCY) {
1446 /* first, down to 250, then down to min */
1447 DELAY(TRANSITION_LATENCY);
1448 bcm2835_cpufreq_set_clock_rate(sc,
1449 BCM2835_MBOX_CLOCK_ID_CORE,
1450 MHZ2HZ(DEFAULT_CORE_FREQUENCY));
1451 DELAY(TRANSITION_LATENCY);
1452 /* reset core voltage */
1453 bcm2835_cpufreq_set_voltage(sc,
1454 BCM2835_MBOX_VOLTAGE_ID_CORE, 0);
1455 DELAY(TRANSITION_LATENCY);
1457 bcm2835_cpufreq_set_clock_rate(sc,
1458 BCM2835_MBOX_CLOCK_ID_CORE,
1459 MHZ2HZ(sc->core_min_freq));
1460 DELAY(TRANSITION_LATENCY);
1461 bcm2835_cpufreq_set_clock_rate(sc,
1462 BCM2835_MBOX_CLOCK_ID_SDRAM,
1463 MHZ2HZ(sc->sdram_min_freq));
1464 DELAY(TRANSITION_LATENCY);
1470 if (resp_freq < 0 || arm_freq < 0 || resp_freq != arm_freq) {
1471 device_printf(dev, "wrong freq\n");
1474 DPRINTF("cpufreq: %d -> %d\n", cur_freq, arm_freq);
1480 bcm2835_cpufreq_get(device_t dev, struct cf_setting *cf)
1482 struct bcm2835_cpufreq_softc *sc;
1488 sc = device_get_softc(dev);
1489 memset(cf, CPUFREQ_VAL_UNKNOWN, sizeof(*cf));
1492 /* get cuurent value */
1494 arm_freq = bcm2835_cpufreq_get_clock_rate(sc,
1495 BCM2835_MBOX_CLOCK_ID_ARM);
1498 device_printf(dev, "can't get clock\n");
1502 /* CPU clock in MHz or 100ths of a percent. */
1503 cf->freq = HZ2MHZ(arm_freq);
1504 /* Voltage in mV. */
1505 cf->volts = CPUFREQ_VAL_UNKNOWN;
1506 /* Power consumed in mW. */
1507 cf->power = CPUFREQ_VAL_UNKNOWN;
1508 /* Transition latency in us. */
1509 cf->lat = TRANSITION_LATENCY;
1510 /* Driver providing this setting. */
1517 bcm2835_cpufreq_make_freq_list(device_t dev, struct cf_setting *sets,
1520 struct bcm2835_cpufreq_softc *sc;
1521 int freq, min_freq, volts, rem;
1524 sc = device_get_softc(dev);
1525 freq = sc->arm_max_freq;
1526 min_freq = sc->arm_min_freq;
1528 /* adjust head freq to STEP */
1529 rem = freq % MHZSTEP;
1531 if (freq < min_freq)
1534 /* if non-turbo, add extra low freq */
1535 if (sc->turbo_mode != BCM2835_MBOX_TURBO_ON)
1536 if (min_freq > cpufreq_lowest_freq)
1537 min_freq = cpufreq_lowest_freq;
1539 /* from freq to min_freq */
1540 for (idx = 0; idx < *count && freq >= min_freq; idx++) {
1541 if (freq > sc->arm_min_freq)
1542 volts = sc->max_voltage_core;
1544 volts = sc->min_voltage_core;
1545 sets[idx].freq = freq;
1546 sets[idx].volts = volts;
1547 sets[idx].lat = TRANSITION_LATENCY;
1548 sets[idx].dev = dev;
1557 bcm2835_cpufreq_settings(device_t dev, struct cf_setting *sets, int *count)
1559 struct bcm2835_cpufreq_softc *sc;
1561 if (sets == NULL || count == NULL)
1564 sc = device_get_softc(dev);
1565 if (sc->arm_min_freq < 0 || sc->arm_max_freq < 0) {
1566 printf("device is not configured\n");
1570 /* fill data with unknown value */
1571 memset(sets, CPUFREQ_VAL_UNKNOWN, sizeof(*sets) * (*count));
1572 /* create new array up to count */
1573 bcm2835_cpufreq_make_freq_list(dev, sets, count);
1579 bcm2835_cpufreq_type(device_t dev, int *type)
1584 *type = CPUFREQ_TYPE_ABSOLUTE;
1589 static device_method_t bcm2835_cpufreq_methods[] = {
1590 /* Device interface */
1591 DEVMETHOD(device_identify, bcm2835_cpufreq_identify),
1592 DEVMETHOD(device_probe, bcm2835_cpufreq_probe),
1593 DEVMETHOD(device_attach, bcm2835_cpufreq_attach),
1594 DEVMETHOD(device_detach, bcm2835_cpufreq_detach),
1596 /* cpufreq interface */
1597 DEVMETHOD(cpufreq_drv_set, bcm2835_cpufreq_set),
1598 DEVMETHOD(cpufreq_drv_get, bcm2835_cpufreq_get),
1599 DEVMETHOD(cpufreq_drv_settings, bcm2835_cpufreq_settings),
1600 DEVMETHOD(cpufreq_drv_type, bcm2835_cpufreq_type),
1605 static devclass_t bcm2835_cpufreq_devclass;
1606 static driver_t bcm2835_cpufreq_driver = {
1608 bcm2835_cpufreq_methods,
1609 sizeof(struct bcm2835_cpufreq_softc),
1612 DRIVER_MODULE(bcm2835_cpufreq, cpu, bcm2835_cpufreq_driver,
1613 bcm2835_cpufreq_devclass, 0, 0);