2 * Copyright (c) 2007-2014 QLogic Corporation. All rights reserved.
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS'
15 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
18 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
19 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
20 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
21 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
22 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
23 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
24 * THE POSSIBILITY OF SUCH DAMAGE.
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
34 #include <sys/types.h>
35 #include <sys/endian.h>
36 #include <sys/param.h>
38 #include <sys/mutex.h>
39 #include <sys/malloc.h>
40 #include <sys/kernel.h>
41 #include <machine/bus.h>
42 #include <net/ethernet.h>
44 #if _BYTE_ORDER == _LITTLE_ENDIAN
48 #ifndef __LITTLE_ENDIAN
49 #define __LITTLE_ENDIAN
53 #else /* _BIG_ENDIAN */
61 #undef __LITTLE_ENDIAN
64 #include "ecore_mfw_req.h"
65 #include "ecore_fw_defs.h"
66 #include "ecore_hsi.h"
67 #include "ecore_reg.h"
70 typedef bus_addr_t ecore_dma_addr_t; /* expected to be 64 bit wide */
71 typedef volatile int ecore_atomic_t;
73 #ifndef __bool_true_false_are_defined
76 #if __STDC_VERSION__ < 199901L && __GNUC__ < 3 && !defined(__INTEL_COMPILER)
79 #endif /* !__cplusplus */
80 #endif /* !__bool_true_false_are_defined$ */
82 #define ETH_ALEN ETHER_ADDR_LEN /* 6 */
84 #define ECORE_SWCID_SHIFT 17
85 #define ECORE_SWCID_MASK ((0x1 << ECORE_SWCID_SHIFT) - 1)
87 #define ECORE_MC_HASH_SIZE 8
88 #define ECORE_MC_HASH_OFFSET(sc, i) \
89 (BAR_TSTRORM_INTMEM + \
90 TSTORM_APPROXIMATE_MATCH_MULTICAST_FILTERING_OFFSET(FUNC_ID(sc)) + i*4)
92 #define ECORE_MAX_MULTICAST 64
93 #define ECORE_MAX_EMUL_MULTI 1
95 #define IRO sc->iro_array
97 typedef struct mtx ECORE_MUTEX;
98 #define ECORE_MUTEX_INIT(_mutex) \
99 mtx_init(_mutex, "ecore_lock", "ECORE Lock", MTX_DEF)
100 #define ECORE_MUTEX_LOCK(_mutex) mtx_lock(_mutex)
101 #define ECORE_MUTEX_UNLOCK(_mutex) mtx_unlock(_mutex)
103 typedef struct mtx ECORE_MUTEX_SPIN;
104 #define ECORE_SPIN_LOCK_INIT(_spin, _sc) \
105 mtx_init(_spin, "ecore_lock", "ECORE Lock", MTX_DEF)
106 #define ECORE_SPIN_LOCK_BH(_spin) mtx_lock(_spin) /* bh = bottom-half */
107 #define ECORE_SPIN_UNLOCK_BH(_spin) mtx_unlock(_spin) /* bh = bottom-half */
109 #define ECORE_SMP_MB_AFTER_CLEAR_BIT() mb()
110 #define ECORE_SMP_MB_BEFORE_CLEAR_BIT() mb()
111 #define ECORE_SMP_MB() mb()
112 #define ECORE_SMP_RMB() rmb()
113 #define ECORE_SMP_WMB() wmb()
114 #define ECORE_MMIOWB() wmb()
116 #define ECORE_SET_BIT_NA(bit, var) bit_set(var, bit) /* non-atomic */
117 #define ECORE_CLEAR_BIT_NA(bit, var) bit_clear(var, bit) /* non-atomic */
118 #define ECORE_TEST_BIT(bit, var) bxe_test_bit(bit, var)
119 #define ECORE_SET_BIT(bit, var) bxe_set_bit(bit, var)
120 #define ECORE_CLEAR_BIT(bit, var) bxe_clear_bit(bit, var)
121 #define ECORE_TEST_AND_CLEAR_BIT(bit, var) bxe_test_and_clear_bit(bit, var)
123 #define ECORE_ATOMIC_READ(a) atomic_load_acq_int((volatile int *)a)
124 #define ECORE_ATOMIC_SET(a, v) atomic_store_rel_int((volatile int *)a, v)
125 #define ECORE_ATOMIC_CMPXCHG(a, o, n) bxe_cmpxchg((volatile int *)a, o, n)
127 #define ECORE_RET_PENDING(pending_bit, pending) \
128 (ECORE_TEST_BIT(pending_bit, pending) ? ECORE_PENDING : ECORE_SUCCESS)
130 #define ECORE_SET_FLAG(value, mask, flag) \
132 (value) &= ~(mask); \
133 (value) |= ((flag) << (mask##_SHIFT)); \
136 #define ECORE_GET_FLAG(value, mask) \
137 (((value) &= (mask)) >> (mask##_SHIFT))
139 #define ECORE_MIGHT_SLEEP()
141 #define ECORE_FCOE_CID(sc) ((sc)->fp[FCOE_IDX(sc)].cl_id)
143 #define ECORE_MEMCMP(_a, _b, _s) memcmp(_a, _b, _s)
144 #define ECORE_MEMCPY(_a, _b, _s) memcpy(_a, _b, _s)
145 #define ECORE_MEMSET(_a, _c, _s) memset(_a, _c, _s)
147 #define ECORE_CPU_TO_LE16(x) htole16(x)
148 #define ECORE_CPU_TO_LE32(x) htole32(x)
150 #define ECORE_WAIT(_s, _t) DELAY(1000)
151 #define ECORE_MSLEEP(_t) DELAY((_t) * 1000)
153 #define ECORE_LIKELY(x) __predict_true(x)
154 #define ECORE_UNLIKELY(x) __predict_false(x)
156 #define ECORE_ZALLOC(_size, _flags, _sc) \
157 malloc(_size, M_TEMP, (M_NOWAIT | M_ZERO))
159 #define ECORE_CALLOC(_len, _size, _flags, _sc) \
160 malloc(_len * _size, M_TEMP, (M_NOWAIT | M_ZERO))
162 #define ECORE_FREE(_s, _buf, _size) free(_buf, M_TEMP)
164 #define SC_ILT(sc) ((sc)->ilt)
165 #define ILOG2(x) bxe_ilog2(x)
167 #define ECORE_ILT_ZALLOC(x, y, size) \
169 x = malloc(sizeof(struct bxe_dma), M_DEVBUF, (M_NOWAIT | M_ZERO)); \
171 if (bxe_dma_alloc((struct bxe_softc *)sc, \
172 size, (struct bxe_dma *)x, \
173 "ECORE_ILT") != 0) { \
178 *y = ((struct bxe_dma *)x)->paddr; \
183 #define ECORE_ILT_FREE(x, y, size) \
186 bxe_dma_free((struct bxe_softc *)sc, x); \
193 #define ECORE_IS_VALID_ETHER_ADDR(_mac) TRUE
195 #define ECORE_IS_MF_SD_MODE IS_MF_SD_MODE
196 #define ECORE_IS_MF_SI_MODE IS_MF_SI_MODE
197 #define ECORE_IS_MF_AFEX_MODE IS_MF_AFEX_MODE
199 #define ECORE_SET_CTX_VALIDATION bxe_set_ctx_validation
201 #define ECORE_UPDATE_COALESCE_SB_INDEX bxe_update_coalesce_sb_index
203 #define ECORE_ALIGN(x, a) ((((x) + (a) - 1) / (a)) * (a))
205 #define ECORE_REG_WR_DMAE_LEN REG_WR_DMAE_LEN
207 #define ECORE_PATH_ID SC_PATH
208 #define ECORE_PORT_ID SC_PORT
209 #define ECORE_FUNC_ID SC_FUNC
210 #define ECORE_ABS_FUNC_ID SC_ABS_FUNC
212 uint32_t calc_crc32(uint8_t *crc32_packet, uint32_t crc32_length,
213 uint32_t crc32_seed, uint8_t complement);
214 static inline uint32_t
215 ECORE_CRC32_LE(uint32_t seed, uint8_t *mac, uint32_t len)
217 uint32_t packet_buf[2] = {0};
218 memcpy(((uint8_t *)(&packet_buf[0]))+2, &mac[0], 2);
219 memcpy(&packet_buf[1], &mac[2], 4);
220 return bswap32(calc_crc32((uint8_t *)packet_buf, 8, seed, 0));
223 #define ecore_sp_post(_sc, _a, _b, _c, _d) \
224 bxe_sp_post(_sc, _a, _b, U64_HI(_c), U64_LO(_c), _d)
226 #define ECORE_DBG_BREAK_IF(exp) \
228 if (__predict_false(exp)) { \
233 #define ECORE_BUG() \
235 panic("BUG (%s:%d)", __FILE__, __LINE__); \
238 #define ECORE_BUG_ON(exp) \
240 if (__predict_true(exp)) { \
241 panic("BUG_ON (%s:%d)", __FILE__, __LINE__); \
245 #define ECORE_ERR(str, ...) \
246 BLOGE(sc, "ECORE: " str, ##__VA_ARGS__)
248 #define DBG_SP 0x00000004 /* defined in bxe.h */
250 #define ECORE_MSG(sc, m, ...) \
251 BLOGD(sc, DBG_SP, "ECORE: " m, ##__VA_ARGS__)
253 typedef struct _ecore_list_entry_t
255 struct _ecore_list_entry_t *next, *prev;
256 } ecore_list_entry_t;
258 typedef struct ecore_list_t
260 ecore_list_entry_t *head, *tail;
264 /* initialize the list */
265 #define ECORE_LIST_INIT(_list) \
267 (_list)->head = NULL; \
268 (_list)->tail = NULL; \
272 /* return TRUE if the element is the last on the list */
273 #define ECORE_LIST_IS_LAST(_elem, _list) \
274 (_elem == (_list)->tail)
276 /* return TRUE if the list is empty */
277 #define ECORE_LIST_IS_EMPTY(_list) \
280 /* return the first element */
281 #define ECORE_LIST_FIRST_ENTRY(_list, cast, _link) \
282 (cast *)((_list)->head)
284 /* return the next element */
285 #define ECORE_LIST_NEXT(_elem, _link, cast) \
286 (cast *)((&((_elem)->_link))->next)
288 /* push an element on the head of the list */
289 #define ECORE_LIST_PUSH_HEAD(_elem, _list) \
291 (_elem)->prev = (ecore_list_entry_t *)0; \
292 (_elem)->next = (_list)->head; \
293 if ((_list)->tail == (ecore_list_entry_t *)0) { \
294 (_list)->tail = (_elem); \
296 (_list)->head->prev = (_elem); \
298 (_list)->head = (_elem); \
302 /* push an element on the tail of the list */
303 #define ECORE_LIST_PUSH_TAIL(_elem, _list) \
305 (_elem)->next = (ecore_list_entry_t *)0; \
306 (_elem)->prev = (_list)->tail; \
307 if ((_list)->tail) { \
308 (_list)->tail->next = (_elem); \
310 (_list)->head = (_elem); \
312 (_list)->tail = (_elem); \
316 /* push list1 on the head of list2 and return with list1 as empty */
317 #define ECORE_LIST_SPLICE_INIT(_list1, _list2) \
319 (_list1)->tail->next = (_list2)->head; \
320 if ((_list2)->head) { \
321 (_list2)->head->prev = (_list1)->tail; \
323 (_list2)->tail = (_list1)->tail; \
325 (_list2)->head = (_list1)->head; \
326 (_list2)->cnt += (_list1)->cnt; \
327 (_list1)->head = NULL; \
328 (_list1)->tail = NULL; \
332 /* remove an element from the list */
333 #define ECORE_LIST_REMOVE_ENTRY(_elem, _list) \
335 if ((_list)->head == (_elem)) { \
336 if ((_list)->head) { \
337 (_list)->head = (_list)->head->next; \
338 if ((_list)->head) { \
339 (_list)->head->prev = (ecore_list_entry_t *)0; \
341 (_list)->tail = (ecore_list_entry_t *)0; \
345 } else if ((_list)->tail == (_elem)) { \
346 if ((_list)->tail) { \
347 (_list)->tail = (_list)->tail->prev; \
348 if ((_list)->tail) { \
349 (_list)->tail->next = (ecore_list_entry_t *)0; \
351 (_list)->head = (ecore_list_entry_t *)0; \
356 (_elem)->prev->next = (_elem)->next; \
357 (_elem)->next->prev = (_elem)->prev; \
363 #define ECORE_LIST_FOR_EACH_ENTRY(pos, _list, _link, cast) \
364 for (pos = ECORE_LIST_FIRST_ENTRY(_list, cast, _link); \
366 pos = ECORE_LIST_NEXT(pos, _link, cast))
368 /* walk the list (safely) */
369 #define ECORE_LIST_FOR_EACH_ENTRY_SAFE(pos, n, _list, _link, cast) \
370 for (pos = ECORE_LIST_FIRST_ENTRY(_list, cast, _lint), \
371 n = (pos) ? ECORE_LIST_NEXT(pos, _link, cast) : NULL; \
374 n = (pos) ? ECORE_LIST_NEXT(pos, _link, cast) : NULL)
377 /* Manipulate a bit vector defined as an array of uint64_t */
379 /* Number of bits in one sge_mask array element */
380 #define BIT_VEC64_ELEM_SZ 64
381 #define BIT_VEC64_ELEM_SHIFT 6
382 #define BIT_VEC64_ELEM_MASK ((uint64_t)BIT_VEC64_ELEM_SZ - 1)
384 #define __BIT_VEC64_SET_BIT(el, bit) \
386 el = ((el) | ((uint64_t)0x1 << (bit))); \
389 #define __BIT_VEC64_CLEAR_BIT(el, bit) \
391 el = ((el) & (~((uint64_t)0x1 << (bit)))); \
394 #define BIT_VEC64_SET_BIT(vec64, idx) \
395 __BIT_VEC64_SET_BIT((vec64)[(idx) >> BIT_VEC64_ELEM_SHIFT], \
396 (idx) & BIT_VEC64_ELEM_MASK)
398 #define BIT_VEC64_CLEAR_BIT(vec64, idx) \
399 __BIT_VEC64_CLEAR_BIT((vec64)[(idx) >> BIT_VEC64_ELEM_SHIFT], \
400 (idx) & BIT_VEC64_ELEM_MASK)
402 #define BIT_VEC64_TEST_BIT(vec64, idx) \
403 (((vec64)[(idx) >> BIT_VEC64_ELEM_SHIFT] >> \
404 ((idx) & BIT_VEC64_ELEM_MASK)) & 0x1)
407 * Creates a bitmask of all ones in less significant bits.
408 * idx - index of the most significant bit in the created mask
410 #define BIT_VEC64_ONES_MASK(idx) \
411 (((uint64_t)0x1 << (((idx) & BIT_VEC64_ELEM_MASK) + 1)) - 1)
412 #define BIT_VEC64_ELEM_ONE_MASK ((uint64_t)(~0))
414 /* fill in a MAC address the way the FW likes it */
416 ecore_set_fw_mac_addr(uint16_t *fw_hi,
421 ((uint8_t *)fw_hi)[0] = mac[1];
422 ((uint8_t *)fw_hi)[1] = mac[0];
423 ((uint8_t *)fw_mid)[0] = mac[3];
424 ((uint8_t *)fw_mid)[1] = mac[2];
425 ((uint8_t *)fw_lo)[0] = mac[5];
426 ((uint8_t *)fw_lo)[1] = mac[4];
430 enum ecore_status_t {
438 /* PENDING is not an error and should be positive */
453 /* Bits representing general command's configuration */
457 /* Wait until all pending commands complete */
459 /* Don't send a ramrod, only update a registry */
461 /* Configure HW according to the current object state */
463 /* Execute the next command now */
465 /* Don't add a new command and continue execution of posponed
466 * commands. If not set a new command will be added to the
467 * pending commands list.
470 /* If there is another pending ramrod, wait until it finishes and
471 * re-try to submit this one. This flag can be set only in sleepable
472 * context, and should not be set from the context that completes the
473 * ramrods as deadlock will occur.
481 ECORE_OBJ_TYPE_RX_TX,
484 /* Public slow path states */
486 ECORE_FILTER_MAC_PENDING,
487 ECORE_FILTER_VLAN_PENDING,
488 ECORE_FILTER_VLAN_MAC_PENDING,
489 ECORE_FILTER_RX_MODE_PENDING,
490 ECORE_FILTER_RX_MODE_SCHED,
491 ECORE_FILTER_ISCSI_ETH_START_SCHED,
492 ECORE_FILTER_ISCSI_ETH_STOP_SCHED,
493 ECORE_FILTER_FCOE_ETH_START_SCHED,
494 ECORE_FILTER_FCOE_ETH_STOP_SCHED,
495 ECORE_FILTER_BYPASS_RX_MODE_PENDING,
496 ECORE_FILTER_BYPASS_MAC_PENDING,
497 ECORE_FILTER_BYPASS_RSS_CONF_PENDING,
498 ECORE_FILTER_MCAST_PENDING,
499 ECORE_FILTER_MCAST_SCHED,
500 ECORE_FILTER_RSS_CONF_PENDING,
501 ECORE_AFEX_FCOE_Q_UPDATE_PENDING,
502 ECORE_AFEX_PENDING_VIFSET_MCP_ACK
505 struct ecore_raw_obj {
512 /* Ramrod data buffer params */
514 ecore_dma_addr_t rdata_mapping;
516 /* Ramrod state params */
517 int state; /* "ramrod is pending" state bit */
518 unsigned long *pstate; /* pointer to state buffer */
520 ecore_obj_type obj_type;
522 int (*wait_comp)(struct bxe_softc *sc,
523 struct ecore_raw_obj *o);
525 bool (*check_pending)(struct ecore_raw_obj *o);
526 void (*clear_pending)(struct ecore_raw_obj *o);
527 void (*set_pending)(struct ecore_raw_obj *o);
530 /************************* VLAN-MAC commands related parameters ***************/
531 struct ecore_mac_ramrod_data {
532 uint8_t mac[ETH_ALEN];
533 uint8_t is_inner_mac;
536 struct ecore_vlan_ramrod_data {
540 struct ecore_vlan_mac_ramrod_data {
541 uint8_t mac[ETH_ALEN];
542 uint8_t is_inner_mac;
546 union ecore_classification_ramrod_data {
547 struct ecore_mac_ramrod_data mac;
548 struct ecore_vlan_ramrod_data vlan;
549 struct ecore_vlan_mac_ramrod_data vlan_mac;
552 /* VLAN_MAC commands */
553 enum ecore_vlan_mac_cmd {
559 struct ecore_vlan_mac_data {
560 /* Requested command: ECORE_VLAN_MAC_XX */
561 enum ecore_vlan_mac_cmd cmd;
562 /* used to contain the data related vlan_mac_flags bits from
565 unsigned long vlan_mac_flags;
567 /* Needed for MOVE command */
568 struct ecore_vlan_mac_obj *target_obj;
570 union ecore_classification_ramrod_data u;
573 /*************************** Exe Queue obj ************************************/
574 union ecore_exe_queue_cmd_data {
575 struct ecore_vlan_mac_data vlan_mac;
582 struct ecore_exeq_elem {
583 ecore_list_entry_t link;
585 /* Length of this element in the exe_chunk. */
588 union ecore_exe_queue_cmd_data cmd_data;
591 union ecore_qable_obj;
593 union ecore_exeq_comp_elem {
594 union event_ring_elem *elem;
597 struct ecore_exe_queue_obj;
599 typedef int (*exe_q_validate)(struct bxe_softc *sc,
600 union ecore_qable_obj *o,
601 struct ecore_exeq_elem *elem);
603 typedef int (*exe_q_remove)(struct bxe_softc *sc,
604 union ecore_qable_obj *o,
605 struct ecore_exeq_elem *elem);
607 /* Return positive if entry was optimized, 0 - if not, negative
608 * in case of an error.
610 typedef int (*exe_q_optimize)(struct bxe_softc *sc,
611 union ecore_qable_obj *o,
612 struct ecore_exeq_elem *elem);
613 typedef int (*exe_q_execute)(struct bxe_softc *sc,
614 union ecore_qable_obj *o,
615 ecore_list_t *exe_chunk,
616 unsigned long *ramrod_flags);
617 typedef struct ecore_exeq_elem *
618 (*exe_q_get)(struct ecore_exe_queue_obj *o,
619 struct ecore_exeq_elem *elem);
621 struct ecore_exe_queue_obj {
622 /* Commands pending for an execution. */
623 ecore_list_t exe_queue;
625 /* Commands pending for an completion. */
626 ecore_list_t pending_comp;
628 ECORE_MUTEX_SPIN lock;
630 /* Maximum length of commands' list for one execution */
633 union ecore_qable_obj *owner;
635 /****** Virtual functions ******/
637 * Called before commands execution for commands that are really
638 * going to be executed (after 'optimize').
640 * Must run under exe_queue->lock
642 exe_q_validate validate;
645 * Called before removing pending commands, cleaning allocated
646 * resources (e.g., credits from validate)
651 * This will try to cancel the current pending commands list
652 * considering the new command.
654 * Returns the number of optimized commands or a negative error code
656 * Must run under exe_queue->lock
658 exe_q_optimize optimize;
661 * Run the next commands chunk (owner specific).
663 exe_q_execute execute;
666 * Return the exe_queue element containing the specific command
667 * if any. Otherwise return NULL.
671 /***************** Classification verbs: Set/Del MAC/VLAN/VLAN-MAC ************/
673 * Element in the VLAN_MAC registry list having all current configured
676 struct ecore_vlan_mac_registry_elem {
677 ecore_list_entry_t link;
679 /* Used to store the cam offset used for the mac/vlan/vlan-mac.
680 * Relevant for 57710 and 57711 only. VLANs and MACs share the
681 * same CAM for these chips.
685 /* Needed for DEL and RESTORE flows */
686 unsigned long vlan_mac_flags;
688 union ecore_classification_ramrod_data u;
691 /* Bits representing VLAN_MAC commands specific flags */
697 ECORE_DONT_CONSUME_CAM_CREDIT,
698 ECORE_DONT_CONSUME_CAM_CREDIT_DEST,
701 struct ecore_vlan_mac_ramrod_params {
702 /* Object to run the command from */
703 struct ecore_vlan_mac_obj *vlan_mac_obj;
705 /* General command flags: COMP_WAIT, etc. */
706 unsigned long ramrod_flags;
708 /* Command specific configuration request */
709 struct ecore_vlan_mac_data user_req;
712 struct ecore_vlan_mac_obj {
713 struct ecore_raw_obj raw;
715 /* Bookkeeping list: will prevent the addition of already existing
719 /* Implement a simple reader/writer lock on the head list.
720 * all these fields should only be accessed under the exe_queue lock
722 uint8_t head_reader; /* Num. of readers accessing head list */
723 bool head_exe_request; /* Pending execution request. */
724 unsigned long saved_ramrod_flags; /* Ramrods of pending execution */
726 /* Execution queue interface instance */
727 struct ecore_exe_queue_obj exe_queue;
729 /* MACs credit pool */
730 struct ecore_credit_pool_obj *macs_pool;
732 /* VLANs credit pool */
733 struct ecore_credit_pool_obj *vlans_pool;
735 /* RAMROD command to be used */
738 /* copy first n elements onto preallocated buffer
740 * @param n number of elements to get
741 * @param buf buffer preallocated by caller into which elements
742 * will be copied. Note elements are 4-byte aligned
743 * so buffer size must be able to accommodate the
746 * @return number of copied bytes
749 int (*get_n_elements)(struct bxe_softc *sc,
750 struct ecore_vlan_mac_obj *o, int n, uint8_t *base,
751 uint8_t stride, uint8_t size);
754 * Checks if ADD-ramrod with the given params may be performed.
756 * @return zero if the element may be added
759 int (*check_add)(struct bxe_softc *sc,
760 struct ecore_vlan_mac_obj *o,
761 union ecore_classification_ramrod_data *data);
764 * Checks if DEL-ramrod with the given params may be performed.
766 * @return TRUE if the element may be deleted
768 struct ecore_vlan_mac_registry_elem *
769 (*check_del)(struct bxe_softc *sc,
770 struct ecore_vlan_mac_obj *o,
771 union ecore_classification_ramrod_data *data);
774 * Checks if DEL-ramrod with the given params may be performed.
776 * @return TRUE if the element may be deleted
778 bool (*check_move)(struct bxe_softc *sc,
779 struct ecore_vlan_mac_obj *src_o,
780 struct ecore_vlan_mac_obj *dst_o,
781 union ecore_classification_ramrod_data *data);
784 * Update the relevant credit object(s) (consume/return
787 bool (*get_credit)(struct ecore_vlan_mac_obj *o);
788 bool (*put_credit)(struct ecore_vlan_mac_obj *o);
789 bool (*get_cam_offset)(struct ecore_vlan_mac_obj *o, int *offset);
790 bool (*put_cam_offset)(struct ecore_vlan_mac_obj *o, int offset);
793 * Configures one rule in the ramrod data buffer.
795 void (*set_one_rule)(struct bxe_softc *sc,
796 struct ecore_vlan_mac_obj *o,
797 struct ecore_exeq_elem *elem, int rule_idx,
801 * Delete all configured elements having the given
802 * vlan_mac_flags specification. Assumes no pending for
803 * execution commands. Will schedule all all currently
804 * configured MACs/VLANs/VLAN-MACs matching the vlan_mac_flags
805 * specification for deletion and will use the given
806 * ramrod_flags for the last DEL operation.
810 * @param ramrod_flags RAMROD_XX flags
812 * @return 0 if the last operation has completed successfully
813 * and there are no more elements left, positive value
814 * if there are pending for completion commands,
815 * negative value in case of failure.
817 int (*delete_all)(struct bxe_softc *sc,
818 struct ecore_vlan_mac_obj *o,
819 unsigned long *vlan_mac_flags,
820 unsigned long *ramrod_flags);
823 * Reconfigures the next MAC/VLAN/VLAN-MAC element from the previously
824 * configured elements list.
827 * @param p Command parameters (RAMROD_COMP_WAIT bit in
828 * ramrod_flags is only taken into an account)
829 * @param ppos a pointer to the cookie that should be given back in the
830 * next call to make function handle the next element. If
831 * *ppos is set to NULL it will restart the iterator.
832 * If returned *ppos == NULL this means that the last
833 * element has been handled.
837 int (*restore)(struct bxe_softc *sc,
838 struct ecore_vlan_mac_ramrod_params *p,
839 struct ecore_vlan_mac_registry_elem **ppos);
842 * Should be called on a completion arrival.
846 * @param cqe Completion element we are handling
847 * @param ramrod_flags if RAMROD_CONT is set the next bulk of
848 * pending commands will be executed.
849 * RAMROD_DRV_CLR_ONLY and RAMROD_RESTORE
850 * may also be set if needed.
852 * @return 0 if there are neither pending nor waiting for
853 * completion commands. Positive value if there are
854 * pending for execution or for completion commands.
855 * Negative value in case of an error (including an
858 int (*complete)(struct bxe_softc *sc, struct ecore_vlan_mac_obj *o,
859 union event_ring_elem *cqe,
860 unsigned long *ramrod_flags);
863 * Wait for completion of all commands. Don't schedule new ones,
864 * just wait. It assumes that the completion code will schedule
867 int (*wait)(struct bxe_softc *sc, struct ecore_vlan_mac_obj *o);
871 ECORE_LLH_CAM_ISCSI_ETH_LINE = 0,
872 ECORE_LLH_CAM_ETH_LINE,
873 ECORE_LLH_CAM_MAX_PF_LINE = NIG_REG_LLH1_FUNC_MEM_SIZE / 2
876 void ecore_set_mac_in_nig(struct bxe_softc *sc,
877 bool add, unsigned char *dev_addr, int index);
879 /** RX_MODE verbs:DROP_ALL/ACCEPT_ALL/ACCEPT_ALL_MULTI/ACCEPT_ALL_VLAN/NORMAL */
881 /* RX_MODE ramrod special flags: set in rx_mode_flags field in
882 * a ecore_rx_mode_ramrod_params.
885 ECORE_RX_MODE_FCOE_ETH,
886 ECORE_RX_MODE_ISCSI_ETH,
890 ECORE_ACCEPT_UNICAST,
891 ECORE_ACCEPT_MULTICAST,
892 ECORE_ACCEPT_ALL_UNICAST,
893 ECORE_ACCEPT_ALL_MULTICAST,
894 ECORE_ACCEPT_BROADCAST,
895 ECORE_ACCEPT_UNMATCHED,
896 ECORE_ACCEPT_ANY_VLAN
899 struct ecore_rx_mode_ramrod_params {
900 struct ecore_rx_mode_obj *rx_mode_obj;
901 unsigned long *pstate;
906 unsigned long ramrod_flags;
907 unsigned long rx_mode_flags;
909 /* rdata is either a pointer to eth_filter_rules_ramrod_data(e2) or to
910 * a tstorm_eth_mac_filter_config (e1x).
913 ecore_dma_addr_t rdata_mapping;
915 /* Rx mode settings */
916 unsigned long rx_accept_flags;
918 /* internal switching settings */
919 unsigned long tx_accept_flags;
922 struct ecore_rx_mode_obj {
923 int (*config_rx_mode)(struct bxe_softc *sc,
924 struct ecore_rx_mode_ramrod_params *p);
926 int (*wait_comp)(struct bxe_softc *sc,
927 struct ecore_rx_mode_ramrod_params *p);
930 /********************** Set multicast group ***********************************/
932 struct ecore_mcast_list_elem {
933 ecore_list_entry_t link;
937 union ecore_mcast_config_data {
939 uint8_t bin; /* used in a RESTORE flow */
942 struct ecore_mcast_ramrod_params {
943 struct ecore_mcast_obj *mcast_obj;
945 /* Relevant options are RAMROD_COMP_WAIT and RAMROD_DRV_CLR_ONLY */
946 unsigned long ramrod_flags;
948 ecore_list_t mcast_list; /* list of struct ecore_mcast_list_elem */
950 * - rename it to macs_num.
951 * - Add a new command type for handling pending commands
952 * (remove "zero semantics").
954 * Length of mcast_list. If zero and ADD_CONT command - post
960 enum ecore_mcast_cmd {
962 ECORE_MCAST_CMD_CONT,
964 ECORE_MCAST_CMD_RESTORE,
967 struct ecore_mcast_obj {
968 struct ecore_raw_obj raw;
972 #define ECORE_MCAST_BINS_NUM 256
973 #define ECORE_MCAST_VEC_SZ (ECORE_MCAST_BINS_NUM / 64)
974 uint64_t vec[ECORE_MCAST_VEC_SZ];
976 /** Number of BINs to clear. Should be updated
977 * immediately when a command arrives in order to
978 * properly create DEL commands.
989 /* Pending commands */
990 ecore_list_t pending_cmds_head;
992 /* A state that is set in raw.pstate, when there are pending commands */
995 /* Maximal number of mcast MACs configured in one command */
998 /* Total number of currently pending MACs to configure: both
999 * in the pending commands list and in the current command.
1001 int total_pending_num;
1006 * @param cmd command to execute (ECORE_MCAST_CMD_X, see above)
1008 int (*config_mcast)(struct bxe_softc *sc,
1009 struct ecore_mcast_ramrod_params *p,
1010 enum ecore_mcast_cmd cmd);
1013 * Fills the ramrod data during the RESTORE flow.
1017 * @param start_idx Registry index to start from
1018 * @param rdata_idx Index in the ramrod data to start from
1020 * @return -1 if we handled the whole registry or index of the last
1021 * handled registry element.
1023 int (*hdl_restore)(struct bxe_softc *sc, struct ecore_mcast_obj *o,
1024 int start_bin, int *rdata_idx);
1026 int (*enqueue_cmd)(struct bxe_softc *sc, struct ecore_mcast_obj *o,
1027 struct ecore_mcast_ramrod_params *p,
1028 enum ecore_mcast_cmd cmd);
1030 void (*set_one_rule)(struct bxe_softc *sc,
1031 struct ecore_mcast_obj *o, int idx,
1032 union ecore_mcast_config_data *cfg_data,
1033 enum ecore_mcast_cmd cmd);
1035 /** Checks if there are more mcast MACs to be set or a previous
1036 * command is still pending.
1038 bool (*check_pending)(struct ecore_mcast_obj *o);
1041 * Set/Clear/Check SCHEDULED state of the object
1043 void (*set_sched)(struct ecore_mcast_obj *o);
1044 void (*clear_sched)(struct ecore_mcast_obj *o);
1045 bool (*check_sched)(struct ecore_mcast_obj *o);
1047 /* Wait until all pending commands complete */
1048 int (*wait_comp)(struct bxe_softc *sc, struct ecore_mcast_obj *o);
1051 * Handle the internal object counters needed for proper
1052 * commands handling. Checks that the provided parameters are
1055 int (*validate)(struct bxe_softc *sc,
1056 struct ecore_mcast_ramrod_params *p,
1057 enum ecore_mcast_cmd cmd);
1060 * Restore the values of internal counters in case of a failure.
1062 void (*revert)(struct bxe_softc *sc,
1063 struct ecore_mcast_ramrod_params *p,
1066 int (*get_registry_size)(struct ecore_mcast_obj *o);
1067 void (*set_registry_size)(struct ecore_mcast_obj *o, int n);
1070 /*************************** Credit handling **********************************/
1071 struct ecore_credit_pool_obj {
1073 /* Current amount of credit in the pool */
1074 ecore_atomic_t credit;
1076 /* Maximum allowed credit. put() will check against it. */
1079 /* Allocate a pool table statically.
1081 * Currently the maximum allowed size is MAX_MAC_CREDIT_E2(272)
1083 * The set bit in the table will mean that the entry is available.
1085 #define ECORE_POOL_VEC_SIZE (MAX_MAC_CREDIT_E2 / 64)
1086 uint64_t pool_mirror[ECORE_POOL_VEC_SIZE];
1088 /* Base pool offset (initialized differently */
1089 int base_pool_offset;
1092 * Get the next free pool entry.
1094 * @return TRUE if there was a free entry in the pool
1096 bool (*get_entry)(struct ecore_credit_pool_obj *o, int *entry);
1099 * Return the entry back to the pool.
1101 * @return TRUE if entry is legal and has been successfully
1102 * returned to the pool.
1104 bool (*put_entry)(struct ecore_credit_pool_obj *o, int entry);
1107 * Get the requested amount of credit from the pool.
1109 * @param cnt Amount of requested credit
1110 * @return TRUE if the operation is successful
1112 bool (*get)(struct ecore_credit_pool_obj *o, int cnt);
1115 * Returns the credit to the pool.
1117 * @param cnt Amount of credit to return
1118 * @return TRUE if the operation is successful
1120 bool (*put)(struct ecore_credit_pool_obj *o, int cnt);
1123 * Reads the current amount of credit.
1125 int (*check)(struct ecore_credit_pool_obj *o);
1128 /*************************** RSS configuration ********************************/
1130 /* RSS_MODE bits are mutually exclusive */
1131 ECORE_RSS_MODE_DISABLED,
1132 ECORE_RSS_MODE_REGULAR,
1134 ECORE_RSS_SET_SRCH, /* Setup searcher, E1x specific flag */
1143 ECORE_RSS_TUNNELING,
1144 #if defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION < 55000) /* ! BNX2X_UPSTREAM */
1145 ECORE_RSS_MODE_ESX51,
1149 struct ecore_config_rss_params {
1150 struct ecore_rss_config_obj *rss_obj;
1152 /* may have RAMROD_COMP_WAIT set only */
1153 unsigned long ramrod_flags;
1155 /* ECORE_RSS_X bits */
1156 unsigned long rss_flags;
1158 /* Number hash bits to take into an account */
1159 uint8_t rss_result_mask;
1161 /* Indirection table */
1162 uint8_t ind_table[T_ETH_INDIRECTION_TABLE_SIZE];
1164 /* RSS hash values */
1165 uint32_t rss_key[10];
1167 /* valid only iff ECORE_RSS_UPDATE_TOE is set */
1168 uint16_t toe_rss_bitmap;
1170 /* valid iff ECORE_RSS_TUNNELING is set */
1171 uint16_t tunnel_value;
1172 uint16_t tunnel_mask;
1175 struct ecore_rss_config_obj {
1176 struct ecore_raw_obj raw;
1178 /* RSS engine to use */
1181 /* Last configured indirection table */
1182 uint8_t ind_table[T_ETH_INDIRECTION_TABLE_SIZE];
1184 /* flags for enabling 4-tupple hash on UDP */
1188 int (*config_rss)(struct bxe_softc *sc,
1189 struct ecore_config_rss_params *p);
1192 /*********************** Queue state update ***********************************/
1194 /* UPDATE command options */
1196 ECORE_Q_UPDATE_IN_VLAN_REM,
1197 ECORE_Q_UPDATE_IN_VLAN_REM_CHNG,
1198 ECORE_Q_UPDATE_OUT_VLAN_REM,
1199 ECORE_Q_UPDATE_OUT_VLAN_REM_CHNG,
1200 ECORE_Q_UPDATE_ANTI_SPOOF,
1201 ECORE_Q_UPDATE_ANTI_SPOOF_CHNG,
1202 ECORE_Q_UPDATE_ACTIVATE,
1203 ECORE_Q_UPDATE_ACTIVATE_CHNG,
1204 ECORE_Q_UPDATE_DEF_VLAN_EN,
1205 ECORE_Q_UPDATE_DEF_VLAN_EN_CHNG,
1206 ECORE_Q_UPDATE_SILENT_VLAN_REM_CHNG,
1207 ECORE_Q_UPDATE_SILENT_VLAN_REM,
1208 ECORE_Q_UPDATE_TX_SWITCHING_CHNG,
1209 ECORE_Q_UPDATE_TX_SWITCHING,
1212 /* Allowed Queue states */
1213 enum ecore_q_state {
1214 ECORE_Q_STATE_RESET,
1215 ECORE_Q_STATE_INITIALIZED,
1216 ECORE_Q_STATE_ACTIVE,
1217 ECORE_Q_STATE_MULTI_COS,
1218 ECORE_Q_STATE_MCOS_TERMINATED,
1219 ECORE_Q_STATE_INACTIVE,
1220 ECORE_Q_STATE_STOPPED,
1221 ECORE_Q_STATE_TERMINATED,
1222 ECORE_Q_STATE_FLRED,
1226 /* Allowed Queue states */
1227 enum ecore_q_logical_state {
1228 ECORE_Q_LOGICAL_STATE_ACTIVE,
1229 ECORE_Q_LOGICAL_STATE_STOPPED,
1232 /* Allowed commands */
1233 enum ecore_queue_cmd {
1236 ECORE_Q_CMD_SETUP_TX_ONLY,
1237 ECORE_Q_CMD_DEACTIVATE,
1238 ECORE_Q_CMD_ACTIVATE,
1240 ECORE_Q_CMD_UPDATE_TPA,
1242 ECORE_Q_CMD_CFC_DEL,
1243 ECORE_Q_CMD_TERMINATE,
1248 /* queue SETUP + INIT flags */
1251 ECORE_Q_FLG_TPA_IPV6,
1252 ECORE_Q_FLG_TPA_GRO,
1254 ECORE_Q_FLG_ZERO_STATS,
1264 ECORE_Q_FLG_LEADING_RSS,
1266 ECORE_Q_FLG_DEF_VLAN,
1267 ECORE_Q_FLG_TX_SWITCH,
1269 ECORE_Q_FLG_ANTI_SPOOF,
1270 ECORE_Q_FLG_SILENT_VLAN_REM,
1271 ECORE_Q_FLG_FORCE_DEFAULT_PRI,
1272 ECORE_Q_FLG_REFUSE_OUTBAND_VLAN,
1273 ECORE_Q_FLG_PCSUM_ON_PKT,
1274 ECORE_Q_FLG_TUN_INC_INNER_IP_ID
1277 /* Queue type options: queue type may be a combination of below. */
1280 /** TODO: Consider moving both these flags into the init()
1283 ECORE_Q_TYPE_HAS_RX,
1284 ECORE_Q_TYPE_HAS_TX,
1287 #define ECORE_PRIMARY_CID_INDEX 0
1288 #define ECORE_MULTI_TX_COS_E1X 3 /* QM only */
1289 #define ECORE_MULTI_TX_COS_E2_E3A0 2
1290 #define ECORE_MULTI_TX_COS_E3B0 3
1291 #define ECORE_MULTI_TX_COS 3 /* Maximum possible */
1292 #define MAC_PAD (ECORE_ALIGN(ETH_ALEN, sizeof(uint32_t)) - ETH_ALEN)
1294 struct ecore_queue_init_params {
1296 unsigned long flags;
1299 uint8_t sb_cq_index;
1303 unsigned long flags;
1306 uint8_t sb_cq_index;
1309 /* CID context in the host memory */
1310 struct eth_context *cxts[ECORE_MULTI_TX_COS];
1312 /* maximum number of cos supported by hardware */
1316 struct ecore_queue_terminate_params {
1317 /* index within the tx_only cids of this queue object */
1321 struct ecore_queue_cfc_del_params {
1322 /* index within the tx_only cids of this queue object */
1326 struct ecore_queue_update_params {
1327 unsigned long update_flags; /* ECORE_Q_UPDATE_XX bits */
1329 uint16_t silent_removal_value;
1330 uint16_t silent_removal_mask;
1331 /* index within the tx_only cids of this queue object */
1335 struct rxq_pause_params {
1340 uint16_t sge_th_lo; /* valid iff ECORE_Q_FLG_TPA */
1341 uint16_t sge_th_hi; /* valid iff ECORE_Q_FLG_TPA */
1346 struct ecore_general_setup_params {
1347 /* valid iff ECORE_Q_FLG_STATS */
1355 struct ecore_rxq_setup_params {
1357 ecore_dma_addr_t dscr_map;
1358 ecore_dma_addr_t sge_map;
1359 ecore_dma_addr_t rcq_map;
1360 ecore_dma_addr_t rcq_np_map;
1362 uint16_t drop_flags;
1365 uint8_t cl_qzone_id;
1367 /* valid iff ECORE_Q_FLG_TPA */
1368 uint16_t tpa_agg_sz;
1369 uint16_t sge_buf_sz;
1370 uint8_t max_sges_pkt;
1371 uint8_t max_tpa_queues;
1372 uint8_t rss_engine_id;
1374 /* valid iff ECORE_Q_FLG_MCAST */
1375 uint8_t mcast_engine_id;
1377 uint8_t cache_line_log;
1379 uint8_t sb_cq_index;
1381 /* valid iff BXN2X_Q_FLG_SILENT_VLAN_REM */
1382 uint16_t silent_removal_value;
1383 uint16_t silent_removal_mask;
1386 struct ecore_txq_setup_params {
1388 ecore_dma_addr_t dscr_map;
1391 uint8_t sb_cq_index;
1392 uint8_t cos; /* valid iff ECORE_Q_FLG_COS */
1393 uint16_t traffic_type;
1394 /* equals to the leading rss client id, used for TX classification*/
1395 uint8_t tss_leading_cl_id;
1397 /* valid iff ECORE_Q_FLG_DEF_VLAN */
1398 uint16_t default_vlan;
1401 struct ecore_queue_setup_params {
1402 struct ecore_general_setup_params gen_params;
1403 struct ecore_txq_setup_params txq_params;
1404 struct ecore_rxq_setup_params rxq_params;
1405 struct rxq_pause_params pause_params;
1406 unsigned long flags;
1409 struct ecore_queue_setup_tx_only_params {
1410 struct ecore_general_setup_params gen_params;
1411 struct ecore_txq_setup_params txq_params;
1412 unsigned long flags;
1413 /* index within the tx_only cids of this queue object */
1417 struct ecore_queue_state_params {
1418 struct ecore_queue_sp_obj *q_obj;
1420 /* Current command */
1421 enum ecore_queue_cmd cmd;
1423 /* may have RAMROD_COMP_WAIT set only */
1424 unsigned long ramrod_flags;
1426 /* Params according to the current command */
1428 struct ecore_queue_update_params update;
1429 struct ecore_queue_setup_params setup;
1430 struct ecore_queue_init_params init;
1431 struct ecore_queue_setup_tx_only_params tx_only;
1432 struct ecore_queue_terminate_params terminate;
1433 struct ecore_queue_cfc_del_params cfc_del;
1437 struct ecore_viflist_params {
1439 uint8_t func_bit_map_res;
1442 struct ecore_queue_sp_obj {
1443 uint32_t cids[ECORE_MULTI_TX_COS];
1447 /* number of traffic classes supported by queue.
1448 * The primary connection of the queue supports the first traffic
1449 * class. Any further traffic class is supported by a tx-only
1452 * Therefore max_cos is also a number of valid entries in the cids
1456 uint8_t num_tx_only, next_tx_only;
1458 enum ecore_q_state state, next_state;
1460 /* bits from enum ecore_q_type */
1463 /* ECORE_Q_CMD_XX bits. This object implements "one
1464 * pending" paradigm but for debug and tracing purposes it's
1465 * more convenient to have different bits for different
1468 unsigned long pending;
1470 /* Buffer to use as a ramrod data and its mapping */
1472 ecore_dma_addr_t rdata_mapping;
1475 * Performs one state change according to the given parameters.
1477 * @return 0 in case of success and negative value otherwise.
1479 int (*send_cmd)(struct bxe_softc *sc,
1480 struct ecore_queue_state_params *params);
1483 * Sets the pending bit according to the requested transition.
1485 int (*set_pending)(struct ecore_queue_sp_obj *o,
1486 struct ecore_queue_state_params *params);
1489 * Checks that the requested state transition is legal.
1491 int (*check_transition)(struct bxe_softc *sc,
1492 struct ecore_queue_sp_obj *o,
1493 struct ecore_queue_state_params *params);
1496 * Completes the pending command.
1498 int (*complete_cmd)(struct bxe_softc *sc,
1499 struct ecore_queue_sp_obj *o,
1500 enum ecore_queue_cmd);
1502 int (*wait_comp)(struct bxe_softc *sc,
1503 struct ecore_queue_sp_obj *o,
1504 enum ecore_queue_cmd cmd);
1507 /********************** Function state update *********************************/
1508 /* Allowed Function states */
1509 enum ecore_func_state {
1510 ECORE_F_STATE_RESET,
1511 ECORE_F_STATE_INITIALIZED,
1512 ECORE_F_STATE_STARTED,
1513 ECORE_F_STATE_TX_STOPPED,
1517 /* Allowed Function commands */
1518 enum ecore_func_cmd {
1519 ECORE_F_CMD_HW_INIT,
1522 ECORE_F_CMD_HW_RESET,
1523 ECORE_F_CMD_AFEX_UPDATE,
1524 ECORE_F_CMD_AFEX_VIFLISTS,
1525 ECORE_F_CMD_TX_STOP,
1526 ECORE_F_CMD_TX_START,
1527 ECORE_F_CMD_SWITCH_UPDATE,
1531 struct ecore_func_hw_init_params {
1532 /* A load phase returned by MCP.
1535 * FW_MSG_CODE_DRV_LOAD_COMMON_CHIP
1536 * FW_MSG_CODE_DRV_LOAD_COMMON
1537 * FW_MSG_CODE_DRV_LOAD_PORT
1538 * FW_MSG_CODE_DRV_LOAD_FUNCTION
1540 uint32_t load_phase;
1543 struct ecore_func_hw_reset_params {
1544 /* A load phase returned by MCP.
1547 * FW_MSG_CODE_DRV_LOAD_COMMON_CHIP
1548 * FW_MSG_CODE_DRV_LOAD_COMMON
1549 * FW_MSG_CODE_DRV_LOAD_PORT
1550 * FW_MSG_CODE_DRV_LOAD_FUNCTION
1552 uint32_t reset_phase;
1555 struct ecore_func_start_params {
1556 /* Multi Function mode:
1558 * - Switch Dependent
1559 * - Switch Independent
1563 /* Switch Dependent mode outer VLAN tag */
1564 uint16_t sd_vlan_tag;
1566 /* Function cos mode */
1567 uint8_t network_cos_mode;
1569 /* NVGRE classification enablement */
1570 uint8_t nvgre_clss_en;
1572 /* NO_GRE_TUNNEL/NVGRE_TUNNEL/L2GRE_TUNNEL/IPGRE_TUNNEL */
1573 uint8_t gre_tunnel_mode;
1575 /* GRE_OUTER_HEADERS_RSS/GRE_INNER_HEADERS_RSS/NVGRE_KEY_ENTROPY_RSS */
1576 uint8_t gre_tunnel_rss;
1580 struct ecore_func_switch_update_params {
1584 struct ecore_func_afex_update_params {
1586 uint16_t afex_default_vlan;
1587 uint8_t allowed_priorities;
1590 struct ecore_func_afex_viflists_params {
1591 uint16_t vif_list_index;
1592 uint8_t func_bit_map;
1593 uint8_t afex_vif_list_command;
1594 uint8_t func_to_clear;
1596 struct ecore_func_tx_start_params {
1597 struct priority_cos traffic_type_to_priority_cos[MAX_TRAFFIC_TYPES];
1598 uint8_t dcb_enabled;
1599 uint8_t dcb_version;
1600 uint8_t dont_add_pri_0;
1603 struct ecore_func_state_params {
1604 struct ecore_func_sp_obj *f_obj;
1606 /* Current command */
1607 enum ecore_func_cmd cmd;
1609 /* may have RAMROD_COMP_WAIT set only */
1610 unsigned long ramrod_flags;
1612 /* Params according to the current command */
1614 struct ecore_func_hw_init_params hw_init;
1615 struct ecore_func_hw_reset_params hw_reset;
1616 struct ecore_func_start_params start;
1617 struct ecore_func_switch_update_params switch_update;
1618 struct ecore_func_afex_update_params afex_update;
1619 struct ecore_func_afex_viflists_params afex_viflists;
1620 struct ecore_func_tx_start_params tx_start;
1624 struct ecore_func_sp_drv_ops {
1625 /* Init tool + runtime initialization:
1627 * - Common (per Path)
1631 int (*init_hw_cmn_chip)(struct bxe_softc *sc);
1632 int (*init_hw_cmn)(struct bxe_softc *sc);
1633 int (*init_hw_port)(struct bxe_softc *sc);
1634 int (*init_hw_func)(struct bxe_softc *sc);
1636 /* Reset Function HW: Common, Port, Function phases. */
1637 void (*reset_hw_cmn)(struct bxe_softc *sc);
1638 void (*reset_hw_port)(struct bxe_softc *sc);
1639 void (*reset_hw_func)(struct bxe_softc *sc);
1641 /* Init/Free GUNZIP resources */
1642 int (*gunzip_init)(struct bxe_softc *sc);
1643 void (*gunzip_end)(struct bxe_softc *sc);
1645 /* Prepare/Release FW resources */
1646 int (*init_fw)(struct bxe_softc *sc);
1647 void (*release_fw)(struct bxe_softc *sc);
1650 struct ecore_func_sp_obj {
1651 enum ecore_func_state state, next_state;
1653 /* ECORE_FUNC_CMD_XX bits. This object implements "one
1654 * pending" paradigm but for debug and tracing purposes it's
1655 * more convenient to have different bits for different
1658 unsigned long pending;
1660 /* Buffer to use as a ramrod data and its mapping */
1662 ecore_dma_addr_t rdata_mapping;
1664 /* Buffer to use as a afex ramrod data and its mapping.
1665 * This can't be same rdata as above because afex ramrod requests
1666 * can arrive to the object in parallel to other ramrod requests.
1669 ecore_dma_addr_t afex_rdata_mapping;
1671 /* this mutex validates that when pending flag is taken, the next
1672 * ramrod to be sent will be the one set the pending bit
1674 ECORE_MUTEX one_pending_mutex;
1676 /* Driver interface */
1677 struct ecore_func_sp_drv_ops *drv;
1680 * Performs one state change according to the given parameters.
1682 * @return 0 in case of success and negative value otherwise.
1684 int (*send_cmd)(struct bxe_softc *sc,
1685 struct ecore_func_state_params *params);
1688 * Checks that the requested state transition is legal.
1690 int (*check_transition)(struct bxe_softc *sc,
1691 struct ecore_func_sp_obj *o,
1692 struct ecore_func_state_params *params);
1695 * Completes the pending command.
1697 int (*complete_cmd)(struct bxe_softc *sc,
1698 struct ecore_func_sp_obj *o,
1699 enum ecore_func_cmd cmd);
1701 int (*wait_comp)(struct bxe_softc *sc, struct ecore_func_sp_obj *o,
1702 enum ecore_func_cmd cmd);
1705 /********************** Interfaces ********************************************/
1706 /* Queueable objects set */
1707 union ecore_qable_obj {
1708 struct ecore_vlan_mac_obj vlan_mac;
1710 /************** Function state update *********/
1711 void ecore_init_func_obj(struct bxe_softc *sc,
1712 struct ecore_func_sp_obj *obj,
1713 void *rdata, ecore_dma_addr_t rdata_mapping,
1714 void *afex_rdata, ecore_dma_addr_t afex_rdata_mapping,
1715 struct ecore_func_sp_drv_ops *drv_iface);
1717 int ecore_func_state_change(struct bxe_softc *sc,
1718 struct ecore_func_state_params *params);
1720 enum ecore_func_state ecore_func_get_state(struct bxe_softc *sc,
1721 struct ecore_func_sp_obj *o);
1722 /******************* Queue State **************/
1723 void ecore_init_queue_obj(struct bxe_softc *sc,
1724 struct ecore_queue_sp_obj *obj, uint8_t cl_id, uint32_t *cids,
1725 uint8_t cid_cnt, uint8_t func_id, void *rdata,
1726 ecore_dma_addr_t rdata_mapping, unsigned long type);
1728 int ecore_queue_state_change(struct bxe_softc *sc,
1729 struct ecore_queue_state_params *params);
1731 int ecore_get_q_logical_state(struct bxe_softc *sc,
1732 struct ecore_queue_sp_obj *obj);
1734 /********************* VLAN-MAC ****************/
1735 void ecore_init_mac_obj(struct bxe_softc *sc,
1736 struct ecore_vlan_mac_obj *mac_obj,
1737 uint8_t cl_id, uint32_t cid, uint8_t func_id, void *rdata,
1738 ecore_dma_addr_t rdata_mapping, int state,
1739 unsigned long *pstate, ecore_obj_type type,
1740 struct ecore_credit_pool_obj *macs_pool);
1742 void ecore_init_vlan_obj(struct bxe_softc *sc,
1743 struct ecore_vlan_mac_obj *vlan_obj,
1744 uint8_t cl_id, uint32_t cid, uint8_t func_id, void *rdata,
1745 ecore_dma_addr_t rdata_mapping, int state,
1746 unsigned long *pstate, ecore_obj_type type,
1747 struct ecore_credit_pool_obj *vlans_pool);
1749 void ecore_init_vlan_mac_obj(struct bxe_softc *sc,
1750 struct ecore_vlan_mac_obj *vlan_mac_obj,
1751 uint8_t cl_id, uint32_t cid, uint8_t func_id, void *rdata,
1752 ecore_dma_addr_t rdata_mapping, int state,
1753 unsigned long *pstate, ecore_obj_type type,
1754 struct ecore_credit_pool_obj *macs_pool,
1755 struct ecore_credit_pool_obj *vlans_pool);
1757 int ecore_vlan_mac_h_read_lock(struct bxe_softc *sc,
1758 struct ecore_vlan_mac_obj *o);
1759 void ecore_vlan_mac_h_read_unlock(struct bxe_softc *sc,
1760 struct ecore_vlan_mac_obj *o);
1761 int ecore_vlan_mac_h_write_lock(struct bxe_softc *sc,
1762 struct ecore_vlan_mac_obj *o);
1763 void ecore_vlan_mac_h_write_unlock(struct bxe_softc *sc,
1764 struct ecore_vlan_mac_obj *o);
1765 int ecore_config_vlan_mac(struct bxe_softc *sc,
1766 struct ecore_vlan_mac_ramrod_params *p);
1768 int ecore_vlan_mac_move(struct bxe_softc *sc,
1769 struct ecore_vlan_mac_ramrod_params *p,
1770 struct ecore_vlan_mac_obj *dest_o);
1772 /********************* RX MODE ****************/
1774 void ecore_init_rx_mode_obj(struct bxe_softc *sc,
1775 struct ecore_rx_mode_obj *o);
1778 * ecore_config_rx_mode - Send and RX_MODE ramrod according to the provided parameters.
1780 * @p: Command parameters
1782 * Return: 0 - if operation was successful and there is no pending completions,
1783 * positive number - if there are pending completions,
1784 * negative - if there were errors
1786 int ecore_config_rx_mode(struct bxe_softc *sc,
1787 struct ecore_rx_mode_ramrod_params *p);
1789 /****************** MULTICASTS ****************/
1791 void ecore_init_mcast_obj(struct bxe_softc *sc,
1792 struct ecore_mcast_obj *mcast_obj,
1793 uint8_t mcast_cl_id, uint32_t mcast_cid, uint8_t func_id,
1794 uint8_t engine_id, void *rdata, ecore_dma_addr_t rdata_mapping,
1795 int state, unsigned long *pstate,
1796 ecore_obj_type type);
1799 * ecore_config_mcast - Configure multicast MACs list.
1801 * @cmd: command to execute: BNX2X_MCAST_CMD_X
1803 * May configure a new list
1804 * provided in p->mcast_list (ECORE_MCAST_CMD_ADD), clean up
1805 * (ECORE_MCAST_CMD_DEL) or restore (ECORE_MCAST_CMD_RESTORE) a current
1806 * configuration, continue to execute the pending commands
1807 * (ECORE_MCAST_CMD_CONT).
1809 * If previous command is still pending or if number of MACs to
1810 * configure is more that maximum number of MACs in one command,
1811 * the current command will be enqueued to the tail of the
1812 * pending commands list.
1814 * Return: 0 is operation was successfull and there are no pending completions,
1815 * negative if there were errors, positive if there are pending
1818 int ecore_config_mcast(struct bxe_softc *sc,
1819 struct ecore_mcast_ramrod_params *p,
1820 enum ecore_mcast_cmd cmd);
1822 /****************** CREDIT POOL ****************/
1823 void ecore_init_mac_credit_pool(struct bxe_softc *sc,
1824 struct ecore_credit_pool_obj *p, uint8_t func_id,
1826 void ecore_init_vlan_credit_pool(struct bxe_softc *sc,
1827 struct ecore_credit_pool_obj *p, uint8_t func_id,
1830 /****************** RSS CONFIGURATION ****************/
1831 void ecore_init_rss_config_obj(struct bxe_softc *sc,
1832 struct ecore_rss_config_obj *rss_obj,
1833 uint8_t cl_id, uint32_t cid, uint8_t func_id, uint8_t engine_id,
1834 void *rdata, ecore_dma_addr_t rdata_mapping,
1835 int state, unsigned long *pstate,
1836 ecore_obj_type type);
1839 * ecore_config_rss - Updates RSS configuration according to provided parameters
1841 * Return: 0 in case of success
1843 int ecore_config_rss(struct bxe_softc *sc,
1844 struct ecore_config_rss_params *p);
1847 * ecore_get_rss_ind_table - Return the current ind_table configuration.
1849 * @ind_table: buffer to fill with the current indirection
1850 * table content. Should be at least
1851 * T_ETH_INDIRECTION_TABLE_SIZE bytes long.
1853 void ecore_get_rss_ind_table(struct ecore_rss_config_obj *rss_obj,
1854 uint8_t *ind_table);
1856 /* set as inline so printout will show the offending function */
1857 int validate_vlan_mac(struct bxe_softc *sc,
1858 struct ecore_vlan_mac_obj *vlan_mac);
1860 #endif /* ECORE_SP_H */