5 * \author Gareth Hughes <gareth@valinux.com>
9 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
10 * All Rights Reserved.
12 * Permission is hereby granted, free of charge, to any person obtaining a
13 * copy of this software and associated documentation files (the "Software"),
14 * to deal in the Software without restriction, including without limitation
15 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
16 * and/or sell copies of the Software, and to permit persons to whom the
17 * Software is furnished to do so, subject to the following conditions:
19 * The above copyright notice and this permission notice (including the next
20 * paragraph) shall be included in all copies or substantial portions of the
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
25 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
26 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
27 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
28 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
29 * OTHER DEALINGS IN THE SOFTWARE.
32 #include <sys/cdefs.h>
33 __FBSDID("$FreeBSD$");
35 #include <dev/drm2/drmP.h>
36 #include <dev/drm2/radeon/radeon_drm.h>
37 #include "radeon_drv.h"
38 #include "radeon_gem.h"
39 #include "radeon_kms.h"
40 #include "radeon_irq_kms.h"
42 #include <dev/drm2/drm_pciids.h>
48 * - 2.0.0 - initial interface
49 * - 2.1.0 - add square tiling interface
50 * - 2.2.0 - add r6xx/r7xx const buffer support
51 * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
52 * - 2.4.0 - add crtc id query
53 * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
54 * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
55 * 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
56 * 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
57 * 2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
58 * 2.10.0 - fusion 2D tiling
59 * 2.11.0 - backend map, initial compute support for the CS checker
60 * 2.12.0 - RADEON_CS_KEEP_TILING_FLAGS
61 * 2.13.0 - virtual memory support, streamout
62 * 2.14.0 - add evergreen tiling informations
63 * 2.15.0 - add max_pipes query
64 * 2.16.0 - fix evergreen 2D tiled surface calculation
65 * 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
66 * 2.18.0 - r600-eg: allow "invalid" DB formats
67 * 2.19.0 - r600-eg: MSAA textures
68 * 2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query
69 * 2.21.0 - r600-r700: FMASK and CMASK
70 * 2.22.0 - r600 only: RESOLVE_BOX allowed
71 * 2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880
72 * 2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures
73 * 2.25.0 - eg+: new info request for num SE and num SH
74 * 2.26.0 - r600-eg: fix htile size computation
75 * 2.27.0 - r600-SI: Add CS ioctl support for async DMA
76 * 2.28.0 - r600-eg: Add MEM_WRITE packet support
77 * 2.29.0 - R500 FP16 color clear registers
79 #define KMS_DRIVER_MAJOR 2
80 #define KMS_DRIVER_MINOR 29
81 #define KMS_DRIVER_PATCHLEVEL 0
82 int radeon_suspend_kms(struct drm_device *dev);
83 int radeon_resume_kms(struct drm_device *dev);
84 extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
85 int *vpos, int *hpos);
86 extern struct drm_ioctl_desc radeon_ioctls_kms[];
87 extern int radeon_max_kms_ioctl;
89 int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
90 #endif /* DUMBBELL_WIP */
91 int radeon_mode_dumb_mmap(struct drm_file *filp,
92 struct drm_device *dev,
93 uint32_t handle, uint64_t *offset_p);
94 int radeon_mode_dumb_create(struct drm_file *file_priv,
95 struct drm_device *dev,
96 struct drm_mode_create_dumb *args);
97 int radeon_mode_dumb_destroy(struct drm_file *file_priv,
98 struct drm_device *dev,
100 struct dma_buf *radeon_gem_prime_export(struct drm_device *dev,
101 struct drm_gem_object *obj,
103 struct drm_gem_object *radeon_gem_prime_import(struct drm_device *dev,
104 struct dma_buf *dma_buf);
106 #if defined(CONFIG_DEBUG_FS)
107 int radeon_debugfs_init(struct drm_minor *minor);
108 void radeon_debugfs_cleanup(struct drm_minor *minor);
113 int radeon_modeset = 1;
114 int radeon_dynclks = -1;
115 int radeon_r4xx_atom = 0;
116 int radeon_agpmode = 0;
117 int radeon_vram_limit = 0;
118 int radeon_gart_size = 512; /* default gart size */
119 int radeon_benchmarking = 0;
120 int radeon_testing = 0;
121 int radeon_connector_table = 0;
123 int radeon_audio = 0;
124 int radeon_disp_priority = 0;
125 int radeon_hw_i2c = 0;
126 int radeon_pcie_gen2 = -1;
128 int radeon_lockup_timeout = 10000;
131 MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
132 module_param_named(no_wb, radeon_no_wb, int, 0444);
134 MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
135 module_param_named(modeset, radeon_modeset, int, 0400);
137 MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
138 module_param_named(dynclks, radeon_dynclks, int, 0444);
140 MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
141 module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
143 MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing");
144 module_param_named(vramlimit, radeon_vram_limit, int, 0600);
146 MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
147 module_param_named(agpmode, radeon_agpmode, int, 0444);
149 MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc)");
150 module_param_named(gartsize, radeon_gart_size, int, 0600);
152 MODULE_PARM_DESC(benchmark, "Run benchmark");
153 module_param_named(benchmark, radeon_benchmarking, int, 0444);
155 MODULE_PARM_DESC(test, "Run tests");
156 module_param_named(test, radeon_testing, int, 0444);
158 MODULE_PARM_DESC(connector_table, "Force connector table");
159 module_param_named(connector_table, radeon_connector_table, int, 0444);
161 MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
162 module_param_named(tv, radeon_tv, int, 0444);
164 MODULE_PARM_DESC(audio, "Audio enable (1 = enable)");
165 module_param_named(audio, radeon_audio, int, 0444);
167 MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
168 module_param_named(disp_priority, radeon_disp_priority, int, 0444);
170 MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
171 module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
173 MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");
174 module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);
176 MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
177 module_param_named(msi, radeon_msi, int, 0444);
179 MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (defaul 10000 = 10 seconds, 0 = disable)");
180 module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444);
182 static int radeon_suspend(struct drm_device *dev, pm_message_t state)
184 drm_radeon_private_t *dev_priv = dev->dev_private;
186 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
189 /* Disable *all* interrupts */
190 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
191 RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
192 RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
196 static int radeon_resume(struct drm_device *dev)
198 drm_radeon_private_t *dev_priv = dev->dev_private;
200 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
203 /* Restore interrupt registers */
204 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
205 RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
206 RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
209 #endif /* DUMBBELL_WIP */
211 static drm_pci_id_list_t pciidlist[] = {
216 static const struct file_operations radeon_driver_old_fops = {
217 .owner = THIS_MODULE,
219 .release = drm_release,
220 .unlocked_ioctl = drm_ioctl,
223 .fasync = drm_fasync,
226 .compat_ioctl = radeon_compat_ioctl,
228 .llseek = noop_llseek,
231 static struct drm_driver driver_old = {
233 DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
234 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED,
235 .dev_priv_size = sizeof(drm_radeon_buf_priv_t),
236 .load = radeon_driver_load,
237 .firstopen = radeon_driver_firstopen,
238 .open = radeon_driver_open,
239 .preclose = radeon_driver_preclose,
240 .postclose = radeon_driver_postclose,
241 .lastclose = radeon_driver_lastclose,
242 .unload = radeon_driver_unload,
244 .suspend = radeon_suspend,
245 .resume = radeon_resume,
246 #endif /* DUMBBELL_WIP */
247 .get_vblank_counter = radeon_get_vblank_counter,
248 .enable_vblank = radeon_enable_vblank,
249 .disable_vblank = radeon_disable_vblank,
250 .master_create = radeon_master_create,
251 .master_destroy = radeon_master_destroy,
252 .irq_preinstall = radeon_driver_irq_preinstall,
253 .irq_postinstall = radeon_driver_irq_postinstall,
254 .irq_uninstall = radeon_driver_irq_uninstall,
255 .irq_handler = radeon_driver_irq_handler,
256 .ioctls = radeon_ioctls,
257 .dma_ioctl = radeon_cp_buffers,
258 .fops = &radeon_driver_old_fops,
262 .major = DRIVER_MAJOR,
263 .minor = DRIVER_MINOR,
264 .patchlevel = DRIVER_PATCHLEVEL,
266 #endif /* DUMBBELL_WIP */
268 static struct drm_driver_info kms_driver;
271 static int radeon_kick_out_firmware_fb(struct pci_dev *pdev)
273 struct apertures_struct *ap;
274 bool primary = false;
276 ap = alloc_apertures(1);
280 ap->ranges[0].base = pci_resource_start(pdev, 0);
281 ap->ranges[0].size = pci_resource_len(pdev, 0);
284 primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
286 remove_conflicting_framebuffers(ap, "radeondrmfb", primary);
292 static int radeon_pci_probe(struct pci_dev *pdev,
293 const struct pci_device_id *ent)
297 /* Get rid of things like offb */
298 ret = radeon_kick_out_firmware_fb(pdev);
302 return drm_get_pci_dev(pdev, ent, &kms_driver);
306 radeon_pci_remove(struct pci_dev *pdev)
308 struct drm_device *dev = pci_get_drvdata(pdev);
314 radeon_pci_suspend(struct pci_dev *pdev, pm_message_t state)
316 struct drm_device *dev = pci_get_drvdata(pdev);
317 return radeon_suspend_kms(dev, state);
321 radeon_pci_resume(struct pci_dev *pdev)
323 struct drm_device *dev = pci_get_drvdata(pdev);
324 return radeon_resume_kms(dev);
327 static const struct file_operations radeon_driver_kms_fops = {
328 .owner = THIS_MODULE,
330 .release = drm_release,
331 .unlocked_ioctl = drm_ioctl,
334 .fasync = drm_fasync,
337 .compat_ioctl = radeon_kms_compat_ioctl,
340 #endif /* DUMBBELL_WIP */
342 static int radeon_sysctl_init(struct drm_device *dev, struct sysctl_ctx_list *ctx,
343 struct sysctl_oid *top)
345 return drm_add_busid_modesetting(dev, ctx, top);
348 static struct drm_driver_info kms_driver = {
350 DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
351 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED | DRIVER_GEM |
352 DRIVER_PRIME /* | DRIVE_MODESET */,
355 #endif /* DUMBBELL_WIP */
356 .load = radeon_driver_load_kms,
357 .use_msi = radeon_msi_ok,
358 .firstopen = radeon_driver_firstopen_kms,
359 .open = radeon_driver_open_kms,
360 .preclose = radeon_driver_preclose_kms,
361 .postclose = radeon_driver_postclose_kms,
362 .lastclose = radeon_driver_lastclose_kms,
363 .unload = radeon_driver_unload_kms,
365 .suspend = radeon_suspend_kms,
366 .resume = radeon_resume_kms,
367 #endif /* DUMBBELL_WIP */
368 .get_vblank_counter = radeon_get_vblank_counter_kms,
369 .enable_vblank = radeon_enable_vblank_kms,
370 .disable_vblank = radeon_disable_vblank_kms,
371 .get_vblank_timestamp = radeon_get_vblank_timestamp_kms,
372 .get_scanout_position = radeon_get_crtc_scanoutpos,
373 .irq_preinstall = radeon_driver_irq_preinstall_kms,
374 .irq_postinstall = radeon_driver_irq_postinstall_kms,
375 .irq_uninstall = radeon_driver_irq_uninstall_kms,
376 .irq_handler = radeon_driver_irq_handler_kms,
377 .sysctl_init = radeon_sysctl_init,
378 .ioctls = radeon_ioctls_kms,
379 .gem_init_object = radeon_gem_object_init,
380 .gem_free_object = radeon_gem_object_free,
381 .gem_open_object = radeon_gem_object_open,
382 .gem_close_object = radeon_gem_object_close,
383 .dma_ioctl = radeon_dma_ioctl_kms,
384 .dumb_create = radeon_mode_dumb_create,
385 .dumb_map_offset = radeon_mode_dumb_mmap,
386 .dumb_destroy = radeon_mode_dumb_destroy,
388 .fops = &radeon_driver_kms_fops,
389 #endif /* DUMBBELL_WIP */
392 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
393 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
394 .gem_prime_export = radeon_gem_prime_export,
395 .gem_prime_import = radeon_gem_prime_import,
396 #endif /* DUMBBELL_WIP */
401 .major = KMS_DRIVER_MAJOR,
402 .minor = KMS_DRIVER_MINOR,
403 .patchlevel = KMS_DRIVER_PATCHLEVEL,
407 static int __init radeon_init(void)
409 driver = &driver_old;
410 pdriver = &radeon_pci_driver;
411 driver->num_ioctls = radeon_max_ioctl;
412 #ifdef CONFIG_VGA_CONSOLE
413 if (vgacon_text_force() && radeon_modeset == -1) {
414 DRM_INFO("VGACON disable radeon kernel modesetting.\n");
415 driver = &driver_old;
416 pdriver = &radeon_pci_driver;
417 driver->driver_features &= ~DRIVER_MODESET;
421 /* if enabled by default */
422 if (radeon_modeset == -1) {
423 #ifdef CONFIG_DRM_RADEON_KMS
424 DRM_INFO("radeon defaulting to kernel modesetting.\n");
427 DRM_INFO("radeon defaulting to userspace modesetting.\n");
431 if (radeon_modeset == 1) {
432 DRM_INFO("radeon kernel modesetting enabled.\n");
433 driver = &kms_driver;
434 pdriver = &radeon_kms_pci_driver;
435 driver->driver_features |= DRIVER_MODESET;
436 driver->num_ioctls = radeon_max_kms_ioctl;
437 radeon_register_atpx_handler();
439 /* if the vga console setting is enabled still
440 * let modprobe override it */
441 return drm_pci_init(driver, pdriver);
444 static void __exit radeon_exit(void)
446 drm_pci_exit(driver, pdriver);
447 radeon_unregister_atpx_handler();
449 #endif /* DUMBBELL_WIP */
451 /* =================================================================== */
454 radeon_probe(device_t kdev)
457 return drm_probe(kdev, pciidlist);
461 radeon_attach(device_t kdev)
463 struct drm_device *dev;
465 dev = device_get_softc(kdev);
466 if (radeon_modeset == 1) {
467 kms_driver.driver_features |= DRIVER_MODESET;
468 kms_driver.max_ioctl = radeon_max_kms_ioctl;
469 radeon_register_atpx_handler();
471 dev->driver = &kms_driver;
472 return (drm_attach(kdev, pciidlist));
476 radeon_suspend(device_t kdev)
478 struct drm_device *dev;
481 dev = device_get_softc(kdev);
482 ret = radeon_suspend_kms(dev);
488 radeon_resume(device_t kdev)
490 struct drm_device *dev;
493 dev = device_get_softc(kdev);
494 ret = radeon_resume_kms(dev);
499 extern struct fb_info * radeon_fb_helper_getinfo(device_t kdev);
501 static device_method_t radeon_methods[] = {
502 /* Device interface */
503 DEVMETHOD(device_probe, radeon_probe),
504 DEVMETHOD(device_attach, radeon_attach),
505 DEVMETHOD(device_suspend, radeon_suspend),
506 DEVMETHOD(device_resume, radeon_resume),
507 DEVMETHOD(device_detach, drm_detach),
509 /* Framebuffer service methods */
510 DEVMETHOD(fb_getinfo, radeon_fb_helper_getinfo),
515 static driver_t radeon_driver = {
518 sizeof(struct drm_device)
521 extern devclass_t drm_devclass;
522 DRIVER_MODULE_ORDERED(radeonkms, vgapci, radeon_driver, drm_devclass,
523 NULL, NULL, SI_ORDER_ANY);
524 MODULE_DEPEND(radeonkms, drmn, 1, 1, 1);
525 MODULE_DEPEND(radeonkms, agp, 1, 1, 1);
526 MODULE_DEPEND(radeonkms, iicbus, 1, 1, 1);
527 MODULE_DEPEND(radeonkms, iic, 1, 1, 1);
528 MODULE_DEPEND(radeonkms, iicbb, 1, 1, 1);
529 MODULE_DEPEND(radeonkms, firmware, 1, 1, 1);