2 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
13 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND
14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <linux/etherdevice.h>
29 #include <dev/mlx5/driver.h>
30 #include <dev/mlx5/vport.h>
31 #include "mlx5_core.h"
33 u8 mlx5_query_vport_state(struct mlx5_core_dev *mdev, u8 opmod)
35 u32 in[MLX5_ST_SZ_DW(query_vport_state_in)];
36 u32 out[MLX5_ST_SZ_DW(query_vport_state_out)];
39 memset(in, 0, sizeof(in));
41 MLX5_SET(query_vport_state_in, in, opcode,
42 MLX5_CMD_OP_QUERY_VPORT_STATE);
43 MLX5_SET(query_vport_state_in, in, op_mod, opmod);
45 err = mlx5_cmd_exec_check_status(mdev, in, sizeof(in), out,
48 mlx5_core_warn(mdev, "MLX5_CMD_OP_QUERY_VPORT_STATE failed\n");
50 return MLX5_GET(query_vport_state_out, out, state);
52 EXPORT_SYMBOL_GPL(mlx5_query_vport_state);
54 static int mlx5_query_nic_vport_context(struct mlx5_core_dev *mdev, u32 vport,
57 u32 in[MLX5_ST_SZ_DW(query_nic_vport_context_in)];
59 memset(in, 0, sizeof(in));
61 MLX5_SET(query_nic_vport_context_in, in, opcode,
62 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT);
64 MLX5_SET(query_nic_vport_context_in, in, vport_number, vport);
66 MLX5_SET(query_nic_vport_context_in, in, other_vport, 1);
68 return mlx5_cmd_exec_check_status(mdev, in, sizeof(in), out, outlen);
71 int mlx5_vport_alloc_q_counter(struct mlx5_core_dev *mdev, int *counter_set_id)
73 u32 in[MLX5_ST_SZ_DW(alloc_q_counter_in)];
74 u32 out[MLX5_ST_SZ_DW(alloc_q_counter_in)];
77 memset(in, 0, sizeof(in));
78 memset(out, 0, sizeof(out));
80 MLX5_SET(alloc_q_counter_in, in, opcode,
81 MLX5_CMD_OP_ALLOC_Q_COUNTER);
83 err = mlx5_cmd_exec_check_status(mdev, in, sizeof(in),
89 *counter_set_id = MLX5_GET(alloc_q_counter_out, out,
94 int mlx5_vport_dealloc_q_counter(struct mlx5_core_dev *mdev,
97 u32 in[MLX5_ST_SZ_DW(dealloc_q_counter_in)];
98 u32 out[MLX5_ST_SZ_DW(dealloc_q_counter_out)];
100 memset(in, 0, sizeof(in));
101 memset(out, 0, sizeof(out));
103 MLX5_SET(dealloc_q_counter_in, in, opcode,
104 MLX5_CMD_OP_DEALLOC_Q_COUNTER);
105 MLX5_SET(dealloc_q_counter_in, in, counter_set_id,
108 return mlx5_cmd_exec_check_status(mdev, in, sizeof(in),
112 static int mlx5_vport_query_q_counter(struct mlx5_core_dev *mdev,
118 u32 in[MLX5_ST_SZ_DW(query_q_counter_in)];
120 memset(in, 0, sizeof(in));
122 MLX5_SET(query_q_counter_in, in, opcode, MLX5_CMD_OP_QUERY_Q_COUNTER);
123 MLX5_SET(query_q_counter_in, in, clear, reset);
124 MLX5_SET(query_q_counter_in, in, counter_set_id, counter_set_id);
126 return mlx5_cmd_exec_check_status(mdev, in, sizeof(in),
130 int mlx5_vport_query_out_of_rx_buffer(struct mlx5_core_dev *mdev,
132 u32 *out_of_rx_buffer)
134 u32 out[MLX5_ST_SZ_DW(query_q_counter_out)];
137 memset(out, 0, sizeof(out));
139 err = mlx5_vport_query_q_counter(mdev, counter_set_id, 0, out,
145 *out_of_rx_buffer = MLX5_GET(query_q_counter_out, out,
150 int mlx5_query_nic_vport_mac_address(struct mlx5_core_dev *mdev,
154 int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
158 out = mlx5_vzalloc(outlen);
162 out_addr = MLX5_ADDR_OF(query_nic_vport_context_out, out,
163 nic_vport_context.permanent_address);
165 err = mlx5_query_nic_vport_context(mdev, vport, out, outlen);
169 ether_addr_copy(addr, &out_addr[2]);
175 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_mac_address);
177 int mlx5_query_nic_vport_system_image_guid(struct mlx5_core_dev *mdev,
178 u64 *system_image_guid)
181 int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
184 out = mlx5_vzalloc(outlen);
188 err = mlx5_query_nic_vport_context(mdev, 0, out, outlen);
192 *system_image_guid = MLX5_GET64(query_nic_vport_context_out, out,
193 nic_vport_context.system_image_guid);
198 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_system_image_guid);
200 int mlx5_query_nic_vport_node_guid(struct mlx5_core_dev *mdev, u64 *node_guid)
203 int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
206 out = mlx5_vzalloc(outlen);
210 err = mlx5_query_nic_vport_context(mdev, 0, out, outlen);
214 *node_guid = MLX5_GET64(query_nic_vport_context_out, out,
215 nic_vport_context.node_guid);
221 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_node_guid);
223 int mlx5_query_nic_vport_port_guid(struct mlx5_core_dev *mdev, u64 *port_guid)
226 int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
229 out = mlx5_vzalloc(outlen);
233 err = mlx5_query_nic_vport_context(mdev, 0, out, outlen);
237 *port_guid = MLX5_GET64(query_nic_vport_context_out, out,
238 nic_vport_context.port_guid);
244 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_port_guid);
246 int mlx5_query_nic_vport_qkey_viol_cntr(struct mlx5_core_dev *mdev,
250 int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
253 out = mlx5_vzalloc(outlen);
257 err = mlx5_query_nic_vport_context(mdev, 0, out, outlen);
261 *qkey_viol_cntr = MLX5_GET(query_nic_vport_context_out, out,
262 nic_vport_context.qkey_violation_counter);
268 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_qkey_viol_cntr);
270 static int mlx5_modify_nic_vport_context(struct mlx5_core_dev *mdev, void *in,
273 u32 out[MLX5_ST_SZ_DW(modify_nic_vport_context_out)];
275 MLX5_SET(modify_nic_vport_context_in, in, opcode,
276 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT);
278 memset(out, 0, sizeof(out));
279 return mlx5_cmd_exec_check_status(mdev, in, inlen, out, sizeof(out));
282 static int mlx5_nic_vport_enable_disable_roce(struct mlx5_core_dev *mdev,
286 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
289 in = mlx5_vzalloc(inlen);
291 mlx5_core_warn(mdev, "failed to allocate inbox\n");
295 MLX5_SET(modify_nic_vport_context_in, in, field_select.roce_en, 1);
296 MLX5_SET(modify_nic_vport_context_in, in, nic_vport_context.roce_en,
299 err = mlx5_modify_nic_vport_context(mdev, in, inlen);
306 int mlx5_set_nic_vport_current_mac(struct mlx5_core_dev *mdev, int vport,
307 bool other_vport, u8 *addr)
310 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in)
311 + MLX5_ST_SZ_BYTES(mac_address_layout);
316 in = mlx5_vzalloc(inlen);
318 mlx5_core_warn(mdev, "failed to allocate inbox\n");
322 MLX5_SET(modify_nic_vport_context_in, in,
323 opcode, MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT);
324 MLX5_SET(modify_nic_vport_context_in, in,
325 vport_number, vport);
326 MLX5_SET(modify_nic_vport_context_in, in,
327 other_vport, other_vport);
328 MLX5_SET(modify_nic_vport_context_in, in,
329 field_select.addresses_list, 1);
330 MLX5_SET(modify_nic_vport_context_in, in,
331 nic_vport_context.allowed_list_type, 0);
332 MLX5_SET(modify_nic_vport_context_in, in,
333 nic_vport_context.allowed_list_size, 1);
335 mac_layout = (u8 *)MLX5_ADDR_OF(modify_nic_vport_context_in, in,
336 nic_vport_context.current_uc_mac_address);
337 mac_ptr = (u8 *)MLX5_ADDR_OF(mac_address_layout, mac_layout,
339 ether_addr_copy(mac_ptr, addr);
341 err = mlx5_modify_nic_vport_context(mdev, in, inlen);
347 EXPORT_SYMBOL_GPL(mlx5_set_nic_vport_current_mac);
348 int mlx5_set_nic_vport_permanent_mac(struct mlx5_core_dev *mdev, int vport,
352 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
356 in = mlx5_vzalloc(inlen);
358 mlx5_core_warn(mdev, "failed to allocate inbox\n");
362 MLX5_SET(modify_nic_vport_context_in, in,
363 opcode, MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT);
364 MLX5_SET(modify_nic_vport_context_in, in, vport_number, vport);
365 MLX5_SET(modify_nic_vport_context_in, in, other_vport, 1);
366 MLX5_SET(modify_nic_vport_context_in, in,
367 field_select.permanent_address, 1);
368 mac_ptr = (u8 *)MLX5_ADDR_OF(modify_nic_vport_context_in, in,
369 nic_vport_context.permanent_address.mac_addr_47_32);
370 ether_addr_copy(mac_ptr, addr);
372 err = mlx5_modify_nic_vport_context(mdev, in, inlen);
378 EXPORT_SYMBOL_GPL(mlx5_set_nic_vport_permanent_mac);
380 int mlx5_nic_vport_enable_roce(struct mlx5_core_dev *mdev)
382 return mlx5_nic_vport_enable_disable_roce(mdev, 1);
384 EXPORT_SYMBOL_GPL(mlx5_nic_vport_enable_roce);
386 int mlx5_nic_vport_disable_roce(struct mlx5_core_dev *mdev)
388 return mlx5_nic_vport_enable_disable_roce(mdev, 0);
390 EXPORT_SYMBOL_GPL(mlx5_nic_vport_disable_roce);
392 int mlx5_query_hca_vport_context(struct mlx5_core_dev *mdev,
393 u8 port_num, u8 vport_num, u32 *out,
396 u32 in[MLX5_ST_SZ_DW(query_hca_vport_context_in)];
397 int is_group_manager;
399 is_group_manager = MLX5_CAP_GEN(mdev, vport_group_manager);
401 memset(in, 0, sizeof(in));
403 MLX5_SET(query_hca_vport_context_in, in, opcode,
404 MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT);
407 if (is_group_manager) {
408 MLX5_SET(query_hca_vport_context_in, in, other_vport,
410 MLX5_SET(query_hca_vport_context_in, in, vport_number,
417 if (MLX5_CAP_GEN(mdev, num_ports) == 2)
418 MLX5_SET(query_hca_vport_context_in, in, port_num, port_num);
420 return mlx5_cmd_exec_check_status(mdev, in, sizeof(in), out, outlen);
423 int mlx5_query_hca_vport_system_image_guid(struct mlx5_core_dev *mdev,
424 u64 *system_image_guid)
427 int outlen = MLX5_ST_SZ_BYTES(query_hca_vport_context_out);
430 out = mlx5_vzalloc(outlen);
434 err = mlx5_query_hca_vport_context(mdev, 1, 0, out, outlen);
438 *system_image_guid = MLX5_GET64(query_hca_vport_context_out, out,
439 hca_vport_context.system_image_guid);
445 EXPORT_SYMBOL_GPL(mlx5_query_hca_vport_system_image_guid);
447 int mlx5_query_hca_vport_node_guid(struct mlx5_core_dev *mdev, u64 *node_guid)
450 int outlen = MLX5_ST_SZ_BYTES(query_hca_vport_context_out);
453 out = mlx5_vzalloc(outlen);
457 err = mlx5_query_hca_vport_context(mdev, 1, 0, out, outlen);
461 *node_guid = MLX5_GET64(query_hca_vport_context_out, out,
462 hca_vport_context.node_guid);
468 EXPORT_SYMBOL_GPL(mlx5_query_hca_vport_node_guid);
470 int mlx5_query_hca_vport_gid(struct mlx5_core_dev *dev, u8 port_num,
471 u16 vport_num, u16 gid_index, union ib_gid *gid)
473 int in_sz = MLX5_ST_SZ_BYTES(query_hca_vport_gid_in);
474 int out_sz = MLX5_ST_SZ_BYTES(query_hca_vport_gid_out);
475 int is_group_manager;
483 is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager);
484 tbsz = mlx5_get_gid_table_len(MLX5_CAP_GEN(dev, gid_table_size));
486 if (gid_index > tbsz && gid_index != 0xffff)
489 if (gid_index == 0xffff)
494 out_sz += nout * sizeof(*gid);
496 in = mlx5_vzalloc(in_sz);
497 out = mlx5_vzalloc(out_sz);
503 MLX5_SET(query_hca_vport_gid_in, in, opcode,
504 MLX5_CMD_OP_QUERY_HCA_VPORT_GID);
506 if (is_group_manager) {
507 MLX5_SET(query_hca_vport_gid_in, in, vport_number,
509 MLX5_SET(query_hca_vport_gid_in, in, other_vport, 1);
516 MLX5_SET(query_hca_vport_gid_in, in, gid_index, gid_index);
518 if (MLX5_CAP_GEN(dev, num_ports) == 2)
519 MLX5_SET(query_hca_vport_gid_in, in, port_num, port_num);
521 err = mlx5_cmd_exec(dev, in, in_sz, out, out_sz);
525 err = mlx5_cmd_status_to_err_v2(out);
529 tmp = (union ib_gid *)MLX5_ADDR_OF(query_hca_vport_gid_out, out, gid);
530 gid->global.subnet_prefix = tmp->global.subnet_prefix;
531 gid->global.interface_id = tmp->global.interface_id;
538 EXPORT_SYMBOL_GPL(mlx5_query_hca_vport_gid);
540 int mlx5_query_hca_vport_pkey(struct mlx5_core_dev *dev, u8 other_vport,
541 u8 port_num, u16 vf_num, u16 pkey_index,
544 int in_sz = MLX5_ST_SZ_BYTES(query_hca_vport_pkey_in);
545 int out_sz = MLX5_ST_SZ_BYTES(query_hca_vport_pkey_out);
546 int is_group_manager;
555 is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager);
557 tbsz = mlx5_to_sw_pkey_sz(MLX5_CAP_GEN(dev, pkey_table_size));
558 if (pkey_index > tbsz && pkey_index != 0xffff)
561 if (pkey_index == 0xffff)
566 out_sz += nout * MLX5_ST_SZ_BYTES(pkey);
568 in = kzalloc(in_sz, GFP_KERNEL);
569 out = kzalloc(out_sz, GFP_KERNEL);
571 MLX5_SET(query_hca_vport_pkey_in, in, opcode,
572 MLX5_CMD_OP_QUERY_HCA_VPORT_PKEY);
574 if (is_group_manager) {
575 MLX5_SET(query_hca_vport_pkey_in, in, vport_number,
577 MLX5_SET(query_hca_vport_pkey_in, in, other_vport, 1);
583 MLX5_SET(query_hca_vport_pkey_in, in, pkey_index, pkey_index);
585 if (MLX5_CAP_GEN(dev, num_ports) == 2)
586 MLX5_SET(query_hca_vport_pkey_in, in, port_num, port_num);
588 err = mlx5_cmd_exec(dev, in, in_sz, out, out_sz);
592 err = mlx5_cmd_status_to_err_v2(out);
596 pkarr = MLX5_ADDR_OF(query_hca_vport_pkey_out, out, pkey);
597 for (i = 0; i < nout; i++, pkey++,
598 pkarr += MLX5_ST_SZ_BYTES(pkey))
599 *pkey = MLX5_GET_PR(pkey, pkarr, pkey);
606 EXPORT_SYMBOL_GPL(mlx5_query_hca_vport_pkey);
608 static int mlx5_modify_eswitch_vport_context(struct mlx5_core_dev *mdev,
609 u16 vport, void *in, int inlen)
611 u32 out[MLX5_ST_SZ_DW(modify_esw_vport_context_out)];
614 memset(out, 0, sizeof(out));
616 MLX5_SET(modify_esw_vport_context_in, in, vport_number, vport);
618 MLX5_SET(modify_esw_vport_context_in, in, other_vport, 1);
620 MLX5_SET(modify_esw_vport_context_in, in, opcode,
621 MLX5_CMD_OP_MODIFY_ESW_VPORT_CONTEXT);
623 err = mlx5_cmd_exec_check_status(mdev, in, inlen,
626 mlx5_core_warn(mdev, "MLX5_CMD_OP_MODIFY_ESW_VPORT_CONTEXT failed\n");
631 int mlx5_set_eswitch_cvlan_info(struct mlx5_core_dev *mdev, u8 vport,
632 u8 insert_mode, u8 strip_mode,
633 u16 vlan, u8 cfi, u8 pcp)
635 u32 in[MLX5_ST_SZ_DW(modify_esw_vport_context_in)];
637 memset(in, 0, sizeof(in));
639 if (insert_mode != MLX5_MODIFY_ESW_VPORT_CONTEXT_CVLAN_INSERT_NONE) {
640 MLX5_SET(modify_esw_vport_context_in, in,
641 esw_vport_context.cvlan_cfi, cfi);
642 MLX5_SET(modify_esw_vport_context_in, in,
643 esw_vport_context.cvlan_pcp, pcp);
644 MLX5_SET(modify_esw_vport_context_in, in,
645 esw_vport_context.cvlan_id, vlan);
648 MLX5_SET(modify_esw_vport_context_in, in,
649 esw_vport_context.vport_cvlan_insert, insert_mode);
651 MLX5_SET(modify_esw_vport_context_in, in,
652 esw_vport_context.vport_cvlan_strip, strip_mode);
654 MLX5_SET(modify_esw_vport_context_in, in, field_select,
655 MLX5_MODIFY_ESW_VPORT_CONTEXT_FIELD_SELECT_CVLAN_STRIP |
656 MLX5_MODIFY_ESW_VPORT_CONTEXT_FIELD_SELECT_CVLAN_INSERT);
658 return mlx5_modify_eswitch_vport_context(mdev, vport, in, sizeof(in));
660 EXPORT_SYMBOL_GPL(mlx5_set_eswitch_cvlan_info);
662 int mlx5_query_vport_counter(struct mlx5_core_dev *dev,
663 u8 port_num, u16 vport_num,
664 void *out, int out_size)
666 int in_sz = MLX5_ST_SZ_BYTES(query_vport_counter_in);
667 int is_group_manager;
671 is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager);
673 in = mlx5_vzalloc(in_sz);
677 MLX5_SET(query_vport_counter_in, in, opcode,
678 MLX5_CMD_OP_QUERY_VPORT_COUNTER);
680 if (is_group_manager) {
681 MLX5_SET(query_vport_counter_in, in, other_vport, 1);
682 MLX5_SET(query_vport_counter_in, in, vport_number,
689 if (MLX5_CAP_GEN(dev, num_ports) == 2)
690 MLX5_SET(query_vport_counter_in, in, port_num, port_num);
692 err = mlx5_cmd_exec(dev, in, in_sz, out, out_size);
695 err = mlx5_cmd_status_to_err_v2(out);
703 EXPORT_SYMBOL_GPL(mlx5_query_vport_counter);
705 int mlx5_get_vport_counters(struct mlx5_core_dev *dev, u8 port_num,
706 struct mlx5_vport_counters *vc)
708 int out_sz = MLX5_ST_SZ_BYTES(query_vport_counter_out);
712 out = mlx5_vzalloc(out_sz);
716 err = mlx5_query_vport_counter(dev, port_num, 0, out, out_sz);
720 vc->received_errors.packets =
721 MLX5_GET64(query_vport_counter_out,
722 out, received_errors.packets);
723 vc->received_errors.octets =
724 MLX5_GET64(query_vport_counter_out,
725 out, received_errors.octets);
726 vc->transmit_errors.packets =
727 MLX5_GET64(query_vport_counter_out,
728 out, transmit_errors.packets);
729 vc->transmit_errors.octets =
730 MLX5_GET64(query_vport_counter_out,
731 out, transmit_errors.octets);
732 vc->received_ib_unicast.packets =
733 MLX5_GET64(query_vport_counter_out,
734 out, received_ib_unicast.packets);
735 vc->received_ib_unicast.octets =
736 MLX5_GET64(query_vport_counter_out,
737 out, received_ib_unicast.octets);
738 vc->transmitted_ib_unicast.packets =
739 MLX5_GET64(query_vport_counter_out,
740 out, transmitted_ib_unicast.packets);
741 vc->transmitted_ib_unicast.octets =
742 MLX5_GET64(query_vport_counter_out,
743 out, transmitted_ib_unicast.octets);
744 vc->received_ib_multicast.packets =
745 MLX5_GET64(query_vport_counter_out,
746 out, received_ib_multicast.packets);
747 vc->received_ib_multicast.octets =
748 MLX5_GET64(query_vport_counter_out,
749 out, received_ib_multicast.octets);
750 vc->transmitted_ib_multicast.packets =
751 MLX5_GET64(query_vport_counter_out,
752 out, transmitted_ib_multicast.packets);
753 vc->transmitted_ib_multicast.octets =
754 MLX5_GET64(query_vport_counter_out,
755 out, transmitted_ib_multicast.octets);
756 vc->received_eth_broadcast.packets =
757 MLX5_GET64(query_vport_counter_out,
758 out, received_eth_broadcast.packets);
759 vc->received_eth_broadcast.octets =
760 MLX5_GET64(query_vport_counter_out,
761 out, received_eth_broadcast.octets);
762 vc->transmitted_eth_broadcast.packets =
763 MLX5_GET64(query_vport_counter_out,
764 out, transmitted_eth_broadcast.packets);
765 vc->transmitted_eth_broadcast.octets =
766 MLX5_GET64(query_vport_counter_out,
767 out, transmitted_eth_broadcast.octets);
768 vc->received_eth_unicast.octets =
769 MLX5_GET64(query_vport_counter_out,
770 out, received_eth_unicast.octets);
771 vc->received_eth_unicast.packets =
772 MLX5_GET64(query_vport_counter_out,
773 out, received_eth_unicast.packets);
774 vc->transmitted_eth_unicast.octets =
775 MLX5_GET64(query_vport_counter_out,
776 out, transmitted_eth_unicast.octets);
777 vc->transmitted_eth_unicast.packets =
778 MLX5_GET64(query_vport_counter_out,
779 out, transmitted_eth_unicast.packets);
780 vc->received_eth_multicast.octets =
781 MLX5_GET64(query_vport_counter_out,
782 out, received_eth_multicast.octets);
783 vc->received_eth_multicast.packets =
784 MLX5_GET64(query_vport_counter_out,
785 out, received_eth_multicast.packets);
786 vc->transmitted_eth_multicast.octets =
787 MLX5_GET64(query_vport_counter_out,
788 out, transmitted_eth_multicast.octets);
789 vc->transmitted_eth_multicast.packets =
790 MLX5_GET64(query_vport_counter_out,
791 out, transmitted_eth_multicast.packets);