2 * Copyright (c) 2017-2018 Cavium, Inc.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25 * POSSIBILITY OF SUCH DAMAGE.
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
37 #include "ecore_sp_commands.h"
38 #include "ecore_dcbx.h"
39 #include "ecore_cxt.h"
40 #include "ecore_gtt_reg_addr.h"
41 #include "ecore_iro.h"
42 #ifdef CONFIG_ECORE_ROCE
43 #include "ecore_roce.h"
45 #include "ecore_iov_api.h"
47 #define ECORE_DCBX_MAX_MIB_READ_TRY (100)
48 #define ECORE_ETH_TYPE_DEFAULT (0)
49 #define ECORE_ETH_TYPE_ROCE (0x8915)
50 #define ECORE_UDP_PORT_TYPE_ROCE_V2 (0x12B7)
51 #define ECORE_ETH_TYPE_FCOE (0x8906)
52 #define ECORE_TCP_PORT_ISCSI (0xCBC)
54 #define ECORE_DCBX_INVALID_PRIORITY 0xFF
56 /* Get Traffic Class from priority traffic class table, 4 bits represent
57 * the traffic class corresponding to the priority.
59 #define ECORE_DCBX_PRIO2TC(prio_tc_tbl, prio) \
60 ((u32)(prio_tc_tbl >> ((7 - prio) * 4)) & 0x7)
62 static bool ecore_dcbx_app_ethtype(u32 app_info_bitmap)
64 return !!(ECORE_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF) ==
68 static bool ecore_dcbx_ieee_app_ethtype(u32 app_info_bitmap)
70 u8 mfw_val = ECORE_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF_IEEE);
73 if (mfw_val == DCBX_APP_SF_IEEE_RESERVED)
74 return ecore_dcbx_app_ethtype(app_info_bitmap);
76 return !!(mfw_val == DCBX_APP_SF_IEEE_ETHTYPE);
79 static bool ecore_dcbx_app_port(u32 app_info_bitmap)
81 return !!(ECORE_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF) ==
85 static bool ecore_dcbx_ieee_app_port(u32 app_info_bitmap, u8 type)
87 u8 mfw_val = ECORE_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF_IEEE);
90 if (mfw_val == DCBX_APP_SF_IEEE_RESERVED)
91 return ecore_dcbx_app_port(app_info_bitmap);
93 return !!(mfw_val == type || mfw_val == DCBX_APP_SF_IEEE_TCP_UDP_PORT);
96 static bool ecore_dcbx_default_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
101 ethtype = ecore_dcbx_ieee_app_ethtype(app_info_bitmap);
103 ethtype = ecore_dcbx_app_ethtype(app_info_bitmap);
105 return !!(ethtype && (proto_id == ECORE_ETH_TYPE_DEFAULT));
108 static bool ecore_dcbx_iscsi_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
113 port = ecore_dcbx_ieee_app_port(app_info_bitmap,
114 DCBX_APP_SF_IEEE_TCP_PORT);
116 port = ecore_dcbx_app_port(app_info_bitmap);
118 return !!(port && (proto_id == ECORE_TCP_PORT_ISCSI));
121 static bool ecore_dcbx_fcoe_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
126 ethtype = ecore_dcbx_ieee_app_ethtype(app_info_bitmap);
128 ethtype = ecore_dcbx_app_ethtype(app_info_bitmap);
130 return !!(ethtype && (proto_id == ECORE_ETH_TYPE_FCOE));
133 static bool ecore_dcbx_roce_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
138 ethtype = ecore_dcbx_ieee_app_ethtype(app_info_bitmap);
140 ethtype = ecore_dcbx_app_ethtype(app_info_bitmap);
142 return !!(ethtype && (proto_id == ECORE_ETH_TYPE_ROCE));
145 static bool ecore_dcbx_roce_v2_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
150 port = ecore_dcbx_ieee_app_port(app_info_bitmap,
151 DCBX_APP_SF_IEEE_UDP_PORT);
153 port = ecore_dcbx_app_port(app_info_bitmap);
155 return !!(port && (proto_id == ECORE_UDP_PORT_TYPE_ROCE_V2));
158 static bool ecore_dcbx_iwarp_tlv(struct ecore_hwfn *p_hwfn, u32 app_info_bitmap,
159 u16 proto_id, bool ieee)
163 if (!p_hwfn->p_dcbx_info->iwarp_port)
167 port = ecore_dcbx_ieee_app_port(app_info_bitmap,
168 DCBX_APP_SF_IEEE_TCP_PORT);
170 port = ecore_dcbx_app_port(app_info_bitmap);
172 return !!(port && (proto_id == p_hwfn->p_dcbx_info->iwarp_port));
176 ecore_dcbx_dp_protocol(struct ecore_hwfn *p_hwfn,
177 struct ecore_dcbx_results *p_data)
179 enum dcbx_protocol_type id;
182 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "DCBX negotiated: %d\n",
183 p_data->dcbx_enabled);
185 for (i = 0; i < OSAL_ARRAY_SIZE(ecore_dcbx_app_update); i++) {
186 id = ecore_dcbx_app_update[i].id;
188 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
189 "%s info: update %d, enable %d, prio %d, tc %d, num_active_tc %d dscp_enable = %d dscp_val = %d\n",
190 ecore_dcbx_app_update[i].name, p_data->arr[id].update,
191 p_data->arr[id].enable, p_data->arr[id].priority,
192 p_data->arr[id].tc, p_hwfn->hw_info.num_active_tc,
193 p_data->arr[id].dscp_enable,
194 p_data->arr[id].dscp_val);
199 ecore_dcbx_set_params(struct ecore_dcbx_results *p_data,
200 struct ecore_hwfn *p_hwfn,
201 bool enable, u8 prio, u8 tc,
202 enum dcbx_protocol_type type,
203 enum ecore_pci_personality personality)
205 struct ecore_dcbx_dscp_params *dscp = &p_hwfn->p_dcbx_info->get.dscp;
207 /* PF update ramrod data */
208 p_data->arr[type].enable = enable;
209 p_data->arr[type].priority = prio;
210 p_data->arr[type].tc = tc;
211 p_data->arr[type].dscp_enable = dscp->enabled;
212 if (p_data->arr[type].dscp_enable) {
215 for (i = 0; i < ECORE_DCBX_DSCP_SIZE; i++)
216 if (prio == dscp->dscp_pri_map[i]) {
217 p_data->arr[type].dscp_val = i;
222 if (enable && p_data->arr[type].dscp_enable)
223 p_data->arr[type].update = UPDATE_DCB_DSCP;
225 p_data->arr[type].update = UPDATE_DCB;
227 p_data->arr[type].update = DONT_UPDATE_DCB_DSCP;
230 if (p_hwfn->hw_info.personality == personality)
231 p_hwfn->hw_info.offload_tc = tc;
234 /* Update app protocol data and hw_info fields with the TLV info */
236 ecore_dcbx_update_app_info(struct ecore_dcbx_results *p_data,
237 struct ecore_hwfn *p_hwfn,
238 bool enable, u8 prio, u8 tc,
239 enum dcbx_protocol_type type)
241 enum ecore_pci_personality personality;
242 enum dcbx_protocol_type id;
246 for (i = 0; i < OSAL_ARRAY_SIZE(ecore_dcbx_app_update); i++) {
247 id = ecore_dcbx_app_update[i].id;
252 personality = ecore_dcbx_app_update[i].personality;
253 name = ecore_dcbx_app_update[i].name;
255 ecore_dcbx_set_params(p_data, p_hwfn, enable,
256 prio, tc, type, personality);
260 static enum _ecore_status_t
261 ecore_dcbx_get_app_priority(u8 pri_bitmap, u8 *priority)
263 u32 pri_mask, pri = ECORE_MAX_PFC_PRIORITIES;
264 u32 index = ECORE_MAX_PFC_PRIORITIES - 1;
265 enum _ecore_status_t rc = ECORE_SUCCESS;
267 /* Bitmap 1 corresponds to priority 0, return priority 0 */
268 if (pri_bitmap == 1) {
273 /* Choose the highest priority */
274 while ((ECORE_MAX_PFC_PRIORITIES == pri) && index) {
275 pri_mask = 1 << index;
276 if (pri_bitmap & pri_mask)
281 if (pri < ECORE_MAX_PFC_PRIORITIES)
290 ecore_dcbx_get_app_protocol_type(struct ecore_hwfn *p_hwfn,
291 u32 app_prio_bitmap, u16 id,
292 enum dcbx_protocol_type *type, bool ieee)
294 if (ecore_dcbx_fcoe_tlv(app_prio_bitmap, id, ieee)) {
295 *type = DCBX_PROTOCOL_FCOE;
296 } else if (ecore_dcbx_roce_tlv(app_prio_bitmap, id, ieee)) {
297 *type = DCBX_PROTOCOL_ROCE;
298 } else if (ecore_dcbx_iscsi_tlv(app_prio_bitmap, id, ieee)) {
299 *type = DCBX_PROTOCOL_ISCSI;
300 } else if (ecore_dcbx_default_tlv(app_prio_bitmap, id, ieee)) {
301 *type = DCBX_PROTOCOL_ETH;
302 } else if (ecore_dcbx_roce_v2_tlv(app_prio_bitmap, id, ieee)) {
303 *type = DCBX_PROTOCOL_ROCE_V2;
304 } else if (ecore_dcbx_iwarp_tlv(p_hwfn, app_prio_bitmap, id, ieee)) {
305 *type = DCBX_PROTOCOL_IWARP;
307 *type = DCBX_MAX_PROTOCOL_TYPE;
309 "No action required, App TLV id = 0x%x app_prio_bitmap = 0x%x\n",
310 id, app_prio_bitmap);
317 /* Parse app TLV's to update TC information in hw_info structure for
318 * reconfiguring QM. Get protocol specific data for PF update ramrod command.
320 static enum _ecore_status_t
321 ecore_dcbx_process_tlv(struct ecore_hwfn *p_hwfn,
322 struct ecore_dcbx_results *p_data,
323 struct dcbx_app_priority_entry *p_tbl, u32 pri_tc_tbl,
324 int count, u8 dcbx_version)
326 enum dcbx_protocol_type type;
331 enum _ecore_status_t rc = ECORE_SUCCESS;
334 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
335 "Num APP entries = %d pri_tc_tbl = 0x%x dcbx_version = %u\n",
336 count, pri_tc_tbl, dcbx_version);
338 ieee = (dcbx_version == DCBX_CONFIG_VERSION_IEEE);
340 for (i = 0; i < count; i++) {
341 protocol_id = ECORE_MFW_GET_FIELD(p_tbl[i].entry,
342 DCBX_APP_PROTOCOL_ID);
343 priority_map = ECORE_MFW_GET_FIELD(p_tbl[i].entry,
345 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "Id = 0x%x pri_map = %u\n",
346 protocol_id, priority_map);
347 rc = ecore_dcbx_get_app_priority(priority_map, &priority);
348 if (rc == ECORE_INVAL) {
349 DP_ERR(p_hwfn, "Invalid priority\n");
353 tc = ECORE_DCBX_PRIO2TC(pri_tc_tbl, priority);
354 if (ecore_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry,
357 /* ETH always have the enable bit reset, as it gets
358 * vlan information per packet. For other protocols,
359 * should be set according to the dcbx_enabled
360 * indication, but we only got here if there was an
361 * app tlv for the protocol, so dcbx must be enabled.
363 enable = !(type == DCBX_PROTOCOL_ETH);
365 ecore_dcbx_update_app_info(p_data, p_hwfn, enable,
370 /* Update ramrod protocol data and hw_info fields
371 * with default info when corresponding APP TLV's are not detected.
372 * The enabled field has a different logic for ethernet as only for
373 * ethernet dcb should disabled by default, as the information arrives
374 * from the OS (unless an explicit app tlv was present).
376 tc = p_data->arr[DCBX_PROTOCOL_ETH].tc;
377 priority = p_data->arr[DCBX_PROTOCOL_ETH].priority;
378 for (type = 0; type < DCBX_MAX_PROTOCOL_TYPE; type++) {
379 if (p_data->arr[type].update)
382 enable = (type == DCBX_PROTOCOL_ETH) ? false : !!dcbx_version;
383 ecore_dcbx_update_app_info(p_data, p_hwfn, enable,
387 return ECORE_SUCCESS;
390 /* Parse app TLV's to update TC information in hw_info structure for
391 * reconfiguring QM. Get protocol specific data for PF update ramrod command.
393 static enum _ecore_status_t
394 ecore_dcbx_process_mib_info(struct ecore_hwfn *p_hwfn)
396 struct dcbx_app_priority_feature *p_app;
397 enum _ecore_status_t rc = ECORE_SUCCESS;
398 struct ecore_dcbx_results data = { 0 };
399 struct dcbx_app_priority_entry *p_tbl;
400 struct dcbx_ets_feature *p_ets;
401 struct ecore_hw_info *p_info;
402 u32 pri_tc_tbl, flags;
406 flags = p_hwfn->p_dcbx_info->operational.flags;
407 dcbx_version = ECORE_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION);
409 p_app = &p_hwfn->p_dcbx_info->operational.features.app;
410 p_tbl = p_app->app_pri_tbl;
412 p_ets = &p_hwfn->p_dcbx_info->operational.features.ets;
413 pri_tc_tbl = p_ets->pri_tc_tbl[0];
415 p_info = &p_hwfn->hw_info;
416 num_entries = ECORE_MFW_GET_FIELD(p_app->flags, DCBX_APP_NUM_ENTRIES);
418 rc = ecore_dcbx_process_tlv(p_hwfn, &data, p_tbl, pri_tc_tbl,
419 num_entries, dcbx_version);
420 if (rc != ECORE_SUCCESS)
423 p_info->num_active_tc = ECORE_MFW_GET_FIELD(p_ets->flags, DCBX_ETS_MAX_TCS);
424 p_hwfn->qm_info.ooo_tc = ECORE_MFW_GET_FIELD(p_ets->flags, DCBX_OOO_TC);
425 data.pf_id = p_hwfn->rel_pf_id;
426 data.dcbx_enabled = !!dcbx_version;
428 ecore_dcbx_dp_protocol(p_hwfn, &data);
430 OSAL_MEMCPY(&p_hwfn->p_dcbx_info->results, &data,
431 sizeof(struct ecore_dcbx_results));
433 return ECORE_SUCCESS;
436 static enum _ecore_status_t
437 ecore_dcbx_copy_mib(struct ecore_hwfn *p_hwfn,
438 struct ecore_ptt *p_ptt,
439 struct ecore_dcbx_mib_meta_data *p_data,
440 enum ecore_mib_read_type type)
442 enum _ecore_status_t rc = ECORE_SUCCESS;
443 u32 prefix_seq_num, suffix_seq_num;
446 /* The data is considered to be valid only if both sequence numbers are
450 if (type == ECORE_DCBX_REMOTE_LLDP_MIB) {
451 ecore_memcpy_from(p_hwfn, p_ptt, p_data->lldp_remote,
452 p_data->addr, p_data->size);
453 prefix_seq_num = p_data->lldp_remote->prefix_seq_num;
454 suffix_seq_num = p_data->lldp_remote->suffix_seq_num;
456 ecore_memcpy_from(p_hwfn, p_ptt, p_data->mib,
457 p_data->addr, p_data->size);
458 prefix_seq_num = p_data->mib->prefix_seq_num;
459 suffix_seq_num = p_data->mib->suffix_seq_num;
463 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
464 "mib type = %d, try count = %d prefix seq num = %d suffix seq num = %d\n",
465 type, read_count, prefix_seq_num, suffix_seq_num);
466 } while ((prefix_seq_num != suffix_seq_num) &&
467 (read_count < ECORE_DCBX_MAX_MIB_READ_TRY));
469 if (read_count >= ECORE_DCBX_MAX_MIB_READ_TRY) {
471 "MIB read err, mib type = %d, try count = %d prefix seq num = %d suffix seq num = %d\n",
472 type, read_count, prefix_seq_num, suffix_seq_num);
480 ecore_dcbx_get_priority_info(struct ecore_hwfn *p_hwfn,
481 struct ecore_dcbx_app_prio *p_prio,
482 struct ecore_dcbx_results *p_results)
486 p_prio->roce = ECORE_DCBX_INVALID_PRIORITY;
487 p_prio->roce_v2 = ECORE_DCBX_INVALID_PRIORITY;
488 p_prio->iscsi = ECORE_DCBX_INVALID_PRIORITY;
489 p_prio->fcoe = ECORE_DCBX_INVALID_PRIORITY;
491 if (p_results->arr[DCBX_PROTOCOL_ROCE].update &&
492 p_results->arr[DCBX_PROTOCOL_ROCE].enable)
493 p_prio->roce = p_results->arr[DCBX_PROTOCOL_ROCE].priority;
495 if (p_results->arr[DCBX_PROTOCOL_ROCE_V2].update &&
496 p_results->arr[DCBX_PROTOCOL_ROCE_V2].enable) {
497 val = p_results->arr[DCBX_PROTOCOL_ROCE_V2].priority;
498 p_prio->roce_v2 = val;
501 if (p_results->arr[DCBX_PROTOCOL_ISCSI].update &&
502 p_results->arr[DCBX_PROTOCOL_ISCSI].enable)
503 p_prio->iscsi = p_results->arr[DCBX_PROTOCOL_ISCSI].priority;
505 if (p_results->arr[DCBX_PROTOCOL_FCOE].update &&
506 p_results->arr[DCBX_PROTOCOL_FCOE].enable)
507 p_prio->fcoe = p_results->arr[DCBX_PROTOCOL_FCOE].priority;
509 if (p_results->arr[DCBX_PROTOCOL_ETH].update &&
510 p_results->arr[DCBX_PROTOCOL_ETH].enable)
511 p_prio->eth = p_results->arr[DCBX_PROTOCOL_ETH].priority;
513 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
514 "Priorities: iscsi %d, roce %d, roce v2 %d, fcoe %d, eth %d\n",
515 p_prio->iscsi, p_prio->roce, p_prio->roce_v2, p_prio->fcoe,
520 ecore_dcbx_get_app_data(struct ecore_hwfn *p_hwfn,
521 struct dcbx_app_priority_feature *p_app,
522 struct dcbx_app_priority_entry *p_tbl,
523 struct ecore_dcbx_params *p_params, bool ieee)
525 struct ecore_app_entry *entry;
529 p_params->app_willing = ECORE_MFW_GET_FIELD(p_app->flags,
531 p_params->app_valid = ECORE_MFW_GET_FIELD(p_app->flags,
533 p_params->app_error = ECORE_MFW_GET_FIELD(p_app->flags, DCBX_APP_ERROR);
534 p_params->num_app_entries = ECORE_MFW_GET_FIELD(p_app->flags,
535 DCBX_APP_NUM_ENTRIES);
536 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) {
537 entry = &p_params->app_entry[i];
542 sf_ieee = ECORE_MFW_GET_FIELD(p_tbl[i].entry,
545 case DCBX_APP_SF_IEEE_RESERVED:
547 val = ECORE_MFW_GET_FIELD(p_tbl[i].entry,
549 entry->sf_ieee = val ?
550 ECORE_DCBX_SF_IEEE_TCP_UDP_PORT :
551 ECORE_DCBX_SF_IEEE_ETHTYPE;
553 case DCBX_APP_SF_IEEE_ETHTYPE:
554 entry->sf_ieee = ECORE_DCBX_SF_IEEE_ETHTYPE;
556 case DCBX_APP_SF_IEEE_TCP_PORT:
557 entry->sf_ieee = ECORE_DCBX_SF_IEEE_TCP_PORT;
559 case DCBX_APP_SF_IEEE_UDP_PORT:
560 entry->sf_ieee = ECORE_DCBX_SF_IEEE_UDP_PORT;
562 case DCBX_APP_SF_IEEE_TCP_UDP_PORT:
563 entry->sf_ieee = ECORE_DCBX_SF_IEEE_TCP_UDP_PORT;
567 entry->ethtype = !(ECORE_MFW_GET_FIELD(p_tbl[i].entry,
571 pri_map = ECORE_MFW_GET_FIELD(p_tbl[i].entry, DCBX_APP_PRI_MAP);
572 ecore_dcbx_get_app_priority(pri_map, &entry->prio);
573 entry->proto_id = ECORE_MFW_GET_FIELD(p_tbl[i].entry,
574 DCBX_APP_PROTOCOL_ID);
575 ecore_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry,
577 &entry->proto_type, ieee);
580 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
581 "APP params: willing %d, valid %d error = %d\n",
582 p_params->app_willing, p_params->app_valid,
583 p_params->app_error);
587 ecore_dcbx_get_pfc_data(struct ecore_hwfn *p_hwfn,
588 u32 pfc, struct ecore_dcbx_params *p_params)
592 p_params->pfc.willing = ECORE_MFW_GET_FIELD(pfc, DCBX_PFC_WILLING);
593 p_params->pfc.max_tc = ECORE_MFW_GET_FIELD(pfc, DCBX_PFC_CAPS);
594 p_params->pfc.enabled = ECORE_MFW_GET_FIELD(pfc, DCBX_PFC_ENABLED);
595 pfc_map = ECORE_MFW_GET_FIELD(pfc, DCBX_PFC_PRI_EN_BITMAP);
596 p_params->pfc.prio[0] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_0);
597 p_params->pfc.prio[1] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_1);
598 p_params->pfc.prio[2] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_2);
599 p_params->pfc.prio[3] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_3);
600 p_params->pfc.prio[4] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_4);
601 p_params->pfc.prio[5] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_5);
602 p_params->pfc.prio[6] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_6);
603 p_params->pfc.prio[7] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_7);
605 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
606 "PFC params: willing %d, pfc_bitmap %u max_tc = %u enabled = %d\n",
607 p_params->pfc.willing, pfc_map, p_params->pfc.max_tc,
608 p_params->pfc.enabled);
612 ecore_dcbx_get_ets_data(struct ecore_hwfn *p_hwfn,
613 struct dcbx_ets_feature *p_ets,
614 struct ecore_dcbx_params *p_params)
616 u32 bw_map[2], tsa_map[2], pri_map;
619 p_params->ets_willing = ECORE_MFW_GET_FIELD(p_ets->flags,
621 p_params->ets_enabled = ECORE_MFW_GET_FIELD(p_ets->flags,
623 p_params->ets_cbs = ECORE_MFW_GET_FIELD(p_ets->flags, DCBX_ETS_CBS);
624 p_params->max_ets_tc = ECORE_MFW_GET_FIELD(p_ets->flags,
626 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
627 "ETS params: willing %d, enabled = %d ets_cbs %d pri_tc_tbl_0 %x max_ets_tc %d\n",
628 p_params->ets_willing, p_params->ets_enabled,
629 p_params->ets_cbs, p_ets->pri_tc_tbl[0],
630 p_params->max_ets_tc);
631 if (p_params->ets_enabled && !p_params->max_ets_tc)
633 p_params->max_ets_tc = ECORE_MAX_PFC_PRIORITIES;
634 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
635 "ETS params: max_ets_tc is forced to %d\n",
636 p_params->max_ets_tc);
638 /* 8 bit tsa and bw data corresponding to each of the 8 TC's are
639 * encoded in a type u32 array of size 2.
641 bw_map[0] = OSAL_BE32_TO_CPU(p_ets->tc_bw_tbl[0]);
642 bw_map[1] = OSAL_BE32_TO_CPU(p_ets->tc_bw_tbl[1]);
643 tsa_map[0] = OSAL_BE32_TO_CPU(p_ets->tc_tsa_tbl[0]);
644 tsa_map[1] = OSAL_BE32_TO_CPU(p_ets->tc_tsa_tbl[1]);
645 pri_map = p_ets->pri_tc_tbl[0];
646 for (i = 0; i < ECORE_MAX_PFC_PRIORITIES; i++) {
647 p_params->ets_tc_bw_tbl[i] = ((u8 *)bw_map)[i];
648 p_params->ets_tc_tsa_tbl[i] = ((u8 *)tsa_map)[i];
649 p_params->ets_pri_tc_tbl[i] = ECORE_DCBX_PRIO2TC(pri_map, i);
650 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
651 "elem %d bw_tbl %x tsa_tbl %x\n",
652 i, p_params->ets_tc_bw_tbl[i],
653 p_params->ets_tc_tsa_tbl[i]);
658 ecore_dcbx_get_common_params(struct ecore_hwfn *p_hwfn,
659 struct dcbx_app_priority_feature *p_app,
660 struct dcbx_app_priority_entry *p_tbl,
661 struct dcbx_ets_feature *p_ets,
662 u32 pfc, struct ecore_dcbx_params *p_params,
665 ecore_dcbx_get_app_data(p_hwfn, p_app, p_tbl, p_params, ieee);
666 ecore_dcbx_get_ets_data(p_hwfn, p_ets, p_params);
667 ecore_dcbx_get_pfc_data(p_hwfn, pfc, p_params);
671 ecore_dcbx_get_local_params(struct ecore_hwfn *p_hwfn,
672 struct ecore_ptt *p_ptt,
673 struct ecore_dcbx_get *params)
675 struct dcbx_features *p_feat;
677 p_feat = &p_hwfn->p_dcbx_info->local_admin.features;
678 ecore_dcbx_get_common_params(p_hwfn, &p_feat->app,
679 p_feat->app.app_pri_tbl, &p_feat->ets,
680 p_feat->pfc, ¶ms->local.params, false);
681 params->local.valid = true;
685 ecore_dcbx_get_remote_params(struct ecore_hwfn *p_hwfn,
686 struct ecore_ptt *p_ptt,
687 struct ecore_dcbx_get *params)
689 struct dcbx_features *p_feat;
691 p_feat = &p_hwfn->p_dcbx_info->remote.features;
692 ecore_dcbx_get_common_params(p_hwfn, &p_feat->app,
693 p_feat->app.app_pri_tbl, &p_feat->ets,
694 p_feat->pfc, ¶ms->remote.params,
696 params->remote.valid = true;
699 static enum _ecore_status_t
700 ecore_dcbx_get_operational_params(struct ecore_hwfn *p_hwfn,
701 struct ecore_ptt *p_ptt,
702 struct ecore_dcbx_get *params)
704 struct ecore_dcbx_operational_params *p_operational;
705 struct ecore_dcbx_results *p_results;
706 struct dcbx_features *p_feat;
711 flags = p_hwfn->p_dcbx_info->operational.flags;
713 /* If DCBx version is non zero, then negotiation
714 * was successfuly performed
716 p_operational = ¶ms->operational;
717 enabled = !!(ECORE_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) !=
718 DCBX_CONFIG_VERSION_DISABLED);
720 p_operational->enabled = enabled;
721 p_operational->valid = false;
722 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "Dcbx is disabled\n");
726 p_feat = &p_hwfn->p_dcbx_info->operational.features;
727 p_results = &p_hwfn->p_dcbx_info->results;
729 val = !!(ECORE_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) ==
730 DCBX_CONFIG_VERSION_IEEE);
731 p_operational->ieee = val;
733 val = !!(ECORE_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) ==
734 DCBX_CONFIG_VERSION_CEE);
735 p_operational->cee = val;
737 val = !!(ECORE_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) ==
738 DCBX_CONFIG_VERSION_STATIC);
739 p_operational->local = val;
741 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
742 "Version support: ieee %d, cee %d, static %d\n",
743 p_operational->ieee, p_operational->cee,
744 p_operational->local);
746 ecore_dcbx_get_common_params(p_hwfn, &p_feat->app,
747 p_feat->app.app_pri_tbl, &p_feat->ets,
748 p_feat->pfc, ¶ms->operational.params,
749 p_operational->ieee);
750 ecore_dcbx_get_priority_info(p_hwfn, &p_operational->app_prio,
752 err = ECORE_MFW_GET_FIELD(p_feat->app.flags, DCBX_APP_ERROR);
753 p_operational->err = err;
754 p_operational->enabled = enabled;
755 p_operational->valid = true;
757 return ECORE_SUCCESS;
761 ecore_dcbx_get_dscp_params(struct ecore_hwfn *p_hwfn,
762 struct ecore_ptt *p_ptt,
763 struct ecore_dcbx_get *params)
765 struct ecore_dcbx_dscp_params *p_dscp;
766 struct dcb_dscp_map *p_dscp_map;
770 p_dscp = ¶ms->dscp;
771 p_dscp_map = &p_hwfn->p_dcbx_info->dscp_map;
772 p_dscp->enabled = ECORE_MFW_GET_FIELD(p_dscp_map->flags,
774 /* MFW encodes 64 dscp entries into 8 element array of u32 entries,
775 * where each entry holds the 4bit priority map for 8 dscp entries.
777 for (i = 0, entry = 0; i < ECORE_DCBX_DSCP_SIZE / 8; i++) {
778 pri_map = OSAL_BE32_TO_CPU(p_dscp_map->dscp_pri_map[i]);
779 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "elem %d pri_map 0x%x\n",
781 for (j = 0; j < ECORE_DCBX_DSCP_SIZE / 8; j++, entry++)
782 p_dscp->dscp_pri_map[entry] = (u32)(pri_map >>
788 ecore_dcbx_get_local_lldp_params(struct ecore_hwfn *p_hwfn,
789 struct ecore_ptt *p_ptt,
790 struct ecore_dcbx_get *params)
792 struct lldp_config_params_s *p_local;
794 p_local = &p_hwfn->p_dcbx_info->lldp_local[LLDP_NEAREST_BRIDGE];
796 OSAL_MEMCPY(params->lldp_local.local_chassis_id,
797 p_local->local_chassis_id,
798 OSAL_ARRAY_SIZE(p_local->local_chassis_id));
799 OSAL_MEMCPY(params->lldp_local.local_port_id, p_local->local_port_id,
800 OSAL_ARRAY_SIZE(p_local->local_port_id));
804 ecore_dcbx_get_remote_lldp_params(struct ecore_hwfn *p_hwfn,
805 struct ecore_ptt *p_ptt,
806 struct ecore_dcbx_get *params)
808 struct lldp_status_params_s *p_remote;
810 p_remote = &p_hwfn->p_dcbx_info->lldp_remote[LLDP_NEAREST_BRIDGE];
812 OSAL_MEMCPY(params->lldp_remote.peer_chassis_id,
813 p_remote->peer_chassis_id,
814 OSAL_ARRAY_SIZE(p_remote->peer_chassis_id));
815 OSAL_MEMCPY(params->lldp_remote.peer_port_id, p_remote->peer_port_id,
816 OSAL_ARRAY_SIZE(p_remote->peer_port_id));
819 static enum _ecore_status_t
820 ecore_dcbx_get_params(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
821 struct ecore_dcbx_get *p_params,
822 enum ecore_mib_read_type type)
824 enum _ecore_status_t rc = ECORE_SUCCESS;
827 case ECORE_DCBX_REMOTE_MIB:
828 ecore_dcbx_get_remote_params(p_hwfn, p_ptt, p_params);
830 case ECORE_DCBX_LOCAL_MIB:
831 ecore_dcbx_get_local_params(p_hwfn, p_ptt, p_params);
833 case ECORE_DCBX_OPERATIONAL_MIB:
834 ecore_dcbx_get_operational_params(p_hwfn, p_ptt, p_params);
836 case ECORE_DCBX_REMOTE_LLDP_MIB:
837 ecore_dcbx_get_remote_lldp_params(p_hwfn, p_ptt, p_params);
839 case ECORE_DCBX_LOCAL_LLDP_MIB:
840 ecore_dcbx_get_local_lldp_params(p_hwfn, p_ptt, p_params);
843 DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type);
850 static enum _ecore_status_t
851 ecore_dcbx_read_local_lldp_mib(struct ecore_hwfn *p_hwfn,
852 struct ecore_ptt *p_ptt)
854 struct ecore_dcbx_mib_meta_data data;
855 enum _ecore_status_t rc = ECORE_SUCCESS;
857 OSAL_MEM_ZERO(&data, sizeof(data));
858 data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port,
860 data.lldp_local = p_hwfn->p_dcbx_info->lldp_local;
861 data.size = sizeof(struct lldp_config_params_s);
862 ecore_memcpy_from(p_hwfn, p_ptt, data.lldp_local, data.addr, data.size);
867 static enum _ecore_status_t
868 ecore_dcbx_read_remote_lldp_mib(struct ecore_hwfn *p_hwfn,
869 struct ecore_ptt *p_ptt,
870 enum ecore_mib_read_type type)
872 struct ecore_dcbx_mib_meta_data data;
873 enum _ecore_status_t rc = ECORE_SUCCESS;
875 OSAL_MEM_ZERO(&data, sizeof(data));
876 data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port,
878 data.lldp_remote = p_hwfn->p_dcbx_info->lldp_remote;
879 data.size = sizeof(struct lldp_status_params_s);
880 rc = ecore_dcbx_copy_mib(p_hwfn, p_ptt, &data, type);
885 static enum _ecore_status_t
886 ecore_dcbx_read_operational_mib(struct ecore_hwfn *p_hwfn,
887 struct ecore_ptt *p_ptt,
888 enum ecore_mib_read_type type)
890 struct ecore_dcbx_mib_meta_data data;
891 enum _ecore_status_t rc = ECORE_SUCCESS;
893 OSAL_MEM_ZERO(&data, sizeof(data));
894 data.addr = p_hwfn->mcp_info->port_addr +
895 offsetof(struct public_port, operational_dcbx_mib);
896 data.mib = &p_hwfn->p_dcbx_info->operational;
897 data.size = sizeof(struct dcbx_mib);
898 rc = ecore_dcbx_copy_mib(p_hwfn, p_ptt, &data, type);
903 static enum _ecore_status_t
904 ecore_dcbx_read_remote_mib(struct ecore_hwfn *p_hwfn,
905 struct ecore_ptt *p_ptt,
906 enum ecore_mib_read_type type)
908 struct ecore_dcbx_mib_meta_data data;
909 enum _ecore_status_t rc = ECORE_SUCCESS;
911 OSAL_MEM_ZERO(&data, sizeof(data));
912 data.addr = p_hwfn->mcp_info->port_addr +
913 offsetof(struct public_port, remote_dcbx_mib);
914 data.mib = &p_hwfn->p_dcbx_info->remote;
915 data.size = sizeof(struct dcbx_mib);
916 rc = ecore_dcbx_copy_mib(p_hwfn, p_ptt, &data, type);
921 static enum _ecore_status_t
922 ecore_dcbx_read_local_mib(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt)
924 struct ecore_dcbx_mib_meta_data data;
925 enum _ecore_status_t rc = ECORE_SUCCESS;
927 OSAL_MEM_ZERO(&data, sizeof(data));
928 data.addr = p_hwfn->mcp_info->port_addr +
929 offsetof(struct public_port, local_admin_dcbx_mib);
930 data.local_admin = &p_hwfn->p_dcbx_info->local_admin;
931 data.size = sizeof(struct dcbx_local_params);
932 ecore_memcpy_from(p_hwfn, p_ptt, data.local_admin,
933 data.addr, data.size);
939 ecore_dcbx_read_dscp_mib(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt)
941 struct ecore_dcbx_mib_meta_data data;
943 data.addr = p_hwfn->mcp_info->port_addr +
944 offsetof(struct public_port, dcb_dscp_map);
945 data.dscp_map = &p_hwfn->p_dcbx_info->dscp_map;
946 data.size = sizeof(struct dcb_dscp_map);
947 ecore_memcpy_from(p_hwfn, p_ptt, data.dscp_map, data.addr, data.size);
950 static enum _ecore_status_t ecore_dcbx_read_mib(struct ecore_hwfn *p_hwfn,
951 struct ecore_ptt *p_ptt,
952 enum ecore_mib_read_type type)
954 enum _ecore_status_t rc = ECORE_INVAL;
957 case ECORE_DCBX_OPERATIONAL_MIB:
958 ecore_dcbx_read_dscp_mib(p_hwfn, p_ptt);
959 rc = ecore_dcbx_read_operational_mib(p_hwfn, p_ptt, type);
961 case ECORE_DCBX_REMOTE_MIB:
962 rc = ecore_dcbx_read_remote_mib(p_hwfn, p_ptt, type);
964 case ECORE_DCBX_LOCAL_MIB:
965 rc = ecore_dcbx_read_local_mib(p_hwfn, p_ptt);
967 case ECORE_DCBX_REMOTE_LLDP_MIB:
968 rc = ecore_dcbx_read_remote_lldp_mib(p_hwfn, p_ptt, type);
970 case ECORE_DCBX_LOCAL_LLDP_MIB:
971 rc = ecore_dcbx_read_local_lldp_mib(p_hwfn, p_ptt);
974 DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type);
982 * Reconfigure QM and invoke PF update ramrod command if operational MIB
983 * change is detected.
986 ecore_dcbx_mib_update_event(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
987 enum ecore_mib_read_type type)
989 enum _ecore_status_t rc = ECORE_SUCCESS;
991 rc = ecore_dcbx_read_mib(p_hwfn, p_ptt, type);
995 if (type == ECORE_DCBX_OPERATIONAL_MIB) {
996 ecore_dcbx_get_dscp_params(p_hwfn, p_ptt,
997 &p_hwfn->p_dcbx_info->get);
999 rc = ecore_dcbx_process_mib_info(p_hwfn);
1003 /* reconfigure tcs of QM queues according
1004 * to negotiation results
1006 ecore_qm_reconf(p_hwfn, p_ptt);
1008 /* update storm FW with negotiation results */
1009 ecore_sp_pf_update(p_hwfn);
1011 /* set eagle enigne 1 flow control workaround
1012 * according to negotiation results
1014 enabled = p_hwfn->p_dcbx_info->results.dcbx_enabled;
1016 #ifdef CONFIG_ECORE_ROCE
1017 /* for roce PFs, we may want to enable/disable DPM
1018 * when DCBx change occurs
1020 if (ECORE_IS_ROCE_PERSONALITY(p_hwfn))
1021 ecore_roce_dpm_dcbx(p_hwfn, p_ptt);
1026 ecore_dcbx_get_params(p_hwfn, p_ptt, &p_hwfn->p_dcbx_info->get, type);
1028 if (type == ECORE_DCBX_OPERATIONAL_MIB) {
1029 struct ecore_dcbx_results *p_data;
1032 /* Update the DSCP to TC mapping bit if required */
1033 if (p_hwfn->p_dcbx_info->dscp_nig_update) {
1034 ecore_wr(p_hwfn, p_ptt, NIG_REG_DSCP_TO_TC_MAP_ENABLE,
1036 p_hwfn->p_dcbx_info->dscp_nig_update = false;
1039 /* Configure in NIG which protocols support EDPM and should
1042 p_data = &p_hwfn->p_dcbx_info->results;
1043 val = (0x1 << p_data->arr[DCBX_PROTOCOL_ROCE].tc) |
1044 (0x1 << p_data->arr[DCBX_PROTOCOL_ROCE_V2].tc);
1045 val <<= NIG_REG_TX_EDPM_CTRL_TX_EDPM_TC_EN_SHIFT;
1046 val |= NIG_REG_TX_EDPM_CTRL_TX_EDPM_EN;
1047 ecore_wr(p_hwfn, p_ptt, NIG_REG_TX_EDPM_CTRL, val);
1050 OSAL_DCBX_AEN(p_hwfn, type);
1055 enum _ecore_status_t ecore_dcbx_info_alloc(struct ecore_hwfn *p_hwfn)
1057 OSAL_BUILD_BUG_ON(ECORE_LLDP_CHASSIS_ID_STAT_LEN !=
1058 LLDP_CHASSIS_ID_STAT_LEN);
1059 OSAL_BUILD_BUG_ON(ECORE_LLDP_PORT_ID_STAT_LEN !=
1060 LLDP_PORT_ID_STAT_LEN);
1061 OSAL_BUILD_BUG_ON(ECORE_DCBX_MAX_APP_PROTOCOL !=
1062 DCBX_MAX_APP_PROTOCOL);
1064 p_hwfn->p_dcbx_info = OSAL_ZALLOC(p_hwfn->p_dev, GFP_KERNEL,
1065 sizeof(*p_hwfn->p_dcbx_info));
1066 if (!p_hwfn->p_dcbx_info) {
1067 DP_NOTICE(p_hwfn, true,
1068 "Failed to allocate `struct ecore_dcbx_info'");
1072 p_hwfn->p_dcbx_info->iwarp_port =
1073 p_hwfn->pf_params.rdma_pf_params.iwarp_port;
1075 return ECORE_SUCCESS;
1078 void ecore_dcbx_info_free(struct ecore_hwfn *p_hwfn)
1080 OSAL_FREE(p_hwfn->p_dev, p_hwfn->p_dcbx_info);
1081 p_hwfn->p_dcbx_info = OSAL_NULL;
1084 static void ecore_dcbx_update_protocol_data(struct protocol_dcb_data *p_data,
1085 struct ecore_dcbx_results *p_src,
1086 enum dcbx_protocol_type type)
1088 p_data->dcb_enable_flag = p_src->arr[type].enable;
1089 p_data->dcb_priority = p_src->arr[type].priority;
1090 p_data->dcb_tc = p_src->arr[type].tc;
1091 p_data->dscp_enable_flag = p_src->arr[type].dscp_enable;
1092 p_data->dscp_val = p_src->arr[type].dscp_val;
1095 /* Set pf update ramrod command params */
1096 void ecore_dcbx_set_pf_update_params(struct ecore_dcbx_results *p_src,
1097 struct pf_update_ramrod_data *p_dest)
1099 struct protocol_dcb_data *p_dcb_data;
1102 p_dest->pf_id = p_src->pf_id;
1104 update_flag = p_src->arr[DCBX_PROTOCOL_FCOE].update;
1105 p_dest->update_fcoe_dcb_data_mode = update_flag;
1107 update_flag = p_src->arr[DCBX_PROTOCOL_ROCE].update;
1108 p_dest->update_roce_dcb_data_mode = update_flag;
1110 update_flag = p_src->arr[DCBX_PROTOCOL_ROCE_V2].update;
1111 p_dest->update_rroce_dcb_data_mode = update_flag;
1113 update_flag = p_src->arr[DCBX_PROTOCOL_ISCSI].update;
1114 p_dest->update_iscsi_dcb_data_mode = update_flag;
1115 update_flag = p_src->arr[DCBX_PROTOCOL_ETH].update;
1116 p_dest->update_eth_dcb_data_mode = update_flag;
1117 update_flag = p_src->arr[DCBX_PROTOCOL_IWARP].update;
1118 p_dest->update_iwarp_dcb_data_mode = update_flag;
1120 p_dcb_data = &p_dest->fcoe_dcb_data;
1121 ecore_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_FCOE);
1122 p_dcb_data = &p_dest->roce_dcb_data;
1123 ecore_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ROCE);
1124 p_dcb_data = &p_dest->rroce_dcb_data;
1125 ecore_dcbx_update_protocol_data(p_dcb_data, p_src,
1126 DCBX_PROTOCOL_ROCE_V2);
1127 p_dcb_data = &p_dest->iscsi_dcb_data;
1128 ecore_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ISCSI);
1129 p_dcb_data = &p_dest->eth_dcb_data;
1130 ecore_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ETH);
1131 p_dcb_data = &p_dest->iwarp_dcb_data;
1132 ecore_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_IWARP);
1135 enum _ecore_status_t ecore_dcbx_query_params(struct ecore_hwfn *p_hwfn,
1136 struct ecore_dcbx_get *p_get,
1137 enum ecore_mib_read_type type)
1139 struct ecore_ptt *p_ptt;
1140 enum _ecore_status_t rc;
1142 if (IS_VF(p_hwfn->p_dev))
1145 p_ptt = ecore_ptt_acquire(p_hwfn);
1148 DP_ERR(p_hwfn, "rc = %d\n", rc);
1152 rc = ecore_dcbx_read_mib(p_hwfn, p_ptt, type);
1153 if (rc != ECORE_SUCCESS)
1156 rc = ecore_dcbx_get_params(p_hwfn, p_ptt, p_get, type);
1159 ecore_ptt_release(p_hwfn, p_ptt);
1164 ecore_dcbx_set_pfc_data(struct ecore_hwfn *p_hwfn,
1165 u32 *pfc, struct ecore_dcbx_params *p_params)
1170 *pfc &= ~DCBX_PFC_ERROR_MASK;
1172 if (p_params->pfc.willing)
1173 *pfc |= DCBX_PFC_WILLING_MASK;
1175 *pfc &= ~DCBX_PFC_WILLING_MASK;
1177 if (p_params->pfc.enabled)
1178 *pfc |= DCBX_PFC_ENABLED_MASK;
1180 *pfc &= ~DCBX_PFC_ENABLED_MASK;
1182 *pfc &= ~DCBX_PFC_CAPS_MASK;
1183 *pfc |= (u32)p_params->pfc.max_tc << DCBX_PFC_CAPS_SHIFT;
1185 for (i = 0; i < ECORE_MAX_PFC_PRIORITIES; i++)
1186 if (p_params->pfc.prio[i])
1187 pfc_map |= (1 << i);
1188 *pfc &= ~DCBX_PFC_PRI_EN_BITMAP_MASK;
1189 *pfc |= (pfc_map << DCBX_PFC_PRI_EN_BITMAP_SHIFT);
1191 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "pfc = 0x%x\n", *pfc);
1195 ecore_dcbx_set_ets_data(struct ecore_hwfn *p_hwfn,
1196 struct dcbx_ets_feature *p_ets,
1197 struct ecore_dcbx_params *p_params)
1199 u8 *bw_map, *tsa_map;
1203 if (p_params->ets_willing)
1204 p_ets->flags |= DCBX_ETS_WILLING_MASK;
1206 p_ets->flags &= ~DCBX_ETS_WILLING_MASK;
1208 if (p_params->ets_cbs)
1209 p_ets->flags |= DCBX_ETS_CBS_MASK;
1211 p_ets->flags &= ~DCBX_ETS_CBS_MASK;
1213 if (p_params->ets_enabled)
1214 p_ets->flags |= DCBX_ETS_ENABLED_MASK;
1216 p_ets->flags &= ~DCBX_ETS_ENABLED_MASK;
1218 p_ets->flags &= ~DCBX_ETS_MAX_TCS_MASK;
1219 p_ets->flags |= (u32)p_params->max_ets_tc << DCBX_ETS_MAX_TCS_SHIFT;
1221 bw_map = (u8 *)&p_ets->tc_bw_tbl[0];
1222 tsa_map = (u8 *)&p_ets->tc_tsa_tbl[0];
1223 p_ets->pri_tc_tbl[0] = 0;
1224 for (i = 0; i < ECORE_MAX_PFC_PRIORITIES; i++) {
1225 bw_map[i] = p_params->ets_tc_bw_tbl[i];
1226 tsa_map[i] = p_params->ets_tc_tsa_tbl[i];
1227 /* Copy the priority value to the corresponding 4 bits in the
1228 * traffic class table.
1230 val = (((u32)p_params->ets_pri_tc_tbl[i]) << ((7 - i) * 4));
1231 p_ets->pri_tc_tbl[0] |= val;
1233 for (i = 0; i < 2; i++) {
1234 p_ets->tc_bw_tbl[i] = OSAL_CPU_TO_BE32(p_ets->tc_bw_tbl[i]);
1235 p_ets->tc_tsa_tbl[i] = OSAL_CPU_TO_BE32(p_ets->tc_tsa_tbl[i]);
1238 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
1239 "flags = 0x%x pri_tc = 0x%x tc_bwl[] = {0x%x, 0x%x} tc_tsa = {0x%x, 0x%x}\n",
1240 p_ets->flags, p_ets->pri_tc_tbl[0], p_ets->tc_bw_tbl[0],
1241 p_ets->tc_bw_tbl[1], p_ets->tc_tsa_tbl[0],
1242 p_ets->tc_tsa_tbl[1]);
1246 ecore_dcbx_set_app_data(struct ecore_hwfn *p_hwfn,
1247 struct dcbx_app_priority_feature *p_app,
1248 struct ecore_dcbx_params *p_params, bool ieee)
1253 if (p_params->app_willing)
1254 p_app->flags |= DCBX_APP_WILLING_MASK;
1256 p_app->flags &= ~DCBX_APP_WILLING_MASK;
1258 if (p_params->app_valid)
1259 p_app->flags |= DCBX_APP_ENABLED_MASK;
1261 p_app->flags &= ~DCBX_APP_ENABLED_MASK;
1263 p_app->flags &= ~DCBX_APP_NUM_ENTRIES_MASK;
1264 p_app->flags |= (u32)p_params->num_app_entries <<
1265 DCBX_APP_NUM_ENTRIES_SHIFT;
1267 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) {
1268 entry = &p_app->app_pri_tbl[i].entry;
1271 *entry &= ~(DCBX_APP_SF_IEEE_MASK | DCBX_APP_SF_MASK);
1272 switch (p_params->app_entry[i].sf_ieee) {
1273 case ECORE_DCBX_SF_IEEE_ETHTYPE:
1274 *entry |= ((u32)DCBX_APP_SF_IEEE_ETHTYPE <<
1275 DCBX_APP_SF_IEEE_SHIFT);
1276 *entry |= ((u32)DCBX_APP_SF_ETHTYPE <<
1279 case ECORE_DCBX_SF_IEEE_TCP_PORT:
1280 *entry |= ((u32)DCBX_APP_SF_IEEE_TCP_PORT <<
1281 DCBX_APP_SF_IEEE_SHIFT);
1282 *entry |= ((u32)DCBX_APP_SF_PORT <<
1285 case ECORE_DCBX_SF_IEEE_UDP_PORT:
1286 *entry |= ((u32)DCBX_APP_SF_IEEE_UDP_PORT <<
1287 DCBX_APP_SF_IEEE_SHIFT);
1288 *entry |= ((u32)DCBX_APP_SF_PORT <<
1291 case ECORE_DCBX_SF_IEEE_TCP_UDP_PORT:
1292 *entry |= (u32)DCBX_APP_SF_IEEE_TCP_UDP_PORT <<
1293 DCBX_APP_SF_IEEE_SHIFT;
1294 *entry |= ((u32)DCBX_APP_SF_PORT <<
1299 *entry &= ~DCBX_APP_SF_MASK;
1300 if (p_params->app_entry[i].ethtype)
1301 *entry |= ((u32)DCBX_APP_SF_ETHTYPE <<
1304 *entry |= ((u32)DCBX_APP_SF_PORT <<
1307 *entry &= ~DCBX_APP_PROTOCOL_ID_MASK;
1308 *entry |= ((u32)p_params->app_entry[i].proto_id <<
1309 DCBX_APP_PROTOCOL_ID_SHIFT);
1310 *entry &= ~DCBX_APP_PRI_MAP_MASK;
1311 *entry |= ((u32)(p_params->app_entry[i].prio) <<
1312 DCBX_APP_PRI_MAP_SHIFT);
1315 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "flags = 0x%x\n", p_app->flags);
1318 static enum _ecore_status_t
1319 ecore_dcbx_set_local_params(struct ecore_hwfn *p_hwfn,
1320 struct dcbx_local_params *local_admin,
1321 struct ecore_dcbx_set *params)
1325 local_admin->flags = 0;
1326 OSAL_MEMCPY(&local_admin->features,
1327 &p_hwfn->p_dcbx_info->operational.features,
1328 sizeof(local_admin->features));
1330 if (params->enabled) {
1331 local_admin->config = params->ver_num;
1332 ieee = !!(params->ver_num & DCBX_CONFIG_VERSION_IEEE);
1334 local_admin->config = DCBX_CONFIG_VERSION_DISABLED;
1336 if (params->override_flags & ECORE_DCBX_OVERRIDE_PFC_CFG)
1337 ecore_dcbx_set_pfc_data(p_hwfn, &local_admin->features.pfc,
1338 ¶ms->config.params);
1340 if (params->override_flags & ECORE_DCBX_OVERRIDE_ETS_CFG)
1341 ecore_dcbx_set_ets_data(p_hwfn, &local_admin->features.ets,
1342 ¶ms->config.params);
1344 if (params->override_flags & ECORE_DCBX_OVERRIDE_APP_CFG)
1345 ecore_dcbx_set_app_data(p_hwfn, &local_admin->features.app,
1346 ¶ms->config.params, ieee);
1348 return ECORE_SUCCESS;
1351 static enum _ecore_status_t
1352 ecore_dcbx_set_dscp_params(struct ecore_hwfn *p_hwfn,
1353 struct dcb_dscp_map *p_dscp_map,
1354 struct ecore_dcbx_set *p_params)
1359 OSAL_MEMCPY(p_dscp_map, &p_hwfn->p_dcbx_info->dscp_map,
1360 sizeof(*p_dscp_map));
1362 p_dscp_map->flags &= ~DCB_DSCP_ENABLE_MASK;
1363 if (p_params->dscp.enabled)
1364 p_dscp_map->flags |= DCB_DSCP_ENABLE_MASK;
1366 for (i = 0, entry = 0; i < 8; i++) {
1368 for (j = 0; j < 8; j++, entry++)
1369 val |= (((u32)p_params->dscp.dscp_pri_map[entry]) <<
1372 p_dscp_map->dscp_pri_map[i] = OSAL_CPU_TO_BE32(val);
1375 p_hwfn->p_dcbx_info->dscp_nig_update = true;
1377 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "flags = 0x%x\n", p_dscp_map->flags);
1379 return ECORE_SUCCESS;
1382 enum _ecore_status_t ecore_dcbx_config_params(struct ecore_hwfn *p_hwfn,
1383 struct ecore_ptt *p_ptt,
1384 struct ecore_dcbx_set *params,
1387 struct dcbx_local_params local_admin;
1388 struct ecore_dcbx_mib_meta_data data;
1389 struct dcb_dscp_map dscp_map;
1390 u32 resp = 0, param = 0;
1391 enum _ecore_status_t rc = ECORE_SUCCESS;
1394 OSAL_MEMCPY(&p_hwfn->p_dcbx_info->set, params,
1395 sizeof(p_hwfn->p_dcbx_info->set));
1396 return ECORE_SUCCESS;
1399 /* clear set-parmas cache */
1400 OSAL_MEMSET(&p_hwfn->p_dcbx_info->set, 0,
1401 sizeof(struct ecore_dcbx_set));
1403 OSAL_MEMSET(&local_admin, 0, sizeof(local_admin));
1404 ecore_dcbx_set_local_params(p_hwfn, &local_admin, params);
1406 data.addr = p_hwfn->mcp_info->port_addr +
1407 offsetof(struct public_port, local_admin_dcbx_mib);
1408 data.local_admin = &local_admin;
1409 data.size = sizeof(struct dcbx_local_params);
1410 ecore_memcpy_to(p_hwfn, p_ptt, data.addr, data.local_admin, data.size);
1412 if (params->override_flags & ECORE_DCBX_OVERRIDE_DSCP_CFG) {
1413 OSAL_MEMSET(&dscp_map, 0, sizeof(dscp_map));
1414 ecore_dcbx_set_dscp_params(p_hwfn, &dscp_map, params);
1416 data.addr = p_hwfn->mcp_info->port_addr +
1417 offsetof(struct public_port, dcb_dscp_map);
1418 data.dscp_map = &dscp_map;
1419 data.size = sizeof(struct dcb_dscp_map);
1420 ecore_memcpy_to(p_hwfn, p_ptt, data.addr, data.dscp_map,
1424 rc = ecore_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_SET_DCBX,
1425 1 << DRV_MB_PARAM_LLDP_SEND_SHIFT, &resp, ¶m);
1426 if (rc != ECORE_SUCCESS) {
1427 DP_NOTICE(p_hwfn, false,
1428 "Failed to send DCBX update request\n");
1435 enum _ecore_status_t ecore_dcbx_get_config_params(struct ecore_hwfn *p_hwfn,
1436 struct ecore_dcbx_set *params)
1438 struct ecore_dcbx_get *dcbx_info;
1441 if (p_hwfn->p_dcbx_info->set.config.valid) {
1442 OSAL_MEMCPY(params, &p_hwfn->p_dcbx_info->set,
1443 sizeof(struct ecore_dcbx_set));
1444 return ECORE_SUCCESS;
1447 dcbx_info = OSAL_ALLOC(p_hwfn->p_dev, GFP_KERNEL,
1448 sizeof(*dcbx_info));
1450 DP_ERR(p_hwfn, "Failed to allocate struct ecore_dcbx_info\n");
1454 OSAL_MEMSET(dcbx_info, 0, sizeof(*dcbx_info));
1455 rc = ecore_dcbx_query_params(p_hwfn, dcbx_info,
1456 ECORE_DCBX_OPERATIONAL_MIB);
1458 OSAL_FREE(p_hwfn->p_dev, dcbx_info);
1461 p_hwfn->p_dcbx_info->set.override_flags = 0;
1463 p_hwfn->p_dcbx_info->set.ver_num = DCBX_CONFIG_VERSION_DISABLED;
1464 if (dcbx_info->operational.cee)
1465 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_CEE;
1466 if (dcbx_info->operational.ieee)
1467 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_IEEE;
1468 if (dcbx_info->operational.local)
1469 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_STATIC;
1471 p_hwfn->p_dcbx_info->set.enabled = dcbx_info->operational.enabled;
1472 OSAL_MEMCPY(&p_hwfn->p_dcbx_info->set.config.params,
1473 &dcbx_info->operational.params,
1474 sizeof(struct ecore_dcbx_admin_params));
1475 p_hwfn->p_dcbx_info->set.config.valid = true;
1477 OSAL_MEMCPY(params, &p_hwfn->p_dcbx_info->set,
1478 sizeof(struct ecore_dcbx_set));
1480 OSAL_FREE(p_hwfn->p_dev, dcbx_info);
1482 return ECORE_SUCCESS;