2 /* $NecBSD: dp83932var.h,v 1.3 1999/01/24 01:39:51 kmatsuda Exp $ */
3 /* $NetBSD: if_snvar.h,v 1.12 1998/05/01 03:42:47 scottr Exp $ */
6 * [NetBSD for NEC PC-98 series]
7 * Copyright (c) 1997, 1998, 1999
8 * Kouichi Matsuda. All rights reserved.
10 * Copyright (c) 1991 Algorithmics Ltd (http://www.algor.co.uk)
11 * You may use, copy, and modify this program so long as you retain the
16 * if_snvar.h -- National Semiconductor DP8393X (SONIC) NetBSD/mac68k vars
19 * Modified for NetBSD/pc98 1.2.1 from NetBSD/mac68k 1.2D by Kouichi Matsuda.
20 * Make adapted for NEC PC-9801-83, 84, PC-9801-103, 104, PC-9801N-25 and
21 * PC-9801N-J02, J02R, which uses National Semiconductor DP83934AVQB as
22 * Ethernet Controller and National Semiconductor NS46C46 as
23 * (64 * 16 bits) Microwire Serial EEPROM.
26 /* borrow from arch/mac68k/dev/if_mcvar.h for debug. */
31 #define integrate static __inline
35 /* NetBSD Emulation */
37 #define splhardnet splnet
40 #define splhardnet splimp
42 #define NBPG PAGE_SIZE
45 #define PGOFSET PAGE_MASK
47 typedef unsigned long ulong;
48 #define delay(x) DELAY(x)
56 * SONIC buffers need to be aligned 16 or 32 bit aligned.
57 * These macros calculate and verify alignment.
59 #define ROUNDUP(p, N) (((int) p + N - 1) & ~(N - 1))
61 #define SOALIGN(m, array) (m ? (ROUNDUP(array, 4)) : (ROUNDUP(array, 2)))
63 #define LOWER(x) ((unsigned)(x) & 0xffff)
64 #define UPPER(x) ((unsigned)(x) >> 16)
67 * Memory access macros. Since we handle SONIC in 16 bit mode (PB5X0)
68 * and 32 bit mode (everything else) using a single GENERIC kernel
69 * binary, all structures have to be accessed using macros which can
70 * adjust the offsets appropriately.
72 /* m is not sc->bitmode, we treat m as sc. */
73 #define SWO(m, a, o, x) (*(m)->sc_writetodesc)((m), (a), (o), (x))
74 #define SRO(m, a, o) (*(m)->sc_readfromdesc)((m), (a), (o))
77 * Register access macros. We use bus_space_* to talk to the Sonic
78 * registers. A mapping table is used in case a particular configuration
79 * hooked the regs up at non-word offsets.
81 #define NIC_GET(sc, reg) (*(sc)->sc_nic_get)(sc, reg)
82 #define NIC_PUT(sc, reg, val) (*(sc)->sc_nic_put)(sc, reg, val)
84 #define SONIC_GETDMA(p) (p)
86 /* pc98 does not have any write buffers to flush... */
90 * buffer sizes in 32 bit mode
91 * 1 TXpkt is 4 hdr words + (3 * FRAGMAX) + 1 link word == 23 words == 92 bytes
93 * 1 RxPkt is 7 words == 28 bytes
94 * 1 Rda is 4 words == 16 bytes
96 * The CDA is 17 words == 68 bytes
98 * total space in page 0 = NTDA * 92 + NRRA * 16 + NRDA * 28 + 68
101 #define NRBA 16 /* # receive buffers < NRRA */
102 #define RBAMASK (NRBA-1)
103 #define NTDA 16 /* # transmit descriptors */
104 #define NRRA 64 /* # receive resource descriptors */
105 #define RRAMASK (NRRA-1) /* the reason why NRRA must be power of two */
107 #define FCSSIZE 4 /* size of FCS appended to packets */
110 * maximum receive packet size plus 2 byte pad to make each
111 * one aligned. 4 byte slop (required for eobc)
113 #define RBASIZE(sc) (sizeof(struct ether_header) + ETHERMTU + FCSSIZE + \
114 ((sc)->bitmode ? 6 : 2))
117 * transmit buffer area
119 #define TXBSIZE 1536 /* 6*2^8 -- the same size as the 8390 TXBUF */
121 #define SN_NPAGES 2 + NRBA + (NTDA/2)
126 struct mbuf *mtd_mbuf;
130 * The snc_softc for PC-98 if_snc.
132 typedef struct snc_softc {
133 struct ifnet * sc_ifp;
137 struct resource * ioport;
139 struct resource * iomem;
141 struct resource * irq;
145 bus_space_tag_t sc_iot; /* bus identifier for io */
146 bus_space_tag_t sc_memt; /* bus identifier for mem */
147 bus_space_handle_t sc_ioh; /* io handle */
148 bus_space_handle_t sc_memh; /* bus memory handle */
150 int bitmode; /* 32 bit mode == 1, 16 == 0 */
152 u_int16_t sncr_dcr; /* DCR for this instance */
153 u_int16_t sncr_dcr2; /* DCR2 for this instance */
155 int sc_rramark; /* index into v_rra of wp */
156 u_int32_t v_rra[NRRA]; /* DMA addresses of v_rra */
157 u_int32_t v_rea; /* ptr to the end of the rra space */
159 int sc_rxmark; /* current hw pos in rda ring */
160 int sc_rdamark; /* current sw pos in rda ring */
161 int sc_nrda; /* total number of RDAs */
164 u_int32_t rbuf[NRBA];
166 struct mtd mtda[NTDA];
167 int mtd_hw; /* idx of first mtd given to hw */
168 int mtd_prev; /* idx of last mtd given to hardware */
169 int mtd_free; /* next free mtd to use */
171 * offset of tlink of last txp given
172 * to SONIC. Need to clear EOL on
173 * this word to add a desc.
175 int mtd_pint; /* Counter to set TXP_PINT */
179 u_int8_t curbank; /* current window bank */
181 struct ifmedia sc_media; /* supported media information */
184 * NIC register access functions:
186 u_int16_t (*sc_nic_get)
187 (struct snc_softc *, u_int8_t);
189 (struct snc_softc *, u_int8_t, u_int16_t);
194 * copy to/from descriptor
195 * copy to/from buffer
196 * zero bytes in buffer
198 void (*sc_writetodesc)
199 (struct snc_softc *, u_int32_t, u_int32_t, u_int16_t);
200 u_int16_t (*sc_readfromdesc)
201 (struct snc_softc *, u_int32_t, u_int32_t);
203 (struct snc_softc *, void *, u_int32_t, size_t);
204 void (*sc_copyfrombuf)
205 (struct snc_softc *, void *, u_int32_t, size_t);
207 (struct snc_softc *, u_int32_t, size_t);
210 * Machine-dependent functions:
212 * hardware reset hook - may be NULL
213 * hardware init hook - may be NULL
214 * media change hook - may be NULL
216 void (*sc_hwreset)(struct snc_softc *);
217 void (*sc_hwinit)(struct snc_softc *);
218 int (*sc_mediachange)(struct snc_softc *);
219 void (*sc_mediastatus)(struct snc_softc *, struct ifmediareq *);
221 int sc_enabled; /* boolean; power enabled on interface */
223 int (*sc_enable)(struct snc_softc *);
224 void (*sc_disable)(struct snc_softc *);
226 void *sc_sh; /* shutdownhook cookie */
229 #if defined(NRND) && NRND > 0
230 rndsource_element_t rnd_source;
235 * Accessing SONIC data structures and registers as 32 bit values
236 * makes code endianess independent. The SONIC is however always in
237 * bigendian mode so it is necessary to ensure that data structures shared
238 * between the CPU and the SONIC are always in bigendian order.
242 * Receive Resource Descriptor
243 * This structure describes the buffers into which packets
244 * will be received. Note that more than one packet may be
245 * packed into a single buffer if constraints permit.
247 #define RXRSRC_PTRLO 0 /* buffer address LO */
248 #define RXRSRC_PTRHI 1 /* buffer address HI */
249 #define RXRSRC_WCLO 2 /* buffer size (16bit words) LO */
250 #define RXRSRC_WCHI 3 /* buffer size (16bit words) HI */
252 #define RXRSRC_SIZE(sc) (sc->bitmode ? (4 * 4) : (4 * 2))
256 * This structure holds information about packets received.
258 #define RXPKT_STATUS 0
259 #define RXPKT_BYTEC 1
260 #define RXPKT_PTRLO 2
261 #define RXPKT_PTRHI 3
262 #define RXPKT_SEQNO 4
263 #define RXPKT_RLINK 5
264 #define RXPKT_INUSE 6
265 #define RXPKT_SIZE(sc) (sc->bitmode ? (7 * 4) : (7 * 2))
267 #define RBASEQ(x) (((x)>>8)&0xff)
268 #define PSNSEQ(x) ((x) & 0xff)
271 * Transmit Descriptor
272 * This structure holds information about packets to be transmitted.
274 #define FRAGMAX 8 /* maximum number of fragments in a packet */
276 #define TXP_STATUS 0 /* + transmitted packet status */
277 #define TXP_CONFIG 1 /* transmission configuration */
278 #define TXP_PKTSIZE 2 /* entire packet size in bytes */
279 #define TXP_FRAGCNT 3 /* # fragments in packet */
281 #define TXP_FRAGOFF 4 /* offset to first fragment */
282 #define TXP_FRAGSIZE 3 /* size of each fragment desc */
283 #define TXP_FPTRLO 0 /* ptr to packet fragment LO */
284 #define TXP_FPTRHI 1 /* ptr to packet fragment HI */
285 #define TXP_FSIZE 2 /* fragment size */
287 #define TXP_WORDS (TXP_FRAGOFF + (FRAGMAX*TXP_FRAGSIZE) + 1) /* 1 for tlink */
288 #define TXP_SIZE(sc) ((sc->bitmode) ? (TXP_WORDS*4) : (TXP_WORDS*2))
290 #define EOL 0x0001 /* end of list marker for link fields */
293 * CDA, the CAM descriptor area. The SONIC has a 16 entry CAM to
294 * match incoming addresses against. It is programmed via DMA
295 * from a memory region.
297 #define MAXCAM 16 /* number of user entries in CAM */
298 #define CDA_CAMDESC 4 /* # words i na descriptor */
299 #define CDA_CAMEP 0 /* CAM Address Port 0 xx-xx-xx-xx-YY-YY */
300 #define CDA_CAMAP0 1 /* CAM Address Port 1 xx-xx-YY-YY-xx-xx */
301 #define CDA_CAMAP1 2 /* CAM Address Port 2 YY-YY-xx-xx-xx-xx */
303 #define CDA_ENABLE 64 /* mask enabling CAM entries */
304 #define CDA_SIZE(sc) ((4*16 + 1) * ((sc->bitmode) ? 4 : 2))
306 void sncconfig(struct snc_softc *, int *, int, int, u_int8_t *);
307 void sncintr(void *);
308 void sncshutdown(void *);