sys/dev/usb/controller/avr32dci.c

   1 #include <sys/cdefs.h>
   2 __FBSDID("$FreeBSD$");
   3
   4 /*-
   5  * Copyright (c) 2009 Hans Petter Selasky. All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in the
  14  *    documentation and/or other materials provided with the distribution.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  26  * SUCH DAMAGE.
  27  */
  28
  29 /*
  30  * This file contains the driver for the AVR32 series USB Device
  31  * Controller
  32  */
  33
  34 /*
  35  * NOTE: When the chip detects BUS-reset it will also reset the
  36  * endpoints, Function-address and more.
  37  */
  38
  39 #include <sys/stdint.h>
  40 #include <sys/stddef.h>
  41 #include <sys/param.h>
  42 #include <sys/queue.h>
  43 #include <sys/types.h>
  44 #include <sys/systm.h>
  45 #include <sys/kernel.h>
  46 #include <sys/bus.h>
  47 #include <sys/module.h>
  48 #include <sys/lock.h>
  49 #include <sys/mutex.h>
  50 #include <sys/condvar.h>
  51 #include <sys/sysctl.h>
  52 #include <sys/sx.h>
  53 #include <sys/unistd.h>
  54 #include <sys/callout.h>
  55 #include <sys/malloc.h>
  56 #include <sys/priv.h>
  57
  58 #include <dev/usb/usb.h>
  59 #include <dev/usb/usbdi.h>
  60
  61 #define USB_DEBUG_VAR avr32dci_debug
  62
  63 #include <dev/usb/usb_core.h>
  64 #include <dev/usb/usb_debug.h>
  65 #include <dev/usb/usb_busdma.h>
  66 #include <dev/usb/usb_process.h>
  67 #include <dev/usb/usb_transfer.h>
  68 #include <dev/usb/usb_device.h>
  69 #include <dev/usb/usb_hub.h>
  70 #include <dev/usb/usb_util.h>
  71
  72 #include <dev/usb/usb_controller.h>
  73 #include <dev/usb/usb_bus.h>
  74 #include <dev/usb/controller/avr32dci.h>
  75
  76 #define AVR32_BUS2SC(bus) \
  77    ((struct avr32dci_softc *)(((uint8_t *)(bus)) - \
  78     ((uint8_t *)&(((struct avr32dci_softc *)0)->sc_bus))))
  79
  80 #define AVR32_PC2SC(pc) \
  81    AVR32_BUS2SC(USB_DMATAG_TO_XROOT((pc)->tag_parent)->bus)
  82
  83 #ifdef USB_DEBUG
  84 static int avr32dci_debug = 0;
  85
  86 SYSCTL_NODE(_hw_usb, OID_AUTO, avr32dci, CTLFLAG_RW, 0, "USB AVR32 DCI");
  87 SYSCTL_INT(_hw_usb_avr32dci, OID_AUTO, debug, CTLFLAG_RW,
  88     &avr32dci_debug, 0, "AVR32 DCI debug level");
  89 #endif
  90
  91 #define AVR32_INTR_ENDPT 1
  92
  93 /* prototypes */
  94
  95 struct usb_bus_methods avr32dci_bus_methods;
  96 struct usb_pipe_methods avr32dci_device_non_isoc_methods;
  97 struct usb_pipe_methods avr32dci_device_isoc_fs_methods;
  98
  99 static avr32dci_cmd_t avr32dci_setup_rx;
 100 static avr32dci_cmd_t avr32dci_data_rx;
 101 static avr32dci_cmd_t avr32dci_data_tx;
 102 static avr32dci_cmd_t avr32dci_data_tx_sync;
 103 static void avr32dci_device_done(struct usb_xfer *, usb_error_t);
 104 static void avr32dci_do_poll(struct usb_bus *);
 105 static void avr32dci_standard_done(struct usb_xfer *);
 106 static void avr32dci_root_intr(struct avr32dci_softc *sc);
 107
 108 /*
 109  * Here is a list of what the chip supports:
 110  */
 111 static const struct usb_hw_ep_profile
 112         avr32dci_ep_profile[4] = {
 113
 114         [0] = {
 115                 .max_in_frame_size = 64,
 116                 .max_out_frame_size = 64,
 117                 .is_simplex = 1,
 118                 .support_control = 1,
 119         },
 120
 121         [1] = {
 122                 .max_in_frame_size = 512,
 123                 .max_out_frame_size = 512,
 124                 .is_simplex = 1,
 125                 .support_bulk = 1,
 126                 .support_interrupt = 1,
 127                 .support_isochronous = 1,
 128                 .support_in = 1,
 129                 .support_out = 1,
 130         },
 131
 132         [2] = {
 133                 .max_in_frame_size = 64,
 134                 .max_out_frame_size = 64,
 135                 .is_simplex = 1,
 136                 .support_bulk = 1,
 137                 .support_interrupt = 1,
 138                 .support_in = 1,
 139                 .support_out = 1,
 140         },
 141
 142         [3] = {
 143                 .max_in_frame_size = 1024,
 144                 .max_out_frame_size = 1024,
 145                 .is_simplex = 1,
 146                 .support_bulk = 1,
 147                 .support_interrupt = 1,
 148                 .support_isochronous = 1,
 149                 .support_in = 1,
 150                 .support_out = 1,
 151         },
 152 };
 153
 154 static void
 155 avr32dci_get_hw_ep_profile(struct usb_device *udev,
 156     const struct usb_hw_ep_profile **ppf, uint8_t ep_addr)
 157 {
 158         if (ep_addr == 0)
 159                 *ppf = avr32dci_ep_profile;
 160         else if (ep_addr < 3)
 161                 *ppf = avr32dci_ep_profile + 1;
 162         else if (ep_addr < 5)
 163                 *ppf = avr32dci_ep_profile + 2;
 164         else if (ep_addr < 7)
 165                 *ppf = avr32dci_ep_profile + 3;
 166         else
 167                 *ppf = NULL;
 168 }
 169
 170 static void
 171 avr32dci_mod_ctrl(struct avr32dci_softc *sc, uint32_t set, uint32_t clear)
 172 {
 173         uint32_t temp;
 174
 175         temp = AVR32_READ_4(sc, AVR32_CTRL);
 176         temp |= set;
 177         temp &= ~clear;
 178         AVR32_WRITE_4(sc, AVR32_CTRL, temp);
 179 }
 180
 181 static void
 182 avr32dci_mod_ien(struct avr32dci_softc *sc, uint32_t set, uint32_t clear)
 183 {
 184         uint32_t temp;
 185
 186         temp = AVR32_READ_4(sc, AVR32_IEN);
 187         temp |= set;
 188         temp &= ~clear;
 189         AVR32_WRITE_4(sc, AVR32_IEN, temp);
 190 }
 191
 192 static void
 193 avr32dci_clocks_on(struct avr32dci_softc *sc)
 194 {
 195         if (sc->sc_flags.clocks_off &&
 196             sc->sc_flags.port_powered) {
 197
 198                 DPRINTFN(5, "\n");
 199
 200                 /* turn on clocks */
 201                 (sc->sc_clocks_on) (&sc->sc_bus);
 202
 203                 avr32dci_mod_ctrl(sc, AVR32_CTRL_DEV_EN_USBA, 0);
 204
 205                 sc->sc_flags.clocks_off = 0;
 206         }
 207 }
 208
 209 static void
 210 avr32dci_clocks_off(struct avr32dci_softc *sc)
 211 {
 212         if (!sc->sc_flags.clocks_off) {
 213
 214                 DPRINTFN(5, "\n");
 215
 216                 avr32dci_mod_ctrl(sc, 0, AVR32_CTRL_DEV_EN_USBA);
 217
 218                 /* turn clocks off */
 219                 (sc->sc_clocks_off) (&sc->sc_bus);
 220
 221                 sc->sc_flags.clocks_off = 1;
 222         }
 223 }
 224
 225 static void
 226 avr32dci_pull_up(struct avr32dci_softc *sc)
 227 {
 228         /* pullup D+, if possible */
 229
 230         if (!sc->sc_flags.d_pulled_up &&
 231             sc->sc_flags.port_powered) {
 232                 sc->sc_flags.d_pulled_up = 1;
 233                 avr32dci_mod_ctrl(sc, 0, AVR32_CTRL_DEV_DETACH);
 234         }
 235 }
 236
 237 static void
 238 avr32dci_pull_down(struct avr32dci_softc *sc)
 239 {
 240         /* pulldown D+, if possible */
 241
 242         if (sc->sc_flags.d_pulled_up) {
 243                 sc->sc_flags.d_pulled_up = 0;
 244                 avr32dci_mod_ctrl(sc, AVR32_CTRL_DEV_DETACH, 0);
 245         }
 246 }
 247
 248 static void
 249 avr32dci_wakeup_peer(struct avr32dci_softc *sc)
 250 {
 251         if (!sc->sc_flags.status_suspend) {
 252                 return;
 253         }
 254         avr32dci_mod_ctrl(sc, AVR32_CTRL_DEV_REWAKEUP, 0);
 255
 256         /* wait 8 milliseconds */
 257         /* Wait for reset to complete. */
 258         usb_pause_mtx(&sc->sc_bus.bus_mtx, hz / 125);
 259
 260         /* hardware should have cleared RMWKUP bit */
 261 }
 262
 263 static void
 264 avr32dci_set_address(struct avr32dci_softc *sc, uint8_t addr)
 265 {
 266         DPRINTFN(5, "addr=%d\n", addr);
 267
 268         avr32dci_mod_ctrl(sc, AVR32_UDADDR_ADDEN | addr, 0);
 269 }
 270
 271 static uint8_t
 272 avr32dci_setup_rx(struct avr32dci_td *td)
 273 {
 274         struct avr32dci_softc *sc;
 275         struct usb_device_request req;
 276         uint16_t count;
 277         uint32_t temp;
 278
 279         /* get pointer to softc */
 280         sc = AVR32_PC2SC(td->pc);
 281
 282         /* check endpoint status */
 283         temp = AVR32_READ_4(sc, AVR32_EPTSTA(td->ep_no));
 284
 285         DPRINTFN(5, "EPTSTA(%u)=0x%08x\n", td->ep_no, temp);
 286
 287         if (!(temp & AVR32_EPTSTA_RX_SETUP)) {
 288                 goto not_complete;
 289         }
 290         /* clear did stall */
 291         td->did_stall = 0;
 292         /* get the packet byte count */
 293         count = AVR32_EPTSTA_BYTE_COUNT(temp);
 294
 295         /* verify data length */
 296         if (count != td->remainder) {
 297                 DPRINTFN(0, "Invalid SETUP packet "
 298                     "length, %d bytes\n", count);
 299                 goto not_complete;
 300         }
 301         if (count != sizeof(req)) {
 302                 DPRINTFN(0, "Unsupported SETUP packet "
 303                     "length, %d bytes\n", count);
 304                 goto not_complete;
 305         }
 306         /* receive data */
 307         memcpy(&req, sc->physdata, sizeof(req));
 308
 309         /* copy data into real buffer */
 310         usbd_copy_in(td->pc, 0, &req, sizeof(req));
 311
 312         td->offset = sizeof(req);
 313         td->remainder = 0;
 314
 315         /* sneak peek the set address */
 316         if ((req.bmRequestType == UT_WRITE_DEVICE) &&
 317             (req.bRequest == UR_SET_ADDRESS)) {
 318                 sc->sc_dv_addr = req.wValue[0] & 0x7F;
 319                 /* must write address before ZLP */
 320                 avr32dci_mod_ctrl(sc, 0, AVR32_CTRL_DEV_FADDR_EN |
 321                     AVR32_CTRL_DEV_ADDR);
 322                 avr32dci_mod_ctrl(sc, sc->sc_dv_addr, 0);
 323         } else {
 324                 sc->sc_dv_addr = 0xFF;
 325         }
 326
 327         /* clear SETUP packet interrupt */
 328         AVR32_WRITE_4(sc, AVR32_EPTCLRSTA(td->ep_no), AVR32_EPTSTA_RX_SETUP);
 329         return (0);                     /* complete */
 330
 331 not_complete:
 332         if (temp & AVR32_EPTSTA_RX_SETUP) {
 333                 /* clear SETUP packet interrupt */
 334                 AVR32_WRITE_4(sc, AVR32_EPTCLRSTA(td->ep_no), AVR32_EPTSTA_RX_SETUP);
 335         }
 336         /* abort any ongoing transfer */
 337         if (!td->did_stall) {
 338                 DPRINTFN(5, "stalling\n");
 339                 AVR32_WRITE_4(sc, AVR32_EPTSETSTA(td->ep_no),
 340                     AVR32_EPTSTA_FRCESTALL);
 341                 td->did_stall = 1;
 342         }
 343         return (1);                     /* not complete */
 344 }
 345
 346 static uint8_t
 347 avr32dci_data_rx(struct avr32dci_td *td)
 348 {
 349         struct avr32dci_softc *sc;
 350         struct usb_page_search buf_res;
 351         uint16_t count;
 352         uint32_t temp;
 353         uint8_t to;
 354         uint8_t got_short;
 355
 356         to = 4;                         /* don't loop forever! */
 357         got_short = 0;
 358
 359         /* get pointer to softc */
 360         sc = AVR32_PC2SC(td->pc);
 361
 362 repeat:
 363         /* check if any of the FIFO banks have data */
 364         /* check endpoint status */
 365         temp = AVR32_READ_4(sc, AVR32_EPTSTA(td->ep_no));
 366
 367         DPRINTFN(5, "EPTSTA(%u)=0x%08x\n", td->ep_no, temp);
 368
 369         if (temp & AVR32_EPTSTA_RX_SETUP) {
 370                 if (td->remainder == 0) {
 371                         /*
 372                          * We are actually complete and have
 373                          * received the next SETUP
 374                          */
 375                         DPRINTFN(5, "faking complete\n");
 376                         return (0);     /* complete */
 377                 }
 378                 /*
 379                  * USB Host Aborted the transfer.
 380                  */
 381                 td->error = 1;
 382                 return (0);             /* complete */
 383         }
 384         /* check status */
 385         if (!(temp & AVR32_EPTSTA_RX_BK_RDY)) {
 386                 /* no data */
 387                 goto not_complete;
 388         }
 389         /* get the packet byte count */
 390         count = AVR32_EPTSTA_BYTE_COUNT(temp);
 391
 392         /* verify the packet byte count */
 393         if (count != td->max_packet_size) {
 394                 if (count < td->max_packet_size) {
 395                         /* we have a short packet */
 396                         td->short_pkt = 1;
 397                         got_short = 1;
 398                 } else {
 399                         /* invalid USB packet */
 400                         td->error = 1;
 401                         return (0);     /* we are complete */
 402                 }
 403         }
 404         /* verify the packet byte count */
 405         if (count > td->remainder) {
 406                 /* invalid USB packet */
 407                 td->error = 1;
 408                 return (0);             /* we are complete */
 409         }
 410         while (count > 0) {
 411                 usbd_get_page(td->pc, td->offset, &buf_res);
 412
 413                 /* get correct length */
 414                 if (buf_res.length > count) {
 415                         buf_res.length = count;
 416                 }
 417                 /* receive data */
 418                 memcpy(buf_res.buffer, sc->physdata +
 419                     (AVR32_EPTSTA_CURRENT_BANK(temp) << td->bank_shift) +
 420                     (td->ep_no << 16) + (td->offset % td->max_packet_size), buf_res.length);
 421                 /* update counters */
 422                 count -= buf_res.length;
 423                 td->offset += buf_res.length;
 424                 td->remainder -= buf_res.length;
 425         }
 426
 427         /* clear OUT packet interrupt */
 428         AVR32_WRITE_4(sc, AVR32_EPTCLRSTA(td->ep_no), AVR32_EPTSTA_RX_BK_RDY);
 429
 430         /* check if we are complete */
 431         if ((td->remainder == 0) || got_short) {
 432                 if (td->short_pkt) {
 433                         /* we are complete */
 434                         return (0);
 435                 }
 436                 /* else need to receive a zero length packet */
 437         }
 438         if (--to) {
 439                 goto repeat;
 440         }
 441 not_complete:
 442         return (1);                     /* not complete */
 443 }
 444
 445 static uint8_t
 446 avr32dci_data_tx(struct avr32dci_td *td)
 447 {
 448         struct avr32dci_softc *sc;
 449         struct usb_page_search buf_res;
 450         uint16_t count;
 451         uint8_t to;
 452         uint32_t temp;
 453
 454         to = 4;                         /* don't loop forever! */
 455
 456         /* get pointer to softc */
 457         sc = AVR32_PC2SC(td->pc);
 458
 459 repeat:
 460
 461         /* check endpoint status */
 462         temp = AVR32_READ_4(sc, AVR32_EPTSTA(td->ep_no));
 463
 464         DPRINTFN(5, "EPTSTA(%u)=0x%08x\n", td->ep_no, temp);
 465
 466         if (temp & AVR32_EPTSTA_RX_SETUP) {
 467                 /*
 468                  * The current transfer was aborted
 469                  * by the USB Host
 470                  */
 471                 td->error = 1;
 472                 return (0);             /* complete */
 473         }
 474         if (temp & AVR32_EPTSTA_TX_PK_RDY) {
 475                 /* cannot write any data - all banks are busy */
 476                 goto not_complete;
 477         }
 478         count = td->max_packet_size;
 479         if (td->remainder < count) {
 480                 /* we have a short packet */
 481                 td->short_pkt = 1;
 482                 count = td->remainder;
 483         }
 484         while (count > 0) {
 485
 486                 usbd_get_page(td->pc, td->offset, &buf_res);
 487
 488                 /* get correct length */
 489                 if (buf_res.length > count) {
 490                         buf_res.length = count;
 491                 }
 492                 /* transmit data */
 493                 memcpy(sc->physdata +
 494                     (AVR32_EPTSTA_CURRENT_BANK(temp) << td->bank_shift) +
 495                     (td->ep_no << 16) + (td->offset % td->max_packet_size),
 496                     buf_res.buffer, buf_res.length);
 497                 /* update counters */
 498                 count -= buf_res.length;
 499                 td->offset += buf_res.length;
 500                 td->remainder -= buf_res.length;
 501         }
 502
 503         /* allocate FIFO bank */
 504         AVR32_WRITE_4(sc, AVR32_EPTCLRSTA(td->ep_no), AVR32_EPTSTA_TX_BK_RDY);
 505
 506         /* check remainder */
 507         if (td->remainder == 0) {
 508                 if (td->short_pkt) {
 509                         return (0);     /* complete */
 510                 }
 511                 /* else we need to transmit a short packet */
 512         }
 513         if (--to) {
 514                 goto repeat;
 515         }
 516 not_complete:
 517         return (1);                     /* not complete */
 518 }
 519
 520 static uint8_t
 521 avr32dci_data_tx_sync(struct avr32dci_td *td)
 522 {
 523         struct avr32dci_softc *sc;
 524         uint32_t temp;
 525
 526         /* get pointer to softc */
 527         sc = AVR32_PC2SC(td->pc);
 528
 529         /* check endpoint status */
 530         temp = AVR32_READ_4(sc, AVR32_EPTSTA(td->ep_no));
 531
 532         DPRINTFN(5, "EPTSTA(%u)=0x%08x\n", td->ep_no, temp);
 533
 534         if (temp & AVR32_EPTSTA_RX_SETUP) {
 535                 DPRINTFN(5, "faking complete\n");
 536                 /* Race condition */
 537                 return (0);             /* complete */
 538         }
 539         /*
 540          * The control endpoint has only got one bank, so if that bank
 541          * is free the packet has been transferred!
 542          */
 543         if (AVR32_EPTSTA_BUSY_BANK_STA(temp) != 0) {
 544                 /* cannot write any data - a bank is busy */
 545                 goto not_complete;
 546         }
 547         if (sc->sc_dv_addr != 0xFF) {
 548                 /* set new address */
 549                 avr32dci_set_address(sc, sc->sc_dv_addr);
 550         }
 551         return (0);                     /* complete */
 552
 553 not_complete:
 554         return (1);                     /* not complete */
 555 }
 556
 557 static uint8_t
 558 avr32dci_xfer_do_fifo(struct usb_xfer *xfer)
 559 {
 560         struct avr32dci_td *td;
 561
 562         DPRINTFN(9, "\n");
 563
 564         td = xfer->td_transfer_cache;
 565         while (1) {
 566                 if ((td->func) (td)) {
 567                         /* operation in progress */
 568                         break;
 569                 }
 570                 if (((void *)td) == xfer->td_transfer_last) {
 571                         goto done;
 572                 }
 573                 if (td->error) {
 574                         goto done;
 575                 } else if (td->remainder > 0) {
 576                         /*
 577                          * We had a short transfer. If there is no alternate
 578                          * next, stop processing !
 579                          */
 580                         if (!td->alt_next) {
 581                                 goto done;
 582                         }
 583                 }
 584                 /*
 585                  * Fetch the next transfer descriptor and transfer
 586                  * some flags to the next transfer descriptor
 587                  */
 588                 td = td->obj_next;
 589                 xfer->td_transfer_cache = td;
 590         }
 591         return (1);                     /* not complete */
 592
 593 done:
 594         /* compute all actual lengths */
 595
 596         avr32dci_standard_done(xfer);
 597         return (0);                     /* complete */
 598 }
 599
 600 static void
 601 avr32dci_interrupt_poll(struct avr32dci_softc *sc)
 602 {
 603         struct usb_xfer *xfer;
 604
 605 repeat:
 606         TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
 607                 if (!avr32dci_xfer_do_fifo(xfer)) {
 608                         /* queue has been modified */
 609                         goto repeat;
 610                 }
 611         }
 612 }
 613
 614 void
 615 avr32dci_vbus_interrupt(struct avr32dci_softc *sc, uint8_t is_on)
 616 {
 617         DPRINTFN(5, "vbus = %u\n", is_on);
 618
 619         if (is_on) {
 620                 if (!sc->sc_flags.status_vbus) {
 621                         sc->sc_flags.status_vbus = 1;
 622
 623                         /* complete root HUB interrupt endpoint */
 624
 625                         avr32dci_root_intr(sc);
 626                 }
 627         } else {
 628                 if (sc->sc_flags.status_vbus) {
 629                         sc->sc_flags.status_vbus = 0;
 630                         sc->sc_flags.status_bus_reset = 0;
 631                         sc->sc_flags.status_suspend = 0;
 632                         sc->sc_flags.change_suspend = 0;
 633                         sc->sc_flags.change_connect = 1;
 634
 635                         /* complete root HUB interrupt endpoint */
 636
 637                         avr32dci_root_intr(sc);
 638                 }
 639         }
 640 }
 641
 642 void
 643 avr32dci_interrupt(struct avr32dci_softc *sc)
 644 {
 645         uint32_t status;
 646
 647         USB_BUS_LOCK(&sc->sc_bus);
 648
 649         /* read interrupt status */
 650         status = AVR32_READ_4(sc, AVR32_INTSTA);
 651
 652         /* clear all set interrupts */
 653         AVR32_WRITE_4(sc, AVR32_CLRINT, status);
 654
 655         DPRINTFN(14, "INTSTA=0x%08x\n", status);
 656
 657         /* check for any bus state change interrupts */
 658         if (status & AVR32_INT_ENDRESET) {
 659
 660                 DPRINTFN(5, "end of reset\n");
 661
 662                 /* set correct state */
 663                 sc->sc_flags.status_bus_reset = 1;
 664                 sc->sc_flags.status_suspend = 0;
 665                 sc->sc_flags.change_suspend = 0;
 666                 sc->sc_flags.change_connect = 1;
 667
 668                 /* disable resume interrupt */
 669                 avr32dci_mod_ien(sc, AVR32_INT_DET_SUSPD |
 670                     AVR32_INT_ENDRESET, AVR32_INT_WAKE_UP);
 671
 672                 /* complete root HUB interrupt endpoint */
 673                 avr32dci_root_intr(sc);
 674         }
 675         /*
 676          * If resume and suspend is set at the same time we interpret
 677          * that like RESUME. Resume is set when there is at least 3
 678          * milliseconds of inactivity on the USB BUS.
 679          */
 680         if (status & AVR32_INT_WAKE_UP) {
 681
 682                 DPRINTFN(5, "resume interrupt\n");
 683
 684                 if (sc->sc_flags.status_suspend) {
 685                         /* update status bits */
 686                         sc->sc_flags.status_suspend = 0;
 687                         sc->sc_flags.change_suspend = 1;
 688
 689                         /* disable resume interrupt */
 690                         avr32dci_mod_ien(sc, AVR32_INT_DET_SUSPD |
 691                             AVR32_INT_ENDRESET, AVR32_INT_WAKE_UP);
 692
 693                         /* complete root HUB interrupt endpoint */
 694                         avr32dci_root_intr(sc);
 695                 }
 696         } else if (status & AVR32_INT_DET_SUSPD) {
 697
 698                 DPRINTFN(5, "suspend interrupt\n");
 699
 700                 if (!sc->sc_flags.status_suspend) {
 701                         /* update status bits */
 702                         sc->sc_flags.status_suspend = 1;
 703                         sc->sc_flags.change_suspend = 1;
 704
 705                         /* disable suspend interrupt */
 706                         avr32dci_mod_ien(sc, AVR32_INT_WAKE_UP |
 707                             AVR32_INT_ENDRESET, AVR32_INT_DET_SUSPD);
 708
 709                         /* complete root HUB interrupt endpoint */
 710                         avr32dci_root_intr(sc);
 711                 }
 712         }
 713         /* check for any endpoint interrupts */
 714         if (status & -AVR32_INT_EPT_INT(0)) {
 715
 716                 DPRINTFN(5, "real endpoint interrupt\n");
 717
 718                 avr32dci_interrupt_poll(sc);
 719         }
 720         USB_BUS_UNLOCK(&sc->sc_bus);
 721 }
 722
 723 static void
 724 avr32dci_setup_standard_chain_sub(struct avr32dci_std_temp *temp)
 725 {
 726         struct avr32dci_td *td;
 727
 728         /* get current Transfer Descriptor */
 729         td = temp->td_next;
 730         temp->td = td;
 731
 732         /* prepare for next TD */
 733         temp->td_next = td->obj_next;
 734
 735         /* fill out the Transfer Descriptor */
 736         td->func = temp->func;
 737         td->pc = temp->pc;
 738         td->offset = temp->offset;
 739         td->remainder = temp->len;
 740         td->error = 0;
 741         td->did_stall = temp->did_stall;
 742         td->short_pkt = temp->short_pkt;
 743         td->alt_next = temp->setup_alt_next;
 744 }
 745
 746 static void
 747 avr32dci_setup_standard_chain(struct usb_xfer *xfer)
 748 {
 749         struct avr32dci_std_temp temp;
 750         struct avr32dci_softc *sc;
 751         struct avr32dci_td *td;
 752         uint32_t x;
 753         uint8_t ep_no;
 754         uint8_t need_sync;
 755
 756         DPRINTFN(9, "addr=%d endpt=%d sumlen=%d speed=%d\n",
 757             xfer->address, UE_GET_ADDR(xfer->endpoint),
 758             xfer->sumlen, usbd_get_speed(xfer->xroot->udev));
 759
 760         temp.max_frame_size = xfer->max_frame_size;
 761
 762         td = xfer->td_start[0];
 763         xfer->td_transfer_first = td;
 764         xfer->td_transfer_cache = td;
 765
 766         /* setup temp */
 767
 768         temp.pc = NULL;
 769         temp.td = NULL;
 770         temp.td_next = xfer->td_start[0];
 771         temp.offset = 0;
 772         temp.setup_alt_next = xfer->flags_int.short_frames_ok;
 773         temp.did_stall = !xfer->flags_int.control_stall;
 774
 775         sc = AVR32_BUS2SC(xfer->xroot->bus);
 776         ep_no = (xfer->endpoint & UE_ADDR);
 777
 778         /* check if we should prepend a setup message */
 779
 780         if (xfer->flags_int.control_xfr) {
 781                 if (xfer->flags_int.control_hdr) {
 782
 783                         temp.func = &avr32dci_setup_rx;
 784                         temp.len = xfer->frlengths[0];
 785                         temp.pc = xfer->frbuffers + 0;
 786                         temp.short_pkt = temp.len ? 1 : 0;
 787                         /* check for last frame */
 788                         if (xfer->nframes == 1) {
 789                                 /* no STATUS stage yet, SETUP is last */
 790                                 if (xfer->flags_int.control_act)
 791                                         temp.setup_alt_next = 0;
 792                         }
 793                         avr32dci_setup_standard_chain_sub(&temp);
 794                 }
 795                 x = 1;
 796         } else {
 797                 x = 0;
 798         }
 799
 800         if (x != xfer->nframes) {
 801                 if (xfer->endpoint & UE_DIR_IN) {
 802                         temp.func = &avr32dci_data_tx;
 803                         need_sync = 1;
 804                 } else {
 805                         temp.func = &avr32dci_data_rx;
 806                         need_sync = 0;
 807                 }
 808
 809                 /* setup "pc" pointer */
 810                 temp.pc = xfer->frbuffers + x;
 811         } else {
 812                 need_sync = 0;
 813         }
 814         while (x != xfer->nframes) {
 815
 816                 /* DATA0 / DATA1 message */
 817
 818                 temp.len = xfer->frlengths[x];
 819
 820                 x++;
 821
 822                 if (x == xfer->nframes) {
 823                         if (xfer->flags_int.control_xfr) {
 824                                 if (xfer->flags_int.control_act) {
 825                                         temp.setup_alt_next = 0;
 826                                 }
 827                         } else {
 828                                 temp.setup_alt_next = 0;
 829                         }
 830                 }
 831                 if (temp.len == 0) {
 832
 833                         /* make sure that we send an USB packet */
 834
 835                         temp.short_pkt = 0;
 836
 837                 } else {
 838
 839                         /* regular data transfer */
 840
 841                         temp.short_pkt = (xfer->flags.force_short_xfer) ? 0 : 1;
 842                 }
 843
 844                 avr32dci_setup_standard_chain_sub(&temp);
 845
 846                 if (xfer->flags_int.isochronous_xfr) {
 847                         temp.offset += temp.len;
 848                 } else {
 849                         /* get next Page Cache pointer */
 850                         temp.pc = xfer->frbuffers + x;
 851                 }
 852         }
 853
 854         if (xfer->flags_int.control_xfr) {
 855
 856                 /* always setup a valid "pc" pointer for status and sync */
 857                 temp.pc = xfer->frbuffers + 0;
 858                 temp.len = 0;
 859                 temp.short_pkt = 0;
 860                 temp.setup_alt_next = 0;
 861
 862                 /* check if we need to sync */
 863                 if (need_sync) {
 864                         /* we need a SYNC point after TX */
 865                         temp.func = &avr32dci_data_tx_sync;
 866                         avr32dci_setup_standard_chain_sub(&temp);
 867                 }
 868                 /* check if we should append a status stage */
 869                 if (!xfer->flags_int.control_act) {
 870
 871                         /*
 872                          * Send a DATA1 message and invert the current
 873                          * endpoint direction.
 874                          */
 875                         if (xfer->endpoint & UE_DIR_IN) {
 876                                 temp.func = &avr32dci_data_rx;
 877                                 need_sync = 0;
 878                         } else {
 879                                 temp.func = &avr32dci_data_tx;
 880                                 need_sync = 1;
 881                         }
 882
 883                         avr32dci_setup_standard_chain_sub(&temp);
 884                         if (need_sync) {
 885                                 /* we need a SYNC point after TX */
 886                                 temp.func = &avr32dci_data_tx_sync;
 887                                 avr32dci_setup_standard_chain_sub(&temp);
 888                         }
 889                 }
 890         }
 891         /* must have at least one frame! */
 892         td = temp.td;
 893         xfer->td_transfer_last = td;
 894 }
 895
 896 static void
 897 avr32dci_timeout(void *arg)
 898 {
 899         struct usb_xfer *xfer = arg;
 900
 901         DPRINTF("xfer=%p\n", xfer);
 902
 903         USB_BUS_LOCK_ASSERT(xfer->xroot->bus, MA_OWNED);
 904
 905         /* transfer is transferred */
 906         avr32dci_device_done(xfer, USB_ERR_TIMEOUT);
 907 }
 908
 909 static void
 910 avr32dci_start_standard_chain(struct usb_xfer *xfer)
 911 {
 912         DPRINTFN(9, "\n");
 913
 914         /* poll one time - will turn on interrupts */
 915         if (avr32dci_xfer_do_fifo(xfer)) {
 916                 uint8_t ep_no = xfer->endpoint & UE_ADDR_MASK;
 917
 918                 avr32dci_mod_ien(sc, AVR32_INT_EPT_INT(ep_no), 0);
 919
 920                 /* put transfer on interrupt queue */
 921                 usbd_transfer_enqueue(&xfer->xroot->bus->intr_q, xfer);
 922
 923                 /* start timeout, if any */
 924                 if (xfer->timeout != 0) {
 925                         usbd_transfer_timeout_ms(xfer,
 926                             &avr32dci_timeout, xfer->timeout);
 927                 }
 928         }
 929 }
 930
 931 static void
 932 avr32dci_root_intr(struct avr32dci_softc *sc)
 933 {
 934         DPRINTFN(9, "\n");
 935
 936         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
 937
 938         /* set port bit */
 939         sc->sc_hub_idata[0] = 0x02;     /* we only have one port */
 940
 941         uhub_root_intr(&sc->sc_bus, sc->sc_hub_idata,
 942             sizeof(sc->sc_hub_idata));
 943 }
 944
 945 static usb_error_t
 946 avr32dci_standard_done_sub(struct usb_xfer *xfer)
 947 {
 948         struct avr32dci_td *td;
 949         uint32_t len;
 950         uint8_t error;
 951
 952         DPRINTFN(9, "\n");
 953
 954         td = xfer->td_transfer_cache;
 955
 956         do {
 957                 len = td->remainder;
 958
 959                 if (xfer->aframes != xfer->nframes) {
 960                         /*
 961                          * Verify the length and subtract
 962                          * the remainder from "frlengths[]":
 963                          */
 964                         if (len > xfer->frlengths[xfer->aframes]) {
 965                                 td->error = 1;
 966                         } else {
 967                                 xfer->frlengths[xfer->aframes] -= len;
 968                         }
 969                 }
 970                 /* Check for transfer error */
 971                 if (td->error) {
 972                         /* the transfer is finished */
 973                         error = 1;
 974                         td = NULL;
 975                         break;
 976                 }
 977                 /* Check for short transfer */
 978                 if (len > 0) {
 979                         if (xfer->flags_int.short_frames_ok) {
 980                                 /* follow alt next */
 981                                 if (td->alt_next) {
 982                                         td = td->obj_next;
 983                                 } else {
 984                                         td = NULL;
 985                                 }
 986                         } else {
 987                                 /* the transfer is finished */
 988                                 td = NULL;
 989                         }
 990                         error = 0;
 991                         break;
 992                 }
 993                 td = td->obj_next;
 994
 995                 /* this USB frame is complete */
 996                 error = 0;
 997                 break;
 998
 999         } while (0);
1000
1001         /* update transfer cache */
1002
1003         xfer->td_transfer_cache = td;
1004
1005         return (error ?
1006             USB_ERR_STALLED : USB_ERR_NORMAL_COMPLETION);
1007 }
1008
1009 static void
1010 avr32dci_standard_done(struct usb_xfer *xfer)
1011 {
1012         usb_error_t err = 0;
1013
1014         DPRINTFN(13, "xfer=%p pipe=%p transfer done\n",
1015             xfer, xfer->pipe);
1016
1017         /* reset scanner */
1018
1019         xfer->td_transfer_cache = xfer->td_transfer_first;
1020
1021         if (xfer->flags_int.control_xfr) {
1022
1023                 if (xfer->flags_int.control_hdr) {
1024
1025                         err = avr32dci_standard_done_sub(xfer);
1026                 }
1027                 xfer->aframes = 1;
1028
1029                 if (xfer->td_transfer_cache == NULL) {
1030                         goto done;
1031                 }
1032         }
1033         while (xfer->aframes != xfer->nframes) {
1034
1035                 err = avr32dci_standard_done_sub(xfer);
1036                 xfer->aframes++;
1037
1038                 if (xfer->td_transfer_cache == NULL) {
1039                         goto done;
1040                 }
1041         }
1042
1043         if (xfer->flags_int.control_xfr &&
1044             !xfer->flags_int.control_act) {
1045
1046                 err = avr32dci_standard_done_sub(xfer);
1047         }
1048 done:
1049         avr32dci_device_done(xfer, err);
1050 }
1051
1052 /*------------------------------------------------------------------------*
1053  *      avr32dci_device_done
1054  *
1055  * NOTE: this function can be called more than one time on the
1056  * same USB transfer!
1057  *------------------------------------------------------------------------*/
1058 static void
1059 avr32dci_device_done(struct usb_xfer *xfer, usb_error_t error)
1060 {
1061         struct avr32dci_softc *sc = AVR32_BUS2SC(xfer->xroot->bus);
1062         uint8_t ep_no;
1063
1064         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1065
1066         DPRINTFN(9, "xfer=%p, pipe=%p, error=%d\n",
1067             xfer, xfer->pipe, error);
1068
1069         if (xfer->flags_int.usb_mode == USB_MODE_DEVICE) {
1070                 ep_no = (xfer->endpoint & UE_ADDR);
1071
1072                 /* disable endpoint interrupt */
1073                 avr32dci_mod_ien(sc, 0, AVR32_INT_EPT_INT(ep_no));
1074
1075                 DPRINTFN(15, "disabled interrupts!\n");
1076         }
1077         /* dequeue transfer and start next transfer */
1078         usbd_transfer_done(xfer, error);
1079 }
1080
1081 static void
1082 avr32dci_set_stall(struct usb_device *udev, struct usb_xfer *xfer,
1083     struct usb_endpoint *ep, uint8_t *did_stall)
1084 {
1085         struct avr32dci_softc *sc;
1086         uint8_t ep_no;
1087
1088         USB_BUS_LOCK_ASSERT(udev->bus, MA_OWNED);
1089
1090         DPRINTFN(5, "pipe=%p\n", pipe);
1091
1092         if (xfer) {
1093                 /* cancel any ongoing transfers */
1094                 avr32dci_device_done(xfer, USB_ERR_STALLED);
1095         }
1096         sc = AVR32_BUS2SC(udev->bus);
1097         /* get endpoint number */
1098         ep_no = (pipe->edesc->bEndpointAddress & UE_ADDR);
1099         /* set stall */
1100         AVR32_WRITE_4(sc, AVR32_EPTSETSTA(ep_no), AVR32_EPTSTA_FRCESTALL);
1101 }
1102
1103 static void
1104 avr32dci_clear_stall_sub(struct avr32dci_softc *sc, uint8_t ep_no,
1105     uint8_t ep_type, uint8_t ep_dir)
1106 {
1107         const struct usb_hw_ep_profile *pf;
1108         uint32_t temp;
1109         uint32_t epsize;
1110         uint8_t n;
1111
1112         if (ep_type == UE_CONTROL) {
1113                 /* clearing stall is not needed */
1114                 return;
1115         }
1116         /* set endpoint reset */
1117         AVR32_WRITE_4(sc, AVR32_EPTRST, AVR32_EPTRST_MASK(ep_no));
1118
1119         /* set stall */
1120         AVR32_WRITE_4(sc, AVR32_EPTSETSTA(ep_no), AVR32_EPTSTA_FRCESTALL);
1121
1122         /* reset data toggle */
1123         AVR32_WRITE_4(sc, AVR32_EPTCLRSTA(ep_no), AVR32_EPTSTA_TOGGLESQ);
1124
1125         /* clear stall */
1126         AVR32_WRITE_4(sc, AVR32_EPTCLRSTA(ep_no), AVR32_EPTSTA_FRCESTALL);
1127
1128         if (ep_type == UE_BULK) {
1129                 temp = AVR32_EPTCFG_TYPE_BULK;
1130         } else if (ep_type == UE_INTERRUPT) {
1131                 temp = AVR32_EPTCFG_TYPE_INTR;
1132         } else {
1133                 temp = AVR32_EPTCFG_TYPE_ISOC |
1134                     AVR32_EPTCFG_NB_TRANS(1);
1135         }
1136         if (ep_dir & UE_DIR_IN) {
1137                 temp |= AVR32_EPTCFG_EPDIR_IN;
1138         }
1139         avr32dci_get_hw_ep_profile(NULL, &pf, ep_no);
1140
1141         /* compute endpoint size (use maximum) */
1142         epsize = pf->max_in_frame_size | pf->max_out_frame_size;
1143         n = 0;
1144         while ((epsize /= 2))
1145                 n++;
1146         temp |= AVR32_EPTCFG_EPSIZE(n);
1147
1148         /* use the maximum number of banks supported */
1149         if (ep_no < 1)
1150                 temp |= AVR32_EPTCFG_NBANK(1);
1151         else if (ep_no < 3)
1152                 temp |= AVR32_EPTCFG_NBANK(2);
1153         else
1154                 temp |= AVR32_EPTCFG_NBANK(3);
1155
1156         AVR32_WRITE_4(sc, AVR32_EPTCFG(ep_no), temp);
1157
1158         temp = AVR32_READ_4(sc, AVR32_EPTCFG(ep_no));
1159
1160         if (!(temp & AVR32_EPTCFG_EPT_MAPD)) {
1161                 device_printf(sc->sc_bus.bdev, "Chip rejected configuration\n");
1162         } else {
1163                 AVR32_WRITE_4(sc, AVR32_EPTCTLENB(ep_no),
1164                     AVR32_EPTCTL_EPT_ENABL);
1165         }
1166 }
1167
1168 static void
1169 avr32dci_clear_stall(struct usb_device *udev, struct usb_endpoint *ep)
1170 {
1171         struct avr32dci_softc *sc;
1172         struct usb_endpoint_descriptor *ed;
1173
1174         DPRINTFN(5, "pipe=%p\n", pipe);
1175
1176         USB_BUS_LOCK_ASSERT(udev->bus, MA_OWNED);
1177
1178         /* check mode */
1179         if (udev->flags.usb_mode != USB_MODE_DEVICE) {
1180                 /* not supported */
1181                 return;
1182         }
1183         /* get softc */
1184         sc = AVR32_BUS2SC(udev->bus);
1185
1186         /* get endpoint descriptor */
1187         ed = pipe->edesc;
1188
1189         /* reset endpoint */
1190         avr32dci_clear_stall_sub(sc,
1191             (ed->bEndpointAddress & UE_ADDR),
1192             (ed->bmAttributes & UE_XFERTYPE),
1193             (ed->bEndpointAddress & (UE_DIR_IN | UE_DIR_OUT)));
1194 }
1195
1196 usb_error_t
1197 avr32dci_init(struct avr32dci_softc *sc)
1198 {
1199         uint8_t n;
1200
1201         DPRINTF("start\n");
1202
1203         /* set up the bus structure */
1204         sc->sc_bus.usbrev = USB_REV_1_1;
1205         sc->sc_bus.methods = &avr32dci_bus_methods;
1206
1207         USB_BUS_LOCK(&sc->sc_bus);
1208
1209         /* make sure USB is enabled */
1210         avr32dci_mod_ctrl(sc, AVR32_CTRL_DEV_EN_USBA, 0);
1211
1212         /* turn on clocks */
1213         (sc->sc_clocks_on) (&sc->sc_bus);
1214
1215         /* make sure device is re-enumerated */
1216         avr32dci_mod_ctrl(sc, AVR32_CTRL_DEV_DETACH, 0);
1217
1218         /* wait a little for things to stabilise */
1219         usb_pause_mtx(&sc->sc_bus.bus_mtx, hz / 20);
1220
1221         /* disable interrupts */
1222         avr32dci_mod_ien(sc, 0, 0xFFFFFFFF);
1223
1224         /* enable interrupts */
1225         avr32dci_mod_ien(sc, AVR32_INT_DET_SUSPD |
1226             AVR32_INT_ENDRESET, 0);
1227
1228         /* reset all endpoints */
1229 /**INDENT** Warning@1207: Extra ) */
1230         AVR32_WRITE_4(sc, AVR32_EPTRST, (1 << AVR32_EP_MAX) - 1));
1231
1232         /* disable all endpoints */
1233         for (n = 0; n != AVR32_EP_MAX; n++) {
1234                 /* disable endpoint */
1235                 AVR32_WRITE_4(sc, AVR32_EPTCTLDIS(n), AVR32_EPTCTL_EPT_ENABL);
1236         }
1237
1238         /* turn off clocks */
1239
1240         avr32dci_clocks_off(sc);
1241
1242         USB_BUS_UNLOCK(&sc->sc_bus);
1243
1244         /* catch any lost interrupts */
1245
1246         avr32dci_do_poll(&sc->sc_bus);
1247
1248         return (0);                     /* success */
1249 }
1250
1251 void
1252 avr32dci_uninit(struct avr32dci_softc *sc)
1253 {
1254         uint8_t n;
1255
1256         USB_BUS_LOCK(&sc->sc_bus);
1257
1258         /* turn on clocks */
1259         (sc->sc_clocks_on) (&sc->sc_bus);
1260
1261         /* disable interrupts */
1262         avr32dci_mod_ien(sc, 0, 0xFFFFFFFF);
1263
1264         /* reset all endpoints */
1265 /**INDENT** Warning@1242: Extra ) */
1266         AVR32_WRITE_4(sc, AVR32_EPTRST, (1 << AVR32_EP_MAX) - 1));
1267
1268         /* disable all endpoints */
1269         for (n = 0; n != AVR32_EP_MAX; n++) {
1270                 /* disable endpoint */
1271                 AVR32_WRITE_4(sc, AVR32_EPTCTLDIS(n), AVR32_EPTCTL_EPT_ENABL);
1272         }
1273
1274         sc->sc_flags.port_powered = 0;
1275         sc->sc_flags.status_vbus = 0;
1276         sc->sc_flags.status_bus_reset = 0;
1277         sc->sc_flags.status_suspend = 0;
1278         sc->sc_flags.change_suspend = 0;
1279         sc->sc_flags.change_connect = 1;
1280
1281         avr32dci_pull_down(sc);
1282         avr32dci_clocks_off(sc);
1283
1284         USB_BUS_UNLOCK(&sc->sc_bus);
1285 }
1286
1287 void
1288 avr32dci_suspend(struct avr32dci_softc *sc)
1289 {
1290         return;
1291 }
1292
1293 void
1294 avr32dci_resume(struct avr32dci_softc *sc)
1295 {
1296         return;
1297 }
1298
1299 static void
1300 avr32dci_do_poll(struct usb_bus *bus)
1301 {
1302         struct avr32dci_softc *sc = AVR32_BUS2SC(bus);
1303
1304         USB_BUS_LOCK(&sc->sc_bus);
1305         avr32dci_interrupt_poll(sc);
1306         USB_BUS_UNLOCK(&sc->sc_bus);
1307 }
1308
1309 /*------------------------------------------------------------------------*
1310  * at91dci bulk support
1311  * at91dci control support
1312  * at91dci interrupt support
1313  *------------------------------------------------------------------------*/
1314 static void
1315 avr32dci_device_non_isoc_open(struct usb_xfer *xfer)
1316 {
1317         return;
1318 }
1319
1320 static void
1321 avr32dci_device_non_isoc_close(struct usb_xfer *xfer)
1322 {
1323         avr32dci_device_done(xfer, USB_ERR_CANCELLED);
1324 }
1325
1326 static void
1327 avr32dci_device_non_isoc_enter(struct usb_xfer *xfer)
1328 {
1329         return;
1330 }
1331
1332 static void
1333 avr32dci_device_non_isoc_start(struct usb_xfer *xfer)
1334 {
1335         /* setup TDs */
1336         avr32dci_setup_standard_chain(xfer);
1337         avr32dci_start_standard_chain(xfer);
1338 }
1339
1340 struct usb_pipe_methods avr32dci_device_non_isoc_methods =
1341 {
1342         .open = avr32dci_device_non_isoc_open,
1343         .close = avr32dci_device_non_isoc_close,
1344         .enter = avr32dci_device_non_isoc_enter,
1345         .start = avr32dci_device_non_isoc_start,
1346 };
1347
1348 /*------------------------------------------------------------------------*
1349  * at91dci full speed isochronous support
1350  *------------------------------------------------------------------------*/
1351 static void
1352 avr32dci_device_isoc_fs_open(struct usb_xfer *xfer)
1353 {
1354         return;
1355 }
1356
1357 static void
1358 avr32dci_device_isoc_fs_close(struct usb_xfer *xfer)
1359 {
1360         avr32dci_device_done(xfer, USB_ERR_CANCELLED);
1361 }
1362
1363 static void
1364 avr32dci_device_isoc_fs_enter(struct usb_xfer *xfer)
1365 {
1366         struct avr32dci_softc *sc = AVR32_BUS2SC(xfer->xroot->bus);
1367         uint32_t temp;
1368         uint32_t nframes;
1369         uint8_t ep_no;
1370
1371         DPRINTFN(6, "xfer=%p next=%d nframes=%d\n",
1372             xfer, xfer->pipe->isoc_next, xfer->nframes);
1373
1374         /* get the current frame index */
1375         ep_no = xfer->endpoint & UE_ADDR_MASK;
1376         nframes = (AVR32_READ_4(sc, AVR32_FNUM) / 8);
1377
1378         nframes &= AVR32_FRAME_MASK;
1379
1380         /*
1381          * check if the frame index is within the window where the frames
1382          * will be inserted
1383          */
1384         temp = (nframes - xfer->pipe->isoc_next) & AVR32_FRAME_MASK;
1385
1386         if ((xfer->pipe->is_synced == 0) ||
1387             (temp < xfer->nframes)) {
1388                 /*
1389                  * If there is data underflow or the pipe queue is
1390                  * empty we schedule the transfer a few frames ahead
1391                  * of the current frame position. Else two isochronous
1392                  * transfers might overlap.
1393                  */
1394                 xfer->pipe->isoc_next = (nframes + 3) & AVR32_FRAME_MASK;
1395                 xfer->pipe->is_synced = 1;
1396                 DPRINTFN(3, "start next=%d\n", xfer->pipe->isoc_next);
1397         }
1398         /*
1399          * compute how many milliseconds the insertion is ahead of the
1400          * current frame position:
1401          */
1402         temp = (xfer->pipe->isoc_next - nframes) & AVR32_FRAME_MASK;
1403
1404         /*
1405          * pre-compute when the isochronous transfer will be finished:
1406          */
1407         xfer->isoc_time_complete =
1408             usb_isoc_time_expand(&sc->sc_bus, nframes) + temp +
1409             xfer->nframes;
1410
1411         /* compute frame number for next insertion */
1412         xfer->pipe->isoc_next += xfer->nframes;
1413
1414         /* setup TDs */
1415         avr32dci_setup_standard_chain(xfer);
1416 }
1417
1418 static void
1419 avr32dci_device_isoc_fs_start(struct usb_xfer *xfer)
1420 {
1421         /* start TD chain */
1422         avr32dci_start_standard_chain(xfer);
1423 }
1424
1425 struct usb_pipe_methods avr32dci_device_isoc_fs_methods =
1426 {
1427         .open = avr32dci_device_isoc_fs_open,
1428         .close = avr32dci_device_isoc_fs_close,
1429         .enter = avr32dci_device_isoc_fs_enter,
1430         .start = avr32dci_device_isoc_fs_start,
1431 };
1432
1433 /*------------------------------------------------------------------------*
1434  * at91dci root control support
1435  *------------------------------------------------------------------------*
1436  * Simulate a hardware HUB by handling all the necessary requests.
1437  *------------------------------------------------------------------------*/
1438
1439 static const struct usb_device_descriptor avr32dci_devd = {
1440         .bLength = sizeof(struct usb_device_descriptor),
1441         .bDescriptorType = UDESC_DEVICE,
1442         .bcdUSB = {0x00, 0x02},
1443         .bDeviceClass = UDCLASS_HUB,
1444         .bDeviceSubClass = UDSUBCLASS_HUB,
1445         .bDeviceProtocol = UDPROTO_HSHUBSTT,
1446         .bMaxPacketSize = 64,
1447         .bcdDevice = {0x00, 0x01},
1448         .iManufacturer = 1,
1449         .iProduct = 2,
1450         .bNumConfigurations = 1,
1451 };
1452
1453 static const struct usb_device_qualifier avr32dci_odevd = {
1454         .bLength = sizeof(struct usb_device_qualifier),
1455         .bDescriptorType = UDESC_DEVICE_QUALIFIER,
1456         .bcdUSB = {0x00, 0x02},
1457         .bDeviceClass = UDCLASS_HUB,
1458         .bDeviceSubClass = UDSUBCLASS_HUB,
1459         .bDeviceProtocol = UDPROTO_FSHUB,
1460         .bMaxPacketSize0 = 0,
1461         .bNumConfigurations = 0,
1462 };
1463
1464 static const struct avr32dci_config_desc avr32dci_confd = {
1465         .confd = {
1466                 .bLength = sizeof(struct usb_config_descriptor),
1467                 .bDescriptorType = UDESC_CONFIG,
1468                 .wTotalLength[0] = sizeof(avr32dci_confd),
1469                 .bNumInterface = 1,
1470                 .bConfigurationValue = 1,
1471                 .iConfiguration = 0,
1472                 .bmAttributes = UC_SELF_POWERED,
1473                 .bMaxPower = 0,
1474         },
1475         .ifcd = {
1476                 .bLength = sizeof(struct usb_interface_descriptor),
1477                 .bDescriptorType = UDESC_INTERFACE,
1478                 .bNumEndpoints = 1,
1479                 .bInterfaceClass = UICLASS_HUB,
1480                 .bInterfaceSubClass = UISUBCLASS_HUB,
1481                 .bInterfaceProtocol = 0,
1482         },
1483         .endpd = {
1484                 .bLength = sizeof(struct usb_endpoint_descriptor),
1485                 .bDescriptorType = UDESC_ENDPOINT,
1486                 .bEndpointAddress = (UE_DIR_IN | AVR32_INTR_ENDPT),
1487                 .bmAttributes = UE_INTERRUPT,
1488                 .wMaxPacketSize[0] = 8,
1489                 .bInterval = 255,
1490         },
1491 };
1492
1493 static const struct usb_hub_descriptor_min avr32dci_hubd = {
1494         .bDescLength = sizeof(avr32dci_hubd),
1495         .bDescriptorType = UDESC_HUB,
1496         .bNbrPorts = 1,
1497         .wHubCharacteristics[0] =
1498         (UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL) & 0xFF,
1499         .wHubCharacteristics[1] =
1500         (UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL) >> 8,
1501         .bPwrOn2PwrGood = 50,
1502         .bHubContrCurrent = 0,
1503         .DeviceRemovable = {0},         /* port is removable */
1504 };
1505
1506 #define STRING_LANG \
1507   0x09, 0x04,                           /* American English */
1508
1509 #define STRING_VENDOR \
1510   'A', 0, 'V', 0, 'R', 0, '3', 0, '2', 0
1511
1512 #define STRING_PRODUCT \
1513   'D', 0, 'C', 0, 'I', 0, ' ', 0, 'R', 0, \
1514   'o', 0, 'o', 0, 't', 0, ' ', 0, 'H', 0, \
1515   'U', 0, 'B', 0,
1516
1517 USB_MAKE_STRING_DESC(STRING_LANG, avr32dci_langtab);
1518 USB_MAKE_STRING_DESC(STRING_VENDOR, avr32dci_vendor);
1519 USB_MAKE_STRING_DESC(STRING_PRODUCT, avr32dci_product);
1520
1521 static usb_error_t
1522 avr32dci_roothub_exec(struct usb_device *udev,
1523     struct usb_device_request *req, const void **pptr, uint16_t *plength)
1524 {
1525         struct avr32dci_softc *sc = AVR32_BUS2SC(udev->bus);
1526         const void *ptr;
1527         uint16_t len;
1528         uint16_t value;
1529         uint16_t index;
1530         uint32_t temp;
1531         usb_error_t err;
1532
1533         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1534
1535         /* buffer reset */
1536         ptr = (const void *)&sc->sc_hub_temp;
1537         len = 0;
1538         err = 0;
1539
1540         value = UGETW(req->wValue);
1541         index = UGETW(req->wIndex);
1542
1543         /* demultiplex the control request */
1544
1545         switch (req->bmRequestType) {
1546         case UT_READ_DEVICE:
1547                 switch (req->bRequest) {
1548                 case UR_GET_DESCRIPTOR:
1549                         goto tr_handle_get_descriptor;
1550                 case UR_GET_CONFIG:
1551                         goto tr_handle_get_config;
1552                 case UR_GET_STATUS:
1553                         goto tr_handle_get_status;
1554                 default:
1555                         goto tr_stalled;
1556                 }
1557                 break;
1558
1559         case UT_WRITE_DEVICE:
1560                 switch (req->bRequest) {
1561                 case UR_SET_ADDRESS:
1562                         goto tr_handle_set_address;
1563                 case UR_SET_CONFIG:
1564                         goto tr_handle_set_config;
1565                 case UR_CLEAR_FEATURE:
1566                         goto tr_valid;  /* nop */
1567                 case UR_SET_DESCRIPTOR:
1568                         goto tr_valid;  /* nop */
1569                 case UR_SET_FEATURE:
1570                 default:
1571                         goto tr_stalled;
1572                 }
1573                 break;
1574
1575         case UT_WRITE_ENDPOINT:
1576                 switch (req->bRequest) {
1577                 case UR_CLEAR_FEATURE:
1578                         switch (UGETW(req->wValue)) {
1579                         case UF_ENDPOINT_HALT:
1580                                 goto tr_handle_clear_halt;
1581                         case UF_DEVICE_REMOTE_WAKEUP:
1582                                 goto tr_handle_clear_wakeup;
1583                         default:
1584                                 goto tr_stalled;
1585                         }
1586                         break;
1587                 case UR_SET_FEATURE:
1588                         switch (UGETW(req->wValue)) {
1589                         case UF_ENDPOINT_HALT:
1590                                 goto tr_handle_set_halt;
1591                         case UF_DEVICE_REMOTE_WAKEUP:
1592                                 goto tr_handle_set_wakeup;
1593                         default:
1594                                 goto tr_stalled;
1595                         }
1596                         break;
1597                 case UR_SYNCH_FRAME:
1598                         goto tr_valid;  /* nop */
1599                 default:
1600                         goto tr_stalled;
1601                 }
1602                 break;
1603
1604         case UT_READ_ENDPOINT:
1605                 switch (req->bRequest) {
1606                 case UR_GET_STATUS:
1607                         goto tr_handle_get_ep_status;
1608                 default:
1609                         goto tr_stalled;
1610                 }
1611                 break;
1612
1613         case UT_WRITE_INTERFACE:
1614                 switch (req->bRequest) {
1615                 case UR_SET_INTERFACE:
1616                         goto tr_handle_set_interface;
1617                 case UR_CLEAR_FEATURE:
1618                         goto tr_valid;  /* nop */
1619                 case UR_SET_FEATURE:
1620                 default:
1621                         goto tr_stalled;
1622                 }
1623                 break;
1624
1625         case UT_READ_INTERFACE:
1626                 switch (req->bRequest) {
1627                 case UR_GET_INTERFACE:
1628                         goto tr_handle_get_interface;
1629                 case UR_GET_STATUS:
1630                         goto tr_handle_get_iface_status;
1631                 default:
1632                         goto tr_stalled;
1633                 }
1634                 break;
1635
1636         case UT_WRITE_CLASS_INTERFACE:
1637         case UT_WRITE_VENDOR_INTERFACE:
1638                 /* XXX forward */
1639                 break;
1640
1641         case UT_READ_CLASS_INTERFACE:
1642         case UT_READ_VENDOR_INTERFACE:
1643                 /* XXX forward */
1644                 break;
1645
1646         case UT_WRITE_CLASS_DEVICE:
1647                 switch (req->bRequest) {
1648                 case UR_CLEAR_FEATURE:
1649                         goto tr_valid;
1650                 case UR_SET_DESCRIPTOR:
1651                 case UR_SET_FEATURE:
1652                         break;
1653                 default:
1654                         goto tr_stalled;
1655                 }
1656                 break;
1657
1658         case UT_WRITE_CLASS_OTHER:
1659                 switch (req->bRequest) {
1660                 case UR_CLEAR_FEATURE:
1661                         goto tr_handle_clear_port_feature;
1662                 case UR_SET_FEATURE:
1663                         goto tr_handle_set_port_feature;
1664                 case UR_CLEAR_TT_BUFFER:
1665                 case UR_RESET_TT:
1666                 case UR_STOP_TT:
1667                         goto tr_valid;
1668
1669                 default:
1670                         goto tr_stalled;
1671                 }
1672                 break;
1673
1674         case UT_READ_CLASS_OTHER:
1675                 switch (req->bRequest) {
1676                 case UR_GET_TT_STATE:
1677                         goto tr_handle_get_tt_state;
1678                 case UR_GET_STATUS:
1679                         goto tr_handle_get_port_status;
1680                 default:
1681                         goto tr_stalled;
1682                 }
1683                 break;
1684
1685         case UT_READ_CLASS_DEVICE:
1686                 switch (req->bRequest) {
1687                 case UR_GET_DESCRIPTOR:
1688                         goto tr_handle_get_class_descriptor;
1689                 case UR_GET_STATUS:
1690                         goto tr_handle_get_class_status;
1691
1692                 default:
1693                         goto tr_stalled;
1694                 }
1695                 break;
1696         default:
1697                 goto tr_stalled;
1698         }
1699         goto tr_valid;
1700
1701 tr_handle_get_descriptor:
1702         switch (value >> 8) {
1703         case UDESC_DEVICE:
1704                 if (value & 0xff) {
1705                         goto tr_stalled;
1706                 }
1707                 len = sizeof(avr32dci_devd);
1708                 ptr = (const void *)&avr32dci_devd;
1709                 goto tr_valid;
1710         case UDESC_CONFIG:
1711                 if (value & 0xff) {
1712                         goto tr_stalled;
1713                 }
1714                 len = sizeof(avr32dci_confd);
1715                 ptr = (const void *)&avr32dci_confd;
1716                 goto tr_valid;
1717         case UDESC_STRING:
1718                 switch (value & 0xff) {
1719                 case 0:         /* Language table */
1720                         len = sizeof(avr32dci_langtab);
1721                         ptr = (const void *)&avr32dci_langtab;
1722                         goto tr_valid;
1723
1724                 case 1:         /* Vendor */
1725                         len = sizeof(avr32dci_vendor);
1726                         ptr = (const void *)&avr32dci_vendor;
1727                         goto tr_valid;
1728
1729                 case 2:         /* Product */
1730                         len = sizeof(avr32dci_product);
1731                         ptr = (const void *)&avr32dci_product;
1732                         goto tr_valid;
1733                 default:
1734                         break;
1735                 }
1736                 break;
1737         default:
1738                 goto tr_stalled;
1739         }
1740         goto tr_stalled;
1741
1742 tr_handle_get_config:
1743         len = 1;
1744         sc->sc_hub_temp.wValue[0] = sc->sc_conf;
1745         goto tr_valid;
1746
1747 tr_handle_get_status:
1748         len = 2;
1749         USETW(sc->sc_hub_temp.wValue, UDS_SELF_POWERED);
1750         goto tr_valid;
1751
1752 tr_handle_set_address:
1753         if (value & 0xFF00) {
1754                 goto tr_stalled;
1755         }
1756         sc->sc_rt_addr = value;
1757         goto tr_valid;
1758
1759 tr_handle_set_config:
1760         if (value >= 2) {
1761                 goto tr_stalled;
1762         }
1763         sc->sc_conf = value;
1764         goto tr_valid;
1765
1766 tr_handle_get_interface:
1767         len = 1;
1768         sc->sc_hub_temp.wValue[0] = 0;
1769         goto tr_valid;
1770
1771 tr_handle_get_tt_state:
1772 tr_handle_get_class_status:
1773 tr_handle_get_iface_status:
1774 tr_handle_get_ep_status:
1775         len = 2;
1776         USETW(sc->sc_hub_temp.wValue, 0);
1777         goto tr_valid;
1778
1779 tr_handle_set_halt:
1780 tr_handle_set_interface:
1781 tr_handle_set_wakeup:
1782 tr_handle_clear_wakeup:
1783 tr_handle_clear_halt:
1784         goto tr_valid;
1785
1786 tr_handle_clear_port_feature:
1787         if (index != 1) {
1788                 goto tr_stalled;
1789         }
1790         DPRINTFN(9, "UR_CLEAR_PORT_FEATURE on port %d\n", index);
1791
1792         switch (value) {
1793         case UHF_PORT_SUSPEND:
1794                 avr32dci_wakeup_peer(sc);
1795                 break;
1796
1797         case UHF_PORT_ENABLE:
1798                 sc->sc_flags.port_enabled = 0;
1799                 break;
1800
1801         case UHF_PORT_TEST:
1802         case UHF_PORT_INDICATOR:
1803         case UHF_C_PORT_ENABLE:
1804         case UHF_C_PORT_OVER_CURRENT:
1805         case UHF_C_PORT_RESET:
1806                 /* nops */
1807                 break;
1808         case UHF_PORT_POWER:
1809                 sc->sc_flags.port_powered = 0;
1810                 avr32dci_pull_down(sc);
1811                 avr32dci_clocks_off(sc);
1812                 break;
1813         case UHF_C_PORT_CONNECTION:
1814                 /* clear connect change flag */
1815                 sc->sc_flags.change_connect = 0;
1816
1817                 if (!sc->sc_flags.status_bus_reset) {
1818                         /* we are not connected */
1819                         break;
1820                 }
1821                 /* configure the control endpoint */
1822                 /* set endpoint reset */
1823                 AVR32_WRITE_4(sc, AVR32_EPTRST, AVR32_EPTRST_MASK(0));
1824
1825                 /* set stall */
1826                 AVR32_WRITE_4(sc, AVR32_EPTSETSTA(0), AVR32_EPTSTA_FRCESTALL);
1827
1828                 /* reset data toggle */
1829                 AVR32_WRITE_4(sc, AVR32_EPTCLRSTA(0), AVR32_EPTSTA_TOGGLESQ);
1830
1831                 /* clear stall */
1832                 AVR32_WRITE_4(sc, AVR32_EPTCLRSTA(0), AVR32_EPTSTA_FRCESTALL);
1833
1834                 /* configure */
1835                 AVR32_WRITE_4(sc, AVR32_EPTCFG(0), AVR32_EPTCFG_TYPE_CONTROL |
1836                     AVR32_EPTCFG_NBANK(1) | AVR32_EPTCFG_EPSIZE(6));
1837
1838                 temp = AVR32_READ_4(sc, AVR32_EPTCFG(0));
1839
1840                 if (!(temp & AVR32_EPTCFG_EPT_MAPD)) {
1841                         device_printf(sc->sc_bus.bdev,
1842                             "Chip rejected configuration\n");
1843                 } else {
1844                         AVR32_WRITE_4(sc, AVR32_EPTCTLENB(0),
1845                             AVR32_EPTCTL_EPT_ENABL);
1846                 }
1847                 break;
1848         case UHF_C_PORT_SUSPEND:
1849                 sc->sc_flags.change_suspend = 0;
1850                 break;
1851         default:
1852                 err = USB_ERR_IOERROR;
1853                 goto done;
1854         }
1855         goto tr_valid;
1856
1857 tr_handle_set_port_feature:
1858         if (index != 1) {
1859                 goto tr_stalled;
1860         }
1861         DPRINTFN(9, "UR_SET_PORT_FEATURE\n");
1862
1863         switch (value) {
1864         case UHF_PORT_ENABLE:
1865                 sc->sc_flags.port_enabled = 1;
1866                 break;
1867         case UHF_PORT_SUSPEND:
1868         case UHF_PORT_RESET:
1869         case UHF_PORT_TEST:
1870         case UHF_PORT_INDICATOR:
1871                 /* nops */
1872                 break;
1873         case UHF_PORT_POWER:
1874                 sc->sc_flags.port_powered = 1;
1875                 break;
1876         default:
1877                 err = USB_ERR_IOERROR;
1878                 goto done;
1879         }
1880         goto tr_valid;
1881
1882 tr_handle_get_port_status:
1883
1884         DPRINTFN(9, "UR_GET_PORT_STATUS\n");
1885
1886         if (index != 1) {
1887                 goto tr_stalled;
1888         }
1889         if (sc->sc_flags.status_vbus) {
1890                 avr32dci_clocks_on(sc);
1891                 avr32dci_pull_up(sc);
1892         } else {
1893                 avr32dci_pull_down(sc);
1894                 avr32dci_clocks_off(sc);
1895         }
1896
1897         /* Select Device Side Mode */
1898
1899         value = UPS_PORT_MODE_DEVICE;
1900
1901         /* Check for High Speed */
1902         if (AVR32_READ_4(sc, AVR32_INTSTA) & AVR32_INT_SPEED)
1903                 value |= UPS_HIGH_SPEED;
1904
1905         if (sc->sc_flags.port_powered) {
1906                 value |= UPS_PORT_POWER;
1907         }
1908         if (sc->sc_flags.port_enabled) {
1909                 value |= UPS_PORT_ENABLED;
1910         }
1911         if (sc->sc_flags.status_vbus &&
1912             sc->sc_flags.status_bus_reset) {
1913                 value |= UPS_CURRENT_CONNECT_STATUS;
1914         }
1915         if (sc->sc_flags.status_suspend) {
1916                 value |= UPS_SUSPEND;
1917         }
1918         USETW(sc->sc_hub_temp.ps.wPortStatus, value);
1919
1920         value = 0;
1921
1922         if (sc->sc_flags.change_connect) {
1923                 value |= UPS_C_CONNECT_STATUS;
1924         }
1925         if (sc->sc_flags.change_suspend) {
1926                 value |= UPS_C_SUSPEND;
1927         }
1928         USETW(sc->sc_hub_temp.ps.wPortChange, value);
1929         len = sizeof(sc->sc_hub_temp.ps);
1930         goto tr_valid;
1931
1932 tr_handle_get_class_descriptor:
1933         if (value & 0xFF) {
1934                 goto tr_stalled;
1935         }
1936         ptr = (const void *)&avr32dci_hubd;
1937         len = sizeof(avr32dci_hubd);
1938         goto tr_valid;
1939
1940 tr_stalled:
1941         err = USB_ERR_STALLED;
1942 tr_valid:
1943 done:
1944         *plength = len;
1945         *pptr = ptr;
1946         return (err);
1947 }
1948
1949 static void
1950 avr32dci_xfer_setup(struct usb_setup_params *parm)
1951 {
1952         const struct usb_hw_ep_profile *pf;
1953         struct avr32dci_softc *sc;
1954         struct usb_xfer *xfer;
1955         void *last_obj;
1956         uint32_t ntd;
1957         uint32_t n;
1958         uint8_t ep_no;
1959
1960         sc = AVR32_BUS2SC(parm->udev->bus);
1961         xfer = parm->curr_xfer;
1962
1963         /*
1964          * NOTE: This driver does not use any of the parameters that
1965          * are computed from the following values. Just set some
1966          * reasonable dummies:
1967          */
1968         parm->hc_max_packet_size = 0x400;
1969         parm->hc_max_packet_count = 1;
1970         parm->hc_max_frame_size = 0x400;
1971
1972         usbd_transfer_setup_sub(parm);
1973
1974         /*
1975          * compute maximum number of TDs
1976          */
1977         if ((xfer->pipe->edesc->bmAttributes & UE_XFERTYPE) == UE_CONTROL) {
1978
1979                 ntd = xfer->nframes + 1 /* STATUS */ + 1        /* SYNC 1 */
1980                     + 1 /* SYNC 2 */ ;
1981         } else {
1982
1983                 ntd = xfer->nframes + 1 /* SYNC */ ;
1984         }
1985
1986         /*
1987          * check if "usbd_transfer_setup_sub" set an error
1988          */
1989         if (parm->err)
1990                 return;
1991
1992         /*
1993          * allocate transfer descriptors
1994          */
1995         last_obj = NULL;
1996
1997         /*
1998          * get profile stuff
1999          */
2000         ep_no = xfer->endpoint & UE_ADDR;
2001         avr32dci_get_hw_ep_profile(parm->udev, &pf, ep_no);
2002
2003         if (pf == NULL) {
2004                 /* should not happen */
2005                 parm->err = USB_ERR_INVAL;
2006                 return;
2007         }
2008         /* align data */
2009         parm->size[0] += ((-parm->size[0]) & (USB_HOST_ALIGN - 1));
2010
2011         for (n = 0; n != ntd; n++) {
2012
2013                 struct avr32dci_td *td;
2014
2015                 if (parm->buf) {
2016                         uint32_t temp;
2017
2018                         td = USB_ADD_BYTES(parm->buf, parm->size[0]);
2019
2020                         /* init TD */
2021                         td->max_packet_size = xfer->max_packet_size;
2022                         td->ep_no = ep_no;
2023                         temp = pf->max_in_frame_size | pf->max_out_frame_size;
2024                         td->bank_shift = 0;
2025                         while ((temp /= 2))
2026                                 td->bank_shift++;
2027                         if (pf->support_multi_buffer) {
2028                                 td->support_multi_buffer = 1;
2029                         }
2030                         td->obj_next = last_obj;
2031
2032                         last_obj = td;
2033                 }
2034                 parm->size[0] += sizeof(*td);
2035         }
2036
2037         xfer->td_start[0] = last_obj;
2038 }
2039
2040 static void
2041 avr32dci_xfer_unsetup(struct usb_xfer *xfer)
2042 {
2043         return;
2044 }
2045
2046 static void
2047 avr32dci_ep_init(struct usb_device *udev, struct usb_endpoint_descriptor *edesc,
2048     struct usb_endpoint *ep)
2049 {
2050         struct avr32dci_softc *sc = AVR32_BUS2SC(udev->bus);
2051
2052         DPRINTFN(2, "pipe=%p, addr=%d, endpt=%d, mode=%d (%d,%d)\n",
2053             pipe, udev->address,
2054             edesc->bEndpointAddress, udev->flags.usb_mode,
2055             sc->sc_rt_addr, udev->device_index);
2056
2057         if (udev->device_index != sc->sc_rt_addr) {
2058
2059                 if (udev->flags.usb_mode != USB_MODE_DEVICE) {
2060                         /* not supported */
2061                         return;
2062                 }
2063                 if ((udev->speed != USB_SPEED_FULL) &&
2064                     (udev->speed != USB_SPEED_HIGH)) {
2065                         /* not supported */
2066                         return;
2067                 }
2068                 if ((edesc->bmAttributes & UE_XFERTYPE) == UE_ISOCHRONOUS)
2069                         pipe->methods = &avr32dci_device_isoc_fs_methods;
2070                 else
2071                         pipe->methods = &avr32dci_device_non_isoc_methods;
2072         }
2073 }
2074
2075 struct usb_bus_methods avr32dci_bus_methods =
2076 {
2077         .endpoint_init = &avr32dci_ep_init,
2078         .xfer_setup = &avr32dci_xfer_setup,
2079         .xfer_unsetup = &avr32dci_xfer_unsetup,
2080         .get_hw_ep_profile = &avr32dci_get_hw_ep_profile,
2081         .set_stall = &avr32dci_set_stall,
2082         .clear_stall = &avr32dci_clear_stall,
2083         .roothub_exec = &avr32dci_roothub_exec,
2084         .xfer_poll = &avr32dci_do_poll,
2085 };