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MFC r261004, r261005 and r261033:
[FreeBSD/stable/10.git] / sys / dev / usb / controller / ehci.c
1 /* $FreeBSD$ */
2 /*-
3  * Copyright (c) 2008 Hans Petter Selasky. All rights reserved.
4  * Copyright (c) 2004 The NetBSD Foundation, Inc. All rights reserved.
5  * Copyright (c) 2004 Lennart Augustsson. All rights reserved.
6  * Copyright (c) 2004 Charles M. Hannum. All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27  * SUCH DAMAGE.
28  */
29
30 /*
31  * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
32  *
33  * The EHCI 0.96 spec can be found at
34  * http://developer.intel.com/technology/usb/download/ehci-r096.pdf
35  * The EHCI 1.0 spec can be found at
36  * http://developer.intel.com/technology/usb/download/ehci-r10.pdf
37  * and the USB 2.0 spec at
38  * http://www.usb.org/developers/docs/usb_20.zip
39  *
40  */
41
42 /*
43  * TODO: 
44  * 1) command failures are not recovered correctly
45  */
46
47 #ifdef USB_GLOBAL_INCLUDE_FILE
48 #include USB_GLOBAL_INCLUDE_FILE
49 #else
50 #include <sys/stdint.h>
51 #include <sys/stddef.h>
52 #include <sys/param.h>
53 #include <sys/queue.h>
54 #include <sys/types.h>
55 #include <sys/systm.h>
56 #include <sys/kernel.h>
57 #include <sys/bus.h>
58 #include <sys/module.h>
59 #include <sys/lock.h>
60 #include <sys/mutex.h>
61 #include <sys/condvar.h>
62 #include <sys/sysctl.h>
63 #include <sys/sx.h>
64 #include <sys/unistd.h>
65 #include <sys/callout.h>
66 #include <sys/malloc.h>
67 #include <sys/priv.h>
68
69 #include <dev/usb/usb.h>
70 #include <dev/usb/usbdi.h>
71
72 #define USB_DEBUG_VAR ehcidebug
73
74 #include <dev/usb/usb_core.h>
75 #include <dev/usb/usb_debug.h>
76 #include <dev/usb/usb_busdma.h>
77 #include <dev/usb/usb_process.h>
78 #include <dev/usb/usb_transfer.h>
79 #include <dev/usb/usb_device.h>
80 #include <dev/usb/usb_hub.h>
81 #include <dev/usb/usb_util.h>
82
83 #include <dev/usb/usb_controller.h>
84 #include <dev/usb/usb_bus.h>
85 #endif                  /* USB_GLOBAL_INCLUDE_FILE */
86
87 #include <dev/usb/controller/ehci.h>
88 #include <dev/usb/controller/ehcireg.h>
89
90 #define EHCI_BUS2SC(bus) \
91    ((ehci_softc_t *)(((uint8_t *)(bus)) - \
92     ((uint8_t *)&(((ehci_softc_t *)0)->sc_bus))))
93
94 #ifdef USB_DEBUG
95 static int ehcidebug = 0;
96 static int ehcinohighspeed = 0;
97 static int ehciiaadbug = 0;
98 static int ehcilostintrbug = 0;
99
100 static SYSCTL_NODE(_hw_usb, OID_AUTO, ehci, CTLFLAG_RW, 0, "USB ehci");
101 SYSCTL_INT(_hw_usb_ehci, OID_AUTO, debug, CTLFLAG_RW | CTLFLAG_TUN,
102     &ehcidebug, 0, "Debug level");
103 TUNABLE_INT("hw.usb.ehci.debug", &ehcidebug);
104 SYSCTL_INT(_hw_usb_ehci, OID_AUTO, no_hs, CTLFLAG_RW | CTLFLAG_TUN,
105     &ehcinohighspeed, 0, "Disable High Speed USB");
106 TUNABLE_INT("hw.usb.ehci.no_hs", &ehcinohighspeed);
107 SYSCTL_INT(_hw_usb_ehci, OID_AUTO, iaadbug, CTLFLAG_RW | CTLFLAG_TUN,
108     &ehciiaadbug, 0, "Enable doorbell bug workaround");
109 TUNABLE_INT("hw.usb.ehci.iaadbug", &ehciiaadbug);
110 SYSCTL_INT(_hw_usb_ehci, OID_AUTO, lostintrbug, CTLFLAG_RW | CTLFLAG_TUN,
111     &ehcilostintrbug, 0, "Enable lost interrupt bug workaround");
112 TUNABLE_INT("hw.usb.ehci.lostintrbug", &ehcilostintrbug);
113
114
115 static void ehci_dump_regs(ehci_softc_t *sc);
116 static void ehci_dump_sqh(ehci_softc_t *sc, ehci_qh_t *sqh);
117
118 #endif
119
120 #define EHCI_INTR_ENDPT 1
121
122 extern struct usb_bus_methods ehci_bus_methods;
123 extern struct usb_pipe_methods ehci_device_bulk_methods;
124 extern struct usb_pipe_methods ehci_device_ctrl_methods;
125 extern struct usb_pipe_methods ehci_device_intr_methods;
126 extern struct usb_pipe_methods ehci_device_isoc_fs_methods;
127 extern struct usb_pipe_methods ehci_device_isoc_hs_methods;
128
129 static void ehci_do_poll(struct usb_bus *);
130 static void ehci_device_done(struct usb_xfer *, usb_error_t);
131 static uint8_t ehci_check_transfer(struct usb_xfer *);
132 static void ehci_timeout(void *);
133 static void ehci_poll_timeout(void *);
134
135 static void ehci_root_intr(ehci_softc_t *sc);
136
137 struct ehci_std_temp {
138         ehci_softc_t *sc;
139         struct usb_page_cache *pc;
140         ehci_qtd_t *td;
141         ehci_qtd_t *td_next;
142         uint32_t average;
143         uint32_t qtd_status;
144         uint32_t len;
145         uint16_t max_frame_size;
146         uint8_t shortpkt;
147         uint8_t auto_data_toggle;
148         uint8_t setup_alt_next;
149         uint8_t last_frame;
150 };
151
152 void
153 ehci_iterate_hw_softc(struct usb_bus *bus, usb_bus_mem_sub_cb_t *cb)
154 {
155         ehci_softc_t *sc = EHCI_BUS2SC(bus);
156         uint32_t i;
157
158         cb(bus, &sc->sc_hw.pframes_pc, &sc->sc_hw.pframes_pg,
159             sizeof(uint32_t) * EHCI_FRAMELIST_COUNT, EHCI_FRAMELIST_ALIGN);
160
161         cb(bus, &sc->sc_hw.terminate_pc, &sc->sc_hw.terminate_pg,
162             sizeof(struct ehci_qh_sub), EHCI_QH_ALIGN);
163
164         cb(bus, &sc->sc_hw.async_start_pc, &sc->sc_hw.async_start_pg,
165             sizeof(ehci_qh_t), EHCI_QH_ALIGN);
166
167         for (i = 0; i != EHCI_VIRTUAL_FRAMELIST_COUNT; i++) {
168                 cb(bus, sc->sc_hw.intr_start_pc + i,
169                     sc->sc_hw.intr_start_pg + i,
170                     sizeof(ehci_qh_t), EHCI_QH_ALIGN);
171         }
172
173         for (i = 0; i != EHCI_VIRTUAL_FRAMELIST_COUNT; i++) {
174                 cb(bus, sc->sc_hw.isoc_hs_start_pc + i,
175                     sc->sc_hw.isoc_hs_start_pg + i,
176                     sizeof(ehci_itd_t), EHCI_ITD_ALIGN);
177         }
178
179         for (i = 0; i != EHCI_VIRTUAL_FRAMELIST_COUNT; i++) {
180                 cb(bus, sc->sc_hw.isoc_fs_start_pc + i,
181                     sc->sc_hw.isoc_fs_start_pg + i,
182                     sizeof(ehci_sitd_t), EHCI_SITD_ALIGN);
183         }
184 }
185
186 usb_error_t
187 ehci_reset(ehci_softc_t *sc)
188 {
189         uint32_t hcr;
190         int i;
191
192         EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
193         for (i = 0; i < 100; i++) {
194                 usb_pause_mtx(NULL, hz / 128);
195                 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET;
196                 if (!hcr) {
197                         if (sc->sc_flags & (EHCI_SCFLG_SETMODE | EHCI_SCFLG_BIGEMMIO)) {
198                                 /*
199                                  * Force USBMODE as requested.  Controllers
200                                  * may have multiple operating modes.
201                                  */
202                                 uint32_t usbmode = EOREAD4(sc, EHCI_USBMODE);
203                                 if (sc->sc_flags & EHCI_SCFLG_SETMODE) {
204                                         usbmode = (usbmode &~ EHCI_UM_CM) | EHCI_UM_CM_HOST;
205                                         device_printf(sc->sc_bus.bdev,
206                                             "set host controller mode\n");
207                                 }
208                                 if (sc->sc_flags & EHCI_SCFLG_BIGEMMIO) {
209                                         usbmode = (usbmode &~ EHCI_UM_ES) | EHCI_UM_ES_BE;
210                                         device_printf(sc->sc_bus.bdev,
211                                             "set big-endian mode\n");
212                                 }
213                                 EOWRITE4(sc,  EHCI_USBMODE, usbmode);
214                         }
215                         return (0);
216                 }
217         }
218         device_printf(sc->sc_bus.bdev, "Reset timeout\n");
219         return (USB_ERR_IOERROR);
220 }
221
222 static usb_error_t
223 ehci_hcreset(ehci_softc_t *sc)
224 {
225         uint32_t hcr;
226         int i;
227
228         EOWRITE4(sc, EHCI_USBCMD, 0);   /* Halt controller */
229         for (i = 0; i < 100; i++) {
230                 usb_pause_mtx(NULL, hz / 128);
231                 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
232                 if (hcr)
233                         break;
234         }
235         if (!hcr)
236                 /*
237                  * Fall through and try reset anyway even though
238                  * Table 2-9 in the EHCI spec says this will result
239                  * in undefined behavior.
240                  */
241                 device_printf(sc->sc_bus.bdev, "stop timeout\n");
242
243         return (ehci_reset(sc));
244 }
245
246 static int
247 ehci_init_sub(struct ehci_softc *sc)
248 {
249         struct usb_page_search buf_res;
250         uint32_t cparams;
251         uint32_t hcr;
252         uint8_t i;
253
254         cparams = EREAD4(sc, EHCI_HCCPARAMS);
255
256         DPRINTF("cparams=0x%x\n", cparams);
257
258         if (EHCI_HCC_64BIT(cparams)) {
259                 DPRINTF("HCC uses 64-bit structures\n");
260
261                 /* MUST clear segment register if 64 bit capable */
262                 EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
263         }
264
265         usbd_get_page(&sc->sc_hw.pframes_pc, 0, &buf_res);
266         EOWRITE4(sc, EHCI_PERIODICLISTBASE, buf_res.physaddr);
267
268         usbd_get_page(&sc->sc_hw.async_start_pc, 0, &buf_res);
269         EOWRITE4(sc, EHCI_ASYNCLISTADDR, buf_res.physaddr | EHCI_LINK_QH);
270
271         /* enable interrupts */
272         EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
273
274         /* turn on controller */
275         EOWRITE4(sc, EHCI_USBCMD,
276             EHCI_CMD_ITC_1 |            /* 1 microframes interrupt delay */
277             (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) |
278             EHCI_CMD_ASE |
279             EHCI_CMD_PSE |
280             EHCI_CMD_RS);
281
282         /* Take over port ownership */
283         EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF);
284
285         for (i = 0; i < 100; i++) {
286                 usb_pause_mtx(NULL, hz / 128);
287                 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
288                 if (!hcr) {
289                         break;
290                 }
291         }
292         if (hcr) {
293                 device_printf(sc->sc_bus.bdev, "Run timeout\n");
294                 return (USB_ERR_IOERROR);
295         }
296         return (USB_ERR_NORMAL_COMPLETION);
297 }
298
299 usb_error_t
300 ehci_init(ehci_softc_t *sc)
301 {
302         struct usb_page_search buf_res;
303         uint32_t version;
304         uint32_t sparams;
305         uint16_t i;
306         uint16_t x;
307         uint16_t y;
308         uint16_t bit;
309         usb_error_t err = 0;
310
311         DPRINTF("start\n");
312
313         usb_callout_init_mtx(&sc->sc_tmo_pcd, &sc->sc_bus.bus_mtx, 0);
314         usb_callout_init_mtx(&sc->sc_tmo_poll, &sc->sc_bus.bus_mtx, 0);
315
316         sc->sc_offs = EHCI_CAPLENGTH(EREAD4(sc, EHCI_CAPLEN_HCIVERSION));
317
318 #ifdef USB_DEBUG
319         if (ehciiaadbug)
320                 sc->sc_flags |= EHCI_SCFLG_IAADBUG;
321         if (ehcilostintrbug)
322                 sc->sc_flags |= EHCI_SCFLG_LOSTINTRBUG;
323         if (ehcidebug > 2) {
324                 ehci_dump_regs(sc);
325         }
326 #endif
327
328         version = EHCI_HCIVERSION(EREAD4(sc, EHCI_CAPLEN_HCIVERSION));
329         device_printf(sc->sc_bus.bdev, "EHCI version %x.%x\n",
330             version >> 8, version & 0xff);
331
332         sparams = EREAD4(sc, EHCI_HCSPARAMS);
333         DPRINTF("sparams=0x%x\n", sparams);
334
335         sc->sc_noport = EHCI_HCS_N_PORTS(sparams);
336         sc->sc_bus.usbrev = USB_REV_2_0;
337
338         if (!(sc->sc_flags & EHCI_SCFLG_DONTRESET)) {
339                 /* Reset the controller */
340                 DPRINTF("%s: resetting\n",
341                     device_get_nameunit(sc->sc_bus.bdev));
342
343                 err = ehci_hcreset(sc);
344                 if (err) {
345                         device_printf(sc->sc_bus.bdev, "reset timeout\n");
346                         return (err);
347                 }
348         }
349
350         /*
351          * use current frame-list-size selection 0: 1024*4 bytes 1:  512*4
352          * bytes 2:  256*4 bytes 3:      unknown
353          */
354         if (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD)) == 3) {
355                 device_printf(sc->sc_bus.bdev, "invalid frame-list-size\n");
356                 return (USB_ERR_IOERROR);
357         }
358         /* set up the bus struct */
359         sc->sc_bus.methods = &ehci_bus_methods;
360
361         sc->sc_eintrs = EHCI_NORMAL_INTRS;
362
363         if (1) {
364                 struct ehci_qh_sub *qh;
365
366                 usbd_get_page(&sc->sc_hw.terminate_pc, 0, &buf_res);
367
368                 qh = buf_res.buffer;
369
370                 sc->sc_terminate_self = htohc32(sc, buf_res.physaddr);
371
372                 /* init terminate TD */
373                 qh->qtd_next =
374                     htohc32(sc, EHCI_LINK_TERMINATE);
375                 qh->qtd_altnext =
376                     htohc32(sc, EHCI_LINK_TERMINATE);
377                 qh->qtd_status =
378                     htohc32(sc, EHCI_QTD_HALTED);
379         }
380
381         for (i = 0; i < EHCI_VIRTUAL_FRAMELIST_COUNT; i++) {
382                 ehci_qh_t *qh;
383
384                 usbd_get_page(sc->sc_hw.intr_start_pc + i, 0, &buf_res);
385
386                 qh = buf_res.buffer;
387
388                 /* initialize page cache pointer */
389
390                 qh->page_cache = sc->sc_hw.intr_start_pc + i;
391
392                 /* store a pointer to queue head */
393
394                 sc->sc_intr_p_last[i] = qh;
395
396                 qh->qh_self =
397                     htohc32(sc, buf_res.physaddr) |
398                     htohc32(sc, EHCI_LINK_QH);
399
400                 qh->qh_endp =
401                     htohc32(sc, EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH));
402                 qh->qh_endphub =
403                     htohc32(sc, EHCI_QH_SET_MULT(1));
404                 qh->qh_curqtd = 0;
405
406                 qh->qh_qtd.qtd_next =
407                     htohc32(sc, EHCI_LINK_TERMINATE);
408                 qh->qh_qtd.qtd_altnext =
409                     htohc32(sc, EHCI_LINK_TERMINATE);
410                 qh->qh_qtd.qtd_status =
411                     htohc32(sc, EHCI_QTD_HALTED);
412         }
413
414         /*
415          * the QHs are arranged to give poll intervals that are
416          * powers of 2 times 1ms
417          */
418         bit = EHCI_VIRTUAL_FRAMELIST_COUNT / 2;
419         while (bit) {
420                 x = bit;
421                 while (x & bit) {
422                         ehci_qh_t *qh_x;
423                         ehci_qh_t *qh_y;
424
425                         y = (x ^ bit) | (bit / 2);
426
427                         qh_x = sc->sc_intr_p_last[x];
428                         qh_y = sc->sc_intr_p_last[y];
429
430                         /*
431                          * the next QH has half the poll interval
432                          */
433                         qh_x->qh_link = qh_y->qh_self;
434
435                         x++;
436                 }
437                 bit >>= 1;
438         }
439
440         if (1) {
441                 ehci_qh_t *qh;
442
443                 qh = sc->sc_intr_p_last[0];
444
445                 /* the last (1ms) QH terminates */
446                 qh->qh_link = htohc32(sc, EHCI_LINK_TERMINATE);
447         }
448         for (i = 0; i < EHCI_VIRTUAL_FRAMELIST_COUNT; i++) {
449                 ehci_sitd_t *sitd;
450                 ehci_itd_t *itd;
451
452                 usbd_get_page(sc->sc_hw.isoc_fs_start_pc + i, 0, &buf_res);
453
454                 sitd = buf_res.buffer;
455
456                 /* initialize page cache pointer */
457
458                 sitd->page_cache = sc->sc_hw.isoc_fs_start_pc + i;
459
460                 /* store a pointer to the transfer descriptor */
461
462                 sc->sc_isoc_fs_p_last[i] = sitd;
463
464                 /* initialize full speed isochronous */
465
466                 sitd->sitd_self =
467                     htohc32(sc, buf_res.physaddr) |
468                     htohc32(sc, EHCI_LINK_SITD);
469
470                 sitd->sitd_back =
471                     htohc32(sc, EHCI_LINK_TERMINATE);
472
473                 sitd->sitd_next =
474                     sc->sc_intr_p_last[i | (EHCI_VIRTUAL_FRAMELIST_COUNT / 2)]->qh_self;
475
476
477                 usbd_get_page(sc->sc_hw.isoc_hs_start_pc + i, 0, &buf_res);
478
479                 itd = buf_res.buffer;
480
481                 /* initialize page cache pointer */
482
483                 itd->page_cache = sc->sc_hw.isoc_hs_start_pc + i;
484
485                 /* store a pointer to the transfer descriptor */
486
487                 sc->sc_isoc_hs_p_last[i] = itd;
488
489                 /* initialize high speed isochronous */
490
491                 itd->itd_self =
492                     htohc32(sc, buf_res.physaddr) |
493                     htohc32(sc, EHCI_LINK_ITD);
494
495                 itd->itd_next =
496                     sitd->sitd_self;
497         }
498
499         usbd_get_page(&sc->sc_hw.pframes_pc, 0, &buf_res);
500
501         if (1) {
502                 uint32_t *pframes;
503
504                 pframes = buf_res.buffer;
505
506                 /*
507                  * execution order:
508                  * pframes -> high speed isochronous ->
509                  *    full speed isochronous -> interrupt QH's
510                  */
511                 for (i = 0; i < EHCI_FRAMELIST_COUNT; i++) {
512                         pframes[i] = sc->sc_isoc_hs_p_last
513                             [i & (EHCI_VIRTUAL_FRAMELIST_COUNT - 1)]->itd_self;
514                 }
515         }
516         usbd_get_page(&sc->sc_hw.async_start_pc, 0, &buf_res);
517
518         if (1) {
519
520                 ehci_qh_t *qh;
521
522                 qh = buf_res.buffer;
523
524                 /* initialize page cache pointer */
525
526                 qh->page_cache = &sc->sc_hw.async_start_pc;
527
528                 /* store a pointer to the queue head */
529
530                 sc->sc_async_p_last = qh;
531
532                 /* init dummy QH that starts the async list */
533
534                 qh->qh_self =
535                     htohc32(sc, buf_res.physaddr) |
536                     htohc32(sc, EHCI_LINK_QH);
537
538                 /* fill the QH */
539                 qh->qh_endp =
540                     htohc32(sc, EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL);
541                 qh->qh_endphub = htohc32(sc, EHCI_QH_SET_MULT(1));
542                 qh->qh_link = qh->qh_self;
543                 qh->qh_curqtd = 0;
544
545                 /* fill the overlay qTD */
546                 qh->qh_qtd.qtd_next = htohc32(sc, EHCI_LINK_TERMINATE);
547                 qh->qh_qtd.qtd_altnext = htohc32(sc, EHCI_LINK_TERMINATE);
548                 qh->qh_qtd.qtd_status = htohc32(sc, EHCI_QTD_HALTED);
549         }
550         /* flush all cache into memory */
551
552         usb_bus_mem_flush_all(&sc->sc_bus, &ehci_iterate_hw_softc);
553
554 #ifdef USB_DEBUG
555         if (ehcidebug) {
556                 ehci_dump_sqh(sc, sc->sc_async_p_last);
557         }
558 #endif
559
560         /* finial setup */
561         err = ehci_init_sub(sc);
562
563         if (!err) {
564                 /* catch any lost interrupts */
565                 ehci_do_poll(&sc->sc_bus);
566         }
567         return (err);
568 }
569
570 /*
571  * shut down the controller when the system is going down
572  */
573 void
574 ehci_detach(ehci_softc_t *sc)
575 {
576         USB_BUS_LOCK(&sc->sc_bus);
577
578         usb_callout_stop(&sc->sc_tmo_pcd);
579         usb_callout_stop(&sc->sc_tmo_poll);
580
581         EOWRITE4(sc, EHCI_USBINTR, 0);
582         USB_BUS_UNLOCK(&sc->sc_bus);
583
584         if (ehci_hcreset(sc)) {
585                 DPRINTF("reset failed!\n");
586         }
587
588         /* XXX let stray task complete */
589         usb_pause_mtx(NULL, hz / 20);
590
591         usb_callout_drain(&sc->sc_tmo_pcd);
592         usb_callout_drain(&sc->sc_tmo_poll);
593 }
594
595 static void
596 ehci_suspend(ehci_softc_t *sc)
597 {
598         DPRINTF("stopping the HC\n");
599
600         /* reset HC */
601         ehci_hcreset(sc);
602 }
603
604 static void
605 ehci_resume(ehci_softc_t *sc)
606 {
607         /* reset HC */
608         ehci_hcreset(sc);
609
610         /* setup HC */
611         ehci_init_sub(sc);
612
613         /* catch any lost interrupts */
614         ehci_do_poll(&sc->sc_bus);
615 }
616
617 #ifdef USB_DEBUG
618 static void
619 ehci_dump_regs(ehci_softc_t *sc)
620 {
621         uint32_t i;
622
623         i = EOREAD4(sc, EHCI_USBCMD);
624         printf("cmd=0x%08x\n", i);
625
626         if (i & EHCI_CMD_ITC_1)
627                 printf(" EHCI_CMD_ITC_1\n");
628         if (i & EHCI_CMD_ITC_2)
629                 printf(" EHCI_CMD_ITC_2\n");
630         if (i & EHCI_CMD_ITC_4)
631                 printf(" EHCI_CMD_ITC_4\n");
632         if (i & EHCI_CMD_ITC_8)
633                 printf(" EHCI_CMD_ITC_8\n");
634         if (i & EHCI_CMD_ITC_16)
635                 printf(" EHCI_CMD_ITC_16\n");
636         if (i & EHCI_CMD_ITC_32)
637                 printf(" EHCI_CMD_ITC_32\n");
638         if (i & EHCI_CMD_ITC_64)
639                 printf(" EHCI_CMD_ITC_64\n");
640         if (i & EHCI_CMD_ASPME)
641                 printf(" EHCI_CMD_ASPME\n");
642         if (i & EHCI_CMD_ASPMC)
643                 printf(" EHCI_CMD_ASPMC\n");
644         if (i & EHCI_CMD_LHCR)
645                 printf(" EHCI_CMD_LHCR\n");
646         if (i & EHCI_CMD_IAAD)
647                 printf(" EHCI_CMD_IAAD\n");
648         if (i & EHCI_CMD_ASE)
649                 printf(" EHCI_CMD_ASE\n");
650         if (i & EHCI_CMD_PSE)
651                 printf(" EHCI_CMD_PSE\n");
652         if (i & EHCI_CMD_FLS_M)
653                 printf(" EHCI_CMD_FLS_M\n");
654         if (i & EHCI_CMD_HCRESET)
655                 printf(" EHCI_CMD_HCRESET\n");
656         if (i & EHCI_CMD_RS)
657                 printf(" EHCI_CMD_RS\n");
658
659         i = EOREAD4(sc, EHCI_USBSTS);
660
661         printf("sts=0x%08x\n", i);
662
663         if (i & EHCI_STS_ASS)
664                 printf(" EHCI_STS_ASS\n");
665         if (i & EHCI_STS_PSS)
666                 printf(" EHCI_STS_PSS\n");
667         if (i & EHCI_STS_REC)
668                 printf(" EHCI_STS_REC\n");
669         if (i & EHCI_STS_HCH)
670                 printf(" EHCI_STS_HCH\n");
671         if (i & EHCI_STS_IAA)
672                 printf(" EHCI_STS_IAA\n");
673         if (i & EHCI_STS_HSE)
674                 printf(" EHCI_STS_HSE\n");
675         if (i & EHCI_STS_FLR)
676                 printf(" EHCI_STS_FLR\n");
677         if (i & EHCI_STS_PCD)
678                 printf(" EHCI_STS_PCD\n");
679         if (i & EHCI_STS_ERRINT)
680                 printf(" EHCI_STS_ERRINT\n");
681         if (i & EHCI_STS_INT)
682                 printf(" EHCI_STS_INT\n");
683
684         printf("ien=0x%08x\n",
685             EOREAD4(sc, EHCI_USBINTR));
686         printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n",
687             EOREAD4(sc, EHCI_FRINDEX),
688             EOREAD4(sc, EHCI_CTRLDSSEGMENT),
689             EOREAD4(sc, EHCI_PERIODICLISTBASE),
690             EOREAD4(sc, EHCI_ASYNCLISTADDR));
691         for (i = 1; i <= sc->sc_noport; i++) {
692                 printf("port %d status=0x%08x\n", i,
693                     EOREAD4(sc, EHCI_PORTSC(i)));
694         }
695 }
696
697 static void
698 ehci_dump_link(ehci_softc_t *sc, uint32_t link, int type)
699 {
700         link = hc32toh(sc, link);
701         printf("0x%08x", link);
702         if (link & EHCI_LINK_TERMINATE)
703                 printf("<T>");
704         else {
705                 printf("<");
706                 if (type) {
707                         switch (EHCI_LINK_TYPE(link)) {
708                         case EHCI_LINK_ITD:
709                                 printf("ITD");
710                                 break;
711                         case EHCI_LINK_QH:
712                                 printf("QH");
713                                 break;
714                         case EHCI_LINK_SITD:
715                                 printf("SITD");
716                                 break;
717                         case EHCI_LINK_FSTN:
718                                 printf("FSTN");
719                                 break;
720                         }
721                 }
722                 printf(">");
723         }
724 }
725
726 static void
727 ehci_dump_qtd(ehci_softc_t *sc, ehci_qtd_t *qtd)
728 {
729         uint32_t s;
730
731         printf("  next=");
732         ehci_dump_link(sc, qtd->qtd_next, 0);
733         printf(" altnext=");
734         ehci_dump_link(sc, qtd->qtd_altnext, 0);
735         printf("\n");
736         s = hc32toh(sc, qtd->qtd_status);
737         printf("  status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n",
738             s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s),
739             EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s));
740         printf("    cerr=%d pid=%d stat=%s%s%s%s%s%s%s%s\n",
741             EHCI_QTD_GET_CERR(s), EHCI_QTD_GET_PID(s),
742             (s & EHCI_QTD_ACTIVE) ? "ACTIVE" : "NOT_ACTIVE",
743             (s & EHCI_QTD_HALTED) ? "-HALTED" : "",
744             (s & EHCI_QTD_BUFERR) ? "-BUFERR" : "",
745             (s & EHCI_QTD_BABBLE) ? "-BABBLE" : "",
746             (s & EHCI_QTD_XACTERR) ? "-XACTERR" : "",
747             (s & EHCI_QTD_MISSEDMICRO) ? "-MISSED" : "",
748             (s & EHCI_QTD_SPLITXSTATE) ? "-SPLIT" : "",
749             (s & EHCI_QTD_PINGSTATE) ? "-PING" : "");
750
751         for (s = 0; s < 5; s++) {
752                 printf("  buffer[%d]=0x%08x\n", s,
753                     hc32toh(sc, qtd->qtd_buffer[s]));
754         }
755         for (s = 0; s < 5; s++) {
756                 printf("  buffer_hi[%d]=0x%08x\n", s,
757                     hc32toh(sc, qtd->qtd_buffer_hi[s]));
758         }
759 }
760
761 static uint8_t
762 ehci_dump_sqtd(ehci_softc_t *sc, ehci_qtd_t *sqtd)
763 {
764         uint8_t temp;
765
766         usb_pc_cpu_invalidate(sqtd->page_cache);
767         printf("QTD(%p) at 0x%08x:\n", sqtd, hc32toh(sc, sqtd->qtd_self));
768         ehci_dump_qtd(sc, sqtd);
769         temp = (sqtd->qtd_next & htohc32(sc, EHCI_LINK_TERMINATE)) ? 1 : 0;
770         return (temp);
771 }
772
773 static void
774 ehci_dump_sqtds(ehci_softc_t *sc, ehci_qtd_t *sqtd)
775 {
776         uint16_t i;
777         uint8_t stop;
778
779         stop = 0;
780         for (i = 0; sqtd && (i < 20) && !stop; sqtd = sqtd->obj_next, i++) {
781                 stop = ehci_dump_sqtd(sc, sqtd);
782         }
783         if (sqtd) {
784                 printf("dump aborted, too many TDs\n");
785         }
786 }
787
788 static void
789 ehci_dump_sqh(ehci_softc_t *sc, ehci_qh_t *qh)
790 {
791         uint32_t endp;
792         uint32_t endphub;
793
794         usb_pc_cpu_invalidate(qh->page_cache);
795         printf("QH(%p) at 0x%08x:\n", qh, hc32toh(sc, qh->qh_self) & ~0x1F);
796         printf("  link=");
797         ehci_dump_link(sc, qh->qh_link, 1);
798         printf("\n");
799         endp = hc32toh(sc, qh->qh_endp);
800         printf("  endp=0x%08x\n", endp);
801         printf("    addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n",
802             EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp),
803             EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp),
804             EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp));
805         printf("    mpl=0x%x ctl=%d nrl=%d\n",
806             EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp),
807             EHCI_QH_GET_NRL(endp));
808         endphub = hc32toh(sc, qh->qh_endphub);
809         printf("  endphub=0x%08x\n", endphub);
810         printf("    smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n",
811             EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub),
812             EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub),
813             EHCI_QH_GET_MULT(endphub));
814         printf("  curqtd=");
815         ehci_dump_link(sc, qh->qh_curqtd, 0);
816         printf("\n");
817         printf("Overlay qTD:\n");
818         ehci_dump_qtd(sc, (void *)&qh->qh_qtd);
819 }
820
821 static void
822 ehci_dump_sitd(ehci_softc_t *sc, ehci_sitd_t *sitd)
823 {
824         usb_pc_cpu_invalidate(sitd->page_cache);
825         printf("SITD(%p) at 0x%08x\n", sitd, hc32toh(sc, sitd->sitd_self) & ~0x1F);
826         printf(" next=0x%08x\n", hc32toh(sc, sitd->sitd_next));
827         printf(" portaddr=0x%08x dir=%s addr=%d endpt=0x%x port=0x%x huba=0x%x\n",
828             hc32toh(sc, sitd->sitd_portaddr),
829             (sitd->sitd_portaddr & htohc32(sc, EHCI_SITD_SET_DIR_IN))
830             ? "in" : "out",
831             EHCI_SITD_GET_ADDR(hc32toh(sc, sitd->sitd_portaddr)),
832             EHCI_SITD_GET_ENDPT(hc32toh(sc, sitd->sitd_portaddr)),
833             EHCI_SITD_GET_PORT(hc32toh(sc, sitd->sitd_portaddr)),
834             EHCI_SITD_GET_HUBA(hc32toh(sc, sitd->sitd_portaddr)));
835         printf(" mask=0x%08x\n", hc32toh(sc, sitd->sitd_mask));
836         printf(" status=0x%08x <%s> len=0x%x\n", hc32toh(sc, sitd->sitd_status),
837             (sitd->sitd_status & htohc32(sc, EHCI_SITD_ACTIVE)) ? "ACTIVE" : "",
838             EHCI_SITD_GET_LEN(hc32toh(sc, sitd->sitd_status)));
839         printf(" back=0x%08x, bp=0x%08x,0x%08x,0x%08x,0x%08x\n",
840             hc32toh(sc, sitd->sitd_back),
841             hc32toh(sc, sitd->sitd_bp[0]),
842             hc32toh(sc, sitd->sitd_bp[1]),
843             hc32toh(sc, sitd->sitd_bp_hi[0]),
844             hc32toh(sc, sitd->sitd_bp_hi[1]));
845 }
846
847 static void
848 ehci_dump_itd(ehci_softc_t *sc, ehci_itd_t *itd)
849 {
850         usb_pc_cpu_invalidate(itd->page_cache);
851         printf("ITD(%p) at 0x%08x\n", itd, hc32toh(sc, itd->itd_self) & ~0x1F);
852         printf(" next=0x%08x\n", hc32toh(sc, itd->itd_next));
853         printf(" status[0]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[0]),
854             (itd->itd_status[0] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
855         printf(" status[1]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[1]),
856             (itd->itd_status[1] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
857         printf(" status[2]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[2]),
858             (itd->itd_status[2] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
859         printf(" status[3]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[3]),
860             (itd->itd_status[3] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
861         printf(" status[4]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[4]),
862             (itd->itd_status[4] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
863         printf(" status[5]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[5]),
864             (itd->itd_status[5] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
865         printf(" status[6]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[6]),
866             (itd->itd_status[6] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
867         printf(" status[7]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[7]),
868             (itd->itd_status[7] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
869         printf(" bp[0]=0x%08x\n", hc32toh(sc, itd->itd_bp[0]));
870         printf("  addr=0x%02x; endpt=0x%01x\n",
871             EHCI_ITD_GET_ADDR(hc32toh(sc, itd->itd_bp[0])),
872             EHCI_ITD_GET_ENDPT(hc32toh(sc, itd->itd_bp[0])));
873         printf(" bp[1]=0x%08x\n", hc32toh(sc, itd->itd_bp[1]));
874         printf(" dir=%s; mpl=0x%02x\n",
875             (hc32toh(sc, itd->itd_bp[1]) & EHCI_ITD_SET_DIR_IN) ? "in" : "out",
876             EHCI_ITD_GET_MPL(hc32toh(sc, itd->itd_bp[1])));
877         printf(" bp[2..6]=0x%08x,0x%08x,0x%08x,0x%08x,0x%08x\n",
878             hc32toh(sc, itd->itd_bp[2]),
879             hc32toh(sc, itd->itd_bp[3]),
880             hc32toh(sc, itd->itd_bp[4]),
881             hc32toh(sc, itd->itd_bp[5]),
882             hc32toh(sc, itd->itd_bp[6]));
883         printf(" bp_hi=0x%08x,0x%08x,0x%08x,0x%08x,\n"
884             "       0x%08x,0x%08x,0x%08x\n",
885             hc32toh(sc, itd->itd_bp_hi[0]),
886             hc32toh(sc, itd->itd_bp_hi[1]),
887             hc32toh(sc, itd->itd_bp_hi[2]),
888             hc32toh(sc, itd->itd_bp_hi[3]),
889             hc32toh(sc, itd->itd_bp_hi[4]),
890             hc32toh(sc, itd->itd_bp_hi[5]),
891             hc32toh(sc, itd->itd_bp_hi[6]));
892 }
893
894 static void
895 ehci_dump_isoc(ehci_softc_t *sc)
896 {
897         ehci_itd_t *itd;
898         ehci_sitd_t *sitd;
899         uint16_t max = 1000;
900         uint16_t pos;
901
902         pos = (EOREAD4(sc, EHCI_FRINDEX) / 8) &
903             (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
904
905         printf("%s: isochronous dump from frame 0x%03x:\n",
906             __FUNCTION__, pos);
907
908         itd = sc->sc_isoc_hs_p_last[pos];
909         sitd = sc->sc_isoc_fs_p_last[pos];
910
911         while (itd && max && max--) {
912                 ehci_dump_itd(sc, itd);
913                 itd = itd->prev;
914         }
915
916         while (sitd && max && max--) {
917                 ehci_dump_sitd(sc, sitd);
918                 sitd = sitd->prev;
919         }
920 }
921
922 #endif
923
924 static void
925 ehci_transfer_intr_enqueue(struct usb_xfer *xfer)
926 {
927         /* check for early completion */
928         if (ehci_check_transfer(xfer)) {
929                 return;
930         }
931         /* put transfer on interrupt queue */
932         usbd_transfer_enqueue(&xfer->xroot->bus->intr_q, xfer);
933
934         /* start timeout, if any */
935         if (xfer->timeout != 0) {
936                 usbd_transfer_timeout_ms(xfer, &ehci_timeout, xfer->timeout);
937         }
938 }
939
940 #define EHCI_APPEND_FS_TD(std,last) (last) = _ehci_append_fs_td(std,last)
941 static ehci_sitd_t *
942 _ehci_append_fs_td(ehci_sitd_t *std, ehci_sitd_t *last)
943 {
944         DPRINTFN(11, "%p to %p\n", std, last);
945
946         /* (sc->sc_bus.mtx) must be locked */
947
948         std->next = last->next;
949         std->sitd_next = last->sitd_next;
950
951         std->prev = last;
952
953         usb_pc_cpu_flush(std->page_cache);
954
955         /*
956          * the last->next->prev is never followed: std->next->prev = std;
957          */
958         last->next = std;
959         last->sitd_next = std->sitd_self;
960
961         usb_pc_cpu_flush(last->page_cache);
962
963         return (std);
964 }
965
966 #define EHCI_APPEND_HS_TD(std,last) (last) = _ehci_append_hs_td(std,last)
967 static ehci_itd_t *
968 _ehci_append_hs_td(ehci_itd_t *std, ehci_itd_t *last)
969 {
970         DPRINTFN(11, "%p to %p\n", std, last);
971
972         /* (sc->sc_bus.mtx) must be locked */
973
974         std->next = last->next;
975         std->itd_next = last->itd_next;
976
977         std->prev = last;
978
979         usb_pc_cpu_flush(std->page_cache);
980
981         /*
982          * the last->next->prev is never followed: std->next->prev = std;
983          */
984         last->next = std;
985         last->itd_next = std->itd_self;
986
987         usb_pc_cpu_flush(last->page_cache);
988
989         return (std);
990 }
991
992 #define EHCI_APPEND_QH(sqh,last) (last) = _ehci_append_qh(sqh,last)
993 static ehci_qh_t *
994 _ehci_append_qh(ehci_qh_t *sqh, ehci_qh_t *last)
995 {
996         DPRINTFN(11, "%p to %p\n", sqh, last);
997
998         if (sqh->prev != NULL) {
999                 /* should not happen */
1000                 DPRINTFN(0, "QH already linked!\n");
1001                 return (last);
1002         }
1003         /* (sc->sc_bus.mtx) must be locked */
1004
1005         sqh->next = last->next;
1006         sqh->qh_link = last->qh_link;
1007
1008         sqh->prev = last;
1009
1010         usb_pc_cpu_flush(sqh->page_cache);
1011
1012         /*
1013          * the last->next->prev is never followed: sqh->next->prev = sqh;
1014          */
1015
1016         last->next = sqh;
1017         last->qh_link = sqh->qh_self;
1018
1019         usb_pc_cpu_flush(last->page_cache);
1020
1021         return (sqh);
1022 }
1023
1024 #define EHCI_REMOVE_FS_TD(std,last) (last) = _ehci_remove_fs_td(std,last)
1025 static ehci_sitd_t *
1026 _ehci_remove_fs_td(ehci_sitd_t *std, ehci_sitd_t *last)
1027 {
1028         DPRINTFN(11, "%p from %p\n", std, last);
1029
1030         /* (sc->sc_bus.mtx) must be locked */
1031
1032         std->prev->next = std->next;
1033         std->prev->sitd_next = std->sitd_next;
1034
1035         usb_pc_cpu_flush(std->prev->page_cache);
1036
1037         if (std->next) {
1038                 std->next->prev = std->prev;
1039                 usb_pc_cpu_flush(std->next->page_cache);
1040         }
1041         return ((last == std) ? std->prev : last);
1042 }
1043
1044 #define EHCI_REMOVE_HS_TD(std,last) (last) = _ehci_remove_hs_td(std,last)
1045 static ehci_itd_t *
1046 _ehci_remove_hs_td(ehci_itd_t *std, ehci_itd_t *last)
1047 {
1048         DPRINTFN(11, "%p from %p\n", std, last);
1049
1050         /* (sc->sc_bus.mtx) must be locked */
1051
1052         std->prev->next = std->next;
1053         std->prev->itd_next = std->itd_next;
1054
1055         usb_pc_cpu_flush(std->prev->page_cache);
1056
1057         if (std->next) {
1058                 std->next->prev = std->prev;
1059                 usb_pc_cpu_flush(std->next->page_cache);
1060         }
1061         return ((last == std) ? std->prev : last);
1062 }
1063
1064 #define EHCI_REMOVE_QH(sqh,last) (last) = _ehci_remove_qh(sqh,last)
1065 static ehci_qh_t *
1066 _ehci_remove_qh(ehci_qh_t *sqh, ehci_qh_t *last)
1067 {
1068         DPRINTFN(11, "%p from %p\n", sqh, last);
1069
1070         /* (sc->sc_bus.mtx) must be locked */
1071
1072         /* only remove if not removed from a queue */
1073         if (sqh->prev) {
1074
1075                 sqh->prev->next = sqh->next;
1076                 sqh->prev->qh_link = sqh->qh_link;
1077
1078                 usb_pc_cpu_flush(sqh->prev->page_cache);
1079
1080                 if (sqh->next) {
1081                         sqh->next->prev = sqh->prev;
1082                         usb_pc_cpu_flush(sqh->next->page_cache);
1083                 }
1084                 last = ((last == sqh) ? sqh->prev : last);
1085
1086                 sqh->prev = 0;
1087
1088                 usb_pc_cpu_flush(sqh->page_cache);
1089         }
1090         return (last);
1091 }
1092
1093 static void
1094 ehci_data_toggle_update(struct usb_xfer *xfer, uint16_t actlen, uint16_t xlen)
1095 {
1096         uint16_t rem;
1097         uint8_t dt;
1098
1099         /* count number of full packets */
1100         dt = (actlen / xfer->max_packet_size) & 1;
1101
1102         /* compute remainder */
1103         rem = actlen % xfer->max_packet_size;
1104
1105         if (rem > 0)
1106                 dt ^= 1;        /* short packet at the end */
1107         else if (actlen != xlen)
1108                 dt ^= 1;        /* zero length packet at the end */
1109         else if (xlen == 0)
1110                 dt ^= 1;        /* zero length transfer */
1111
1112         xfer->endpoint->toggle_next ^= dt;
1113 }
1114
1115 static usb_error_t
1116 ehci_non_isoc_done_sub(struct usb_xfer *xfer)
1117 {
1118         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
1119         ehci_qtd_t *td;
1120         ehci_qtd_t *td_alt_next;
1121         uint32_t status;
1122         uint16_t len;
1123
1124         td = xfer->td_transfer_cache;
1125         td_alt_next = td->alt_next;
1126
1127         if (xfer->aframes != xfer->nframes) {
1128                 usbd_xfer_set_frame_len(xfer, xfer->aframes, 0);
1129         }
1130         while (1) {
1131
1132                 usb_pc_cpu_invalidate(td->page_cache);
1133                 status = hc32toh(sc, td->qtd_status);
1134
1135                 len = EHCI_QTD_GET_BYTES(status);
1136
1137                 /*
1138                  * Verify the status length and
1139                  * add the length to "frlengths[]":
1140                  */
1141                 if (len > td->len) {
1142                         /* should not happen */
1143                         DPRINTF("Invalid status length, "
1144                             "0x%04x/0x%04x bytes\n", len, td->len);
1145                         status |= EHCI_QTD_HALTED;
1146                 } else if (xfer->aframes != xfer->nframes) {
1147                         xfer->frlengths[xfer->aframes] += td->len - len;
1148                         /* manually update data toggle */
1149                         ehci_data_toggle_update(xfer, td->len - len, td->len);
1150                 }
1151
1152                 /* Check for last transfer */
1153                 if (((void *)td) == xfer->td_transfer_last) {
1154                         td = NULL;
1155                         break;
1156                 }
1157                 /* Check for transfer error */
1158                 if (status & EHCI_QTD_HALTED) {
1159                         /* the transfer is finished */
1160                         td = NULL;
1161                         break;
1162                 }
1163                 /* Check for short transfer */
1164                 if (len > 0) {
1165                         if (xfer->flags_int.short_frames_ok) {
1166                                 /* follow alt next */
1167                                 td = td->alt_next;
1168                         } else {
1169                                 /* the transfer is finished */
1170                                 td = NULL;
1171                         }
1172                         break;
1173                 }
1174                 td = td->obj_next;
1175
1176                 if (td->alt_next != td_alt_next) {
1177                         /* this USB frame is complete */
1178                         break;
1179                 }
1180         }
1181
1182         /* update transfer cache */
1183
1184         xfer->td_transfer_cache = td;
1185
1186 #ifdef USB_DEBUG
1187         if (status & EHCI_QTD_STATERRS) {
1188                 DPRINTFN(11, "error, addr=%d, endpt=0x%02x, frame=0x%02x"
1189                     "status=%s%s%s%s%s%s%s%s\n",
1190                     xfer->address, xfer->endpointno, xfer->aframes,
1191                     (status & EHCI_QTD_ACTIVE) ? "[ACTIVE]" : "[NOT_ACTIVE]",
1192                     (status & EHCI_QTD_HALTED) ? "[HALTED]" : "",
1193                     (status & EHCI_QTD_BUFERR) ? "[BUFERR]" : "",
1194                     (status & EHCI_QTD_BABBLE) ? "[BABBLE]" : "",
1195                     (status & EHCI_QTD_XACTERR) ? "[XACTERR]" : "",
1196                     (status & EHCI_QTD_MISSEDMICRO) ? "[MISSED]" : "",
1197                     (status & EHCI_QTD_SPLITXSTATE) ? "[SPLIT]" : "",
1198                     (status & EHCI_QTD_PINGSTATE) ? "[PING]" : "");
1199         }
1200 #endif
1201         if (status & EHCI_QTD_HALTED) {
1202                 if ((xfer->xroot->udev->parent_hs_hub != NULL) ||
1203                     (xfer->xroot->udev->address != 0)) {
1204                         /* try to separate I/O errors from STALL */
1205                         if (EHCI_QTD_GET_CERR(status) == 0)
1206                                 return (USB_ERR_IOERROR);
1207                 }
1208                 return (USB_ERR_STALLED);
1209         }
1210         return (USB_ERR_NORMAL_COMPLETION);
1211 }
1212
1213 static void
1214 ehci_non_isoc_done(struct usb_xfer *xfer)
1215 {
1216         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
1217         ehci_qh_t *qh;
1218         uint32_t status;
1219         usb_error_t err = 0;
1220
1221         DPRINTFN(13, "xfer=%p endpoint=%p transfer done\n",
1222             xfer, xfer->endpoint);
1223
1224 #ifdef USB_DEBUG
1225         if (ehcidebug > 10) {
1226                 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
1227
1228                 ehci_dump_sqtds(sc, xfer->td_transfer_first);
1229         }
1230 #endif
1231
1232         /* extract data toggle directly from the QH's overlay area */
1233
1234         qh = xfer->qh_start[xfer->flags_int.curr_dma_set];
1235
1236         usb_pc_cpu_invalidate(qh->page_cache);
1237
1238         status = hc32toh(sc, qh->qh_qtd.qtd_status);
1239
1240         /* reset scanner */
1241
1242         xfer->td_transfer_cache = xfer->td_transfer_first;
1243
1244         if (xfer->flags_int.control_xfr) {
1245
1246                 if (xfer->flags_int.control_hdr) {
1247
1248                         err = ehci_non_isoc_done_sub(xfer);
1249                 }
1250                 xfer->aframes = 1;
1251
1252                 if (xfer->td_transfer_cache == NULL) {
1253                         goto done;
1254                 }
1255         }
1256         while (xfer->aframes != xfer->nframes) {
1257
1258                 err = ehci_non_isoc_done_sub(xfer);
1259                 xfer->aframes++;
1260
1261                 if (xfer->td_transfer_cache == NULL) {
1262                         goto done;
1263                 }
1264         }
1265
1266         if (xfer->flags_int.control_xfr &&
1267             !xfer->flags_int.control_act) {
1268
1269                 err = ehci_non_isoc_done_sub(xfer);
1270         }
1271 done:
1272         ehci_device_done(xfer, err);
1273 }
1274
1275 /*------------------------------------------------------------------------*
1276  *      ehci_check_transfer
1277  *
1278  * Return values:
1279  *    0: USB transfer is not finished
1280  * Else: USB transfer is finished
1281  *------------------------------------------------------------------------*/
1282 static uint8_t
1283 ehci_check_transfer(struct usb_xfer *xfer)
1284 {
1285         struct usb_pipe_methods *methods = xfer->endpoint->methods;
1286         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
1287
1288         uint32_t status;
1289
1290         DPRINTFN(13, "xfer=%p checking transfer\n", xfer);
1291
1292         if (methods == &ehci_device_isoc_fs_methods) {
1293                 ehci_sitd_t *td;
1294
1295                 /* isochronous full speed transfer */
1296
1297                 td = xfer->td_transfer_last;
1298                 usb_pc_cpu_invalidate(td->page_cache);
1299                 status = hc32toh(sc, td->sitd_status);
1300
1301                 /* also check if first is complete */
1302
1303                 td = xfer->td_transfer_first;
1304                 usb_pc_cpu_invalidate(td->page_cache);
1305                 status |= hc32toh(sc, td->sitd_status);
1306
1307                 if (!(status & EHCI_SITD_ACTIVE)) {
1308                         ehci_device_done(xfer, USB_ERR_NORMAL_COMPLETION);
1309                         goto transferred;
1310                 }
1311         } else if (methods == &ehci_device_isoc_hs_methods) {
1312                 ehci_itd_t *td;
1313
1314                 /* isochronous high speed transfer */
1315
1316                 /* check last transfer */
1317                 td = xfer->td_transfer_last;
1318                 usb_pc_cpu_invalidate(td->page_cache);
1319                 status = td->itd_status[0];
1320                 status |= td->itd_status[1];
1321                 status |= td->itd_status[2];
1322                 status |= td->itd_status[3];
1323                 status |= td->itd_status[4];
1324                 status |= td->itd_status[5];
1325                 status |= td->itd_status[6];
1326                 status |= td->itd_status[7];
1327
1328                 /* also check first transfer */
1329                 td = xfer->td_transfer_first;
1330                 usb_pc_cpu_invalidate(td->page_cache);
1331                 status |= td->itd_status[0];
1332                 status |= td->itd_status[1];
1333                 status |= td->itd_status[2];
1334                 status |= td->itd_status[3];
1335                 status |= td->itd_status[4];
1336                 status |= td->itd_status[5];
1337                 status |= td->itd_status[6];
1338                 status |= td->itd_status[7];
1339
1340                 /* if no transactions are active we continue */
1341                 if (!(status & htohc32(sc, EHCI_ITD_ACTIVE))) {
1342                         ehci_device_done(xfer, USB_ERR_NORMAL_COMPLETION);
1343                         goto transferred;
1344                 }
1345         } else {
1346                 ehci_qtd_t *td;
1347                 ehci_qh_t *qh;
1348
1349                 /* non-isochronous transfer */
1350
1351                 /*
1352                  * check whether there is an error somewhere in the middle,
1353                  * or whether there was a short packet (SPD and not ACTIVE)
1354                  */
1355                 td = xfer->td_transfer_cache;
1356
1357                 qh = xfer->qh_start[xfer->flags_int.curr_dma_set];
1358
1359                 usb_pc_cpu_invalidate(qh->page_cache);
1360
1361                 status = hc32toh(sc, qh->qh_qtd.qtd_status);
1362                 if (status & EHCI_QTD_ACTIVE) {
1363                         /* transfer is pending */
1364                         goto done;
1365                 }
1366
1367                 while (1) {
1368                         usb_pc_cpu_invalidate(td->page_cache);
1369                         status = hc32toh(sc, td->qtd_status);
1370
1371                         /*
1372                          * Check if there is an active TD which
1373                          * indicates that the transfer isn't done.
1374                          */
1375                         if (status & EHCI_QTD_ACTIVE) {
1376                                 /* update cache */
1377                                 xfer->td_transfer_cache = td;
1378                                 goto done;
1379                         }
1380                         /*
1381                          * last transfer descriptor makes the transfer done
1382                          */
1383                         if (((void *)td) == xfer->td_transfer_last) {
1384                                 break;
1385                         }
1386                         /*
1387                          * any kind of error makes the transfer done
1388                          */
1389                         if (status & EHCI_QTD_HALTED) {
1390                                 break;
1391                         }
1392                         /*
1393                          * if there is no alternate next transfer, a short
1394                          * packet also makes the transfer done
1395                          */
1396                         if (EHCI_QTD_GET_BYTES(status)) {
1397                                 if (xfer->flags_int.short_frames_ok) {
1398                                         /* follow alt next */
1399                                         if (td->alt_next) {
1400                                                 td = td->alt_next;
1401                                                 continue;
1402                                         }
1403                                 }
1404                                 /* transfer is done */
1405                                 break;
1406                         }
1407                         td = td->obj_next;
1408                 }
1409                 ehci_non_isoc_done(xfer);
1410                 goto transferred;
1411         }
1412
1413 done:
1414         DPRINTFN(13, "xfer=%p is still active\n", xfer);
1415         return (0);
1416
1417 transferred:
1418         return (1);
1419 }
1420
1421 static void
1422 ehci_pcd_enable(ehci_softc_t *sc)
1423 {
1424         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1425
1426         sc->sc_eintrs |= EHCI_STS_PCD;
1427         EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
1428
1429         /* acknowledge any PCD interrupt */
1430         EOWRITE4(sc, EHCI_USBSTS, EHCI_STS_PCD);
1431
1432         ehci_root_intr(sc);
1433 }
1434
1435 static void
1436 ehci_interrupt_poll(ehci_softc_t *sc)
1437 {
1438         struct usb_xfer *xfer;
1439
1440 repeat:
1441         TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
1442                 /*
1443                  * check if transfer is transferred
1444                  */
1445                 if (ehci_check_transfer(xfer)) {
1446                         /* queue has been modified */
1447                         goto repeat;
1448                 }
1449         }
1450 }
1451
1452 /*
1453  * Some EHCI chips from VIA / ATI seem to trigger interrupts before
1454  * writing back the qTD status, or miss signalling occasionally under
1455  * heavy load.  If the host machine is too fast, we can miss
1456  * transaction completion - when we scan the active list the
1457  * transaction still seems to be active. This generally exhibits
1458  * itself as a umass stall that never recovers.
1459  *
1460  * We work around this behaviour by setting up this callback after any
1461  * softintr that completes with transactions still pending, giving us
1462  * another chance to check for completion after the writeback has
1463  * taken place.
1464  */
1465 static void
1466 ehci_poll_timeout(void *arg)
1467 {
1468         ehci_softc_t *sc = arg;
1469
1470         DPRINTFN(3, "\n");
1471         ehci_interrupt_poll(sc);
1472 }
1473
1474 /*------------------------------------------------------------------------*
1475  *      ehci_interrupt - EHCI interrupt handler
1476  *
1477  * NOTE: Do not access "sc->sc_bus.bdev" inside the interrupt handler,
1478  * hence the interrupt handler will be setup before "sc->sc_bus.bdev"
1479  * is present !
1480  *------------------------------------------------------------------------*/
1481 void
1482 ehci_interrupt(ehci_softc_t *sc)
1483 {
1484         uint32_t status;
1485
1486         USB_BUS_LOCK(&sc->sc_bus);
1487
1488         DPRINTFN(16, "real interrupt\n");
1489
1490 #ifdef USB_DEBUG
1491         if (ehcidebug > 15) {
1492                 ehci_dump_regs(sc);
1493         }
1494 #endif
1495
1496         status = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
1497         if (status == 0) {
1498                 /* the interrupt was not for us */
1499                 goto done;
1500         }
1501         if (!(status & sc->sc_eintrs)) {
1502                 goto done;
1503         }
1504         EOWRITE4(sc, EHCI_USBSTS, status);      /* acknowledge */
1505
1506         status &= sc->sc_eintrs;
1507
1508         if (status & EHCI_STS_HSE) {
1509                 printf("%s: unrecoverable error, "
1510                     "controller halted\n", __FUNCTION__);
1511 #ifdef USB_DEBUG
1512                 ehci_dump_regs(sc);
1513                 ehci_dump_isoc(sc);
1514 #endif
1515         }
1516         if (status & EHCI_STS_PCD) {
1517                 /*
1518                  * Disable PCD interrupt for now, because it will be
1519                  * on until the port has been reset.
1520                  */
1521                 sc->sc_eintrs &= ~EHCI_STS_PCD;
1522                 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
1523
1524                 ehci_root_intr(sc);
1525
1526                 /* do not allow RHSC interrupts > 1 per second */
1527                 usb_callout_reset(&sc->sc_tmo_pcd, hz,
1528                     (void *)&ehci_pcd_enable, sc);
1529         }
1530         status &= ~(EHCI_STS_INT | EHCI_STS_ERRINT | EHCI_STS_PCD | EHCI_STS_IAA);
1531
1532         if (status != 0) {
1533                 /* block unprocessed interrupts */
1534                 sc->sc_eintrs &= ~status;
1535                 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
1536                 printf("%s: blocking interrupts 0x%x\n", __FUNCTION__, status);
1537         }
1538         /* poll all the USB transfers */
1539         ehci_interrupt_poll(sc);
1540
1541         if (sc->sc_flags & EHCI_SCFLG_LOSTINTRBUG) {
1542                 usb_callout_reset(&sc->sc_tmo_poll, hz / 128,
1543                     (void *)&ehci_poll_timeout, sc);
1544         }
1545
1546 done:
1547         USB_BUS_UNLOCK(&sc->sc_bus);
1548 }
1549
1550 /*
1551  * called when a request does not complete
1552  */
1553 static void
1554 ehci_timeout(void *arg)
1555 {
1556         struct usb_xfer *xfer = arg;
1557
1558         DPRINTF("xfer=%p\n", xfer);
1559
1560         USB_BUS_LOCK_ASSERT(xfer->xroot->bus, MA_OWNED);
1561
1562         /* transfer is transferred */
1563         ehci_device_done(xfer, USB_ERR_TIMEOUT);
1564 }
1565
1566 static void
1567 ehci_do_poll(struct usb_bus *bus)
1568 {
1569         ehci_softc_t *sc = EHCI_BUS2SC(bus);
1570
1571         USB_BUS_LOCK(&sc->sc_bus);
1572         ehci_interrupt_poll(sc);
1573         USB_BUS_UNLOCK(&sc->sc_bus);
1574 }
1575
1576 static void
1577 ehci_setup_standard_chain_sub(struct ehci_std_temp *temp)
1578 {
1579         struct usb_page_search buf_res;
1580         ehci_qtd_t *td;
1581         ehci_qtd_t *td_next;
1582         ehci_qtd_t *td_alt_next;
1583         uint32_t buf_offset;
1584         uint32_t average;
1585         uint32_t len_old;
1586         uint32_t terminate;
1587         uint32_t qtd_altnext;
1588         uint8_t shortpkt_old;
1589         uint8_t precompute;
1590
1591         terminate = temp->sc->sc_terminate_self;
1592         qtd_altnext = temp->sc->sc_terminate_self;
1593         td_alt_next = NULL;
1594         buf_offset = 0;
1595         shortpkt_old = temp->shortpkt;
1596         len_old = temp->len;
1597         precompute = 1;
1598
1599 restart:
1600
1601         td = temp->td;
1602         td_next = temp->td_next;
1603
1604         while (1) {
1605
1606                 if (temp->len == 0) {
1607
1608                         if (temp->shortpkt) {
1609                                 break;
1610                         }
1611                         /* send a Zero Length Packet, ZLP, last */
1612
1613                         temp->shortpkt = 1;
1614                         average = 0;
1615
1616                 } else {
1617
1618                         average = temp->average;
1619
1620                         if (temp->len < average) {
1621                                 if (temp->len % temp->max_frame_size) {
1622                                         temp->shortpkt = 1;
1623                                 }
1624                                 average = temp->len;
1625                         }
1626                 }
1627
1628                 if (td_next == NULL) {
1629                         panic("%s: out of EHCI transfer descriptors!", __FUNCTION__);
1630                 }
1631                 /* get next TD */
1632
1633                 td = td_next;
1634                 td_next = td->obj_next;
1635
1636                 /* check if we are pre-computing */
1637
1638                 if (precompute) {
1639
1640                         /* update remaining length */
1641
1642                         temp->len -= average;
1643
1644                         continue;
1645                 }
1646                 /* fill out current TD */
1647
1648                 td->qtd_status =
1649                     temp->qtd_status |
1650                     htohc32(temp->sc, EHCI_QTD_IOC |
1651                         EHCI_QTD_SET_BYTES(average));
1652
1653                 if (average == 0) {
1654
1655                         if (temp->auto_data_toggle == 0) {
1656
1657                                 /* update data toggle, ZLP case */
1658
1659                                 temp->qtd_status ^=
1660                                     htohc32(temp->sc, EHCI_QTD_TOGGLE_MASK);
1661                         }
1662                         td->len = 0;
1663
1664                         /* properly reset reserved fields */
1665                         td->qtd_buffer[0] = 0;
1666                         td->qtd_buffer[1] = 0;
1667                         td->qtd_buffer[2] = 0;
1668                         td->qtd_buffer[3] = 0;
1669                         td->qtd_buffer[4] = 0;
1670                         td->qtd_buffer_hi[0] = 0;
1671                         td->qtd_buffer_hi[1] = 0;
1672                         td->qtd_buffer_hi[2] = 0;
1673                         td->qtd_buffer_hi[3] = 0;
1674                         td->qtd_buffer_hi[4] = 0;
1675                 } else {
1676
1677                         uint8_t x;
1678
1679                         if (temp->auto_data_toggle == 0) {
1680
1681                                 /* update data toggle */
1682
1683                                 if (((average + temp->max_frame_size - 1) /
1684                                     temp->max_frame_size) & 1) {
1685                                         temp->qtd_status ^=
1686                                             htohc32(temp->sc, EHCI_QTD_TOGGLE_MASK);
1687                                 }
1688                         }
1689                         td->len = average;
1690
1691                         /* update remaining length */
1692
1693                         temp->len -= average;
1694
1695                         /* fill out buffer pointers */
1696
1697                         usbd_get_page(temp->pc, buf_offset, &buf_res);
1698                         td->qtd_buffer[0] =
1699                             htohc32(temp->sc, buf_res.physaddr);
1700                         td->qtd_buffer_hi[0] = 0;
1701
1702                         x = 1;
1703
1704                         while (average > EHCI_PAGE_SIZE) {
1705                                 average -= EHCI_PAGE_SIZE;
1706                                 buf_offset += EHCI_PAGE_SIZE;
1707                                 usbd_get_page(temp->pc, buf_offset, &buf_res);
1708                                 td->qtd_buffer[x] =
1709                                     htohc32(temp->sc,
1710                                     buf_res.physaddr & (~0xFFF));
1711                                 td->qtd_buffer_hi[x] = 0;
1712                                 x++;
1713                         }
1714
1715                         /*
1716                          * NOTE: The "average" variable is never zero after
1717                          * exiting the loop above !
1718                          *
1719                          * NOTE: We have to subtract one from the offset to
1720                          * ensure that we are computing the physical address
1721                          * of a valid page !
1722                          */
1723                         buf_offset += average;
1724                         usbd_get_page(temp->pc, buf_offset - 1, &buf_res);
1725                         td->qtd_buffer[x] =
1726                             htohc32(temp->sc,
1727                             buf_res.physaddr & (~0xFFF));
1728                         td->qtd_buffer_hi[x] = 0;
1729
1730                         /* properly reset reserved fields */
1731                         while (++x < EHCI_QTD_NBUFFERS) {
1732                                 td->qtd_buffer[x] = 0;
1733                                 td->qtd_buffer_hi[x] = 0;
1734                         }
1735                 }
1736
1737                 if (td_next) {
1738                         /* link the current TD with the next one */
1739                         td->qtd_next = td_next->qtd_self;
1740                 }
1741                 td->qtd_altnext = qtd_altnext;
1742                 td->alt_next = td_alt_next;
1743
1744                 usb_pc_cpu_flush(td->page_cache);
1745         }
1746
1747         if (precompute) {
1748                 precompute = 0;
1749
1750                 /* setup alt next pointer, if any */
1751                 if (temp->last_frame) {
1752                         td_alt_next = NULL;
1753                         qtd_altnext = terminate;
1754                 } else {
1755                         /* we use this field internally */
1756                         td_alt_next = td_next;
1757                         if (temp->setup_alt_next) {
1758                                 qtd_altnext = td_next->qtd_self;
1759                         } else {
1760                                 qtd_altnext = terminate;
1761                         }
1762                 }
1763
1764                 /* restore */
1765                 temp->shortpkt = shortpkt_old;
1766                 temp->len = len_old;
1767                 goto restart;
1768         }
1769         temp->td = td;
1770         temp->td_next = td_next;
1771 }
1772
1773 static void
1774 ehci_setup_standard_chain(struct usb_xfer *xfer, ehci_qh_t **qh_last)
1775 {
1776         struct ehci_std_temp temp;
1777         struct usb_pipe_methods *methods;
1778         ehci_qh_t *qh;
1779         ehci_qtd_t *td;
1780         uint32_t qh_endp;
1781         uint32_t qh_endphub;
1782         uint32_t x;
1783
1784         DPRINTFN(9, "addr=%d endpt=%d sumlen=%d speed=%d\n",
1785             xfer->address, UE_GET_ADDR(xfer->endpointno),
1786             xfer->sumlen, usbd_get_speed(xfer->xroot->udev));
1787
1788         temp.average = xfer->max_hc_frame_size;
1789         temp.max_frame_size = xfer->max_frame_size;
1790         temp.sc = EHCI_BUS2SC(xfer->xroot->bus);
1791
1792         /* toggle the DMA set we are using */
1793         xfer->flags_int.curr_dma_set ^= 1;
1794
1795         /* get next DMA set */
1796         td = xfer->td_start[xfer->flags_int.curr_dma_set];
1797
1798         xfer->td_transfer_first = td;
1799         xfer->td_transfer_cache = td;
1800
1801         temp.td = NULL;
1802         temp.td_next = td;
1803         temp.qtd_status = 0;
1804         temp.last_frame = 0;
1805         temp.setup_alt_next = xfer->flags_int.short_frames_ok;
1806
1807         if (xfer->flags_int.control_xfr) {
1808                 if (xfer->endpoint->toggle_next) {
1809                         /* DATA1 is next */
1810                         temp.qtd_status |=
1811                             htohc32(temp.sc, EHCI_QTD_SET_TOGGLE(1));
1812                 }
1813                 temp.auto_data_toggle = 0;
1814         } else {
1815                 temp.auto_data_toggle = 1;
1816         }
1817
1818         if ((xfer->xroot->udev->parent_hs_hub != NULL) ||
1819             (xfer->xroot->udev->address != 0)) {
1820                 /* max 3 retries */
1821                 temp.qtd_status |=
1822                     htohc32(temp.sc, EHCI_QTD_SET_CERR(3));
1823         }
1824         /* check if we should prepend a setup message */
1825
1826         if (xfer->flags_int.control_xfr) {
1827                 if (xfer->flags_int.control_hdr) {
1828
1829                         xfer->endpoint->toggle_next = 0;
1830
1831                         temp.qtd_status &=
1832                             htohc32(temp.sc, EHCI_QTD_SET_CERR(3));
1833                         temp.qtd_status |= htohc32(temp.sc,
1834                             EHCI_QTD_ACTIVE |
1835                             EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) |
1836                             EHCI_QTD_SET_TOGGLE(0));
1837
1838                         temp.len = xfer->frlengths[0];
1839                         temp.pc = xfer->frbuffers + 0;
1840                         temp.shortpkt = temp.len ? 1 : 0;
1841                         /* check for last frame */
1842                         if (xfer->nframes == 1) {
1843                                 /* no STATUS stage yet, SETUP is last */
1844                                 if (xfer->flags_int.control_act) {
1845                                         temp.last_frame = 1;
1846                                         temp.setup_alt_next = 0;
1847                                 }
1848                         }
1849                         ehci_setup_standard_chain_sub(&temp);
1850                 }
1851                 x = 1;
1852         } else {
1853                 x = 0;
1854         }
1855
1856         while (x != xfer->nframes) {
1857
1858                 /* DATA0 / DATA1 message */
1859
1860                 temp.len = xfer->frlengths[x];
1861                 temp.pc = xfer->frbuffers + x;
1862
1863                 x++;
1864
1865                 if (x == xfer->nframes) {
1866                         if (xfer->flags_int.control_xfr) {
1867                                 /* no STATUS stage yet, DATA is last */
1868                                 if (xfer->flags_int.control_act) {
1869                                         temp.last_frame = 1;
1870                                         temp.setup_alt_next = 0;
1871                                 }
1872                         } else {
1873                                 temp.last_frame = 1;
1874                                 temp.setup_alt_next = 0;
1875                         }
1876                 }
1877                 /* keep previous data toggle and error count */
1878
1879                 temp.qtd_status &=
1880                     htohc32(temp.sc, EHCI_QTD_SET_CERR(3) |
1881                     EHCI_QTD_SET_TOGGLE(1));
1882
1883                 if (temp.len == 0) {
1884
1885                         /* make sure that we send an USB packet */
1886
1887                         temp.shortpkt = 0;
1888
1889                 } else {
1890
1891                         /* regular data transfer */
1892
1893                         temp.shortpkt = (xfer->flags.force_short_xfer) ? 0 : 1;
1894                 }
1895
1896                 /* set endpoint direction */
1897
1898                 temp.qtd_status |=
1899                     (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN) ?
1900                     htohc32(temp.sc, EHCI_QTD_ACTIVE |
1901                     EHCI_QTD_SET_PID(EHCI_QTD_PID_IN)) :
1902                     htohc32(temp.sc, EHCI_QTD_ACTIVE |
1903                     EHCI_QTD_SET_PID(EHCI_QTD_PID_OUT));
1904
1905                 ehci_setup_standard_chain_sub(&temp);
1906         }
1907
1908         /* check if we should append a status stage */
1909
1910         if (xfer->flags_int.control_xfr &&
1911             !xfer->flags_int.control_act) {
1912
1913                 /*
1914                  * Send a DATA1 message and invert the current endpoint
1915                  * direction.
1916                  */
1917
1918                 temp.qtd_status &= htohc32(temp.sc, EHCI_QTD_SET_CERR(3) |
1919                     EHCI_QTD_SET_TOGGLE(1));
1920                 temp.qtd_status |=
1921                     (UE_GET_DIR(xfer->endpointno) == UE_DIR_OUT) ?
1922                     htohc32(temp.sc, EHCI_QTD_ACTIVE |
1923                     EHCI_QTD_SET_PID(EHCI_QTD_PID_IN) |
1924                     EHCI_QTD_SET_TOGGLE(1)) :
1925                     htohc32(temp.sc, EHCI_QTD_ACTIVE |
1926                     EHCI_QTD_SET_PID(EHCI_QTD_PID_OUT) |
1927                     EHCI_QTD_SET_TOGGLE(1));
1928
1929                 temp.len = 0;
1930                 temp.pc = NULL;
1931                 temp.shortpkt = 0;
1932                 temp.last_frame = 1;
1933                 temp.setup_alt_next = 0;
1934
1935                 ehci_setup_standard_chain_sub(&temp);
1936         }
1937         td = temp.td;
1938
1939         /* the last TD terminates the transfer: */
1940         td->qtd_next = htohc32(temp.sc, EHCI_LINK_TERMINATE);
1941         td->qtd_altnext = htohc32(temp.sc, EHCI_LINK_TERMINATE);
1942
1943         usb_pc_cpu_flush(td->page_cache);
1944
1945         /* must have at least one frame! */
1946
1947         xfer->td_transfer_last = td;
1948
1949 #ifdef USB_DEBUG
1950         if (ehcidebug > 8) {
1951                 DPRINTF("nexttog=%d; data before transfer:\n",
1952                     xfer->endpoint->toggle_next);
1953                 ehci_dump_sqtds(temp.sc,
1954                     xfer->td_transfer_first);
1955         }
1956 #endif
1957
1958         methods = xfer->endpoint->methods;
1959
1960         qh = xfer->qh_start[xfer->flags_int.curr_dma_set];
1961
1962         /* the "qh_link" field is filled when the QH is added */
1963
1964         qh_endp =
1965             (EHCI_QH_SET_ADDR(xfer->address) |
1966             EHCI_QH_SET_ENDPT(UE_GET_ADDR(xfer->endpointno)) |
1967             EHCI_QH_SET_MPL(xfer->max_packet_size));
1968
1969         if (usbd_get_speed(xfer->xroot->udev) == USB_SPEED_HIGH) {
1970                 qh_endp |= EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH);
1971                 if (methods != &ehci_device_intr_methods)
1972                         qh_endp |= EHCI_QH_SET_NRL(8);
1973         } else {
1974
1975                 if (usbd_get_speed(xfer->xroot->udev) == USB_SPEED_FULL) {
1976                         qh_endp |= EHCI_QH_SET_EPS(EHCI_QH_SPEED_FULL);
1977                 } else {
1978                         qh_endp |= EHCI_QH_SET_EPS(EHCI_QH_SPEED_LOW);
1979                 }
1980
1981                 if (methods == &ehci_device_ctrl_methods) {
1982                         qh_endp |= EHCI_QH_CTL;
1983                 }
1984                 if (methods != &ehci_device_intr_methods) {
1985                         /* Only try one time per microframe! */
1986                         qh_endp |= EHCI_QH_SET_NRL(1);
1987                 }
1988         }
1989
1990         if (temp.auto_data_toggle == 0) {
1991                 /* software computes the data toggle */
1992                 qh_endp |= EHCI_QH_DTC;
1993         }
1994
1995         qh->qh_endp = htohc32(temp.sc, qh_endp);
1996
1997         qh_endphub =
1998             (EHCI_QH_SET_MULT(xfer->max_packet_count & 3) |
1999             EHCI_QH_SET_CMASK(xfer->endpoint->usb_cmask) |
2000             EHCI_QH_SET_SMASK(xfer->endpoint->usb_smask) |
2001             EHCI_QH_SET_HUBA(xfer->xroot->udev->hs_hub_addr) |
2002             EHCI_QH_SET_PORT(xfer->xroot->udev->hs_port_no));
2003
2004         qh->qh_endphub = htohc32(temp.sc, qh_endphub);
2005         qh->qh_curqtd = 0;
2006
2007         /* fill the overlay qTD */
2008
2009         if (temp.auto_data_toggle && xfer->endpoint->toggle_next) {
2010                 /* DATA1 is next */
2011                 qh->qh_qtd.qtd_status = htohc32(temp.sc, EHCI_QTD_SET_TOGGLE(1));
2012         } else {
2013                 qh->qh_qtd.qtd_status = 0;
2014         }
2015
2016         td = xfer->td_transfer_first;
2017
2018         qh->qh_qtd.qtd_next = td->qtd_self;
2019         qh->qh_qtd.qtd_altnext =
2020             htohc32(temp.sc, EHCI_LINK_TERMINATE);
2021
2022         /* properly reset reserved fields */
2023         qh->qh_qtd.qtd_buffer[0] = 0;
2024         qh->qh_qtd.qtd_buffer[1] = 0;
2025         qh->qh_qtd.qtd_buffer[2] = 0;
2026         qh->qh_qtd.qtd_buffer[3] = 0;
2027         qh->qh_qtd.qtd_buffer[4] = 0;
2028         qh->qh_qtd.qtd_buffer_hi[0] = 0;
2029         qh->qh_qtd.qtd_buffer_hi[1] = 0;
2030         qh->qh_qtd.qtd_buffer_hi[2] = 0;
2031         qh->qh_qtd.qtd_buffer_hi[3] = 0;
2032         qh->qh_qtd.qtd_buffer_hi[4] = 0;
2033
2034         usb_pc_cpu_flush(qh->page_cache);
2035
2036         if (xfer->xroot->udev->flags.self_suspended == 0) {
2037                 EHCI_APPEND_QH(qh, *qh_last);
2038         }
2039 }
2040
2041 static void
2042 ehci_root_intr(ehci_softc_t *sc)
2043 {
2044         uint16_t i;
2045         uint16_t m;
2046
2047         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
2048
2049         /* clear any old interrupt data */
2050         memset(sc->sc_hub_idata, 0, sizeof(sc->sc_hub_idata));
2051
2052         /* set bits */
2053         m = (sc->sc_noport + 1);
2054         if (m > (8 * sizeof(sc->sc_hub_idata))) {
2055                 m = (8 * sizeof(sc->sc_hub_idata));
2056         }
2057         for (i = 1; i < m; i++) {
2058                 /* pick out CHANGE bits from the status register */
2059                 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) {
2060                         sc->sc_hub_idata[i / 8] |= 1 << (i % 8);
2061                         DPRINTF("port %d changed\n", i);
2062                 }
2063         }
2064         uhub_root_intr(&sc->sc_bus, sc->sc_hub_idata,
2065             sizeof(sc->sc_hub_idata));
2066 }
2067
2068 static void
2069 ehci_isoc_fs_done(ehci_softc_t *sc, struct usb_xfer *xfer)
2070 {
2071         uint32_t nframes = xfer->nframes;
2072         uint32_t status;
2073         uint32_t *plen = xfer->frlengths;
2074         uint16_t len = 0;
2075         ehci_sitd_t *td = xfer->td_transfer_first;
2076         ehci_sitd_t **pp_last = &sc->sc_isoc_fs_p_last[xfer->qh_pos];
2077
2078         DPRINTFN(13, "xfer=%p endpoint=%p transfer done\n",
2079             xfer, xfer->endpoint);
2080
2081         while (nframes--) {
2082                 if (td == NULL) {
2083                         panic("%s:%d: out of TD's\n",
2084                             __FUNCTION__, __LINE__);
2085                 }
2086                 if (pp_last >= &sc->sc_isoc_fs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT]) {
2087                         pp_last = &sc->sc_isoc_fs_p_last[0];
2088                 }
2089 #ifdef USB_DEBUG
2090                 if (ehcidebug > 15) {
2091                         DPRINTF("isoc FS-TD\n");
2092                         ehci_dump_sitd(sc, td);
2093                 }
2094 #endif
2095                 usb_pc_cpu_invalidate(td->page_cache);
2096                 status = hc32toh(sc, td->sitd_status);
2097
2098                 len = EHCI_SITD_GET_LEN(status);
2099
2100                 DPRINTFN(2, "status=0x%08x, rem=%u\n", status, len);
2101
2102                 if (*plen >= len) {
2103                         len = *plen - len;
2104                 } else {
2105                         len = 0;
2106                 }
2107
2108                 *plen = len;
2109
2110                 /* remove FS-TD from schedule */
2111                 EHCI_REMOVE_FS_TD(td, *pp_last);
2112
2113                 pp_last++;
2114                 plen++;
2115                 td = td->obj_next;
2116         }
2117
2118         xfer->aframes = xfer->nframes;
2119 }
2120
2121 static void
2122 ehci_isoc_hs_done(ehci_softc_t *sc, struct usb_xfer *xfer)
2123 {
2124         uint32_t nframes = xfer->nframes;
2125         uint32_t status;
2126         uint32_t *plen = xfer->frlengths;
2127         uint16_t len = 0;
2128         uint8_t td_no = 0;
2129         ehci_itd_t *td = xfer->td_transfer_first;
2130         ehci_itd_t **pp_last = &sc->sc_isoc_hs_p_last[xfer->qh_pos];
2131
2132         DPRINTFN(13, "xfer=%p endpoint=%p transfer done\n",
2133             xfer, xfer->endpoint);
2134
2135         while (nframes) {
2136                 if (td == NULL) {
2137                         panic("%s:%d: out of TD's\n",
2138                             __FUNCTION__, __LINE__);
2139                 }
2140                 if (pp_last >= &sc->sc_isoc_hs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT]) {
2141                         pp_last = &sc->sc_isoc_hs_p_last[0];
2142                 }
2143 #ifdef USB_DEBUG
2144                 if (ehcidebug > 15) {
2145                         DPRINTF("isoc HS-TD\n");
2146                         ehci_dump_itd(sc, td);
2147                 }
2148 #endif
2149
2150                 usb_pc_cpu_invalidate(td->page_cache);
2151                 status = hc32toh(sc, td->itd_status[td_no]);
2152
2153                 len = EHCI_ITD_GET_LEN(status);
2154
2155                 DPRINTFN(2, "status=0x%08x, len=%u\n", status, len);
2156
2157                 if (xfer->endpoint->usb_smask & (1 << td_no)) {
2158
2159                         if (*plen >= len) {
2160                                 /*
2161                                  * The length is valid. NOTE: The
2162                                  * complete length is written back
2163                                  * into the status field, and not the
2164                                  * remainder like with other transfer
2165                                  * descriptor types.
2166                                  */
2167                         } else {
2168                                 /* Invalid length - truncate */
2169                                 len = 0;
2170                         }
2171
2172                         *plen = len;
2173                         plen++;
2174                         nframes--;
2175                 }
2176
2177                 td_no++;
2178
2179                 if ((td_no == 8) || (nframes == 0)) {
2180                         /* remove HS-TD from schedule */
2181                         EHCI_REMOVE_HS_TD(td, *pp_last);
2182                         pp_last++;
2183
2184                         td_no = 0;
2185                         td = td->obj_next;
2186                 }
2187         }
2188         xfer->aframes = xfer->nframes;
2189 }
2190
2191 /* NOTE: "done" can be run two times in a row,
2192  * from close and from interrupt
2193  */
2194 static void
2195 ehci_device_done(struct usb_xfer *xfer, usb_error_t error)
2196 {
2197         struct usb_pipe_methods *methods = xfer->endpoint->methods;
2198         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2199
2200         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
2201
2202         DPRINTFN(2, "xfer=%p, endpoint=%p, error=%d\n",
2203             xfer, xfer->endpoint, error);
2204
2205         if ((methods == &ehci_device_bulk_methods) ||
2206             (methods == &ehci_device_ctrl_methods)) {
2207 #ifdef USB_DEBUG
2208                 if (ehcidebug > 8) {
2209                         DPRINTF("nexttog=%d; data after transfer:\n",
2210                             xfer->endpoint->toggle_next);
2211                         ehci_dump_sqtds(sc,
2212                             xfer->td_transfer_first);
2213                 }
2214 #endif
2215
2216                 EHCI_REMOVE_QH(xfer->qh_start[xfer->flags_int.curr_dma_set],
2217                     sc->sc_async_p_last);
2218         }
2219         if (methods == &ehci_device_intr_methods) {
2220                 EHCI_REMOVE_QH(xfer->qh_start[xfer->flags_int.curr_dma_set],
2221                     sc->sc_intr_p_last[xfer->qh_pos]);
2222         }
2223         /*
2224          * Only finish isochronous transfers once which will update
2225          * "xfer->frlengths".
2226          */
2227         if (xfer->td_transfer_first &&
2228             xfer->td_transfer_last) {
2229                 if (methods == &ehci_device_isoc_fs_methods) {
2230                         ehci_isoc_fs_done(sc, xfer);
2231                 }
2232                 if (methods == &ehci_device_isoc_hs_methods) {
2233                         ehci_isoc_hs_done(sc, xfer);
2234                 }
2235                 xfer->td_transfer_first = NULL;
2236                 xfer->td_transfer_last = NULL;
2237         }
2238         /* dequeue transfer and start next transfer */
2239         usbd_transfer_done(xfer, error);
2240 }
2241
2242 /*------------------------------------------------------------------------*
2243  * ehci bulk support
2244  *------------------------------------------------------------------------*/
2245 static void
2246 ehci_device_bulk_open(struct usb_xfer *xfer)
2247 {
2248         return;
2249 }
2250
2251 static void
2252 ehci_device_bulk_close(struct usb_xfer *xfer)
2253 {
2254         ehci_device_done(xfer, USB_ERR_CANCELLED);
2255 }
2256
2257 static void
2258 ehci_device_bulk_enter(struct usb_xfer *xfer)
2259 {
2260         return;
2261 }
2262
2263 static void
2264 ehci_device_bulk_start(struct usb_xfer *xfer)
2265 {
2266         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2267         uint32_t temp;
2268
2269         /* setup TD's and QH */
2270         ehci_setup_standard_chain(xfer, &sc->sc_async_p_last);
2271
2272         /* put transfer on interrupt queue */
2273         ehci_transfer_intr_enqueue(xfer);
2274
2275         /* 
2276          * XXX Certain nVidia chipsets choke when using the IAAD
2277          * feature too frequently.
2278          */
2279         if (sc->sc_flags & EHCI_SCFLG_IAADBUG)
2280                 return;
2281
2282         /* XXX Performance quirk: Some Host Controllers have a too low
2283          * interrupt rate. Issue an IAAD to stimulate the Host
2284          * Controller after queueing the BULK transfer.
2285          */
2286         temp = EOREAD4(sc, EHCI_USBCMD);
2287         if (!(temp & EHCI_CMD_IAAD))
2288                 EOWRITE4(sc, EHCI_USBCMD, temp | EHCI_CMD_IAAD);
2289 }
2290
2291 struct usb_pipe_methods ehci_device_bulk_methods =
2292 {
2293         .open = ehci_device_bulk_open,
2294         .close = ehci_device_bulk_close,
2295         .enter = ehci_device_bulk_enter,
2296         .start = ehci_device_bulk_start,
2297 };
2298
2299 /*------------------------------------------------------------------------*
2300  * ehci control support
2301  *------------------------------------------------------------------------*/
2302 static void
2303 ehci_device_ctrl_open(struct usb_xfer *xfer)
2304 {
2305         return;
2306 }
2307
2308 static void
2309 ehci_device_ctrl_close(struct usb_xfer *xfer)
2310 {
2311         ehci_device_done(xfer, USB_ERR_CANCELLED);
2312 }
2313
2314 static void
2315 ehci_device_ctrl_enter(struct usb_xfer *xfer)
2316 {
2317         return;
2318 }
2319
2320 static void
2321 ehci_device_ctrl_start(struct usb_xfer *xfer)
2322 {
2323         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2324
2325         /* setup TD's and QH */
2326         ehci_setup_standard_chain(xfer, &sc->sc_async_p_last);
2327
2328         /* put transfer on interrupt queue */
2329         ehci_transfer_intr_enqueue(xfer);
2330 }
2331
2332 struct usb_pipe_methods ehci_device_ctrl_methods =
2333 {
2334         .open = ehci_device_ctrl_open,
2335         .close = ehci_device_ctrl_close,
2336         .enter = ehci_device_ctrl_enter,
2337         .start = ehci_device_ctrl_start,
2338 };
2339
2340 /*------------------------------------------------------------------------*
2341  * ehci interrupt support
2342  *------------------------------------------------------------------------*/
2343 static void
2344 ehci_device_intr_open(struct usb_xfer *xfer)
2345 {
2346         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2347         uint16_t best;
2348         uint16_t bit;
2349         uint16_t x;
2350
2351         usb_hs_bandwidth_alloc(xfer);
2352
2353         /*
2354          * Find the best QH position corresponding to the given interval:
2355          */
2356
2357         best = 0;
2358         bit = EHCI_VIRTUAL_FRAMELIST_COUNT / 2;
2359         while (bit) {
2360                 if (xfer->interval >= bit) {
2361                         x = bit;
2362                         best = bit;
2363                         while (x & bit) {
2364                                 if (sc->sc_intr_stat[x] <
2365                                     sc->sc_intr_stat[best]) {
2366                                         best = x;
2367                                 }
2368                                 x++;
2369                         }
2370                         break;
2371                 }
2372                 bit >>= 1;
2373         }
2374
2375         sc->sc_intr_stat[best]++;
2376         xfer->qh_pos = best;
2377
2378         DPRINTFN(3, "best=%d interval=%d\n",
2379             best, xfer->interval);
2380 }
2381
2382 static void
2383 ehci_device_intr_close(struct usb_xfer *xfer)
2384 {
2385         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2386
2387         sc->sc_intr_stat[xfer->qh_pos]--;
2388
2389         ehci_device_done(xfer, USB_ERR_CANCELLED);
2390
2391         /* bandwidth must be freed after device done */
2392         usb_hs_bandwidth_free(xfer);
2393 }
2394
2395 static void
2396 ehci_device_intr_enter(struct usb_xfer *xfer)
2397 {
2398         return;
2399 }
2400
2401 static void
2402 ehci_device_intr_start(struct usb_xfer *xfer)
2403 {
2404         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2405
2406         /* setup TD's and QH */
2407         ehci_setup_standard_chain(xfer, &sc->sc_intr_p_last[xfer->qh_pos]);
2408
2409         /* put transfer on interrupt queue */
2410         ehci_transfer_intr_enqueue(xfer);
2411 }
2412
2413 struct usb_pipe_methods ehci_device_intr_methods =
2414 {
2415         .open = ehci_device_intr_open,
2416         .close = ehci_device_intr_close,
2417         .enter = ehci_device_intr_enter,
2418         .start = ehci_device_intr_start,
2419 };
2420
2421 /*------------------------------------------------------------------------*
2422  * ehci full speed isochronous support
2423  *------------------------------------------------------------------------*/
2424 static void
2425 ehci_device_isoc_fs_open(struct usb_xfer *xfer)
2426 {
2427         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2428         ehci_sitd_t *td;
2429         uint32_t sitd_portaddr;
2430         uint8_t ds;
2431
2432         sitd_portaddr =
2433             EHCI_SITD_SET_ADDR(xfer->address) |
2434             EHCI_SITD_SET_ENDPT(UE_GET_ADDR(xfer->endpointno)) |
2435             EHCI_SITD_SET_HUBA(xfer->xroot->udev->hs_hub_addr) |
2436             EHCI_SITD_SET_PORT(xfer->xroot->udev->hs_port_no);
2437
2438         if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN)
2439                 sitd_portaddr |= EHCI_SITD_SET_DIR_IN;
2440
2441         sitd_portaddr = htohc32(sc, sitd_portaddr);
2442
2443         /* initialize all TD's */
2444
2445         for (ds = 0; ds != 2; ds++) {
2446
2447                 for (td = xfer->td_start[ds]; td; td = td->obj_next) {
2448
2449                         td->sitd_portaddr = sitd_portaddr;
2450
2451                         /*
2452                          * TODO: make some kind of automatic
2453                          * SMASK/CMASK selection based on micro-frame
2454                          * usage
2455                          *
2456                          * micro-frame usage (8 microframes per 1ms)
2457                          */
2458                         td->sitd_back = htohc32(sc, EHCI_LINK_TERMINATE);
2459
2460                         usb_pc_cpu_flush(td->page_cache);
2461                 }
2462         }
2463 }
2464
2465 static void
2466 ehci_device_isoc_fs_close(struct usb_xfer *xfer)
2467 {
2468         ehci_device_done(xfer, USB_ERR_CANCELLED);
2469 }
2470
2471 static void
2472 ehci_device_isoc_fs_enter(struct usb_xfer *xfer)
2473 {
2474         struct usb_page_search buf_res;
2475         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2476         ehci_sitd_t *td;
2477         ehci_sitd_t *td_last = NULL;
2478         ehci_sitd_t **pp_last;
2479         uint32_t *plen;
2480         uint32_t buf_offset;
2481         uint32_t nframes;
2482         uint32_t temp;
2483         uint32_t sitd_mask;
2484         uint16_t tlen;
2485         uint8_t sa;
2486         uint8_t sb;
2487
2488 #ifdef USB_DEBUG
2489         uint8_t once = 1;
2490
2491 #endif
2492
2493         DPRINTFN(6, "xfer=%p next=%d nframes=%d\n",
2494             xfer, xfer->endpoint->isoc_next, xfer->nframes);
2495
2496         /* get the current frame index */
2497
2498         nframes = EOREAD4(sc, EHCI_FRINDEX) / 8;
2499
2500         /*
2501          * check if the frame index is within the window where the frames
2502          * will be inserted
2503          */
2504         buf_offset = (nframes - xfer->endpoint->isoc_next) &
2505             (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2506
2507         if ((xfer->endpoint->is_synced == 0) ||
2508             (buf_offset < xfer->nframes)) {
2509                 /*
2510                  * If there is data underflow or the pipe queue is empty we
2511                  * schedule the transfer a few frames ahead of the current
2512                  * frame position. Else two isochronous transfers might
2513                  * overlap.
2514                  */
2515                 xfer->endpoint->isoc_next = (nframes + 3) &
2516                     (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2517                 xfer->endpoint->is_synced = 1;
2518                 DPRINTFN(3, "start next=%d\n", xfer->endpoint->isoc_next);
2519         }
2520         /*
2521          * compute how many milliseconds the insertion is ahead of the
2522          * current frame position:
2523          */
2524         buf_offset = (xfer->endpoint->isoc_next - nframes) &
2525             (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2526
2527         /*
2528          * pre-compute when the isochronous transfer will be finished:
2529          */
2530         xfer->isoc_time_complete =
2531             usb_isoc_time_expand(&sc->sc_bus, nframes) +
2532             buf_offset + xfer->nframes;
2533
2534         /* get the real number of frames */
2535
2536         nframes = xfer->nframes;
2537
2538         buf_offset = 0;
2539
2540         plen = xfer->frlengths;
2541
2542         /* toggle the DMA set we are using */
2543         xfer->flags_int.curr_dma_set ^= 1;
2544
2545         /* get next DMA set */
2546         td = xfer->td_start[xfer->flags_int.curr_dma_set];
2547         xfer->td_transfer_first = td;
2548
2549         pp_last = &sc->sc_isoc_fs_p_last[xfer->endpoint->isoc_next];
2550
2551         /* store starting position */
2552
2553         xfer->qh_pos = xfer->endpoint->isoc_next;
2554
2555         while (nframes--) {
2556                 if (td == NULL) {
2557                         panic("%s:%d: out of TD's\n",
2558                             __FUNCTION__, __LINE__);
2559                 }
2560                 if (pp_last >= &sc->sc_isoc_fs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT])
2561                         pp_last = &sc->sc_isoc_fs_p_last[0];
2562
2563                 /* reuse sitd_portaddr and sitd_back from last transfer */
2564
2565                 if (*plen > xfer->max_frame_size) {
2566 #ifdef USB_DEBUG
2567                         if (once) {
2568                                 once = 0;
2569                                 printf("%s: frame length(%d) exceeds %d "
2570                                     "bytes (frame truncated)\n",
2571                                     __FUNCTION__, *plen,
2572                                     xfer->max_frame_size);
2573                         }
2574 #endif
2575                         *plen = xfer->max_frame_size;
2576                 }
2577
2578                 /* allocate a slot */
2579
2580                 sa = usbd_fs_isoc_schedule_alloc_slot(xfer,
2581                     xfer->isoc_time_complete - nframes - 1);
2582
2583                 if (sa == 255) {
2584                         /*
2585                          * Schedule is FULL, set length to zero:
2586                          */
2587
2588                         *plen = 0;
2589                         sa = USB_FS_ISOC_UFRAME_MAX - 1;
2590                 }
2591                 if (*plen) {
2592                         /*
2593                          * only call "usbd_get_page()" when we have a
2594                          * non-zero length
2595                          */
2596                         usbd_get_page(xfer->frbuffers, buf_offset, &buf_res);
2597                         td->sitd_bp[0] = htohc32(sc, buf_res.physaddr);
2598                         buf_offset += *plen;
2599                         /*
2600                          * NOTE: We need to subtract one from the offset so
2601                          * that we are on a valid page!
2602                          */
2603                         usbd_get_page(xfer->frbuffers, buf_offset - 1,
2604                             &buf_res);
2605                         temp = buf_res.physaddr & ~0xFFF;
2606                 } else {
2607                         td->sitd_bp[0] = 0;
2608                         temp = 0;
2609                 }
2610
2611                 if (UE_GET_DIR(xfer->endpointno) == UE_DIR_OUT) {
2612                         tlen = *plen;
2613                         if (tlen <= 188) {
2614                                 temp |= 1;      /* T-count = 1, TP = ALL */
2615                                 tlen = 1;
2616                         } else {
2617                                 tlen += 187;
2618                                 tlen /= 188;
2619                                 temp |= tlen;   /* T-count = [1..6] */
2620                                 temp |= 8;      /* TP = Begin */
2621                         }
2622
2623                         tlen += sa;
2624
2625                         if (tlen >= 8) {
2626                                 sb = 0;
2627                         } else {
2628                                 sb = (1 << tlen);
2629                         }
2630
2631                         sa = (1 << sa);
2632                         sa = (sb - sa) & 0x3F;
2633                         sb = 0;
2634                 } else {
2635                         sb = (-(4 << sa)) & 0xFE;
2636                         sa = (1 << sa) & 0x3F;
2637                 }
2638
2639                 sitd_mask = (EHCI_SITD_SET_SMASK(sa) |
2640                     EHCI_SITD_SET_CMASK(sb));
2641
2642                 td->sitd_bp[1] = htohc32(sc, temp);
2643
2644                 td->sitd_mask = htohc32(sc, sitd_mask);
2645
2646                 if (nframes == 0) {
2647                         td->sitd_status = htohc32(sc,
2648                             EHCI_SITD_IOC |
2649                             EHCI_SITD_ACTIVE |
2650                             EHCI_SITD_SET_LEN(*plen));
2651                 } else {
2652                         td->sitd_status = htohc32(sc,
2653                             EHCI_SITD_ACTIVE |
2654                             EHCI_SITD_SET_LEN(*plen));
2655                 }
2656                 usb_pc_cpu_flush(td->page_cache);
2657
2658 #ifdef USB_DEBUG
2659                 if (ehcidebug > 15) {
2660                         DPRINTF("FS-TD %d\n", nframes);
2661                         ehci_dump_sitd(sc, td);
2662                 }
2663 #endif
2664                 /* insert TD into schedule */
2665                 EHCI_APPEND_FS_TD(td, *pp_last);
2666                 pp_last++;
2667
2668                 plen++;
2669                 td_last = td;
2670                 td = td->obj_next;
2671         }
2672
2673         xfer->td_transfer_last = td_last;
2674
2675         /* update isoc_next */
2676         xfer->endpoint->isoc_next = (pp_last - &sc->sc_isoc_fs_p_last[0]) &
2677             (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2678
2679         /*
2680          * We don't allow cancelling of the SPLIT transaction USB FULL
2681          * speed transfer, because it disturbs the bandwidth
2682          * computation algorithm.
2683          */
2684         xfer->flags_int.can_cancel_immed = 0;
2685 }
2686
2687 static void
2688 ehci_device_isoc_fs_start(struct usb_xfer *xfer)
2689 {
2690         /*
2691          * We don't allow cancelling of the SPLIT transaction USB FULL
2692          * speed transfer, because it disturbs the bandwidth
2693          * computation algorithm.
2694          */
2695         xfer->flags_int.can_cancel_immed = 0;
2696
2697         /* set a default timeout */
2698         if (xfer->timeout == 0)
2699                 xfer->timeout = 500; /* ms */
2700
2701         /* put transfer on interrupt queue */
2702         ehci_transfer_intr_enqueue(xfer);
2703 }
2704
2705 struct usb_pipe_methods ehci_device_isoc_fs_methods =
2706 {
2707         .open = ehci_device_isoc_fs_open,
2708         .close = ehci_device_isoc_fs_close,
2709         .enter = ehci_device_isoc_fs_enter,
2710         .start = ehci_device_isoc_fs_start,
2711 };
2712
2713 /*------------------------------------------------------------------------*
2714  * ehci high speed isochronous support
2715  *------------------------------------------------------------------------*/
2716 static void
2717 ehci_device_isoc_hs_open(struct usb_xfer *xfer)
2718 {
2719         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2720         ehci_itd_t *td;
2721         uint32_t temp;
2722         uint8_t ds;
2723
2724         usb_hs_bandwidth_alloc(xfer);
2725
2726         /* initialize all TD's */
2727
2728         for (ds = 0; ds != 2; ds++) {
2729
2730                 for (td = xfer->td_start[ds]; td; td = td->obj_next) {
2731
2732                         /* set TD inactive */
2733                         td->itd_status[0] = 0;
2734                         td->itd_status[1] = 0;
2735                         td->itd_status[2] = 0;
2736                         td->itd_status[3] = 0;
2737                         td->itd_status[4] = 0;
2738                         td->itd_status[5] = 0;
2739                         td->itd_status[6] = 0;
2740                         td->itd_status[7] = 0;
2741
2742                         /* set endpoint and address */
2743                         td->itd_bp[0] = htohc32(sc,
2744                             EHCI_ITD_SET_ADDR(xfer->address) |
2745                             EHCI_ITD_SET_ENDPT(UE_GET_ADDR(xfer->endpointno)));
2746
2747                         temp =
2748                             EHCI_ITD_SET_MPL(xfer->max_packet_size & 0x7FF);
2749
2750                         /* set direction */
2751                         if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN) {
2752                                 temp |= EHCI_ITD_SET_DIR_IN;
2753                         }
2754                         /* set maximum packet size */
2755                         td->itd_bp[1] = htohc32(sc, temp);
2756
2757                         /* set transfer multiplier */
2758                         td->itd_bp[2] = htohc32(sc, xfer->max_packet_count & 3);
2759
2760                         usb_pc_cpu_flush(td->page_cache);
2761                 }
2762         }
2763 }
2764
2765 static void
2766 ehci_device_isoc_hs_close(struct usb_xfer *xfer)
2767 {
2768         ehci_device_done(xfer, USB_ERR_CANCELLED);
2769
2770         /* bandwidth must be freed after device done */
2771         usb_hs_bandwidth_free(xfer);
2772 }
2773
2774 static void
2775 ehci_device_isoc_hs_enter(struct usb_xfer *xfer)
2776 {
2777         struct usb_page_search buf_res;
2778         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2779         ehci_itd_t *td;
2780         ehci_itd_t *td_last = NULL;
2781         ehci_itd_t **pp_last;
2782         bus_size_t page_addr;
2783         uint32_t *plen;
2784         uint32_t status;
2785         uint32_t buf_offset;
2786         uint32_t nframes;
2787         uint32_t itd_offset[8 + 1];
2788         uint8_t x;
2789         uint8_t td_no;
2790         uint8_t page_no;
2791         uint8_t shift = usbd_xfer_get_fps_shift(xfer);
2792
2793 #ifdef USB_DEBUG
2794         uint8_t once = 1;
2795
2796 #endif
2797
2798         DPRINTFN(6, "xfer=%p next=%d nframes=%d shift=%d\n",
2799             xfer, xfer->endpoint->isoc_next, xfer->nframes, (int)shift);
2800
2801         /* get the current frame index */
2802
2803         nframes = EOREAD4(sc, EHCI_FRINDEX) / 8;
2804
2805         /*
2806          * check if the frame index is within the window where the frames
2807          * will be inserted
2808          */
2809         buf_offset = (nframes - xfer->endpoint->isoc_next) &
2810             (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2811
2812         if ((xfer->endpoint->is_synced == 0) ||
2813             (buf_offset < (((xfer->nframes << shift) + 7) / 8))) {
2814                 /*
2815                  * If there is data underflow or the pipe queue is empty we
2816                  * schedule the transfer a few frames ahead of the current
2817                  * frame position. Else two isochronous transfers might
2818                  * overlap.
2819                  */
2820                 xfer->endpoint->isoc_next = (nframes + 3) &
2821                     (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2822                 xfer->endpoint->is_synced = 1;
2823                 DPRINTFN(3, "start next=%d\n", xfer->endpoint->isoc_next);
2824         }
2825         /*
2826          * compute how many milliseconds the insertion is ahead of the
2827          * current frame position:
2828          */
2829         buf_offset = (xfer->endpoint->isoc_next - nframes) &
2830             (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2831
2832         /*
2833          * pre-compute when the isochronous transfer will be finished:
2834          */
2835         xfer->isoc_time_complete =
2836             usb_isoc_time_expand(&sc->sc_bus, nframes) + buf_offset +
2837             (((xfer->nframes << shift) + 7) / 8);
2838
2839         /* get the real number of frames */
2840
2841         nframes = xfer->nframes;
2842
2843         buf_offset = 0;
2844         td_no = 0;
2845
2846         plen = xfer->frlengths;
2847
2848         /* toggle the DMA set we are using */
2849         xfer->flags_int.curr_dma_set ^= 1;
2850
2851         /* get next DMA set */
2852         td = xfer->td_start[xfer->flags_int.curr_dma_set];
2853         xfer->td_transfer_first = td;
2854
2855         pp_last = &sc->sc_isoc_hs_p_last[xfer->endpoint->isoc_next];
2856
2857         /* store starting position */
2858
2859         xfer->qh_pos = xfer->endpoint->isoc_next;
2860
2861         while (nframes) {
2862                 if (td == NULL) {
2863                         panic("%s:%d: out of TD's\n",
2864                             __FUNCTION__, __LINE__);
2865                 }
2866                 if (pp_last >= &sc->sc_isoc_hs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT]) {
2867                         pp_last = &sc->sc_isoc_hs_p_last[0];
2868                 }
2869                 /* range check */
2870                 if (*plen > xfer->max_frame_size) {
2871 #ifdef USB_DEBUG
2872                         if (once) {
2873                                 once = 0;
2874                                 printf("%s: frame length(%d) exceeds %d bytes "
2875                                     "(frame truncated)\n",
2876                                     __FUNCTION__, *plen, xfer->max_frame_size);
2877                         }
2878 #endif
2879                         *plen = xfer->max_frame_size;
2880                 }
2881
2882                 if (xfer->endpoint->usb_smask & (1 << td_no)) {
2883                         status = (EHCI_ITD_SET_LEN(*plen) |
2884                             EHCI_ITD_ACTIVE |
2885                             EHCI_ITD_SET_PG(0));
2886                         td->itd_status[td_no] = htohc32(sc, status);
2887                         itd_offset[td_no] = buf_offset;
2888                         buf_offset += *plen;
2889                         plen++;
2890                         nframes --;
2891                 } else {
2892                         td->itd_status[td_no] = 0;      /* not active */
2893                         itd_offset[td_no] = buf_offset;
2894                 }
2895
2896                 td_no++;
2897
2898                 if ((td_no == 8) || (nframes == 0)) {
2899
2900                         /* the rest of the transfers are not active, if any */
2901                         for (x = td_no; x != 8; x++) {
2902                                 td->itd_status[x] = 0;  /* not active */
2903                         }
2904
2905                         /* check if there is any data to be transferred */
2906                         if (itd_offset[0] != buf_offset) {
2907                                 page_no = 0;
2908                                 itd_offset[td_no] = buf_offset;
2909
2910                                 /* get first page offset */
2911                                 usbd_get_page(xfer->frbuffers, itd_offset[0], &buf_res);
2912                                 /* get page address */
2913                                 page_addr = buf_res.physaddr & ~0xFFF;
2914                                 /* update page address */
2915                                 td->itd_bp[0] &= htohc32(sc, 0xFFF);
2916                                 td->itd_bp[0] |= htohc32(sc, page_addr);
2917
2918                                 for (x = 0; x != td_no; x++) {
2919                                         /* set page number and page offset */
2920                                         status = (EHCI_ITD_SET_PG(page_no) |
2921                                             (buf_res.physaddr & 0xFFF));
2922                                         td->itd_status[x] |= htohc32(sc, status);
2923
2924                                         /* get next page offset */
2925                                         if (itd_offset[x + 1] == buf_offset) {
2926                                                 /*
2927                                                  * We subtract one so that
2928                                                  * we don't go off the last
2929                                                  * page!
2930                                                  */
2931                                                 usbd_get_page(xfer->frbuffers, buf_offset - 1, &buf_res);
2932                                         } else {
2933                                                 usbd_get_page(xfer->frbuffers, itd_offset[x + 1], &buf_res);
2934                                         }
2935
2936                                         /* check if we need a new page */
2937                                         if ((buf_res.physaddr ^ page_addr) & ~0xFFF) {
2938                                                 /* new page needed */
2939                                                 page_addr = buf_res.physaddr & ~0xFFF;
2940                                                 if (page_no == 6) {
2941                                                         panic("%s: too many pages\n", __FUNCTION__);
2942                                                 }
2943                                                 page_no++;
2944                                                 /* update page address */
2945                                                 td->itd_bp[page_no] &= htohc32(sc, 0xFFF);
2946                                                 td->itd_bp[page_no] |= htohc32(sc, page_addr);
2947                                         }
2948                                 }
2949                         }
2950                         /* set IOC bit if we are complete */
2951                         if (nframes == 0) {
2952                                 td->itd_status[td_no - 1] |= htohc32(sc, EHCI_ITD_IOC);
2953                         }
2954                         usb_pc_cpu_flush(td->page_cache);
2955 #ifdef USB_DEBUG
2956                         if (ehcidebug > 15) {
2957                                 DPRINTF("HS-TD %d\n", nframes);
2958                                 ehci_dump_itd(sc, td);
2959                         }
2960 #endif
2961                         /* insert TD into schedule */
2962                         EHCI_APPEND_HS_TD(td, *pp_last);
2963                         pp_last++;
2964
2965                         td_no = 0;
2966                         td_last = td;
2967                         td = td->obj_next;
2968                 }
2969         }
2970
2971         xfer->td_transfer_last = td_last;
2972
2973         /* update isoc_next */
2974         xfer->endpoint->isoc_next = (pp_last - &sc->sc_isoc_hs_p_last[0]) &
2975             (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2976 }
2977
2978 static void
2979 ehci_device_isoc_hs_start(struct usb_xfer *xfer)
2980 {
2981         /* put transfer on interrupt queue */
2982         ehci_transfer_intr_enqueue(xfer);
2983 }
2984
2985 struct usb_pipe_methods ehci_device_isoc_hs_methods =
2986 {
2987         .open = ehci_device_isoc_hs_open,
2988         .close = ehci_device_isoc_hs_close,
2989         .enter = ehci_device_isoc_hs_enter,
2990         .start = ehci_device_isoc_hs_start,
2991 };
2992
2993 /*------------------------------------------------------------------------*
2994  * ehci root control support
2995  *------------------------------------------------------------------------*
2996  * Simulate a hardware hub by handling all the necessary requests.
2997  *------------------------------------------------------------------------*/
2998
2999 static const
3000 struct usb_device_descriptor ehci_devd =
3001 {
3002         sizeof(struct usb_device_descriptor),
3003         UDESC_DEVICE,                   /* type */
3004         {0x00, 0x02},                   /* USB version */
3005         UDCLASS_HUB,                    /* class */
3006         UDSUBCLASS_HUB,                 /* subclass */
3007         UDPROTO_HSHUBSTT,               /* protocol */
3008         64,                             /* max packet */
3009         {0}, {0}, {0x00, 0x01},         /* device id */
3010         1, 2, 0,                        /* string indicies */
3011         1                               /* # of configurations */
3012 };
3013
3014 static const
3015 struct usb_device_qualifier ehci_odevd =
3016 {
3017         sizeof(struct usb_device_qualifier),
3018         UDESC_DEVICE_QUALIFIER,         /* type */
3019         {0x00, 0x02},                   /* USB version */
3020         UDCLASS_HUB,                    /* class */
3021         UDSUBCLASS_HUB,                 /* subclass */
3022         UDPROTO_FSHUB,                  /* protocol */
3023         0,                              /* max packet */
3024         0,                              /* # of configurations */
3025         0
3026 };
3027
3028 static const struct ehci_config_desc ehci_confd = {
3029         .confd = {
3030                 .bLength = sizeof(struct usb_config_descriptor),
3031                 .bDescriptorType = UDESC_CONFIG,
3032                 .wTotalLength[0] = sizeof(ehci_confd),
3033                 .bNumInterface = 1,
3034                 .bConfigurationValue = 1,
3035                 .iConfiguration = 0,
3036                 .bmAttributes = UC_SELF_POWERED,
3037                 .bMaxPower = 0          /* max power */
3038         },
3039         .ifcd = {
3040                 .bLength = sizeof(struct usb_interface_descriptor),
3041                 .bDescriptorType = UDESC_INTERFACE,
3042                 .bNumEndpoints = 1,
3043                 .bInterfaceClass = UICLASS_HUB,
3044                 .bInterfaceSubClass = UISUBCLASS_HUB,
3045                 .bInterfaceProtocol = 0,
3046         },
3047         .endpd = {
3048                 .bLength = sizeof(struct usb_endpoint_descriptor),
3049                 .bDescriptorType = UDESC_ENDPOINT,
3050                 .bEndpointAddress = UE_DIR_IN | EHCI_INTR_ENDPT,
3051                 .bmAttributes = UE_INTERRUPT,
3052                 .wMaxPacketSize[0] = 8, /* max packet (63 ports) */
3053                 .bInterval = 255,
3054         },
3055 };
3056
3057 static const
3058 struct usb_hub_descriptor ehci_hubd =
3059 {
3060         .bDescLength = 0,               /* dynamic length */
3061         .bDescriptorType = UDESC_HUB,
3062 };
3063
3064 static void
3065 ehci_disown(ehci_softc_t *sc, uint16_t index, uint8_t lowspeed)
3066 {
3067         uint32_t port;
3068         uint32_t v;
3069
3070         DPRINTF("index=%d lowspeed=%d\n", index, lowspeed);
3071
3072         port = EHCI_PORTSC(index);
3073         v = EOREAD4(sc, port) & ~EHCI_PS_CLEAR;
3074         EOWRITE4(sc, port, v | EHCI_PS_PO);
3075 }
3076
3077 static usb_error_t
3078 ehci_roothub_exec(struct usb_device *udev,
3079     struct usb_device_request *req, const void **pptr, uint16_t *plength)
3080 {
3081         ehci_softc_t *sc = EHCI_BUS2SC(udev->bus);
3082         const char *str_ptr;
3083         const void *ptr;
3084         uint32_t port;
3085         uint32_t v;
3086         uint16_t len;
3087         uint16_t i;
3088         uint16_t value;
3089         uint16_t index;
3090         usb_error_t err;
3091
3092         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
3093
3094         /* buffer reset */
3095         ptr = (const void *)&sc->sc_hub_desc;
3096         len = 0;
3097         err = 0;
3098
3099         value = UGETW(req->wValue);
3100         index = UGETW(req->wIndex);
3101
3102         DPRINTFN(3, "type=0x%02x request=0x%02x wLen=0x%04x "
3103             "wValue=0x%04x wIndex=0x%04x\n",
3104             req->bmRequestType, req->bRequest,
3105             UGETW(req->wLength), value, index);
3106
3107 #define C(x,y) ((x) | ((y) << 8))
3108         switch (C(req->bRequest, req->bmRequestType)) {
3109         case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
3110         case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
3111         case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
3112                 /*
3113                  * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
3114                  * for the integrated root hub.
3115                  */
3116                 break;
3117         case C(UR_GET_CONFIG, UT_READ_DEVICE):
3118                 len = 1;
3119                 sc->sc_hub_desc.temp[0] = sc->sc_conf;
3120                 break;
3121         case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
3122                 switch (value >> 8) {
3123                 case UDESC_DEVICE:
3124                         if ((value & 0xff) != 0) {
3125                                 err = USB_ERR_IOERROR;
3126                                 goto done;
3127                         }
3128                         len = sizeof(ehci_devd);
3129                         ptr = (const void *)&ehci_devd;
3130                         break;
3131                         /*
3132                          * We can't really operate at another speed,
3133                          * but the specification says we need this
3134                          * descriptor:
3135                          */
3136                 case UDESC_DEVICE_QUALIFIER:
3137                         if ((value & 0xff) != 0) {
3138                                 err = USB_ERR_IOERROR;
3139                                 goto done;
3140                         }
3141                         len = sizeof(ehci_odevd);
3142                         ptr = (const void *)&ehci_odevd;
3143                         break;
3144
3145                 case UDESC_CONFIG:
3146                         if ((value & 0xff) != 0) {
3147                                 err = USB_ERR_IOERROR;
3148                                 goto done;
3149                         }
3150                         len = sizeof(ehci_confd);
3151                         ptr = (const void *)&ehci_confd;
3152                         break;
3153
3154                 case UDESC_STRING:
3155                         switch (value & 0xff) {
3156                         case 0: /* Language table */
3157                                 str_ptr = "\001";
3158                                 break;
3159
3160                         case 1: /* Vendor */
3161                                 str_ptr = sc->sc_vendor;
3162                                 break;
3163
3164                         case 2: /* Product */
3165                                 str_ptr = "EHCI root HUB";
3166                                 break;
3167
3168                         default:
3169                                 str_ptr = "";
3170                                 break;
3171                         }
3172
3173                         len = usb_make_str_desc(
3174                             sc->sc_hub_desc.temp,
3175                             sizeof(sc->sc_hub_desc.temp),
3176                             str_ptr);
3177                         break;
3178                 default:
3179                         err = USB_ERR_IOERROR;
3180                         goto done;
3181                 }
3182                 break;
3183         case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
3184                 len = 1;
3185                 sc->sc_hub_desc.temp[0] = 0;
3186                 break;
3187         case C(UR_GET_STATUS, UT_READ_DEVICE):
3188                 len = 2;
3189                 USETW(sc->sc_hub_desc.stat.wStatus, UDS_SELF_POWERED);
3190                 break;
3191         case C(UR_GET_STATUS, UT_READ_INTERFACE):
3192         case C(UR_GET_STATUS, UT_READ_ENDPOINT):
3193                 len = 2;
3194                 USETW(sc->sc_hub_desc.stat.wStatus, 0);
3195                 break;
3196         case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
3197                 if (value >= EHCI_MAX_DEVICES) {
3198                         err = USB_ERR_IOERROR;
3199                         goto done;
3200                 }
3201                 sc->sc_addr = value;
3202                 break;
3203         case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
3204                 if ((value != 0) && (value != 1)) {
3205                         err = USB_ERR_IOERROR;
3206                         goto done;
3207                 }
3208                 sc->sc_conf = value;
3209                 break;
3210         case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
3211                 break;
3212         case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
3213         case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
3214         case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
3215                 err = USB_ERR_IOERROR;
3216                 goto done;
3217         case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
3218                 break;
3219         case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
3220                 break;
3221                 /* Hub requests */
3222         case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
3223                 break;
3224         case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
3225                 DPRINTFN(9, "UR_CLEAR_PORT_FEATURE\n");
3226
3227                 if ((index < 1) ||
3228                     (index > sc->sc_noport)) {
3229                         err = USB_ERR_IOERROR;
3230                         goto done;
3231                 }
3232                 port = EHCI_PORTSC(index);
3233                 v = EOREAD4(sc, port) & ~EHCI_PS_CLEAR;
3234                 switch (value) {
3235                 case UHF_PORT_ENABLE:
3236                         EOWRITE4(sc, port, v & ~EHCI_PS_PE);
3237                         break;
3238                 case UHF_PORT_SUSPEND:
3239                         if ((v & EHCI_PS_SUSP) && (!(v & EHCI_PS_FPR))) {
3240
3241                                 /*
3242                                  * waking up a High Speed device is rather
3243                                  * complicated if
3244                                  */
3245                                 EOWRITE4(sc, port, v | EHCI_PS_FPR);
3246                         }
3247                         /* wait 20ms for resume sequence to complete */
3248                         usb_pause_mtx(&sc->sc_bus.bus_mtx, hz / 50);
3249
3250                         EOWRITE4(sc, port, v & ~(EHCI_PS_SUSP |
3251                             EHCI_PS_FPR | (3 << 10) /* High Speed */ ));
3252
3253                         /* 4ms settle time */
3254                         usb_pause_mtx(&sc->sc_bus.bus_mtx, hz / 250);
3255                         break;
3256                 case UHF_PORT_POWER:
3257                         EOWRITE4(sc, port, v & ~EHCI_PS_PP);
3258                         break;
3259                 case UHF_PORT_TEST:
3260                         DPRINTFN(3, "clear port test "
3261                             "%d\n", index);
3262                         break;
3263                 case UHF_PORT_INDICATOR:
3264                         DPRINTFN(3, "clear port ind "
3265                             "%d\n", index);
3266                         EOWRITE4(sc, port, v & ~EHCI_PS_PIC);
3267                         break;
3268                 case UHF_C_PORT_CONNECTION:
3269                         EOWRITE4(sc, port, v | EHCI_PS_CSC);
3270                         break;
3271                 case UHF_C_PORT_ENABLE:
3272                         EOWRITE4(sc, port, v | EHCI_PS_PEC);
3273                         break;
3274                 case UHF_C_PORT_SUSPEND:
3275                         EOWRITE4(sc, port, v | EHCI_PS_SUSP);
3276                         break;
3277                 case UHF_C_PORT_OVER_CURRENT:
3278                         EOWRITE4(sc, port, v | EHCI_PS_OCC);
3279                         break;
3280                 case UHF_C_PORT_RESET:
3281                         sc->sc_isreset = 0;
3282                         break;
3283                 default:
3284                         err = USB_ERR_IOERROR;
3285                         goto done;
3286                 }
3287                 break;
3288         case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
3289                 if ((value & 0xff) != 0) {
3290                         err = USB_ERR_IOERROR;
3291                         goto done;
3292                 }
3293                 v = EREAD4(sc, EHCI_HCSPARAMS);
3294
3295                 sc->sc_hub_desc.hubd = ehci_hubd;
3296                 sc->sc_hub_desc.hubd.bNbrPorts = sc->sc_noport;
3297
3298                 if (EHCI_HCS_PPC(v))
3299                         i = UHD_PWR_INDIVIDUAL;
3300                 else
3301                         i = UHD_PWR_NO_SWITCH;
3302
3303                 if (EHCI_HCS_P_INDICATOR(v))
3304                         i |= UHD_PORT_IND;
3305
3306                 USETW(sc->sc_hub_desc.hubd.wHubCharacteristics, i);
3307                 /* XXX can't find out? */
3308                 sc->sc_hub_desc.hubd.bPwrOn2PwrGood = 200;
3309                 /* XXX don't know if ports are removable or not */
3310                 sc->sc_hub_desc.hubd.bDescLength =
3311                     8 + ((sc->sc_noport + 7) / 8);
3312                 len = sc->sc_hub_desc.hubd.bDescLength;
3313                 break;
3314         case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
3315                 len = 16;
3316                 memset(sc->sc_hub_desc.temp, 0, 16);
3317                 break;
3318         case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
3319                 DPRINTFN(9, "get port status i=%d\n",
3320                     index);
3321                 if ((index < 1) ||
3322                     (index > sc->sc_noport)) {
3323                         err = USB_ERR_IOERROR;
3324                         goto done;
3325                 }
3326                 v = EOREAD4(sc, EHCI_PORTSC(index));
3327                 DPRINTFN(9, "port status=0x%04x\n", v);
3328                 if (sc->sc_flags & (EHCI_SCFLG_FORCESPEED | EHCI_SCFLG_TT)) {
3329                         if ((v & 0xc000000) == 0x8000000)
3330                                 i = UPS_HIGH_SPEED;
3331                         else if ((v & 0xc000000) == 0x4000000)
3332                                 i = UPS_LOW_SPEED;
3333                         else
3334                                 i = 0;
3335                 } else {
3336                         i = UPS_HIGH_SPEED;
3337                 }
3338                 if (v & EHCI_PS_CS)
3339                         i |= UPS_CURRENT_CONNECT_STATUS;
3340                 if (v & EHCI_PS_PE)
3341                         i |= UPS_PORT_ENABLED;
3342                 if ((v & EHCI_PS_SUSP) && !(v & EHCI_PS_FPR))
3343                         i |= UPS_SUSPEND;
3344                 if (v & EHCI_PS_OCA)
3345                         i |= UPS_OVERCURRENT_INDICATOR;
3346                 if (v & EHCI_PS_PR)
3347                         i |= UPS_RESET;
3348                 if (v & EHCI_PS_PP)
3349                         i |= UPS_PORT_POWER;
3350                 USETW(sc->sc_hub_desc.ps.wPortStatus, i);
3351                 i = 0;
3352                 if (v & EHCI_PS_CSC)
3353                         i |= UPS_C_CONNECT_STATUS;
3354                 if (v & EHCI_PS_PEC)
3355                         i |= UPS_C_PORT_ENABLED;
3356                 if (v & EHCI_PS_OCC)
3357                         i |= UPS_C_OVERCURRENT_INDICATOR;
3358                 if (v & EHCI_PS_FPR)
3359                         i |= UPS_C_SUSPEND;
3360                 if (sc->sc_isreset)
3361                         i |= UPS_C_PORT_RESET;
3362                 USETW(sc->sc_hub_desc.ps.wPortChange, i);
3363                 len = sizeof(sc->sc_hub_desc.ps);
3364                 break;
3365         case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
3366                 err = USB_ERR_IOERROR;
3367                 goto done;
3368         case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
3369                 break;
3370         case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
3371                 if ((index < 1) ||
3372                     (index > sc->sc_noport)) {
3373                         err = USB_ERR_IOERROR;
3374                         goto done;
3375                 }
3376                 port = EHCI_PORTSC(index);
3377                 v = EOREAD4(sc, port) & ~EHCI_PS_CLEAR;
3378                 switch (value) {
3379                 case UHF_PORT_ENABLE:
3380                         EOWRITE4(sc, port, v | EHCI_PS_PE);
3381                         break;
3382                 case UHF_PORT_SUSPEND:
3383                         EOWRITE4(sc, port, v | EHCI_PS_SUSP);
3384                         break;
3385                 case UHF_PORT_RESET:
3386                         DPRINTFN(6, "reset port %d\n", index);
3387 #ifdef USB_DEBUG
3388                         if (ehcinohighspeed) {
3389                                 /*
3390                                  * Connect USB device to companion
3391                                  * controller.
3392                                  */
3393                                 ehci_disown(sc, index, 1);
3394                                 break;
3395                         }
3396 #endif
3397                         if (EHCI_PS_IS_LOWSPEED(v) &&
3398                             (sc->sc_flags & EHCI_SCFLG_TT) == 0) {
3399                                 /* Low speed device, give up ownership. */
3400                                 ehci_disown(sc, index, 1);
3401                                 break;
3402                         }
3403                         /* Start reset sequence. */
3404                         v &= ~(EHCI_PS_PE | EHCI_PS_PR);
3405                         EOWRITE4(sc, port, v | EHCI_PS_PR);
3406
3407                         /* Wait for reset to complete. */
3408                         usb_pause_mtx(&sc->sc_bus.bus_mtx,
3409                             USB_MS_TO_TICKS(usb_port_root_reset_delay));
3410
3411                         /* Terminate reset sequence. */
3412                         if (!(sc->sc_flags & EHCI_SCFLG_NORESTERM))
3413                                 EOWRITE4(sc, port, v);
3414
3415                         /* Wait for HC to complete reset. */
3416                         usb_pause_mtx(&sc->sc_bus.bus_mtx,
3417                             USB_MS_TO_TICKS(EHCI_PORT_RESET_COMPLETE));
3418
3419                         v = EOREAD4(sc, port);
3420                         DPRINTF("ehci after reset, status=0x%08x\n", v);
3421                         if (v & EHCI_PS_PR) {
3422                                 device_printf(sc->sc_bus.bdev,
3423                                     "port reset timeout\n");
3424                                 err = USB_ERR_TIMEOUT;
3425                                 goto done;
3426                         }
3427                         if (!(v & EHCI_PS_PE) &&
3428                             (sc->sc_flags & EHCI_SCFLG_TT) == 0) {
3429                                 /* Not a high speed device, give up ownership.*/
3430                                 ehci_disown(sc, index, 0);
3431                                 break;
3432                         }
3433                         sc->sc_isreset = 1;
3434                         DPRINTF("ehci port %d reset, status = 0x%08x\n",
3435                             index, v);
3436                         break;
3437
3438                 case UHF_PORT_POWER:
3439                         DPRINTFN(3, "set port power %d\n", index);
3440                         EOWRITE4(sc, port, v | EHCI_PS_PP);
3441                         break;
3442
3443                 case UHF_PORT_TEST:
3444                         DPRINTFN(3, "set port test %d\n", index);
3445                         break;
3446
3447                 case UHF_PORT_INDICATOR:
3448                         DPRINTFN(3, "set port ind %d\n", index);
3449                         EOWRITE4(sc, port, v | EHCI_PS_PIC);
3450                         break;
3451
3452                 default:
3453                         err = USB_ERR_IOERROR;
3454                         goto done;
3455                 }
3456                 break;
3457         case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER):
3458         case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER):
3459         case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER):
3460         case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER):
3461                 break;
3462         default:
3463                 err = USB_ERR_IOERROR;
3464                 goto done;
3465         }
3466 done:
3467         *plength = len;
3468         *pptr = ptr;
3469         return (err);
3470 }
3471
3472 static void
3473 ehci_xfer_setup(struct usb_setup_params *parm)
3474 {
3475         struct usb_page_search page_info;
3476         struct usb_page_cache *pc;
3477         ehci_softc_t *sc;
3478         struct usb_xfer *xfer;
3479         void *last_obj;
3480         uint32_t nqtd;
3481         uint32_t nqh;
3482         uint32_t nsitd;
3483         uint32_t nitd;
3484         uint32_t n;
3485
3486         sc = EHCI_BUS2SC(parm->udev->bus);
3487         xfer = parm->curr_xfer;
3488
3489         nqtd = 0;
3490         nqh = 0;
3491         nsitd = 0;
3492         nitd = 0;
3493
3494         /*
3495          * compute maximum number of some structures
3496          */
3497         if (parm->methods == &ehci_device_ctrl_methods) {
3498
3499                 /*
3500                  * The proof for the "nqtd" formula is illustrated like
3501                  * this:
3502                  *
3503                  * +------------------------------------+
3504                  * |                                    |
3505                  * |         |remainder ->              |
3506                  * |   +-----+---+                      |
3507                  * |   | xxx | x | frm 0                |
3508                  * |   +-----+---++                     |
3509                  * |   | xxx | xx | frm 1               |
3510                  * |   +-----+----+                     |
3511                  * |            ...                     |
3512                  * +------------------------------------+
3513                  *
3514                  * "xxx" means a completely full USB transfer descriptor
3515                  *
3516                  * "x" and "xx" means a short USB packet
3517                  *
3518                  * For the remainder of an USB transfer modulo
3519                  * "max_data_length" we need two USB transfer descriptors.
3520                  * One to transfer the remaining data and one to finalise
3521                  * with a zero length packet in case the "force_short_xfer"
3522                  * flag is set. We only need two USB transfer descriptors in
3523                  * the case where the transfer length of the first one is a
3524                  * factor of "max_frame_size". The rest of the needed USB
3525                  * transfer descriptors is given by the buffer size divided
3526                  * by the maximum data payload.
3527                  */
3528                 parm->hc_max_packet_size = 0x400;
3529                 parm->hc_max_packet_count = 1;
3530                 parm->hc_max_frame_size = EHCI_QTD_PAYLOAD_MAX;
3531                 xfer->flags_int.bdma_enable = 1;
3532
3533                 usbd_transfer_setup_sub(parm);
3534
3535                 nqh = 1;
3536                 nqtd = ((2 * xfer->nframes) + 1 /* STATUS */
3537                     + (xfer->max_data_length / xfer->max_hc_frame_size));
3538
3539         } else if (parm->methods == &ehci_device_bulk_methods) {
3540
3541                 parm->hc_max_packet_size = 0x400;
3542                 parm->hc_max_packet_count = 1;
3543                 parm->hc_max_frame_size = EHCI_QTD_PAYLOAD_MAX;
3544                 xfer->flags_int.bdma_enable = 1;
3545
3546                 usbd_transfer_setup_sub(parm);
3547
3548                 nqh = 1;
3549                 nqtd = ((2 * xfer->nframes)
3550                     + (xfer->max_data_length / xfer->max_hc_frame_size));
3551
3552         } else if (parm->methods == &ehci_device_intr_methods) {
3553
3554                 if (parm->speed == USB_SPEED_HIGH) {
3555                         parm->hc_max_packet_size = 0x400;
3556                         parm->hc_max_packet_count = 3;
3557                 } else if (parm->speed == USB_SPEED_FULL) {
3558                         parm->hc_max_packet_size = USB_FS_BYTES_PER_HS_UFRAME;
3559                         parm->hc_max_packet_count = 1;
3560                 } else {
3561                         parm->hc_max_packet_size = USB_FS_BYTES_PER_HS_UFRAME / 8;
3562                         parm->hc_max_packet_count = 1;
3563                 }
3564
3565                 parm->hc_max_frame_size = EHCI_QTD_PAYLOAD_MAX;
3566                 xfer->flags_int.bdma_enable = 1;
3567
3568                 usbd_transfer_setup_sub(parm);
3569
3570                 nqh = 1;
3571                 nqtd = ((2 * xfer->nframes)
3572                     + (xfer->max_data_length / xfer->max_hc_frame_size));
3573
3574         } else if (parm->methods == &ehci_device_isoc_fs_methods) {
3575
3576                 parm->hc_max_packet_size = 0x3FF;
3577                 parm->hc_max_packet_count = 1;
3578                 parm->hc_max_frame_size = 0x3FF;
3579                 xfer->flags_int.bdma_enable = 1;
3580
3581                 usbd_transfer_setup_sub(parm);
3582
3583                 nsitd = xfer->nframes;
3584
3585         } else if (parm->methods == &ehci_device_isoc_hs_methods) {
3586
3587                 parm->hc_max_packet_size = 0x400;
3588                 parm->hc_max_packet_count = 3;
3589                 parm->hc_max_frame_size = 0xC00;
3590                 xfer->flags_int.bdma_enable = 1;
3591
3592                 usbd_transfer_setup_sub(parm);
3593
3594                 nitd = ((xfer->nframes + 7) / 8) <<
3595                     usbd_xfer_get_fps_shift(xfer);
3596
3597         } else {
3598
3599                 parm->hc_max_packet_size = 0x400;
3600                 parm->hc_max_packet_count = 1;
3601                 parm->hc_max_frame_size = 0x400;
3602
3603                 usbd_transfer_setup_sub(parm);
3604         }
3605
3606 alloc_dma_set:
3607
3608         if (parm->err) {
3609                 return;
3610         }
3611         /*
3612          * Allocate queue heads and transfer descriptors
3613          */
3614         last_obj = NULL;
3615
3616         if (usbd_transfer_setup_sub_malloc(
3617             parm, &pc, sizeof(ehci_itd_t),
3618             EHCI_ITD_ALIGN, nitd)) {
3619                 parm->err = USB_ERR_NOMEM;
3620                 return;
3621         }
3622         if (parm->buf) {
3623                 for (n = 0; n != nitd; n++) {
3624                         ehci_itd_t *td;
3625
3626                         usbd_get_page(pc + n, 0, &page_info);
3627
3628                         td = page_info.buffer;
3629
3630                         /* init TD */
3631                         td->itd_self = htohc32(sc, page_info.physaddr | EHCI_LINK_ITD);
3632                         td->obj_next = last_obj;
3633                         td->page_cache = pc + n;
3634
3635                         last_obj = td;
3636
3637                         usb_pc_cpu_flush(pc + n);
3638                 }
3639         }
3640         if (usbd_transfer_setup_sub_malloc(
3641             parm, &pc, sizeof(ehci_sitd_t),
3642             EHCI_SITD_ALIGN, nsitd)) {
3643                 parm->err = USB_ERR_NOMEM;
3644                 return;
3645         }
3646         if (parm->buf) {
3647                 for (n = 0; n != nsitd; n++) {
3648                         ehci_sitd_t *td;
3649
3650                         usbd_get_page(pc + n, 0, &page_info);
3651
3652                         td = page_info.buffer;
3653
3654                         /* init TD */
3655                         td->sitd_self = htohc32(sc, page_info.physaddr | EHCI_LINK_SITD);
3656                         td->obj_next = last_obj;
3657                         td->page_cache = pc + n;
3658
3659                         last_obj = td;
3660
3661                         usb_pc_cpu_flush(pc + n);
3662                 }
3663         }
3664         if (usbd_transfer_setup_sub_malloc(
3665             parm, &pc, sizeof(ehci_qtd_t),
3666             EHCI_QTD_ALIGN, nqtd)) {
3667                 parm->err = USB_ERR_NOMEM;
3668                 return;
3669         }
3670         if (parm->buf) {
3671                 for (n = 0; n != nqtd; n++) {
3672                         ehci_qtd_t *qtd;
3673
3674                         usbd_get_page(pc + n, 0, &page_info);
3675
3676                         qtd = page_info.buffer;
3677
3678                         /* init TD */
3679                         qtd->qtd_self = htohc32(sc, page_info.physaddr);
3680                         qtd->obj_next = last_obj;
3681                         qtd->page_cache = pc + n;
3682
3683                         last_obj = qtd;
3684
3685                         usb_pc_cpu_flush(pc + n);
3686                 }
3687         }
3688         xfer->td_start[xfer->flags_int.curr_dma_set] = last_obj;
3689
3690         last_obj = NULL;
3691
3692         if (usbd_transfer_setup_sub_malloc(
3693             parm, &pc, sizeof(ehci_qh_t),
3694             EHCI_QH_ALIGN, nqh)) {
3695                 parm->err = USB_ERR_NOMEM;
3696                 return;
3697         }
3698         if (parm->buf) {
3699                 for (n = 0; n != nqh; n++) {
3700                         ehci_qh_t *qh;
3701
3702                         usbd_get_page(pc + n, 0, &page_info);
3703
3704                         qh = page_info.buffer;
3705
3706                         /* init QH */
3707                         qh->qh_self = htohc32(sc, page_info.physaddr | EHCI_LINK_QH);
3708                         qh->obj_next = last_obj;
3709                         qh->page_cache = pc + n;
3710
3711                         last_obj = qh;
3712
3713                         usb_pc_cpu_flush(pc + n);
3714                 }
3715         }
3716         xfer->qh_start[xfer->flags_int.curr_dma_set] = last_obj;
3717
3718         if (!xfer->flags_int.curr_dma_set) {
3719                 xfer->flags_int.curr_dma_set = 1;
3720                 goto alloc_dma_set;
3721         }
3722 }
3723
3724 static void
3725 ehci_xfer_unsetup(struct usb_xfer *xfer)
3726 {
3727         return;
3728 }
3729
3730 static void
3731 ehci_ep_init(struct usb_device *udev, struct usb_endpoint_descriptor *edesc,
3732     struct usb_endpoint *ep)
3733 {
3734         ehci_softc_t *sc = EHCI_BUS2SC(udev->bus);
3735
3736         DPRINTFN(2, "endpoint=%p, addr=%d, endpt=%d, mode=%d (%d)\n",
3737             ep, udev->address,
3738             edesc->bEndpointAddress, udev->flags.usb_mode,
3739             sc->sc_addr);
3740
3741         if (udev->device_index != sc->sc_addr) {
3742
3743                 if ((udev->speed != USB_SPEED_HIGH) &&
3744                     ((udev->hs_hub_addr == 0) ||
3745                     (udev->hs_port_no == 0) ||
3746                     (udev->parent_hs_hub == NULL) ||
3747                     (udev->parent_hs_hub->hub == NULL))) {
3748                         /* We need a transaction translator */
3749                         goto done;
3750                 }
3751                 switch (edesc->bmAttributes & UE_XFERTYPE) {
3752                 case UE_CONTROL:
3753                         ep->methods = &ehci_device_ctrl_methods;
3754                         break;
3755                 case UE_INTERRUPT:
3756                         ep->methods = &ehci_device_intr_methods;
3757                         break;
3758                 case UE_ISOCHRONOUS:
3759                         if (udev->speed == USB_SPEED_HIGH) {
3760                                 ep->methods = &ehci_device_isoc_hs_methods;
3761                         } else if (udev->speed == USB_SPEED_FULL) {
3762                                 ep->methods = &ehci_device_isoc_fs_methods;
3763                         }
3764                         break;
3765                 case UE_BULK:
3766                         ep->methods = &ehci_device_bulk_methods;
3767                         break;
3768                 default:
3769                         /* do nothing */
3770                         break;
3771                 }
3772         }
3773 done:
3774         return;
3775 }
3776
3777 static void
3778 ehci_get_dma_delay(struct usb_device *udev, uint32_t *pus)
3779 {
3780         /*
3781          * Wait until the hardware has finished any possible use of
3782          * the transfer descriptor(s) and QH
3783          */
3784         *pus = (1125);                  /* microseconds */
3785 }
3786
3787 static void
3788 ehci_device_resume(struct usb_device *udev)
3789 {
3790         ehci_softc_t *sc = EHCI_BUS2SC(udev->bus);
3791         struct usb_xfer *xfer;
3792         struct usb_pipe_methods *methods;
3793
3794         DPRINTF("\n");
3795
3796         USB_BUS_LOCK(udev->bus);
3797
3798         TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
3799
3800                 if (xfer->xroot->udev == udev) {
3801
3802                         methods = xfer->endpoint->methods;
3803
3804                         if ((methods == &ehci_device_bulk_methods) ||
3805                             (methods == &ehci_device_ctrl_methods)) {
3806                                 EHCI_APPEND_QH(xfer->qh_start[xfer->flags_int.curr_dma_set],
3807                                     sc->sc_async_p_last);
3808                         }
3809                         if (methods == &ehci_device_intr_methods) {
3810                                 EHCI_APPEND_QH(xfer->qh_start[xfer->flags_int.curr_dma_set],
3811                                     sc->sc_intr_p_last[xfer->qh_pos]);
3812                         }
3813                 }
3814         }
3815
3816         USB_BUS_UNLOCK(udev->bus);
3817
3818         return;
3819 }
3820
3821 static void
3822 ehci_device_suspend(struct usb_device *udev)
3823 {
3824         ehci_softc_t *sc = EHCI_BUS2SC(udev->bus);
3825         struct usb_xfer *xfer;
3826         struct usb_pipe_methods *methods;
3827
3828         DPRINTF("\n");
3829
3830         USB_BUS_LOCK(udev->bus);
3831
3832         TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
3833
3834                 if (xfer->xroot->udev == udev) {
3835
3836                         methods = xfer->endpoint->methods;
3837
3838                         if ((methods == &ehci_device_bulk_methods) ||
3839                             (methods == &ehci_device_ctrl_methods)) {
3840                                 EHCI_REMOVE_QH(xfer->qh_start[xfer->flags_int.curr_dma_set],
3841                                     sc->sc_async_p_last);
3842                         }
3843                         if (methods == &ehci_device_intr_methods) {
3844                                 EHCI_REMOVE_QH(xfer->qh_start[xfer->flags_int.curr_dma_set],
3845                                     sc->sc_intr_p_last[xfer->qh_pos]);
3846                         }
3847                 }
3848         }
3849
3850         USB_BUS_UNLOCK(udev->bus);
3851 }
3852
3853 static void
3854 ehci_set_hw_power_sleep(struct usb_bus *bus, uint32_t state)
3855 {
3856         struct ehci_softc *sc = EHCI_BUS2SC(bus);
3857
3858         switch (state) {
3859         case USB_HW_POWER_SUSPEND:
3860         case USB_HW_POWER_SHUTDOWN:
3861                 ehci_suspend(sc);
3862                 break;
3863         case USB_HW_POWER_RESUME:
3864                 ehci_resume(sc);
3865                 break;
3866         default:
3867                 break;
3868         }
3869 }
3870
3871 static void
3872 ehci_set_hw_power(struct usb_bus *bus)
3873 {
3874         ehci_softc_t *sc = EHCI_BUS2SC(bus);
3875         uint32_t temp;
3876         uint32_t flags;
3877
3878         DPRINTF("\n");
3879
3880         USB_BUS_LOCK(bus);
3881
3882         flags = bus->hw_power_state;
3883
3884         temp = EOREAD4(sc, EHCI_USBCMD);
3885
3886         temp &= ~(EHCI_CMD_ASE | EHCI_CMD_PSE);
3887
3888         if (flags & (USB_HW_POWER_CONTROL |
3889             USB_HW_POWER_BULK)) {
3890                 DPRINTF("Async is active\n");
3891                 temp |= EHCI_CMD_ASE;
3892         }
3893         if (flags & (USB_HW_POWER_INTERRUPT |
3894             USB_HW_POWER_ISOC)) {
3895                 DPRINTF("Periodic is active\n");
3896                 temp |= EHCI_CMD_PSE;
3897         }
3898         EOWRITE4(sc, EHCI_USBCMD, temp);
3899
3900         USB_BUS_UNLOCK(bus);
3901
3902         return;
3903 }
3904
3905 struct usb_bus_methods ehci_bus_methods =
3906 {
3907         .endpoint_init = ehci_ep_init,
3908         .xfer_setup = ehci_xfer_setup,
3909         .xfer_unsetup = ehci_xfer_unsetup,
3910         .get_dma_delay = ehci_get_dma_delay,
3911         .device_resume = ehci_device_resume,
3912         .device_suspend = ehci_device_suspend,
3913         .set_hw_power = ehci_set_hw_power,
3914         .set_hw_power_sleep = ehci_set_hw_power_sleep,
3915         .roothub_exec = ehci_roothub_exec,
3916         .xfer_poll = ehci_do_poll,
3917 };