2 * Copyright (c) 2008 Hans Petter Selasky. All rights reserved.
3 * Copyright (c) 1998 The NetBSD Foundation, Inc. All rights reserved.
4 * Copyright (c) 1998 Lennart Augustsson. All rights reserved.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
32 * USB Open Host Controller driver.
34 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
35 * USB spec: http://www.usb.org/developers/docs/usbspec.zip
38 #include <sys/stdint.h>
39 #include <sys/stddef.h>
40 #include <sys/param.h>
41 #include <sys/queue.h>
42 #include <sys/types.h>
43 #include <sys/systm.h>
44 #include <sys/kernel.h>
46 #include <sys/module.h>
48 #include <sys/mutex.h>
49 #include <sys/condvar.h>
50 #include <sys/sysctl.h>
52 #include <sys/unistd.h>
53 #include <sys/callout.h>
54 #include <sys/malloc.h>
57 #include <dev/usb/usb.h>
58 #include <dev/usb/usbdi.h>
60 #define USB_DEBUG_VAR ohcidebug
62 #include <dev/usb/usb_core.h>
63 #include <dev/usb/usb_debug.h>
64 #include <dev/usb/usb_busdma.h>
65 #include <dev/usb/usb_process.h>
66 #include <dev/usb/usb_transfer.h>
67 #include <dev/usb/usb_device.h>
68 #include <dev/usb/usb_hub.h>
69 #include <dev/usb/usb_util.h>
71 #include <dev/usb/usb_controller.h>
72 #include <dev/usb/usb_bus.h>
73 #include <dev/usb/controller/ohci.h>
74 #include <dev/usb/controller/ohcireg.h>
76 #define OHCI_BUS2SC(bus) \
77 ((ohci_softc_t *)(((uint8_t *)(bus)) - \
78 ((uint8_t *)&(((ohci_softc_t *)0)->sc_bus))))
81 static int ohcidebug = 0;
83 SYSCTL_NODE(_hw_usb, OID_AUTO, ohci, CTLFLAG_RW, 0, "USB ohci");
84 SYSCTL_INT(_hw_usb_ohci, OID_AUTO, debug, CTLFLAG_RW,
85 &ohcidebug, 0, "ohci debug level");
87 TUNABLE_INT("hw.usb.ohci.debug", &ohcidebug);
89 static void ohci_dumpregs(ohci_softc_t *);
90 static void ohci_dump_tds(ohci_td_t *);
91 static uint8_t ohci_dump_td(ohci_td_t *);
92 static void ohci_dump_ed(ohci_ed_t *);
93 static uint8_t ohci_dump_itd(ohci_itd_t *);
94 static void ohci_dump_itds(ohci_itd_t *);
98 #define OBARR(sc) bus_space_barrier((sc)->sc_io_tag, (sc)->sc_io_hdl, 0, (sc)->sc_io_size, \
99 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
100 #define OWRITE1(sc, r, x) \
101 do { OBARR(sc); bus_space_write_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (r), (x)); } while (0)
102 #define OWRITE2(sc, r, x) \
103 do { OBARR(sc); bus_space_write_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (r), (x)); } while (0)
104 #define OWRITE4(sc, r, x) \
105 do { OBARR(sc); bus_space_write_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (r), (x)); } while (0)
106 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (r)))
107 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (r)))
108 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (r)))
110 #define OHCI_INTR_ENDPT 1
112 extern struct usb_bus_methods ohci_bus_methods;
113 extern struct usb_pipe_methods ohci_device_bulk_methods;
114 extern struct usb_pipe_methods ohci_device_ctrl_methods;
115 extern struct usb_pipe_methods ohci_device_intr_methods;
116 extern struct usb_pipe_methods ohci_device_isoc_methods;
118 static void ohci_do_poll(struct usb_bus *bus);
119 static void ohci_device_done(struct usb_xfer *xfer, usb_error_t error);
120 static void ohci_timeout(void *arg);
121 static uint8_t ohci_check_transfer(struct usb_xfer *xfer);
122 static void ohci_root_intr(ohci_softc_t *sc);
124 struct ohci_std_temp {
125 struct usb_page_cache *pc;
131 uint16_t max_frame_size;
133 uint8_t setup_alt_next;
137 static struct ohci_hcca *
138 ohci_get_hcca(ohci_softc_t *sc)
140 usb_pc_cpu_invalidate(&sc->sc_hw.hcca_pc);
141 return (sc->sc_hcca_p);
145 ohci_iterate_hw_softc(struct usb_bus *bus, usb_bus_mem_sub_cb_t *cb)
147 struct ohci_softc *sc = OHCI_BUS2SC(bus);
150 cb(bus, &sc->sc_hw.hcca_pc, &sc->sc_hw.hcca_pg,
151 sizeof(ohci_hcca_t), OHCI_HCCA_ALIGN);
153 cb(bus, &sc->sc_hw.ctrl_start_pc, &sc->sc_hw.ctrl_start_pg,
154 sizeof(ohci_ed_t), OHCI_ED_ALIGN);
156 cb(bus, &sc->sc_hw.bulk_start_pc, &sc->sc_hw.bulk_start_pg,
157 sizeof(ohci_ed_t), OHCI_ED_ALIGN);
159 cb(bus, &sc->sc_hw.isoc_start_pc, &sc->sc_hw.isoc_start_pg,
160 sizeof(ohci_ed_t), OHCI_ED_ALIGN);
162 for (i = 0; i != OHCI_NO_EDS; i++) {
163 cb(bus, sc->sc_hw.intr_start_pc + i, sc->sc_hw.intr_start_pg + i,
164 sizeof(ohci_ed_t), OHCI_ED_ALIGN);
169 ohci_controller_init(ohci_softc_t *sc, int do_suspend)
171 struct usb_page_search buf_res;
180 /* Determine in what context we are running. */
181 ctl = OREAD4(sc, OHCI_CONTROL);
183 /* SMM active, request change */
184 DPRINTF("SMM active, request owner change\n");
185 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_OCR);
186 for (i = 0; (i < 100) && (ctl & OHCI_IR); i++) {
187 usb_pause_mtx(NULL, hz / 1000);
188 ctl = OREAD4(sc, OHCI_CONTROL);
191 device_printf(sc->sc_bus.bdev,
192 "SMM does not respond, resetting\n");
193 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
197 DPRINTF("cold started\n");
199 /* controller was cold started */
201 USB_MS_TO_TICKS(USB_BUS_RESET_DELAY));
205 * This reset should not be necessary according to the OHCI spec, but
206 * without it some controllers do not start.
208 DPRINTF("%s: resetting\n", device_get_nameunit(sc->sc_bus.bdev));
209 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
212 USB_MS_TO_TICKS(USB_BUS_RESET_DELAY));
214 /* we now own the host controller and the bus has been reset */
215 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL));
217 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
218 /* nominal time for a reset is 10 us */
219 for (i = 0; i < 10; i++) {
221 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
227 device_printf(sc->sc_bus.bdev, "reset timeout\n");
228 return (USB_ERR_IOERROR);
231 if (ohcidebug > 15) {
237 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_SUSPEND);
238 return (USB_ERR_NORMAL_COMPLETION);
241 /* The controller is now in SUSPEND state, we have 2ms to finish. */
243 /* set up HC registers */
244 usbd_get_page(&sc->sc_hw.hcca_pc, 0, &buf_res);
245 OWRITE4(sc, OHCI_HCCA, buf_res.physaddr);
247 usbd_get_page(&sc->sc_hw.ctrl_start_pc, 0, &buf_res);
248 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, buf_res.physaddr);
250 usbd_get_page(&sc->sc_hw.bulk_start_pc, 0, &buf_res);
251 OWRITE4(sc, OHCI_BULK_HEAD_ED, buf_res.physaddr);
253 /* disable all interrupts and then switch on all desired interrupts */
254 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
255 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
256 /* switch on desired functional features */
257 ctl = OREAD4(sc, OHCI_CONTROL);
258 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
259 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
260 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL;
261 /* And finally start it! */
262 OWRITE4(sc, OHCI_CONTROL, ctl);
265 * The controller is now OPERATIONAL. Set a some final
266 * registers that should be set earlier, but that the
267 * controller ignores when in the SUSPEND state.
269 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
270 fm |= OHCI_FSMPS(ival) | ival;
271 OWRITE4(sc, OHCI_FM_INTERVAL, fm);
272 per = OHCI_PERIODIC(ival); /* 90% periodic */
273 OWRITE4(sc, OHCI_PERIODIC_START, per);
275 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
276 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
277 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
278 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
280 USB_MS_TO_TICKS(OHCI_ENABLE_POWER_DELAY));
281 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
284 * The AMD756 requires a delay before re-reading the register,
285 * otherwise it will occasionally report 0 ports.
288 for (i = 0; (i < 10) && (sc->sc_noport == 0); i++) {
290 USB_MS_TO_TICKS(OHCI_READ_DESC_DELAY));
291 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
299 return (USB_ERR_NORMAL_COMPLETION);
302 static struct ohci_ed *
303 ohci_init_ed(struct usb_page_cache *pc)
305 struct usb_page_search buf_res;
308 usbd_get_page(pc, 0, &buf_res);
312 ed->ed_self = htole32(buf_res.physaddr);
313 ed->ed_flags = htole32(OHCI_ED_SKIP);
320 ohci_init(ohci_softc_t *sc)
322 struct usb_page_search buf_res;
330 sc->sc_eintrs = OHCI_NORMAL_INTRS;
337 ohci_init_ed(&sc->sc_hw.ctrl_start_pc);
340 ohci_init_ed(&sc->sc_hw.bulk_start_pc);
343 ohci_init_ed(&sc->sc_hw.isoc_start_pc);
345 for (i = 0; i != OHCI_NO_EDS; i++) {
346 sc->sc_intr_p_last[i] =
347 ohci_init_ed(sc->sc_hw.intr_start_pc + i);
351 * the QHs are arranged to give poll intervals that are
352 * powers of 2 times 1ms
354 bit = OHCI_NO_EDS / 2;
361 y = (x ^ bit) | (bit / 2);
364 * the next QH has half the poll interval
366 ed_x = sc->sc_intr_p_last[x];
367 ed_y = sc->sc_intr_p_last[y];
370 ed_x->ed_next = ed_y->ed_self;
382 ed_int = sc->sc_intr_p_last[0];
383 ed_isc = sc->sc_isoc_p_last;
385 /* the last (1ms) QH */
386 ed_int->next = ed_isc;
387 ed_int->ed_next = ed_isc->ed_self;
389 usbd_get_page(&sc->sc_hw.hcca_pc, 0, &buf_res);
391 sc->sc_hcca_p = buf_res.buffer;
394 * Fill HCCA interrupt table. The bit reversal is to get
395 * the tree set up properly to spread the interrupts.
397 for (i = 0; i != OHCI_NO_INTRS; i++) {
398 sc->sc_hcca_p->hcca_interrupt_table[i] =
399 sc->sc_intr_p_last[i | (OHCI_NO_EDS / 2)]->ed_self;
401 /* flush all cache into memory */
403 usb_bus_mem_flush_all(&sc->sc_bus, &ohci_iterate_hw_softc);
405 /* set up the bus struct */
406 sc->sc_bus.methods = &ohci_bus_methods;
408 usb_callout_init_mtx(&sc->sc_tmo_rhsc, &sc->sc_bus.bus_mtx, 0);
411 if (ohcidebug > 15) {
412 for (i = 0; i != OHCI_NO_EDS; i++) {
414 ohci_dump_ed(sc->sc_intr_p_last[i]);
417 ohci_dump_ed(sc->sc_isoc_p_last);
421 sc->sc_bus.usbrev = USB_REV_1_0;
423 if (ohci_controller_init(sc, 0) != 0)
424 return (USB_ERR_INVAL);
426 /* catch any lost interrupts */
427 ohci_do_poll(&sc->sc_bus);
428 return (USB_ERR_NORMAL_COMPLETION);
432 * shut down the controller when the system is going down
435 ohci_detach(struct ohci_softc *sc)
437 USB_BUS_LOCK(&sc->sc_bus);
439 usb_callout_stop(&sc->sc_tmo_rhsc);
441 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
442 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
444 USB_BUS_UNLOCK(&sc->sc_bus);
446 /* XXX let stray task complete */
447 usb_pause_mtx(NULL, hz / 20);
449 usb_callout_drain(&sc->sc_tmo_rhsc);
453 ohci_suspend(ohci_softc_t *sc)
462 /* reset HC and leave it suspended */
463 ohci_controller_init(sc, 1);
467 ohci_resume(ohci_softc_t *sc)
476 /* some broken BIOSes never initialize the Controller chip */
477 ohci_controller_init(sc, 0);
479 /* catch any lost interrupts */
480 ohci_do_poll(&sc->sc_bus);
485 ohci_dumpregs(ohci_softc_t *sc)
487 struct ohci_hcca *hcca;
489 DPRINTF("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
490 OREAD4(sc, OHCI_REVISION),
491 OREAD4(sc, OHCI_CONTROL),
492 OREAD4(sc, OHCI_COMMAND_STATUS));
493 DPRINTF(" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
494 OREAD4(sc, OHCI_INTERRUPT_STATUS),
495 OREAD4(sc, OHCI_INTERRUPT_ENABLE),
496 OREAD4(sc, OHCI_INTERRUPT_DISABLE));
497 DPRINTF(" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
498 OREAD4(sc, OHCI_HCCA),
499 OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
500 OREAD4(sc, OHCI_CONTROL_HEAD_ED));
501 DPRINTF(" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
502 OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
503 OREAD4(sc, OHCI_BULK_HEAD_ED),
504 OREAD4(sc, OHCI_BULK_CURRENT_ED));
505 DPRINTF(" done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
506 OREAD4(sc, OHCI_DONE_HEAD),
507 OREAD4(sc, OHCI_FM_INTERVAL),
508 OREAD4(sc, OHCI_FM_REMAINING));
509 DPRINTF(" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
510 OREAD4(sc, OHCI_FM_NUMBER),
511 OREAD4(sc, OHCI_PERIODIC_START),
512 OREAD4(sc, OHCI_LS_THRESHOLD));
513 DPRINTF(" desca=0x%08x descb=0x%08x stat=0x%08x\n",
514 OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
515 OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
516 OREAD4(sc, OHCI_RH_STATUS));
517 DPRINTF(" port1=0x%08x port2=0x%08x\n",
518 OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
519 OREAD4(sc, OHCI_RH_PORT_STATUS(2)));
521 hcca = ohci_get_hcca(sc);
523 DPRINTF(" HCCA: frame_number=0x%04x done_head=0x%08x\n",
524 le32toh(hcca->hcca_frame_number),
525 le32toh(hcca->hcca_done_head));
528 ohci_dump_tds(ohci_td_t *std)
530 for (; std; std = std->obj_next) {
531 if (ohci_dump_td(std)) {
538 ohci_dump_td(ohci_td_t *std)
543 usb_pc_cpu_invalidate(std->page_cache);
545 td_flags = le32toh(std->td_flags);
546 temp = (std->td_next == 0);
548 printf("TD(%p) at 0x%08x: %s%s%s%s%s delay=%d ec=%d "
549 "cc=%d\ncbp=0x%08x next=0x%08x be=0x%08x\n",
550 std, le32toh(std->td_self),
551 (td_flags & OHCI_TD_R) ? "-R" : "",
552 (td_flags & OHCI_TD_OUT) ? "-OUT" : "",
553 (td_flags & OHCI_TD_IN) ? "-IN" : "",
554 ((td_flags & OHCI_TD_TOGGLE_MASK) == OHCI_TD_TOGGLE_1) ? "-TOG1" : "",
555 ((td_flags & OHCI_TD_TOGGLE_MASK) == OHCI_TD_TOGGLE_0) ? "-TOG0" : "",
556 OHCI_TD_GET_DI(td_flags),
557 OHCI_TD_GET_EC(td_flags),
558 OHCI_TD_GET_CC(td_flags),
559 le32toh(std->td_cbp),
560 le32toh(std->td_next),
561 le32toh(std->td_be));
567 ohci_dump_itd(ohci_itd_t *sitd)
573 usb_pc_cpu_invalidate(sitd->page_cache);
575 itd_flags = le32toh(sitd->itd_flags);
576 temp = (sitd->itd_next == 0);
578 printf("ITD(%p) at 0x%08x: sf=%d di=%d fc=%d cc=%d\n"
579 "bp0=0x%08x next=0x%08x be=0x%08x\n",
580 sitd, le32toh(sitd->itd_self),
581 OHCI_ITD_GET_SF(itd_flags),
582 OHCI_ITD_GET_DI(itd_flags),
583 OHCI_ITD_GET_FC(itd_flags),
584 OHCI_ITD_GET_CC(itd_flags),
585 le32toh(sitd->itd_bp0),
586 le32toh(sitd->itd_next),
587 le32toh(sitd->itd_be));
588 for (i = 0; i < OHCI_ITD_NOFFSET; i++) {
589 printf("offs[%d]=0x%04x ", i,
590 (uint32_t)le16toh(sitd->itd_offset[i]));
598 ohci_dump_itds(ohci_itd_t *sitd)
600 for (; sitd; sitd = sitd->obj_next) {
601 if (ohci_dump_itd(sitd)) {
608 ohci_dump_ed(ohci_ed_t *sed)
613 usb_pc_cpu_invalidate(sed->page_cache);
615 ed_flags = le32toh(sed->ed_flags);
616 ed_headp = le32toh(sed->ed_headp);
618 printf("ED(%p) at 0x%08x: addr=%d endpt=%d maxp=%d flags=%s%s%s%s%s\n"
619 "tailp=0x%08x headflags=%s%s headp=0x%08x nexted=0x%08x\n",
620 sed, le32toh(sed->ed_self),
621 OHCI_ED_GET_FA(ed_flags),
622 OHCI_ED_GET_EN(ed_flags),
623 OHCI_ED_GET_MAXP(ed_flags),
624 (ed_flags & OHCI_ED_DIR_OUT) ? "-OUT" : "",
625 (ed_flags & OHCI_ED_DIR_IN) ? "-IN" : "",
626 (ed_flags & OHCI_ED_SPEED) ? "-LOWSPEED" : "",
627 (ed_flags & OHCI_ED_SKIP) ? "-SKIP" : "",
628 (ed_flags & OHCI_ED_FORMAT_ISO) ? "-ISO" : "",
629 le32toh(sed->ed_tailp),
630 (ed_headp & OHCI_HALTED) ? "-HALTED" : "",
631 (ed_headp & OHCI_TOGGLECARRY) ? "-CARRY" : "",
632 le32toh(sed->ed_headp),
633 le32toh(sed->ed_next));
639 ohci_transfer_intr_enqueue(struct usb_xfer *xfer)
641 /* check for early completion */
642 if (ohci_check_transfer(xfer)) {
645 /* put transfer on interrupt queue */
646 usbd_transfer_enqueue(&xfer->xroot->bus->intr_q, xfer);
648 /* start timeout, if any */
649 if (xfer->timeout != 0) {
650 usbd_transfer_timeout_ms(xfer, &ohci_timeout, xfer->timeout);
654 #define OHCI_APPEND_QH(sed,last) (last) = _ohci_append_qh(sed,last)
656 _ohci_append_qh(ohci_ed_t *sed, ohci_ed_t *last)
658 DPRINTFN(11, "%p to %p\n", sed, last);
660 if (sed->prev != NULL) {
661 /* should not happen */
662 DPRINTFN(0, "ED already linked!\n");
665 /* (sc->sc_bus.bus_mtx) must be locked */
667 sed->next = last->next;
668 sed->ed_next = last->ed_next;
673 usb_pc_cpu_flush(sed->page_cache);
676 * the last->next->prev is never followed: sed->next->prev = sed;
680 last->ed_next = sed->ed_self;
682 usb_pc_cpu_flush(last->page_cache);
687 #define OHCI_REMOVE_QH(sed,last) (last) = _ohci_remove_qh(sed,last)
689 _ohci_remove_qh(ohci_ed_t *sed, ohci_ed_t *last)
691 DPRINTFN(11, "%p from %p\n", sed, last);
693 /* (sc->sc_bus.bus_mtx) must be locked */
695 /* only remove if not removed from a queue */
698 sed->prev->next = sed->next;
699 sed->prev->ed_next = sed->ed_next;
701 usb_pc_cpu_flush(sed->prev->page_cache);
704 sed->next->prev = sed->prev;
705 usb_pc_cpu_flush(sed->next->page_cache);
707 last = ((last == sed) ? sed->prev : last);
711 usb_pc_cpu_flush(sed->page_cache);
717 ohci_isoc_done(struct usb_xfer *xfer)
720 uint32_t *plen = xfer->frlengths;
721 volatile uint16_t *olen;
723 ohci_itd_t *td = xfer->td_transfer_first;
727 panic("%s:%d: out of TD's\n",
728 __FUNCTION__, __LINE__);
732 DPRINTF("isoc TD\n");
736 usb_pc_cpu_invalidate(td->page_cache);
738 nframes = td->frames;
739 olen = &td->itd_offset[0];
745 len = le16toh(*olen);
747 if ((len >> 12) == OHCI_CC_NOT_ACCESSED) {
750 len &= ((1 << 12) - 1);
754 len = 0;/* invalid length */
761 if (((void *)td) == xfer->td_transfer_last) {
767 xfer->aframes = xfer->nframes;
768 ohci_device_done(xfer, USB_ERR_NORMAL_COMPLETION);
772 static const char *const
778 "DATA_TOGGLE_MISMATCH",
781 "DEVICE_NOT_RESPONDING",
799 ohci_non_isoc_done_sub(struct usb_xfer *xfer)
802 ohci_td_t *td_alt_next;
809 td = xfer->td_transfer_cache;
810 td_alt_next = td->alt_next;
813 if (xfer->aframes != xfer->nframes) {
814 usbd_xfer_set_frame_len(xfer, xfer->aframes, 0);
818 usb_pc_cpu_invalidate(td->page_cache);
819 phy_start = le32toh(td->td_cbp);
820 td_flags = le32toh(td->td_flags);
821 cc = OHCI_TD_GET_CC(td_flags);
825 * short transfer - compute the number of remaining
826 * bytes in the hardware buffer:
828 phy_end = le32toh(td->td_be);
829 temp = (OHCI_PAGE(phy_start ^ phy_end) ?
830 (OHCI_PAGE_SIZE + 1) : 0x0001);
831 temp += OHCI_PAGE_OFFSET(phy_end);
832 temp -= OHCI_PAGE_OFFSET(phy_start);
834 if (temp > td->len) {
835 /* guard against corruption */
837 } else if (xfer->aframes != xfer->nframes) {
839 * Sum up total transfer length
842 xfer->frlengths[xfer->aframes] += td->len - temp;
845 if (xfer->aframes != xfer->nframes) {
846 /* transfer was complete */
847 xfer->frlengths[xfer->aframes] += td->len;
850 /* Check for last transfer */
851 if (((void *)td) == xfer->td_transfer_last) {
855 /* Check transfer status */
857 /* the transfer is finished */
861 /* Check for short transfer */
863 if (xfer->flags_int.short_frames_ok) {
864 /* follow alt next */
867 /* the transfer is finished */
874 if (td->alt_next != td_alt_next) {
875 /* this USB frame is complete */
880 /* update transfer cache */
882 xfer->td_transfer_cache = td;
884 DPRINTFN(16, "error cc=%d (%s)\n",
885 cc, ohci_cc_strs[cc]);
887 return ((cc == 0) ? USB_ERR_NORMAL_COMPLETION :
888 (cc == OHCI_CC_STALL) ? USB_ERR_STALLED : USB_ERR_IOERROR);
892 ohci_non_isoc_done(struct usb_xfer *xfer)
896 DPRINTFN(13, "xfer=%p endpoint=%p transfer done\n",
897 xfer, xfer->endpoint);
900 if (ohcidebug > 10) {
901 ohci_dump_tds(xfer->td_transfer_first);
907 xfer->td_transfer_cache = xfer->td_transfer_first;
909 if (xfer->flags_int.control_xfr) {
911 if (xfer->flags_int.control_hdr) {
913 err = ohci_non_isoc_done_sub(xfer);
917 if (xfer->td_transfer_cache == NULL) {
921 while (xfer->aframes != xfer->nframes) {
923 err = ohci_non_isoc_done_sub(xfer);
926 if (xfer->td_transfer_cache == NULL) {
931 if (xfer->flags_int.control_xfr &&
932 !xfer->flags_int.control_act) {
934 err = ohci_non_isoc_done_sub(xfer);
937 ohci_device_done(xfer, err);
940 /*------------------------------------------------------------------------*
941 * ohci_check_transfer_sub
942 *------------------------------------------------------------------------*/
944 ohci_check_transfer_sub(struct usb_xfer *xfer)
953 td = xfer->td_transfer_cache;
957 usb_pc_cpu_invalidate(td->page_cache);
958 phy_start = le32toh(td->td_cbp);
959 td_flags = le32toh(td->td_flags);
960 td_next = le32toh(td->td_next);
962 /* Check for last transfer */
963 if (((void *)td) == xfer->td_transfer_last) {
964 /* the transfer is finished */
968 /* Check transfer status */
969 cc = OHCI_TD_GET_CC(td_flags);
971 /* the transfer is finished */
976 * Check if we reached the last packet
977 * or if there is a short packet:
980 if (((td_next & (~0xF)) == OHCI_TD_NEXT_END) || phy_start) {
981 /* follow alt next */
988 /* update transfer cache */
990 xfer->td_transfer_cache = td;
994 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
996 ed->ed_headp = td->td_self;
997 usb_pc_cpu_flush(ed->page_cache);
999 DPRINTFN(13, "xfer=%p following alt next\n", xfer);
1002 * Make sure that the OHCI re-scans the schedule by
1003 * writing the BLF and CLF bits:
1006 if (xfer->xroot->udev->flags.self_suspended) {
1008 } else if (xfer->endpoint->methods == &ohci_device_bulk_methods) {
1009 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1011 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
1012 } else if (xfer->endpoint->methods == &ohci_device_ctrl_methods) {
1013 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1015 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1020 /*------------------------------------------------------------------------*
1021 * ohci_check_transfer
1024 * 0: USB transfer is not finished
1025 * Else: USB transfer is finished
1026 *------------------------------------------------------------------------*/
1028 ohci_check_transfer(struct usb_xfer *xfer)
1034 DPRINTFN(13, "xfer=%p checking transfer\n", xfer);
1036 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1038 usb_pc_cpu_invalidate(ed->page_cache);
1039 ed_headp = le32toh(ed->ed_headp);
1040 ed_tailp = le32toh(ed->ed_tailp);
1042 if ((ed_headp & OHCI_HALTED) ||
1043 (((ed_headp ^ ed_tailp) & (~0xF)) == 0)) {
1044 if (xfer->endpoint->methods == &ohci_device_isoc_methods) {
1045 /* isochronous transfer */
1046 ohci_isoc_done(xfer);
1048 if (xfer->flags_int.short_frames_ok) {
1049 ohci_check_transfer_sub(xfer);
1050 if (xfer->td_transfer_cache) {
1051 /* not finished yet */
1055 /* store data-toggle */
1056 if (ed_headp & OHCI_TOGGLECARRY) {
1057 xfer->endpoint->toggle_next = 1;
1059 xfer->endpoint->toggle_next = 0;
1062 /* non-isochronous transfer */
1063 ohci_non_isoc_done(xfer);
1067 DPRINTFN(13, "xfer=%p is still active\n", xfer);
1072 ohci_rhsc_enable(ohci_softc_t *sc)
1076 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1078 sc->sc_eintrs |= OHCI_RHSC;
1079 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
1081 /* acknowledge any RHSC interrupt */
1082 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_RHSC);
1088 ohci_interrupt_poll(ohci_softc_t *sc)
1090 struct usb_xfer *xfer;
1093 TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
1095 * check if transfer is transferred
1097 if (ohci_check_transfer(xfer)) {
1098 /* queue has been modified */
1104 /*------------------------------------------------------------------------*
1105 * ohci_interrupt - OHCI interrupt handler
1107 * NOTE: Do not access "sc->sc_bus.bdev" inside the interrupt handler,
1108 * hence the interrupt handler will be setup before "sc->sc_bus.bdev"
1110 *------------------------------------------------------------------------*/
1112 ohci_interrupt(ohci_softc_t *sc)
1114 struct ohci_hcca *hcca;
1118 USB_BUS_LOCK(&sc->sc_bus);
1120 hcca = ohci_get_hcca(sc);
1122 DPRINTFN(16, "real interrupt\n");
1125 if (ohcidebug > 15) {
1130 done = le32toh(hcca->hcca_done_head);
1133 * The LSb of done is used to inform the HC Driver that an interrupt
1134 * condition exists for both the Done list and for another event
1135 * recorded in HcInterruptStatus. On an interrupt from the HC, the
1136 * HC Driver checks the HccaDoneHead Value. If this value is 0, then
1137 * the interrupt was caused by other than the HccaDoneHead update
1138 * and the HcInterruptStatus register needs to be accessed to
1139 * determine that exact interrupt cause. If HccaDoneHead is nonzero,
1140 * then a Done list update interrupt is indicated and if the LSb of
1141 * done is nonzero, then an additional interrupt event is indicated
1142 * and HcInterruptStatus should be checked to determine its cause.
1147 if (done & ~OHCI_DONE_INTRS) {
1150 if (done & OHCI_DONE_INTRS) {
1151 status |= OREAD4(sc, OHCI_INTERRUPT_STATUS);
1153 hcca->hcca_done_head = 0;
1155 usb_pc_cpu_flush(&sc->sc_hw.hcca_pc);
1157 status = OREAD4(sc, OHCI_INTERRUPT_STATUS) & ~OHCI_WDH;
1160 status &= ~OHCI_MIE;
1163 * nothing to be done (PCI shared
1168 OWRITE4(sc, OHCI_INTERRUPT_STATUS, status); /* Acknowledge */
1170 status &= sc->sc_eintrs;
1174 if (status & (OHCI_SO | OHCI_RD | OHCI_UE | OHCI_RHSC)) {
1176 if (status & OHCI_SO) {
1180 if (status & OHCI_RD) {
1181 printf("%s: resume detect\n", __FUNCTION__);
1182 /* XXX process resume detect */
1184 if (status & OHCI_UE) {
1185 printf("%s: unrecoverable error, "
1186 "controller halted\n", __FUNCTION__);
1187 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1190 if (status & OHCI_RHSC) {
1192 * Disable RHSC interrupt for now, because it will be
1193 * on until the port has been reset.
1195 sc->sc_eintrs &= ~OHCI_RHSC;
1196 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC);
1200 /* do not allow RHSC interrupts > 1 per second */
1201 usb_callout_reset(&sc->sc_tmo_rhsc, hz,
1202 (void *)&ohci_rhsc_enable, sc);
1205 status &= ~(OHCI_RHSC | OHCI_WDH | OHCI_SO);
1207 /* Block unprocessed interrupts. XXX */
1208 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, status);
1209 sc->sc_eintrs &= ~status;
1210 printf("%s: blocking intrs 0x%x\n",
1211 __FUNCTION__, status);
1213 /* poll all the USB transfers */
1214 ohci_interrupt_poll(sc);
1217 USB_BUS_UNLOCK(&sc->sc_bus);
1221 * called when a request does not complete
1224 ohci_timeout(void *arg)
1226 struct usb_xfer *xfer = arg;
1228 DPRINTF("xfer=%p\n", xfer);
1230 USB_BUS_LOCK_ASSERT(xfer->xroot->bus, MA_OWNED);
1232 /* transfer is transferred */
1233 ohci_device_done(xfer, USB_ERR_TIMEOUT);
1237 ohci_do_poll(struct usb_bus *bus)
1239 struct ohci_softc *sc = OHCI_BUS2SC(bus);
1241 USB_BUS_LOCK(&sc->sc_bus);
1242 ohci_interrupt_poll(sc);
1243 USB_BUS_UNLOCK(&sc->sc_bus);
1247 ohci_setup_standard_chain_sub(struct ohci_std_temp *temp)
1249 struct usb_page_search buf_res;
1252 ohci_td_t *td_alt_next;
1253 uint32_t buf_offset;
1256 uint8_t shortpkt_old;
1261 shortpkt_old = temp->shortpkt;
1262 len_old = temp->len;
1265 /* software is used to detect short incoming transfers */
1267 if ((temp->td_flags & htole32(OHCI_TD_DP_MASK)) == htole32(OHCI_TD_IN)) {
1268 temp->td_flags |= htole32(OHCI_TD_R);
1270 temp->td_flags &= ~htole32(OHCI_TD_R);
1276 td_next = temp->td_next;
1280 if (temp->len == 0) {
1282 if (temp->shortpkt) {
1285 /* send a Zero Length Packet, ZLP, last */
1292 average = temp->average;
1294 if (temp->len < average) {
1295 if (temp->len % temp->max_frame_size) {
1298 average = temp->len;
1302 if (td_next == NULL) {
1303 panic("%s: out of OHCI transfer descriptors!", __FUNCTION__);
1308 td_next = td->obj_next;
1310 /* check if we are pre-computing */
1314 /* update remaining length */
1316 temp->len -= average;
1320 /* fill out current TD */
1321 td->td_flags = temp->td_flags;
1323 /* the next TD uses TOGGLE_CARRY */
1324 temp->td_flags &= ~htole32(OHCI_TD_TOGGLE_MASK);
1328 * The buffer start and end phys addresses should be
1329 * 0x0 for a zero length packet.
1337 usbd_get_page(temp->pc, buf_offset, &buf_res);
1338 td->td_cbp = htole32(buf_res.physaddr);
1339 buf_offset += (average - 1);
1341 usbd_get_page(temp->pc, buf_offset, &buf_res);
1342 td->td_be = htole32(buf_res.physaddr);
1347 /* update remaining length */
1349 temp->len -= average;
1352 if ((td_next == td_alt_next) && temp->setup_alt_next) {
1353 /* we need to receive these frames one by one ! */
1354 td->td_flags &= htole32(~OHCI_TD_INTR_MASK);
1355 td->td_flags |= htole32(OHCI_TD_SET_DI(1));
1356 td->td_next = htole32(OHCI_TD_NEXT_END);
1359 /* link the current TD with the next one */
1360 td->td_next = td_next->td_self;
1364 td->alt_next = td_alt_next;
1366 usb_pc_cpu_flush(td->page_cache);
1372 /* setup alt next pointer, if any */
1373 if (temp->last_frame) {
1374 /* no alternate next */
1377 /* we use this field internally */
1378 td_alt_next = td_next;
1382 temp->shortpkt = shortpkt_old;
1383 temp->len = len_old;
1387 temp->td_next = td_next;
1391 ohci_setup_standard_chain(struct usb_xfer *xfer, ohci_ed_t **ed_last)
1393 struct ohci_std_temp temp;
1394 struct usb_pipe_methods *methods;
1400 DPRINTFN(9, "addr=%d endpt=%d sumlen=%d speed=%d\n",
1401 xfer->address, UE_GET_ADDR(xfer->endpointno),
1402 xfer->sumlen, usbd_get_speed(xfer->xroot->udev));
1404 temp.average = xfer->max_hc_frame_size;
1405 temp.max_frame_size = xfer->max_frame_size;
1407 /* toggle the DMA set we are using */
1408 xfer->flags_int.curr_dma_set ^= 1;
1410 /* get next DMA set */
1411 td = xfer->td_start[xfer->flags_int.curr_dma_set];
1413 xfer->td_transfer_first = td;
1414 xfer->td_transfer_cache = td;
1418 temp.last_frame = 0;
1419 temp.setup_alt_next = xfer->flags_int.short_frames_ok;
1421 methods = xfer->endpoint->methods;
1423 /* check if we should prepend a setup message */
1425 if (xfer->flags_int.control_xfr) {
1426 if (xfer->flags_int.control_hdr) {
1428 temp.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC |
1429 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1431 temp.len = xfer->frlengths[0];
1432 temp.pc = xfer->frbuffers + 0;
1433 temp.shortpkt = temp.len ? 1 : 0;
1434 /* check for last frame */
1435 if (xfer->nframes == 1) {
1436 /* no STATUS stage yet, SETUP is last */
1437 if (xfer->flags_int.control_act) {
1438 temp.last_frame = 1;
1439 temp.setup_alt_next = 0;
1442 ohci_setup_standard_chain_sub(&temp);
1445 * XXX assume that the setup message is
1446 * contained within one USB packet:
1448 xfer->endpoint->toggle_next = 1;
1454 temp.td_flags = htole32(OHCI_TD_NOCC | OHCI_TD_NOINTR);
1456 /* set data toggle */
1458 if (xfer->endpoint->toggle_next) {
1459 temp.td_flags |= htole32(OHCI_TD_TOGGLE_1);
1461 temp.td_flags |= htole32(OHCI_TD_TOGGLE_0);
1464 /* set endpoint direction */
1466 if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN) {
1467 temp.td_flags |= htole32(OHCI_TD_IN);
1469 temp.td_flags |= htole32(OHCI_TD_OUT);
1472 while (x != xfer->nframes) {
1474 /* DATA0 / DATA1 message */
1476 temp.len = xfer->frlengths[x];
1477 temp.pc = xfer->frbuffers + x;
1481 if (x == xfer->nframes) {
1482 if (xfer->flags_int.control_xfr) {
1483 /* no STATUS stage yet, DATA is last */
1484 if (xfer->flags_int.control_act) {
1485 temp.last_frame = 1;
1486 temp.setup_alt_next = 0;
1489 temp.last_frame = 1;
1490 temp.setup_alt_next = 0;
1493 if (temp.len == 0) {
1495 /* make sure that we send an USB packet */
1501 /* regular data transfer */
1503 temp.shortpkt = (xfer->flags.force_short_xfer) ? 0 : 1;
1506 ohci_setup_standard_chain_sub(&temp);
1509 /* check if we should append a status stage */
1511 if (xfer->flags_int.control_xfr &&
1512 !xfer->flags_int.control_act) {
1515 * Send a DATA1 message and invert the current endpoint
1519 /* set endpoint direction and data toggle */
1521 if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN) {
1522 temp.td_flags = htole32(OHCI_TD_OUT |
1523 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1525 temp.td_flags = htole32(OHCI_TD_IN |
1526 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1532 temp.last_frame = 1;
1533 temp.setup_alt_next = 0;
1535 ohci_setup_standard_chain_sub(&temp);
1539 /* Ensure that last TD is terminating: */
1540 td->td_next = htole32(OHCI_TD_NEXT_END);
1541 td->td_flags &= ~htole32(OHCI_TD_INTR_MASK);
1542 td->td_flags |= htole32(OHCI_TD_SET_DI(1));
1544 usb_pc_cpu_flush(td->page_cache);
1546 /* must have at least one frame! */
1548 xfer->td_transfer_last = td;
1551 if (ohcidebug > 8) {
1552 DPRINTF("nexttog=%d; data before transfer:\n",
1553 xfer->endpoint->toggle_next);
1554 ohci_dump_tds(xfer->td_transfer_first);
1558 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1560 ed_flags = (OHCI_ED_SET_FA(xfer->address) |
1561 OHCI_ED_SET_EN(UE_GET_ADDR(xfer->endpointno)) |
1562 OHCI_ED_SET_MAXP(xfer->max_frame_size));
1564 ed_flags |= (OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD);
1566 if (xfer->xroot->udev->speed == USB_SPEED_LOW) {
1567 ed_flags |= OHCI_ED_SPEED;
1569 ed->ed_flags = htole32(ed_flags);
1571 td = xfer->td_transfer_first;
1573 ed->ed_headp = td->td_self;
1575 if (xfer->xroot->udev->flags.self_suspended == 0) {
1576 /* the append function will flush the endpoint descriptor */
1577 OHCI_APPEND_QH(ed, *ed_last);
1579 if (methods == &ohci_device_bulk_methods) {
1580 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1582 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
1584 if (methods == &ohci_device_ctrl_methods) {
1585 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1587 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1590 usb_pc_cpu_flush(ed->page_cache);
1595 ohci_root_intr(ohci_softc_t *sc)
1601 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1603 /* clear any old interrupt data */
1604 memset(sc->sc_hub_idata, 0, sizeof(sc->sc_hub_idata));
1606 hstatus = OREAD4(sc, OHCI_RH_STATUS);
1607 DPRINTF("sc=%p hstatus=0x%08x\n",
1611 m = (sc->sc_noport + 1);
1612 if (m > (8 * sizeof(sc->sc_hub_idata))) {
1613 m = (8 * sizeof(sc->sc_hub_idata));
1615 for (i = 1; i < m; i++) {
1616 /* pick out CHANGE bits from the status register */
1617 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) {
1618 sc->sc_hub_idata[i / 8] |= 1 << (i % 8);
1619 DPRINTF("port %d changed\n", i);
1623 uhub_root_intr(&sc->sc_bus, sc->sc_hub_idata,
1624 sizeof(sc->sc_hub_idata));
1627 /* NOTE: "done" can be run two times in a row,
1628 * from close and from interrupt
1631 ohci_device_done(struct usb_xfer *xfer, usb_error_t error)
1633 struct usb_pipe_methods *methods = xfer->endpoint->methods;
1634 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1637 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1640 DPRINTFN(2, "xfer=%p, endpoint=%p, error=%d\n",
1641 xfer, xfer->endpoint, error);
1643 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1645 usb_pc_cpu_invalidate(ed->page_cache);
1647 if (methods == &ohci_device_bulk_methods) {
1648 OHCI_REMOVE_QH(ed, sc->sc_bulk_p_last);
1650 if (methods == &ohci_device_ctrl_methods) {
1651 OHCI_REMOVE_QH(ed, sc->sc_ctrl_p_last);
1653 if (methods == &ohci_device_intr_methods) {
1654 OHCI_REMOVE_QH(ed, sc->sc_intr_p_last[xfer->qh_pos]);
1656 if (methods == &ohci_device_isoc_methods) {
1657 OHCI_REMOVE_QH(ed, sc->sc_isoc_p_last);
1659 xfer->td_transfer_first = NULL;
1660 xfer->td_transfer_last = NULL;
1662 /* dequeue transfer and start next transfer */
1663 usbd_transfer_done(xfer, error);
1666 /*------------------------------------------------------------------------*
1668 *------------------------------------------------------------------------*/
1670 ohci_device_bulk_open(struct usb_xfer *xfer)
1676 ohci_device_bulk_close(struct usb_xfer *xfer)
1678 ohci_device_done(xfer, USB_ERR_CANCELLED);
1682 ohci_device_bulk_enter(struct usb_xfer *xfer)
1688 ohci_device_bulk_start(struct usb_xfer *xfer)
1690 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1692 /* setup TD's and QH */
1693 ohci_setup_standard_chain(xfer, &sc->sc_bulk_p_last);
1695 /* put transfer on interrupt queue */
1696 ohci_transfer_intr_enqueue(xfer);
1699 struct usb_pipe_methods ohci_device_bulk_methods =
1701 .open = ohci_device_bulk_open,
1702 .close = ohci_device_bulk_close,
1703 .enter = ohci_device_bulk_enter,
1704 .start = ohci_device_bulk_start,
1707 /*------------------------------------------------------------------------*
1708 * ohci control support
1709 *------------------------------------------------------------------------*/
1711 ohci_device_ctrl_open(struct usb_xfer *xfer)
1717 ohci_device_ctrl_close(struct usb_xfer *xfer)
1719 ohci_device_done(xfer, USB_ERR_CANCELLED);
1723 ohci_device_ctrl_enter(struct usb_xfer *xfer)
1729 ohci_device_ctrl_start(struct usb_xfer *xfer)
1731 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1733 /* setup TD's and QH */
1734 ohci_setup_standard_chain(xfer, &sc->sc_ctrl_p_last);
1736 /* put transfer on interrupt queue */
1737 ohci_transfer_intr_enqueue(xfer);
1740 struct usb_pipe_methods ohci_device_ctrl_methods =
1742 .open = ohci_device_ctrl_open,
1743 .close = ohci_device_ctrl_close,
1744 .enter = ohci_device_ctrl_enter,
1745 .start = ohci_device_ctrl_start,
1748 /*------------------------------------------------------------------------*
1749 * ohci interrupt support
1750 *------------------------------------------------------------------------*/
1752 ohci_device_intr_open(struct usb_xfer *xfer)
1754 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1760 bit = OHCI_NO_EDS / 2;
1762 if (xfer->interval >= bit) {
1766 if (sc->sc_intr_stat[x] <
1767 sc->sc_intr_stat[best]) {
1777 sc->sc_intr_stat[best]++;
1778 xfer->qh_pos = best;
1780 DPRINTFN(3, "best=%d interval=%d\n",
1781 best, xfer->interval);
1785 ohci_device_intr_close(struct usb_xfer *xfer)
1787 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1789 sc->sc_intr_stat[xfer->qh_pos]--;
1791 ohci_device_done(xfer, USB_ERR_CANCELLED);
1795 ohci_device_intr_enter(struct usb_xfer *xfer)
1801 ohci_device_intr_start(struct usb_xfer *xfer)
1803 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1805 /* setup TD's and QH */
1806 ohci_setup_standard_chain(xfer, &sc->sc_intr_p_last[xfer->qh_pos]);
1808 /* put transfer on interrupt queue */
1809 ohci_transfer_intr_enqueue(xfer);
1812 struct usb_pipe_methods ohci_device_intr_methods =
1814 .open = ohci_device_intr_open,
1815 .close = ohci_device_intr_close,
1816 .enter = ohci_device_intr_enter,
1817 .start = ohci_device_intr_start,
1820 /*------------------------------------------------------------------------*
1821 * ohci isochronous support
1822 *------------------------------------------------------------------------*/
1824 ohci_device_isoc_open(struct usb_xfer *xfer)
1830 ohci_device_isoc_close(struct usb_xfer *xfer)
1833 ohci_device_done(xfer, USB_ERR_CANCELLED);
1837 ohci_device_isoc_enter(struct usb_xfer *xfer)
1839 struct usb_page_search buf_res;
1840 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1841 struct ohci_hcca *hcca;
1842 uint32_t buf_offset;
1846 uint16_t itd_offset[OHCI_ITD_NOFFSET];
1850 ohci_itd_t *td_last = NULL;
1853 hcca = ohci_get_hcca(sc);
1855 nframes = le32toh(hcca->hcca_frame_number);
1857 DPRINTFN(6, "xfer=%p isoc_next=%u nframes=%u hcca_fn=%u\n",
1858 xfer, xfer->endpoint->isoc_next, xfer->nframes, nframes);
1860 if ((xfer->endpoint->is_synced == 0) ||
1861 (((nframes - xfer->endpoint->isoc_next) & 0xFFFF) < xfer->nframes) ||
1862 (((xfer->endpoint->isoc_next - nframes) & 0xFFFF) >= 128)) {
1864 * If there is data underflow or the pipe queue is empty we
1865 * schedule the transfer a few frames ahead of the current
1866 * frame position. Else two isochronous transfers might
1869 xfer->endpoint->isoc_next = (nframes + 3) & 0xFFFF;
1870 xfer->endpoint->is_synced = 1;
1871 DPRINTFN(3, "start next=%d\n", xfer->endpoint->isoc_next);
1874 * compute how many milliseconds the insertion is ahead of the
1875 * current frame position:
1877 buf_offset = ((xfer->endpoint->isoc_next - nframes) & 0xFFFF);
1880 * pre-compute when the isochronous transfer will be finished:
1882 xfer->isoc_time_complete =
1883 (usb_isoc_time_expand(&sc->sc_bus, nframes) + buf_offset +
1886 /* get the real number of frames */
1888 nframes = xfer->nframes;
1892 plen = xfer->frlengths;
1894 /* toggle the DMA set we are using */
1895 xfer->flags_int.curr_dma_set ^= 1;
1897 /* get next DMA set */
1898 td = xfer->td_start[xfer->flags_int.curr_dma_set];
1900 xfer->td_transfer_first = td;
1907 panic("%s:%d: out of TD's\n",
1908 __FUNCTION__, __LINE__);
1910 itd_offset[ncur] = length;
1911 buf_offset += *plen;
1916 if ( /* check if the ITD is full */
1917 (ncur == OHCI_ITD_NOFFSET) ||
1918 /* check if we have put more than 4K into the ITD */
1919 (length & 0xF000) ||
1920 /* check if it is the last frame */
1923 /* fill current ITD */
1924 td->itd_flags = htole32(
1926 OHCI_ITD_SET_SF(xfer->endpoint->isoc_next) |
1928 OHCI_ITD_SET_FC(ncur));
1931 xfer->endpoint->isoc_next += ncur;
1939 td->itd_offset[ncur] =
1940 htole16(OHCI_ITD_MK_OFFS(0));
1943 usbd_get_page(xfer->frbuffers, buf_offset - length, &buf_res);
1944 length = OHCI_PAGE_MASK(buf_res.physaddr);
1946 OHCI_PAGE(buf_res.physaddr);
1947 td->itd_bp0 = htole32(buf_res.physaddr);
1948 usbd_get_page(xfer->frbuffers, buf_offset - 1, &buf_res);
1949 td->itd_be = htole32(buf_res.physaddr);
1952 itd_offset[ncur] += length;
1954 OHCI_ITD_MK_OFFS(itd_offset[ncur]);
1955 td->itd_offset[ncur] =
1956 htole16(itd_offset[ncur]);
1965 /* link the last TD with the next one */
1966 td_last->itd_next = td->itd_self;
1968 usb_pc_cpu_flush(td_last->page_cache);
1972 /* update the last TD */
1973 td_last->itd_flags &= ~htole32(OHCI_ITD_NOINTR);
1974 td_last->itd_flags |= htole32(OHCI_ITD_SET_DI(0));
1975 td_last->itd_next = 0;
1977 usb_pc_cpu_flush(td_last->page_cache);
1979 xfer->td_transfer_last = td_last;
1982 if (ohcidebug > 8) {
1983 DPRINTF("data before transfer:\n");
1984 ohci_dump_itds(xfer->td_transfer_first);
1987 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1989 if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN)
1990 ed_flags = (OHCI_ED_DIR_IN | OHCI_ED_FORMAT_ISO);
1992 ed_flags = (OHCI_ED_DIR_OUT | OHCI_ED_FORMAT_ISO);
1994 ed_flags |= (OHCI_ED_SET_FA(xfer->address) |
1995 OHCI_ED_SET_EN(UE_GET_ADDR(xfer->endpointno)) |
1996 OHCI_ED_SET_MAXP(xfer->max_frame_size));
1998 if (xfer->xroot->udev->speed == USB_SPEED_LOW) {
1999 ed_flags |= OHCI_ED_SPEED;
2001 ed->ed_flags = htole32(ed_flags);
2003 td = xfer->td_transfer_first;
2005 ed->ed_headp = td->itd_self;
2007 /* isochronous transfers are not affected by suspend / resume */
2008 /* the append function will flush the endpoint descriptor */
2010 OHCI_APPEND_QH(ed, sc->sc_isoc_p_last);
2014 ohci_device_isoc_start(struct usb_xfer *xfer)
2016 /* put transfer on interrupt queue */
2017 ohci_transfer_intr_enqueue(xfer);
2020 struct usb_pipe_methods ohci_device_isoc_methods =
2022 .open = ohci_device_isoc_open,
2023 .close = ohci_device_isoc_close,
2024 .enter = ohci_device_isoc_enter,
2025 .start = ohci_device_isoc_start,
2028 /*------------------------------------------------------------------------*
2029 * ohci root control support
2030 *------------------------------------------------------------------------*
2031 * Simulate a hardware hub by handling all the necessary requests.
2032 *------------------------------------------------------------------------*/
2035 struct usb_device_descriptor ohci_devd =
2037 sizeof(struct usb_device_descriptor),
2038 UDESC_DEVICE, /* type */
2039 {0x00, 0x01}, /* USB version */
2040 UDCLASS_HUB, /* class */
2041 UDSUBCLASS_HUB, /* subclass */
2042 UDPROTO_FSHUB, /* protocol */
2043 64, /* max packet */
2044 {0}, {0}, {0x00, 0x01}, /* device id */
2045 1, 2, 0, /* string indicies */
2046 1 /* # of configurations */
2050 struct ohci_config_desc ohci_confd =
2053 .bLength = sizeof(struct usb_config_descriptor),
2054 .bDescriptorType = UDESC_CONFIG,
2055 .wTotalLength[0] = sizeof(ohci_confd),
2057 .bConfigurationValue = 1,
2058 .iConfiguration = 0,
2059 .bmAttributes = UC_SELF_POWERED,
2060 .bMaxPower = 0, /* max power */
2063 .bLength = sizeof(struct usb_interface_descriptor),
2064 .bDescriptorType = UDESC_INTERFACE,
2066 .bInterfaceClass = UICLASS_HUB,
2067 .bInterfaceSubClass = UISUBCLASS_HUB,
2068 .bInterfaceProtocol = 0,
2071 .bLength = sizeof(struct usb_endpoint_descriptor),
2072 .bDescriptorType = UDESC_ENDPOINT,
2073 .bEndpointAddress = UE_DIR_IN | OHCI_INTR_ENDPT,
2074 .bmAttributes = UE_INTERRUPT,
2075 .wMaxPacketSize[0] = 32,/* max packet (255 ports) */
2081 struct usb_hub_descriptor ohci_hubd =
2083 0, /* dynamic length */
2093 ohci_roothub_exec(struct usb_device *udev,
2094 struct usb_device_request *req, const void **pptr, uint16_t *plength)
2096 ohci_softc_t *sc = OHCI_BUS2SC(udev->bus);
2098 const char *str_ptr;
2107 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
2110 ptr = (const void *)&sc->sc_hub_desc.temp;
2114 value = UGETW(req->wValue);
2115 index = UGETW(req->wIndex);
2117 DPRINTFN(3, "type=0x%02x request=0x%02x wLen=0x%04x "
2118 "wValue=0x%04x wIndex=0x%04x\n",
2119 req->bmRequestType, req->bRequest,
2120 UGETW(req->wLength), value, index);
2122 #define C(x,y) ((x) | ((y) << 8))
2123 switch (C(req->bRequest, req->bmRequestType)) {
2124 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
2125 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
2126 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
2128 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2129 * for the integrated root hub.
2132 case C(UR_GET_CONFIG, UT_READ_DEVICE):
2134 sc->sc_hub_desc.temp[0] = sc->sc_conf;
2136 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2137 switch (value >> 8) {
2139 if ((value & 0xff) != 0) {
2140 err = USB_ERR_IOERROR;
2143 len = sizeof(ohci_devd);
2144 ptr = (const void *)&ohci_devd;
2148 if ((value & 0xff) != 0) {
2149 err = USB_ERR_IOERROR;
2152 len = sizeof(ohci_confd);
2153 ptr = (const void *)&ohci_confd;
2157 switch (value & 0xff) {
2158 case 0: /* Language table */
2162 case 1: /* Vendor */
2163 str_ptr = sc->sc_vendor;
2166 case 2: /* Product */
2167 str_ptr = "OHCI root HUB";
2175 len = usb_make_str_desc(
2176 sc->sc_hub_desc.temp,
2177 sizeof(sc->sc_hub_desc.temp),
2182 err = USB_ERR_IOERROR;
2186 case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
2188 sc->sc_hub_desc.temp[0] = 0;
2190 case C(UR_GET_STATUS, UT_READ_DEVICE):
2192 USETW(sc->sc_hub_desc.stat.wStatus, UDS_SELF_POWERED);
2194 case C(UR_GET_STATUS, UT_READ_INTERFACE):
2195 case C(UR_GET_STATUS, UT_READ_ENDPOINT):
2197 USETW(sc->sc_hub_desc.stat.wStatus, 0);
2199 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
2200 if (value >= OHCI_MAX_DEVICES) {
2201 err = USB_ERR_IOERROR;
2204 sc->sc_addr = value;
2206 case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
2207 if ((value != 0) && (value != 1)) {
2208 err = USB_ERR_IOERROR;
2211 sc->sc_conf = value;
2213 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2215 case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2216 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2217 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2218 err = USB_ERR_IOERROR;
2220 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2222 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2225 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2227 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2228 DPRINTFN(9, "UR_CLEAR_PORT_FEATURE "
2229 "port=%d feature=%d\n",
2232 (index > sc->sc_noport)) {
2233 err = USB_ERR_IOERROR;
2236 port = OHCI_RH_PORT_STATUS(index);
2238 case UHF_PORT_ENABLE:
2239 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
2241 case UHF_PORT_SUSPEND:
2242 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
2244 case UHF_PORT_POWER:
2245 /* Yes, writing to the LOW_SPEED bit clears power. */
2246 OWRITE4(sc, port, UPS_LOW_SPEED);
2248 case UHF_C_PORT_CONNECTION:
2249 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
2251 case UHF_C_PORT_ENABLE:
2252 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
2254 case UHF_C_PORT_SUSPEND:
2255 OWRITE4(sc, port, UPS_C_SUSPEND << 16);
2257 case UHF_C_PORT_OVER_CURRENT:
2258 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
2260 case UHF_C_PORT_RESET:
2261 OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
2264 err = USB_ERR_IOERROR;
2268 case UHF_C_PORT_CONNECTION:
2269 case UHF_C_PORT_ENABLE:
2270 case UHF_C_PORT_SUSPEND:
2271 case UHF_C_PORT_OVER_CURRENT:
2272 case UHF_C_PORT_RESET:
2273 /* enable RHSC interrupt if condition is cleared. */
2274 if ((OREAD4(sc, port) >> 16) == 0)
2275 ohci_rhsc_enable(sc);
2281 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2282 if ((value & 0xff) != 0) {
2283 err = USB_ERR_IOERROR;
2286 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
2288 sc->sc_hub_desc.hubd = ohci_hubd;
2289 sc->sc_hub_desc.hubd.bNbrPorts = sc->sc_noport;
2290 USETW(sc->sc_hub_desc.hubd.wHubCharacteristics,
2291 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
2292 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
2293 /* XXX overcurrent */
2295 sc->sc_hub_desc.hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
2296 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
2298 for (l = 0; l < sc->sc_noport; l++) {
2300 sc->sc_hub_desc.hubd.DeviceRemovable[l / 8] |= (1 << (l % 8));
2304 sc->sc_hub_desc.hubd.bDescLength =
2305 8 + ((sc->sc_noport + 7) / 8);
2306 len = sc->sc_hub_desc.hubd.bDescLength;
2309 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2311 memset(sc->sc_hub_desc.temp, 0, 16);
2313 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2314 DPRINTFN(9, "get port status i=%d\n",
2317 (index > sc->sc_noport)) {
2318 err = USB_ERR_IOERROR;
2321 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
2322 DPRINTFN(9, "port status=0x%04x\n", v);
2323 USETW(sc->sc_hub_desc.ps.wPortStatus, v);
2324 USETW(sc->sc_hub_desc.ps.wPortChange, v >> 16);
2325 len = sizeof(sc->sc_hub_desc.ps);
2327 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2328 err = USB_ERR_IOERROR;
2330 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2332 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2334 (index > sc->sc_noport)) {
2335 err = USB_ERR_IOERROR;
2338 port = OHCI_RH_PORT_STATUS(index);
2340 case UHF_PORT_ENABLE:
2341 OWRITE4(sc, port, UPS_PORT_ENABLED);
2343 case UHF_PORT_SUSPEND:
2344 OWRITE4(sc, port, UPS_SUSPEND);
2346 case UHF_PORT_RESET:
2347 DPRINTFN(6, "reset port %d\n", index);
2348 OWRITE4(sc, port, UPS_RESET);
2351 usb_pause_mtx(&sc->sc_bus.bus_mtx,
2352 USB_MS_TO_TICKS(USB_PORT_ROOT_RESET_DELAY));
2354 if ((OREAD4(sc, port) & UPS_RESET) == 0) {
2358 err = USB_ERR_TIMEOUT;
2362 DPRINTFN(9, "ohci port %d reset, status = 0x%04x\n",
2363 index, OREAD4(sc, port));
2365 case UHF_PORT_POWER:
2366 DPRINTFN(3, "set port power %d\n", index);
2367 OWRITE4(sc, port, UPS_PORT_POWER);
2370 err = USB_ERR_IOERROR;
2375 err = USB_ERR_IOERROR;
2385 ohci_xfer_setup(struct usb_setup_params *parm)
2387 struct usb_page_search page_info;
2388 struct usb_page_cache *pc;
2390 struct usb_xfer *xfer;
2397 sc = OHCI_BUS2SC(parm->udev->bus);
2398 xfer = parm->curr_xfer;
2400 parm->hc_max_packet_size = 0x500;
2401 parm->hc_max_packet_count = 1;
2402 parm->hc_max_frame_size = OHCI_PAGE_SIZE;
2405 * calculate ntd and nqh
2407 if (parm->methods == &ohci_device_ctrl_methods) {
2408 xfer->flags_int.bdma_enable = 1;
2410 usbd_transfer_setup_sub(parm);
2413 ntd = ((2 * xfer->nframes) + 1 /* STATUS */
2414 + (xfer->max_data_length / xfer->max_hc_frame_size));
2417 } else if (parm->methods == &ohci_device_bulk_methods) {
2418 xfer->flags_int.bdma_enable = 1;
2420 usbd_transfer_setup_sub(parm);
2423 ntd = ((2 * xfer->nframes)
2424 + (xfer->max_data_length / xfer->max_hc_frame_size));
2427 } else if (parm->methods == &ohci_device_intr_methods) {
2428 xfer->flags_int.bdma_enable = 1;
2430 usbd_transfer_setup_sub(parm);
2433 ntd = ((2 * xfer->nframes)
2434 + (xfer->max_data_length / xfer->max_hc_frame_size));
2437 } else if (parm->methods == &ohci_device_isoc_methods) {
2438 xfer->flags_int.bdma_enable = 1;
2440 usbd_transfer_setup_sub(parm);
2442 nitd = ((xfer->max_data_length / OHCI_PAGE_SIZE) +
2443 ((xfer->nframes + OHCI_ITD_NOFFSET - 1) / OHCI_ITD_NOFFSET) +
2450 usbd_transfer_setup_sub(parm);
2464 if (usbd_transfer_setup_sub_malloc(
2465 parm, &pc, sizeof(ohci_td_t),
2466 OHCI_TD_ALIGN, ntd)) {
2467 parm->err = USB_ERR_NOMEM;
2471 for (n = 0; n != ntd; n++) {
2474 usbd_get_page(pc + n, 0, &page_info);
2476 td = page_info.buffer;
2479 td->td_self = htole32(page_info.physaddr);
2480 td->obj_next = last_obj;
2481 td->page_cache = pc + n;
2485 usb_pc_cpu_flush(pc + n);
2488 if (usbd_transfer_setup_sub_malloc(
2489 parm, &pc, sizeof(ohci_itd_t),
2490 OHCI_ITD_ALIGN, nitd)) {
2491 parm->err = USB_ERR_NOMEM;
2495 for (n = 0; n != nitd; n++) {
2498 usbd_get_page(pc + n, 0, &page_info);
2500 itd = page_info.buffer;
2503 itd->itd_self = htole32(page_info.physaddr);
2504 itd->obj_next = last_obj;
2505 itd->page_cache = pc + n;
2509 usb_pc_cpu_flush(pc + n);
2512 xfer->td_start[xfer->flags_int.curr_dma_set] = last_obj;
2516 if (usbd_transfer_setup_sub_malloc(
2517 parm, &pc, sizeof(ohci_ed_t),
2518 OHCI_ED_ALIGN, nqh)) {
2519 parm->err = USB_ERR_NOMEM;
2523 for (n = 0; n != nqh; n++) {
2526 usbd_get_page(pc + n, 0, &page_info);
2528 ed = page_info.buffer;
2531 ed->ed_self = htole32(page_info.physaddr);
2532 ed->obj_next = last_obj;
2533 ed->page_cache = pc + n;
2537 usb_pc_cpu_flush(pc + n);
2540 xfer->qh_start[xfer->flags_int.curr_dma_set] = last_obj;
2542 if (!xfer->flags_int.curr_dma_set) {
2543 xfer->flags_int.curr_dma_set = 1;
2549 ohci_ep_init(struct usb_device *udev, struct usb_endpoint_descriptor *edesc,
2550 struct usb_endpoint *ep)
2552 ohci_softc_t *sc = OHCI_BUS2SC(udev->bus);
2554 DPRINTFN(2, "endpoint=%p, addr=%d, endpt=%d, mode=%d (%d)\n",
2556 edesc->bEndpointAddress, udev->flags.usb_mode,
2559 if (udev->flags.usb_mode != USB_MODE_HOST) {
2563 if (udev->device_index != sc->sc_addr) {
2564 switch (edesc->bmAttributes & UE_XFERTYPE) {
2566 ep->methods = &ohci_device_ctrl_methods;
2569 ep->methods = &ohci_device_intr_methods;
2571 case UE_ISOCHRONOUS:
2572 if (udev->speed == USB_SPEED_FULL) {
2573 ep->methods = &ohci_device_isoc_methods;
2577 ep->methods = &ohci_device_bulk_methods;
2587 ohci_xfer_unsetup(struct usb_xfer *xfer)
2593 ohci_get_dma_delay(struct usb_device *udev, uint32_t *pus)
2596 * Wait until hardware has finished any possible use of the
2597 * transfer descriptor(s) and QH
2599 *pus = (1125); /* microseconds */
2603 ohci_device_resume(struct usb_device *udev)
2605 struct ohci_softc *sc = OHCI_BUS2SC(udev->bus);
2606 struct usb_xfer *xfer;
2607 struct usb_pipe_methods *methods;
2612 USB_BUS_LOCK(udev->bus);
2614 TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
2616 if (xfer->xroot->udev == udev) {
2618 methods = xfer->endpoint->methods;
2619 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
2621 if (methods == &ohci_device_bulk_methods) {
2622 OHCI_APPEND_QH(ed, sc->sc_bulk_p_last);
2623 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
2625 if (methods == &ohci_device_ctrl_methods) {
2626 OHCI_APPEND_QH(ed, sc->sc_ctrl_p_last);
2627 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
2629 if (methods == &ohci_device_intr_methods) {
2630 OHCI_APPEND_QH(ed, sc->sc_intr_p_last[xfer->qh_pos]);
2635 USB_BUS_UNLOCK(udev->bus);
2641 ohci_device_suspend(struct usb_device *udev)
2643 struct ohci_softc *sc = OHCI_BUS2SC(udev->bus);
2644 struct usb_xfer *xfer;
2645 struct usb_pipe_methods *methods;
2650 USB_BUS_LOCK(udev->bus);
2652 TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
2654 if (xfer->xroot->udev == udev) {
2656 methods = xfer->endpoint->methods;
2657 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
2659 if (methods == &ohci_device_bulk_methods) {
2660 OHCI_REMOVE_QH(ed, sc->sc_bulk_p_last);
2662 if (methods == &ohci_device_ctrl_methods) {
2663 OHCI_REMOVE_QH(ed, sc->sc_ctrl_p_last);
2665 if (methods == &ohci_device_intr_methods) {
2666 OHCI_REMOVE_QH(ed, sc->sc_intr_p_last[xfer->qh_pos]);
2671 USB_BUS_UNLOCK(udev->bus);
2677 ohci_set_hw_power_sleep(struct usb_bus *bus, uint32_t state)
2679 struct ohci_softc *sc = OHCI_BUS2SC(bus);
2682 case USB_HW_POWER_SUSPEND:
2683 case USB_HW_POWER_SHUTDOWN:
2686 case USB_HW_POWER_RESUME:
2695 ohci_set_hw_power(struct usb_bus *bus)
2697 struct ohci_softc *sc = OHCI_BUS2SC(bus);
2705 flags = bus->hw_power_state;
2707 temp = OREAD4(sc, OHCI_CONTROL);
2708 temp &= ~(OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE);
2710 if (flags & USB_HW_POWER_CONTROL)
2713 if (flags & USB_HW_POWER_BULK)
2716 if (flags & USB_HW_POWER_INTERRUPT)
2719 if (flags & USB_HW_POWER_ISOC)
2720 temp |= OHCI_IE | OHCI_PLE;
2722 OWRITE4(sc, OHCI_CONTROL, temp);
2724 USB_BUS_UNLOCK(bus);
2729 struct usb_bus_methods ohci_bus_methods =
2731 .endpoint_init = ohci_ep_init,
2732 .xfer_setup = ohci_xfer_setup,
2733 .xfer_unsetup = ohci_xfer_unsetup,
2734 .get_dma_delay = ohci_get_dma_delay,
2735 .device_resume = ohci_device_resume,
2736 .device_suspend = ohci_device_suspend,
2737 .set_hw_power = ohci_set_hw_power,
2738 .set_hw_power_sleep = ohci_set_hw_power_sleep,
2739 .roothub_exec = ohci_roothub_exec,
2740 .xfer_poll = ohci_do_poll,