2 * Copyright (c) 2010 Lev Serebryakov <lev@FreeBSD.org>.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * This driver supports several multiport USB-to-RS232 serial adapters driven
29 * by MosChip mos7820 and mos7840, bridge chips.
30 * The adapters are sold under many different brand names.
32 * Datasheets are available at MosChip www site at
33 * http://www.moschip.com. The datasheets don't contain full
34 * programming information for the chip.
36 * It is nornal to have only two enabled ports in devices, based on
40 #include <sys/cdefs.h>
41 __FBSDID("$FreeBSD$");
43 #include <sys/stdint.h>
44 #include <sys/stddef.h>
45 #include <sys/param.h>
46 #include <sys/queue.h>
47 #include <sys/types.h>
48 #include <sys/systm.h>
49 #include <sys/kernel.h>
51 #include <sys/linker_set.h>
52 #include <sys/module.h>
54 #include <sys/mutex.h>
55 #include <sys/condvar.h>
56 #include <sys/sysctl.h>
58 #include <sys/unistd.h>
59 #include <sys/callout.h>
60 #include <sys/malloc.h>
63 #include <dev/usb/usb.h>
64 #include <dev/usb/usbdi.h>
65 #include <dev/usb/usbdi_util.h>
66 #include <dev/usb/usb_cdc.h>
69 #define USB_DEBUG_VAR umcs_debug
70 #include <dev/usb/usb_debug.h>
71 #include <dev/usb/usb_process.h>
73 #include <dev/usb/serial/usb_serial.h>
75 #include <dev/usb/serial/umcs.h>
77 #define UMCS7840_MODVER 1
80 static int umcs_debug = 0;
82 SYSCTL_NODE(_hw_usb, OID_AUTO, umcs, CTLFLAG_RW, 0, "USB umcs quadport serial adapter");
83 SYSCTL_INT(_hw_usb_umcs, OID_AUTO, debug, CTLFLAG_RW, &umcs_debug, 0, "Debug level");
84 #endif /* USB_DEBUG */
88 * Two-port devices (both with 7820 chip and 7840 chip configured as two-port)
89 * have ports 0 and 2, with ports 1 and 3 omitted.
90 * So,PHYSICAL port numbers (indexes) on two-port device will be 0 and 2.
91 * This driver trys to use physical numbers as much as possible.
95 * Indexed by PHYSICAL port number.
96 * Pack non-regular registers to array to easier if-less access.
98 struct umcs7840_port_registers {
99 uint8_t reg_sp; /* SP register. */
100 uint8_t reg_control; /* CONTROL register. */
101 uint8_t reg_dcr; /* DCR0 register. DCR1 & DCR2 can be
105 static const struct umcs7840_port_registers umcs7840_port_registers[UMCS7840_MAX_PORTS] = {
106 {.reg_sp = MCS7840_DEV_REG_SP1,.reg_control = MCS7840_DEV_REG_CONTROL1,.reg_dcr = MCS7840_DEV_REG_DCR0_1},
107 {.reg_sp = MCS7840_DEV_REG_SP2,.reg_control = MCS7840_DEV_REG_CONTROL2,.reg_dcr = MCS7840_DEV_REG_DCR0_2},
108 {.reg_sp = MCS7840_DEV_REG_SP3,.reg_control = MCS7840_DEV_REG_CONTROL3,.reg_dcr = MCS7840_DEV_REG_DCR0_3},
109 {.reg_sp = MCS7840_DEV_REG_SP4,.reg_control = MCS7840_DEV_REG_CONTROL4,.reg_dcr = MCS7840_DEV_REG_DCR0_4},
118 struct umcs7840_softc_oneport {
119 struct usb_xfer *sc_xfer[UMCS7840_N_TRANSFERS]; /* Control structures
120 * for two transfers */
122 uint8_t sc_lcr; /* local line control register */
123 uint8_t sc_mcr; /* local modem control register */
124 uint8_t sc_lsr; /* local line status register */
125 uint8_t sc_msr; /* local modem status register */
128 struct umcs7840_softc {
129 struct ucom_super_softc sc_super_ucom;
130 struct ucom_softc sc_ucom[UMCS7840_MAX_PORTS]; /* Need to be continuous
131 * array, so indexed by
133 * (subunit) number */
135 struct usb_xfer *sc_intr_xfer; /* Interrupt endpoint */
137 device_t sc_dev; /* Device for error prints */
138 struct usb_device *sc_udev; /* USB Device for all operations */
139 struct mtx sc_mtx; /* ucom requires this */
141 uint8_t sc_driver_done; /* Flag when enumeration is finished */
143 uint8_t sc_numports; /* Number of ports (subunits) */
144 struct umcs7840_softc_oneport sc_ports[UMCS7840_MAX_PORTS]; /* Indexed by PHYSICAL
149 static usb_error_t umcs7840_get_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t *);
150 static usb_error_t umcs7840_set_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t);
151 static usb_error_t umcs7840_get_UART_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t, uint8_t *);
152 static usb_error_t umcs7840_set_UART_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t, uint8_t);
154 static usb_error_t umcs7840_set_baudrate(struct umcs7840_softc *, uint8_t, uint32_t);
155 static usb_error_t umcs7840_calc_baudrate(uint32_t rate, uint16_t *, uint8_t *);
157 static void umcs7840_cfg_get_status(struct ucom_softc *, uint8_t *, uint8_t *);
158 static void umcs7840_cfg_set_dtr(struct ucom_softc *, uint8_t);
159 static void umcs7840_cfg_set_rts(struct ucom_softc *, uint8_t);
160 static void umcs7840_cfg_set_break(struct ucom_softc *, uint8_t);
161 static void umcs7840_cfg_param(struct ucom_softc *, struct termios *);
162 static void umcs7840_cfg_open(struct ucom_softc *);
163 static void umcs7840_cfg_close(struct ucom_softc *);
165 static int umcs7840_pre_param(struct ucom_softc *, struct termios *);
167 static void umcs7840_start_read(struct ucom_softc *);
168 static void umcs7840_stop_read(struct ucom_softc *);
170 static void umcs7840_start_write(struct ucom_softc *);
171 static void umcs7840_stop_write(struct ucom_softc *);
173 static void umcs7840_poll(struct ucom_softc *ucom);
175 static device_probe_t umcs7840_probe;
176 static device_attach_t umcs7840_attach;
177 static device_detach_t umcs7840_detach;
179 static usb_callback_t umcs7840_intr_callback;
180 static usb_callback_t umcs7840_read_callback1;
181 static usb_callback_t umcs7840_read_callback2;
182 static usb_callback_t umcs7840_read_callback3;
183 static usb_callback_t umcs7840_read_callback4;
184 static usb_callback_t umcs7840_write_callback1;
185 static usb_callback_t umcs7840_write_callback2;
186 static usb_callback_t umcs7840_write_callback3;
187 static usb_callback_t umcs7840_write_callback4;
189 static void umcs7840_read_callbackN(struct usb_xfer *, usb_error_t, uint8_t);
190 static void umcs7840_write_callbackN(struct usb_xfer *, usb_error_t, uint8_t);
192 /* Indexed by LOGICAL port number (subunit), so two-port device uses 0 & 1 */
193 static usb_callback_t *umcs7840_rw_callbacks[UMCS7840_MAX_PORTS][UMCS7840_N_TRANSFERS] = {
194 {&umcs7840_read_callback1, &umcs7840_write_callback1},
195 {&umcs7840_read_callback2, &umcs7840_write_callback2},
196 {&umcs7840_read_callback3, &umcs7840_write_callback3},
197 {&umcs7840_read_callback4, &umcs7840_write_callback4},
200 static const struct usb_config umcs7840_bulk_config_data[UMCS7840_N_TRANSFERS] = {
201 [UMCS7840_BULK_RD_EP] = {
204 .direction = UE_DIR_IN,
205 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
206 .bufsize = 0, /* use wMaxPacketSize */
207 .callback = &umcs7840_read_callback1,
211 [UMCS7840_BULK_WR_EP] = {
214 .direction = UE_DIR_OUT,
215 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
216 .bufsize = 0, /* use wMaxPacketSize */
217 .callback = &umcs7840_write_callback1,
222 static const struct usb_config umcs7840_intr_config_data[1] = {
224 .type = UE_INTERRUPT,
226 .direction = UE_DIR_IN,
227 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
228 .bufsize = 0, /* use wMaxPacketSize */
229 .callback = &umcs7840_intr_callback,
234 static struct ucom_callback umcs7840_callback = {
235 .ucom_cfg_get_status = &umcs7840_cfg_get_status,
237 .ucom_cfg_set_dtr = &umcs7840_cfg_set_dtr,
238 .ucom_cfg_set_rts = &umcs7840_cfg_set_rts,
239 .ucom_cfg_set_break = &umcs7840_cfg_set_break,
241 .ucom_cfg_param = &umcs7840_cfg_param,
242 .ucom_cfg_open = &umcs7840_cfg_open,
243 .ucom_cfg_close = &umcs7840_cfg_close,
245 .ucom_pre_param = &umcs7840_pre_param,
247 .ucom_start_read = &umcs7840_start_read,
248 .ucom_stop_read = &umcs7840_stop_read,
250 .ucom_start_write = &umcs7840_start_write,
251 .ucom_stop_write = &umcs7840_stop_write,
253 .ucom_poll = &umcs7840_poll,
256 static const STRUCT_USB_HOST_ID umcs7840_devs[] = {
257 {USB_VPI(USB_VENDOR_MOSCHIP, USB_PRODUCT_MOSCHIP_MCS7820, 0)},
258 {USB_VPI(USB_VENDOR_MOSCHIP, USB_PRODUCT_MOSCHIP_MCS7840, 0)},
261 static device_method_t umcs7840_methods[] = {
262 DEVMETHOD(device_probe, umcs7840_probe),
263 DEVMETHOD(device_attach, umcs7840_attach),
264 DEVMETHOD(device_detach, umcs7840_detach),
268 static devclass_t umcs7840_devclass;
270 static driver_t umcs7840_driver = {
272 .methods = umcs7840_methods,
273 .size = sizeof(struct umcs7840_softc),
276 DRIVER_MODULE(umcs7840, uhub, umcs7840_driver, umcs7840_devclass, 0, 0);
277 MODULE_DEPEND(umcs7840, ucom, 1, 1, 1);
278 MODULE_DEPEND(umcs7840, usb, 1, 1, 1);
279 MODULE_VERSION(umcs7840, UMCS7840_MODVER);
282 umcs7840_probe(device_t dev)
284 struct usb_attach_arg *uaa = device_get_ivars(dev);
286 if (uaa->usb_mode != USB_MODE_HOST)
288 if (uaa->info.bConfigIndex != MCS7840_CONFIG_INDEX)
290 if (uaa->info.bIfaceIndex != MCS7840_IFACE_INDEX)
292 return (usbd_lookup_id_by_uaa(umcs7840_devs, sizeof(umcs7840_devs), uaa));
296 umcs7840_attach(device_t dev)
298 struct usb_config umcs7840_config_tmp[UMCS7840_N_TRANSFERS];
299 struct usb_attach_arg *uaa = device_get_ivars(dev);
300 struct umcs7840_softc *sc = device_get_softc(dev);
302 uint8_t iface_index = MCS7840_IFACE_INDEX;
308 for (n = 0; n < UMCS7840_N_TRANSFERS; ++n)
309 umcs7840_config_tmp[n] = umcs7840_bulk_config_data[n];
311 device_set_usb_desc(dev);
312 mtx_init(&sc->sc_mtx, "umcs7840", NULL, MTX_DEF);
315 sc->sc_udev = uaa->device;
318 * Get number of ports
319 * Documentation (full datasheet) says, that number of ports is
320 * set as MCS7840_DEV_MODE_SELECT24S bit in MODE R/Only
321 * register. But vendor driver uses these undocumented
324 * Experiments show, that MODE register can have `0'
325 * (4 ports) bit on 2-port device, so use vendor driver's way.
327 * Also, see notes in header file for these constants.
329 umcs7840_get_reg_sync(sc, MCS7840_DEV_REG_GPIO, &data);
330 if (data & MCS7840_DEV_GPIO_4PORTS) {
332 /* Store physical port numbers in sc_portno */
333 sc->sc_ucom[0].sc_portno = 0;
334 sc->sc_ucom[1].sc_portno = 1;
335 sc->sc_ucom[2].sc_portno = 2;
336 sc->sc_ucom[3].sc_portno = 3;
339 /* Store physical port numbers in sc_portno */
340 sc->sc_ucom[0].sc_portno = 0;
341 sc->sc_ucom[1].sc_portno = 2; /* '1' is skipped */
343 device_printf(dev, "Chip mcs%04x, found %d active ports\n", uaa->info.idProduct, sc->sc_numports);
344 if (!umcs7840_get_reg_sync(sc, MCS7840_DEV_REG_MODE, &data)) {
345 device_printf(dev, "On-die confguration: RST: active %s, HRD: %s, PLL: %s, POR: %s, Ports: %s, EEPROM write %s, IrDA is %savailable\n",
346 (data & MCS7840_DEV_MODE_RESET) ? "low" : "high",
347 (data & MCS7840_DEV_MODE_SER_PRSNT) ? "yes" : "no",
348 (data & MCS7840_DEV_MODE_PLLBYPASS) ? "bypassed" : "avail",
349 (data & MCS7840_DEV_MODE_PORBYPASS) ? "bypassed" : "avail",
350 (data & MCS7840_DEV_MODE_SELECT24S) ? "2" : "4",
351 (data & MCS7840_DEV_MODE_EEPROMWR) ? "enabled" : "disabled",
352 (data & MCS7840_DEV_MODE_IRDA) ? "" : "not ");
354 /* Setup all transfers */
355 for (subunit = 0; subunit < sc->sc_numports; ++subunit) {
356 for (n = 0; n < UMCS7840_N_TRANSFERS; ++n) {
357 /* Set endpoint address */
358 umcs7840_config_tmp[n].endpoint = umcs7840_bulk_config_data[n].endpoint + 2 * sc->sc_ucom[subunit].sc_portno;
359 umcs7840_config_tmp[n].callback = umcs7840_rw_callbacks[subunit][n];
361 error = usbd_transfer_setup(uaa->device,
362 &iface_index, sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer, umcs7840_config_tmp,
363 UMCS7840_N_TRANSFERS, sc, &sc->sc_mtx);
365 device_printf(dev, "allocating USB transfers failed for subunit %d of %d\n",
366 subunit + 1, sc->sc_numports);
370 error = usbd_transfer_setup(uaa->device,
371 &iface_index, &sc->sc_intr_xfer, umcs7840_intr_config_data,
374 device_printf(dev, "allocating USB transfers failed for interrupt\n");
377 /* clear stall at first run */
378 mtx_lock(&sc->sc_mtx);
379 for (subunit = 0; subunit < sc->sc_numports; ++subunit) {
380 usbd_xfer_set_stall(sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer[UMCS7840_BULK_RD_EP]);
381 usbd_xfer_set_stall(sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer[UMCS7840_BULK_WR_EP]);
383 mtx_unlock(&sc->sc_mtx);
385 error = ucom_attach(&sc->sc_super_ucom, sc->sc_ucom, sc->sc_numports, sc,
386 &umcs7840_callback, &sc->sc_mtx);
390 ucom_set_pnpinfo_usb(&sc->sc_super_ucom, dev);
395 umcs7840_detach(dev);
400 umcs7840_detach(device_t dev)
402 struct umcs7840_softc *sc = device_get_softc(dev);
405 ucom_detach(&sc->sc_super_ucom, sc->sc_ucom);
407 for (subunit = 0; subunit < sc->sc_numports; ++subunit)
408 usbd_transfer_unsetup(sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer, UMCS7840_N_TRANSFERS);
409 usbd_transfer_unsetup(&sc->sc_intr_xfer, 1);
411 mtx_destroy(&sc->sc_mtx);
416 umcs7840_cfg_open(struct ucom_softc *ucom)
418 struct umcs7840_softc *sc = ucom->sc_parent;
419 uint16_t pn = ucom->sc_portno;
422 /* If it very first open, finish global configuration */
423 if (!sc->sc_driver_done) {
425 * USB enumeration is finished, pass internal memory to FIFOs
426 * If it is done in the end of "attach", kernel panics.
428 if (umcs7840_get_reg_sync(sc, MCS7840_DEV_REG_CONTROL1, &data))
430 data |= MCS7840_DEV_CONTROL1_DRIVER_DONE;
431 if (umcs7840_set_reg_sync(sc, MCS7840_DEV_REG_CONTROL1, data))
433 sc->sc_driver_done = 1;
435 /* Toggle reset bit on-off */
436 if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, &data))
438 data |= MCS7840_DEV_SPx_UART_RESET;
439 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data))
441 data &= ~MCS7840_DEV_SPx_UART_RESET;
442 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data))
445 /* Set RS-232 mode */
446 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_SCRATCHPAD, MCS7840_UART_SCRATCHPAD_RS232))
449 /* Disable RX on time of initialization */
450 if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_control, &data))
452 data |= MCS7840_DEV_CONTROLx_RX_DISABLE;
453 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_control, data))
456 /* Disable all interrupts */
457 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_IER, 0))
460 /* Reset FIFO -- documented */
461 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_FCR, 0))
463 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_FCR,
464 MCS7840_UART_FCR_ENABLE | MCS7840_UART_FCR_FLUSHRHR |
465 MCS7840_UART_FCR_FLUSHTHR | MCS7840_UART_FCR_RTL_1_14))
468 /* Set 8 bit, no parity, 1 stop bit -- documented */
469 sc->sc_ports[pn].sc_lcr = MCS7840_UART_LCR_DATALEN8 | MCS7840_UART_LCR_STOPB1;
470 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, sc->sc_ports[pn].sc_lcr))
474 * Enable DTR/RTS on modem control, enable modem interrupts --
477 sc->sc_ports[pn].sc_mcr = MCS7840_UART_MCR_DTR | MCS7840_UART_MCR_RTS | MCS7840_UART_MCR_IE;
478 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr))
481 /* Clearing Bulkin and Bulkout FIFO */
482 if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, &data))
484 data |= MCS7840_DEV_SPx_RESET_OUT_FIFO | MCS7840_DEV_SPx_RESET_IN_FIFO;
485 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data))
487 data &= ~(MCS7840_DEV_SPx_RESET_OUT_FIFO | MCS7840_DEV_SPx_RESET_IN_FIFO);
488 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data))
492 if (umcs7840_set_baudrate(sc, pn, 9600))
496 /* Finally enable all interrupts -- documented */
498 * Copied from vendor driver, I don't know why we should read LCR
501 if (umcs7840_get_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, &sc->sc_ports[pn].sc_lcr))
503 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_IER,
504 MCS7840_UART_IER_RXSTAT | MCS7840_UART_IER_MODEM))
508 if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_control, &data))
510 data &= ~MCS7840_DEV_CONTROLx_RX_DISABLE;
511 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_control, data))
515 if (umcs7840_get_UART_reg_sync(sc, pn, MCS7840_UART_REG_LSR, &sc->sc_ports[pn].sc_lsr))
517 if (umcs7840_get_UART_reg_sync(sc, pn, MCS7840_UART_REG_MSR, &sc->sc_ports[pn].sc_msr))
519 DPRINTF("Port %d has been opened, LSR=%02x MSR=%02x\n", pn, sc->sc_ports[pn].sc_lsr, sc->sc_ports[pn].sc_msr);
523 umcs7840_cfg_close(struct ucom_softc *ucom)
525 struct umcs7840_softc *sc = ucom->sc_parent;
526 uint16_t pn = ucom->sc_portno;
529 umcs7840_stop_read(ucom);
530 umcs7840_stop_write(ucom);
532 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, 0);
533 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_IER, 0);
536 if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_control, &data))
538 data |= MCS7840_DEV_CONTROLx_RX_DISABLE;
539 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_control, data))
541 DPRINTF("Port %d has been closed\n", pn);
545 umcs7840_cfg_set_dtr(struct ucom_softc *ucom, uint8_t onoff)
547 struct umcs7840_softc *sc = ucom->sc_parent;
548 uint8_t pn = ucom->sc_portno;
551 sc->sc_ports[pn].sc_mcr |= MCS7840_UART_MCR_DTR;
553 sc->sc_ports[pn].sc_mcr &= ~MCS7840_UART_MCR_DTR;
555 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr);
556 DPRINTF("Port %d DTR set to: %s\n", pn, onoff ? "on" : "off");
560 umcs7840_cfg_set_rts(struct ucom_softc *ucom, uint8_t onoff)
562 struct umcs7840_softc *sc = ucom->sc_parent;
563 uint8_t pn = ucom->sc_portno;
566 sc->sc_ports[pn].sc_mcr |= MCS7840_UART_MCR_RTS;
568 sc->sc_ports[pn].sc_mcr &= ~MCS7840_UART_MCR_RTS;
570 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr);
571 DPRINTF("Port %d RTS set to: %s\n", pn, onoff ? "on" : "off");
575 umcs7840_cfg_set_break(struct ucom_softc *ucom, uint8_t onoff)
577 struct umcs7840_softc *sc = ucom->sc_parent;
578 uint8_t pn = ucom->sc_portno;
581 sc->sc_ports[pn].sc_lcr |= MCS7840_UART_LCR_BREAK;
583 sc->sc_ports[pn].sc_lcr &= ~MCS7840_UART_LCR_BREAK;
585 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, sc->sc_ports[pn].sc_lcr);
586 DPRINTF("Port %d BREAK set to: %s\n", pn, onoff ? "on" : "off");
591 umcs7840_cfg_param(struct ucom_softc *ucom, struct termios *t)
593 struct umcs7840_softc *sc = ucom->sc_parent;
594 uint8_t pn = ucom->sc_portno;
595 uint8_t lcr = sc->sc_ports[pn].sc_lcr;
596 uint8_t mcr = sc->sc_ports[pn].sc_mcr;
598 DPRINTF("Port %d config:\n", pn);
599 if (t->c_cflag & CSTOPB) {
600 DPRINTF(" 2 stop bits\n");
601 lcr |= MCS7840_UART_LCR_STOPB2;
603 lcr |= MCS7840_UART_LCR_STOPB1;
604 DPRINTF(" 1 stop bit\n");
607 lcr &= ~MCS7840_UART_LCR_PARITYMASK;
608 if (t->c_cflag & PARENB) {
609 lcr |= MCS7840_UART_LCR_PARITYON;
610 if (t->c_cflag & PARODD) {
611 lcr = MCS7840_UART_LCR_PARITYODD;
612 DPRINTF(" parity on - odd\n");
614 lcr = MCS7840_UART_LCR_PARITYEVEN;
615 DPRINTF(" parity on - even\n");
618 lcr &= ~MCS7840_UART_LCR_PARITYON;
619 DPRINTF(" parity off\n");
622 lcr &= ~MCS7840_UART_LCR_DATALENMASK;
623 switch (t->c_cflag & CSIZE) {
625 lcr |= MCS7840_UART_LCR_DATALEN5;
629 lcr |= MCS7840_UART_LCR_DATALEN6;
633 lcr |= MCS7840_UART_LCR_DATALEN7;
637 lcr |= MCS7840_UART_LCR_DATALEN8;
642 if (t->c_cflag & CRTSCTS) {
643 mcr |= MCS7840_UART_MCR_CTSRTS;
644 DPRINTF(" CTS/RTS\n");
646 mcr &= ~MCS7840_UART_MCR_CTSRTS;
648 if (t->c_cflag & (CDTR_IFLOW | CDSR_OFLOW)) {
649 mcr |= MCS7840_UART_MCR_DTRDSR;
650 DPRINTF(" DTR/DSR\n");
652 mcr &= ~MCS7840_UART_MCR_DTRDSR;
654 sc->sc_ports[pn].sc_lcr = lcr;
655 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, sc->sc_ports[pn].sc_lcr);
656 DPRINTF("Port %d LCR=%02x\n", pn, sc->sc_ports[pn].sc_lcr);
658 sc->sc_ports[pn].sc_mcr = mcr;
659 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr);
660 DPRINTF("Port %d MCR=%02x\n", pn, sc->sc_ports[pn].sc_mcr);
662 umcs7840_set_baudrate(sc, pn, t->c_ospeed);
667 umcs7840_pre_param(struct ucom_softc *ucom, struct termios *t)
672 if (umcs7840_calc_baudrate(t->c_ospeed, &divisor, &clk) || !divisor)
678 umcs7840_start_read(struct ucom_softc *ucom)
680 struct umcs7840_softc *sc = ucom->sc_parent;
681 uint8_t pn = ucom->sc_portno;
683 /* Start interrupt transfer */
684 usbd_transfer_start(sc->sc_intr_xfer);
686 /* Start read transfer */
687 usbd_transfer_start(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_RD_EP]);
691 umcs7840_stop_read(struct ucom_softc *ucom)
693 struct umcs7840_softc *sc = ucom->sc_parent;
694 uint8_t pn = ucom->sc_portno;
696 /* Stop read transfer */
697 usbd_transfer_stop(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_RD_EP]);
701 umcs7840_start_write(struct ucom_softc *ucom)
703 struct umcs7840_softc *sc = ucom->sc_parent;
704 uint8_t pn = ucom->sc_portno;
706 /* Start interrupt transfer */
707 usbd_transfer_start(sc->sc_intr_xfer);
709 /* Start write transfer */
710 usbd_transfer_start(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_WR_EP]);
714 umcs7840_stop_write(struct ucom_softc *ucom)
716 struct umcs7840_softc *sc = ucom->sc_parent;
717 uint8_t pn = ucom->sc_portno;
719 /* Stop write transfer */
720 usbd_transfer_stop(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_WR_EP]);
724 umcs7840_cfg_get_status(struct ucom_softc *ucom, uint8_t *lsr, uint8_t *msr)
726 struct umcs7840_softc *sc = ucom->sc_parent;
728 *lsr = sc->sc_ports[ucom->sc_portno].sc_lsr;
729 *msr = sc->sc_ports[ucom->sc_portno].sc_msr;
730 DPRINTF("Port %d status: LSR=%02x MSR=%02x\n", ucom->sc_portno, *lsr, *msr);
734 umcs7840_intr_callback(struct usb_xfer *xfer, usb_error_t error)
736 struct umcs7840_softc *sc = usbd_xfer_softc(xfer);
737 struct usb_page_cache *pc;
742 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
744 switch (USB_GET_STATE(xfer)) {
745 case USB_ST_TRANSFERRED:
746 if (actlen == 5 || actlen == 13) {
747 pc = usbd_xfer_get_frame(xfer, 0);
748 usbd_copy_out(pc, 0, buf, actlen);
749 /* Check status of all ports */
750 for (subunit = 0; subunit < sc->sc_numports; ++subunit) {
751 uint8_t pn = sc->sc_ucom[subunit].sc_portno;
753 if (buf[pn] & MCS7840_UART_ISR_NOPENDING)
755 DPRINTF("Port %d has pending interrupt: %02x (FIFO: %02x)\n", pn, buf[pn] & MCS7840_UART_ISR_INTMASK, buf[pn] & (~MCS7840_UART_ISR_INTMASK));
756 switch (buf[pn] & MCS7840_UART_ISR_INTMASK) {
757 case MCS7840_UART_ISR_RXERR:
758 case MCS7840_UART_ISR_RXHASDATA:
759 case MCS7840_UART_ISR_RXTIMEOUT:
761 if (umcs7840_get_UART_reg_sync(sc, pn, MCS7840_UART_REG_LSR, &sc->sc_ports[pn].sc_lsr))
762 break; /* Inner switch */
763 ucom_status_change(&sc->sc_ucom[subunit]);
766 case MCS7840_UART_ISR_TXEMPTY:
768 break; /* Inner switch */
769 case MCS7840_UART_ISR_MSCHANGE:
771 if (umcs7840_get_UART_reg_sync(sc, pn, MCS7840_UART_REG_MSR, &sc->sc_ports[pn].sc_msr))
772 break; /* Inner switch */
773 DPRINTF("Port %d: new MSR %02x\n", pn, sc->sc_ports[pn].sc_msr);
774 ucom_status_change(&sc->sc_ucom[subunit]);
779 device_printf(sc->sc_dev, "Invalid interrupt data length %d", actlen);
783 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
784 usbd_transfer_submit(xfer);
788 if (error != USB_ERR_CANCELLED) {
789 /* try to clear stall first */
790 usbd_xfer_set_stall(xfer);
798 umcs7840_read_callback1(struct usb_xfer *xfer, usb_error_t error)
800 umcs7840_read_callbackN(xfer, error, 0);
804 umcs7840_read_callback2(struct usb_xfer *xfer, usb_error_t error)
806 umcs7840_read_callbackN(xfer, error, 1);
809 umcs7840_read_callback3(struct usb_xfer *xfer, usb_error_t error)
811 umcs7840_read_callbackN(xfer, error, 2);
815 umcs7840_read_callback4(struct usb_xfer *xfer, usb_error_t error)
817 umcs7840_read_callbackN(xfer, error, 3);
821 umcs7840_read_callbackN(struct usb_xfer *xfer, usb_error_t error, uint8_t subunit)
823 struct umcs7840_softc *sc = usbd_xfer_softc(xfer);
824 struct ucom_softc *ucom = &sc->sc_ucom[subunit];
825 struct usb_page_cache *pc;
828 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
830 DPRINTF("Port %d read, state = %d, data length = %d\n", ucom->sc_portno, USB_GET_STATE(xfer), actlen);
832 switch (USB_GET_STATE(xfer)) {
833 case USB_ST_TRANSFERRED:
834 pc = usbd_xfer_get_frame(xfer, 0);
835 ucom_put_data(ucom, pc, 0, actlen);
839 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
840 usbd_transfer_submit(xfer);
844 if (error != USB_ERR_CANCELLED) {
845 /* try to clear stall first */
846 usbd_xfer_set_stall(xfer);
854 umcs7840_write_callback1(struct usb_xfer *xfer, usb_error_t error)
856 umcs7840_write_callbackN(xfer, error, 0);
860 umcs7840_write_callback2(struct usb_xfer *xfer, usb_error_t error)
862 umcs7840_write_callbackN(xfer, error, 1);
866 umcs7840_write_callback3(struct usb_xfer *xfer, usb_error_t error)
868 umcs7840_write_callbackN(xfer, error, 2);
872 umcs7840_write_callback4(struct usb_xfer *xfer, usb_error_t error)
874 umcs7840_write_callbackN(xfer, error, 3);
878 umcs7840_write_callbackN(struct usb_xfer *xfer, usb_error_t error, uint8_t subunit)
880 struct umcs7840_softc *sc = usbd_xfer_softc(xfer);
881 struct ucom_softc *ucom = &sc->sc_ucom[subunit];
882 struct usb_page_cache *pc;
885 DPRINTF("Port %d write, state = %d\n", ucom->sc_portno, USB_GET_STATE(xfer));
887 switch (USB_GET_STATE(xfer)) {
889 case USB_ST_TRANSFERRED:
891 pc = usbd_xfer_get_frame(xfer, 0);
892 if (ucom_get_data(ucom, pc, 0, usbd_xfer_max_len(xfer), &actlen)) {
893 DPRINTF("Port %d write, has %d bytes\n", ucom->sc_portno, actlen);
894 usbd_xfer_set_frame_len(xfer, 0, actlen);
895 usbd_transfer_submit(xfer);
900 if (error != USB_ERR_CANCELLED) {
901 /* try to clear stall first */
902 usbd_xfer_set_stall(xfer);
910 umcs7840_poll(struct ucom_softc *ucom)
912 struct umcs7840_softc *sc = ucom->sc_parent;
914 DPRINTF("Port %d poll\n", ucom->sc_portno);
915 usbd_transfer_poll(sc->sc_ports[ucom->sc_portno].sc_xfer, UMCS7840_N_TRANSFERS);
916 usbd_transfer_poll(&sc->sc_intr_xfer, 1);
920 umcs7840_get_reg_sync(struct umcs7840_softc *sc, uint8_t reg, uint8_t *data)
922 struct usb_device_request req;
926 req.bmRequestType = UT_READ_VENDOR_DEVICE;
927 req.bRequest = MCS7840_RDREQ;
928 USETW(req.wValue, 0);
929 USETW(req.wIndex, reg);
930 USETW(req.wLength, UMCS7840_READ_LENGTH);
932 err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, (void *)data, 0, &len, UMCS7840_CTRL_TIMEOUT);
933 if (err == USB_ERR_NORMAL_COMPLETION && len != 1) {
934 device_printf(sc->sc_dev, "Reading register %d failed: invalid length %d\n", reg, len);
935 return (USB_ERR_INVAL);
937 device_printf(sc->sc_dev, "Reading register %d failed: %s\n", reg, usbd_errstr(err));
942 umcs7840_set_reg_sync(struct umcs7840_softc *sc, uint8_t reg, uint8_t data)
944 struct usb_device_request req;
947 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
948 req.bRequest = MCS7840_WRREQ;
949 USETW(req.wValue, data);
950 USETW(req.wIndex, reg);
951 USETW(req.wLength, 0);
953 err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, NULL, 0, NULL, UMCS7840_CTRL_TIMEOUT);
955 device_printf(sc->sc_dev, "Writing register %d failed: %s\n", reg, usbd_errstr(err));
961 umcs7840_get_UART_reg_sync(struct umcs7840_softc *sc, uint8_t portno, uint8_t reg, uint8_t *data)
963 struct usb_device_request req;
968 /* portno is port number */
969 wVal = ((uint16_t)(portno + 1)) << 8;
971 req.bmRequestType = UT_READ_VENDOR_DEVICE;
972 req.bRequest = MCS7840_RDREQ;
973 USETW(req.wValue, wVal);
974 USETW(req.wIndex, reg);
975 USETW(req.wLength, UMCS7840_READ_LENGTH);
977 err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, (void *)data, 0, &len, UMCS7840_CTRL_TIMEOUT);
978 if (err == USB_ERR_NORMAL_COMPLETION && len != 1) {
979 device_printf(sc->sc_dev, "Reading UART%d register %d failed: invalid length %d\n", portno, reg, len);
980 return (USB_ERR_INVAL);
982 device_printf(sc->sc_dev, "Reading UART%d register %d failed: %s\n", portno, reg, usbd_errstr(err));
987 umcs7840_set_UART_reg_sync(struct umcs7840_softc *sc, uint8_t portno, uint8_t reg, uint8_t data)
989 struct usb_device_request req;
993 /* portno is port number */
994 wVal = ((uint16_t)(portno + 1)) << 8 | data;
996 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
997 req.bRequest = MCS7840_WRREQ;
998 USETW(req.wValue, wVal);
999 USETW(req.wIndex, reg);
1000 USETW(req.wLength, 0);
1002 err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, NULL, 0, NULL, UMCS7840_CTRL_TIMEOUT);
1004 device_printf(sc->sc_dev, "Writing UART%d register %d failed: %s\n", portno, reg, usbd_errstr(err));
1009 umcs7840_set_baudrate(struct umcs7840_softc *sc, uint8_t portno, uint32_t rate)
1016 if (umcs7840_calc_baudrate(rate, &divisor, &clk)) {
1017 DPRINTF("Port %d bad speed: %d\n", portno, rate);
1020 if (divisor == 0 || (clk & MCS7840_DEV_SPx_CLOCK_MASK) != clk) {
1021 DPRINTF("Port %d bad speed calculation: %d\n", portno, rate);
1024 DPRINTF("Port %d set speed: %d (%02x / %d)\n", portno, rate, clk, divisor);
1026 /* Set clock source for standard BAUD frequences */
1027 err = umcs7840_get_reg_sync(sc, umcs7840_port_registers[portno].reg_sp, &data);
1030 data &= MCS7840_DEV_SPx_CLOCK_MASK;
1032 err = umcs7840_set_reg_sync(sc, umcs7840_port_registers[portno].reg_sp, data);
1037 sc->sc_ports[portno].sc_lcr |= MCS7840_UART_LCR_DIVISORS;
1038 err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_LCR, sc->sc_ports[portno].sc_lcr);
1042 err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_DLL, (uint8_t)(divisor & 0xff));
1045 err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_DLM, (uint8_t)((divisor >> 8) & 0xff));
1049 /* Turn off access to DLL/DLM registers of UART */
1050 sc->sc_ports[portno].sc_lcr &= ~MCS7840_UART_LCR_DIVISORS;
1051 err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_LCR, sc->sc_ports[portno].sc_lcr);
1057 /* Maximum speeds for standard frequences, when PLL is not used */
1058 static const uint32_t umcs7840_baudrate_divisors[] = {0, 115200, 230400, 403200, 460800, 806400, 921600, 1572864, 3145728,};
1059 static const uint8_t umcs7840_baudrate_divisors_len = sizeof(umcs7840_baudrate_divisors) / sizeof(umcs7840_baudrate_divisors[0]);
1062 umcs7840_calc_baudrate(uint32_t rate, uint16_t *divisor, uint8_t *clk)
1066 if (rate > umcs7840_baudrate_divisors[umcs7840_baudrate_divisors_len - 1])
1069 for (i = 0; i < umcs7840_baudrate_divisors_len - 1 &&
1070 !(rate > umcs7840_baudrate_divisors[i] && rate <= umcs7840_baudrate_divisors[i + 1]); ++i);
1071 *divisor = umcs7840_baudrate_divisors[i + 1] / rate;
1073 *clk = i << MCS7840_DEV_SPx_CLOCK_SHIFT;