2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
6 * This code is derived from software contributed to Berkeley by
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
40 #include <sys/cdefs.h>
41 __FBSDID("$FreeBSD$");
44 #include "opt_atalk.h"
45 #include "opt_atpic.h"
46 #include "opt_compat.h"
52 #include "opt_kstack_pages.h"
53 #include "opt_maxmem.h"
54 #include "opt_mp_watchdog.h"
56 #include "opt_perfmon.h"
58 #include "opt_kdtrace.h"
60 #include <sys/param.h>
62 #include <sys/systm.h>
66 #include <sys/callout.h>
69 #include <sys/eventhandler.h>
71 #include <sys/imgact.h>
73 #include <sys/kernel.h>
75 #include <sys/linker.h>
77 #include <sys/malloc.h>
78 #include <sys/memrange.h>
79 #include <sys/msgbuf.h>
80 #include <sys/mutex.h>
82 #include <sys/ptrace.h>
83 #include <sys/reboot.h>
84 #include <sys/sched.h>
85 #include <sys/signalvar.h>
89 #include <sys/syscallsubr.h>
90 #include <sys/sysctl.h>
91 #include <sys/sysent.h>
92 #include <sys/sysproto.h>
93 #include <sys/ucontext.h>
94 #include <sys/vmmeter.h>
97 #include <vm/vm_extern.h>
98 #include <vm/vm_kern.h>
99 #include <vm/vm_page.h>
100 #include <vm/vm_map.h>
101 #include <vm/vm_object.h>
102 #include <vm/vm_pager.h>
103 #include <vm/vm_param.h>
107 #error KDB must be enabled in order for DDB to work!
110 #include <ddb/db_sym.h>
115 #include <net/netisr.h>
117 #include <machine/bootinfo.h>
118 #include <machine/clock.h>
119 #include <machine/cpu.h>
120 #include <machine/cputypes.h>
121 #include <machine/intr_machdep.h>
123 #include <machine/md_var.h>
124 #include <machine/metadata.h>
125 #include <machine/mp_watchdog.h>
126 #include <machine/pc/bios.h>
127 #include <machine/pcb.h>
128 #include <machine/pcb_ext.h>
129 #include <machine/proc.h>
130 #include <machine/reg.h>
131 #include <machine/sigframe.h>
132 #include <machine/specialreg.h>
133 #include <machine/vm86.h>
135 #include <machine/perfmon.h>
138 #include <machine/smp.h>
142 #include <machine/apicvar.h>
146 #include <x86/isa/icu.h>
150 #include <machine/xbox.h>
152 int arch_i386_is_xbox = 0;
153 uint32_t arch_i386_xbox_memsize = 0;
158 #include <machine/xen/xen-os.h>
159 #include <xen/hypervisor.h>
160 #include <machine/xen/xen-os.h>
161 #include <machine/xen/xenvar.h>
162 #include <machine/xen/xenfunc.h>
163 #include <xen/xen_intr.h>
165 void Xhypervisor_callback(void);
166 void failsafe_callback(void);
168 extern trap_info_t trap_table[];
169 struct proc_ldt default_proc_ldt;
170 extern int init_first;
172 extern unsigned long physfree;
175 /* Sanity check for __curthread() */
176 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0);
178 extern void init386(int first);
179 extern void dblfault_handler(void);
181 extern void printcpuinfo(void); /* XXX header file */
182 extern void finishidentcpu(void);
183 extern void panicifcpuunsupported(void);
185 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
186 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
188 #if !defined(CPU_DISABLE_SSE) && defined(I686_CPU)
189 #define CPU_ENABLE_SSE
192 static void cpu_startup(void *);
193 static void fpstate_drop(struct thread *td);
194 static void get_fpcontext(struct thread *td, mcontext_t *mcp);
195 static int set_fpcontext(struct thread *td, const mcontext_t *mcp);
196 #ifdef CPU_ENABLE_SSE
197 static void set_fpregs_xmm(struct save87 *, struct savexmm *);
198 static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
199 #endif /* CPU_ENABLE_SSE */
200 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
203 extern vm_offset_t ksym_start, ksym_end;
206 /* Intel ICH registers */
207 #define ICH_PMBASE 0x400
208 #define ICH_SMI_EN ICH_PMBASE + 0x30
210 int _udatasel, _ucodesel;
216 static void osendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask);
218 #ifdef COMPAT_FREEBSD4
219 static void freebsd4_sendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask);
226 FEATURE(pae, "Physical Address Extensions");
230 * The number of PHYSMAP entries must be one less than the number of
231 * PHYSSEG entries because the PHYSMAP entry that spans the largest
232 * physical address that is accessible by ISA DMA is split into two
235 #define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1))
237 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2];
238 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2];
240 /* must be 2 less so 0 0 can signal end of chunks */
241 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2)
242 #define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2)
244 struct kva_md_info kmi;
246 static struct trapframe proc0_tf;
247 struct pcpu __pcpu[MAXCPU];
251 struct mem_range_softc mem_range_softc;
261 * On MacBooks, we need to disallow the legacy USB circuit to
262 * generate an SMI# because this can cause several problems,
263 * namely: incorrect CPU frequency detection and failure to
265 * We do this by disabling a bit in the SMI_EN (SMI Control and
266 * Enable register) of the Intel ICH LPC Interface Bridge.
268 sysenv = getenv("smbios.system.product");
269 if (sysenv != NULL) {
270 if (strncmp(sysenv, "MacBook1,1", 10) == 0 ||
271 strncmp(sysenv, "MacBook3,1", 10) == 0 ||
272 strncmp(sysenv, "MacBookPro1,1", 13) == 0 ||
273 strncmp(sysenv, "MacBookPro1,2", 13) == 0 ||
274 strncmp(sysenv, "MacBookPro3,1", 13) == 0 ||
275 strncmp(sysenv, "Macmini1,1", 10) == 0) {
277 printf("Disabling LEGACY_USB_EN bit on "
279 outl(ICH_SMI_EN, inl(ICH_SMI_EN) & ~0x8);
285 * Good {morning,afternoon,evening,night}.
289 panicifcpuunsupported();
296 * Display physical memory if SMBIOS reports reasonable amount.
299 sysenv = getenv("smbios.memory.enabled");
300 if (sysenv != NULL) {
301 memsize = (uintmax_t)strtoul(sysenv, (char **)NULL, 10) << 10;
304 if (memsize < ptoa((uintmax_t)cnt.v_free_count))
305 memsize = ptoa((uintmax_t)Maxmem);
306 printf("real memory = %ju (%ju MB)\n", memsize, memsize >> 20);
309 * Display any holes after the first chunk of extended memory.
314 printf("Physical memory chunk(s):\n");
315 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
318 size = phys_avail[indx + 1] - phys_avail[indx];
320 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n",
321 (uintmax_t)phys_avail[indx],
322 (uintmax_t)phys_avail[indx + 1] - 1,
323 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE);
327 vm_ksubmap_init(&kmi);
329 printf("avail memory = %ju (%ju MB)\n",
330 ptoa((uintmax_t)cnt.v_free_count),
331 ptoa((uintmax_t)cnt.v_free_count) / 1048576);
334 * Set up buffers, so they can be used to read disk labels.
337 vm_pager_bufferinit();
343 * Add BSP as an interrupt target.
349 * Send an interrupt to process.
351 * Stack is set up to allow sigcode stored
352 * at top to call routine, followed by kcall
353 * to sigreturn routine below. After sigreturn
354 * resets the signal mask, the stack, and the
355 * frame pointer, it returns to the user
360 osendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
362 struct osigframe sf, *fp;
366 struct trapframe *regs;
372 PROC_LOCK_ASSERT(p, MA_OWNED);
373 sig = ksi->ksi_signo;
375 mtx_assert(&psp->ps_mtx, MA_OWNED);
377 oonstack = sigonstack(regs->tf_esp);
379 /* Allocate space for the signal handler context. */
380 if ((td->td_pflags & TDP_ALTSTACK) && !oonstack &&
381 SIGISMEMBER(psp->ps_sigonstack, sig)) {
382 fp = (struct osigframe *)(td->td_sigstk.ss_sp +
383 td->td_sigstk.ss_size - sizeof(struct osigframe));
384 #if defined(COMPAT_43)
385 td->td_sigstk.ss_flags |= SS_ONSTACK;
388 fp = (struct osigframe *)regs->tf_esp - 1;
390 /* Translate the signal if appropriate. */
391 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
392 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
394 /* Build the argument list for the signal handler. */
396 sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc;
397 bzero(&sf.sf_siginfo, sizeof(sf.sf_siginfo));
398 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
399 /* Signal handler installed with SA_SIGINFO. */
400 sf.sf_arg2 = (register_t)&fp->sf_siginfo;
401 sf.sf_siginfo.si_signo = sig;
402 sf.sf_siginfo.si_code = ksi->ksi_code;
403 sf.sf_ahu.sf_action = (__osiginfohandler_t *)catcher;
406 /* Old FreeBSD-style arguments. */
407 sf.sf_arg2 = ksi->ksi_code;
408 sf.sf_addr = (register_t)ksi->ksi_addr;
409 sf.sf_ahu.sf_handler = catcher;
411 mtx_unlock(&psp->ps_mtx);
414 /* Save most if not all of trap frame. */
415 sf.sf_siginfo.si_sc.sc_eax = regs->tf_eax;
416 sf.sf_siginfo.si_sc.sc_ebx = regs->tf_ebx;
417 sf.sf_siginfo.si_sc.sc_ecx = regs->tf_ecx;
418 sf.sf_siginfo.si_sc.sc_edx = regs->tf_edx;
419 sf.sf_siginfo.si_sc.sc_esi = regs->tf_esi;
420 sf.sf_siginfo.si_sc.sc_edi = regs->tf_edi;
421 sf.sf_siginfo.si_sc.sc_cs = regs->tf_cs;
422 sf.sf_siginfo.si_sc.sc_ds = regs->tf_ds;
423 sf.sf_siginfo.si_sc.sc_ss = regs->tf_ss;
424 sf.sf_siginfo.si_sc.sc_es = regs->tf_es;
425 sf.sf_siginfo.si_sc.sc_fs = regs->tf_fs;
426 sf.sf_siginfo.si_sc.sc_gs = rgs();
427 sf.sf_siginfo.si_sc.sc_isp = regs->tf_isp;
429 /* Build the signal context to be used by osigreturn(). */
430 sf.sf_siginfo.si_sc.sc_onstack = (oonstack) ? 1 : 0;
431 SIG2OSIG(*mask, sf.sf_siginfo.si_sc.sc_mask);
432 sf.sf_siginfo.si_sc.sc_sp = regs->tf_esp;
433 sf.sf_siginfo.si_sc.sc_fp = regs->tf_ebp;
434 sf.sf_siginfo.si_sc.sc_pc = regs->tf_eip;
435 sf.sf_siginfo.si_sc.sc_ps = regs->tf_eflags;
436 sf.sf_siginfo.si_sc.sc_trapno = regs->tf_trapno;
437 sf.sf_siginfo.si_sc.sc_err = regs->tf_err;
440 * If we're a vm86 process, we want to save the segment registers.
441 * We also change eflags to be our emulated eflags, not the actual
444 if (regs->tf_eflags & PSL_VM) {
445 /* XXX confusing names: `tf' isn't a trapframe; `regs' is. */
446 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
447 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
449 sf.sf_siginfo.si_sc.sc_gs = tf->tf_vm86_gs;
450 sf.sf_siginfo.si_sc.sc_fs = tf->tf_vm86_fs;
451 sf.sf_siginfo.si_sc.sc_es = tf->tf_vm86_es;
452 sf.sf_siginfo.si_sc.sc_ds = tf->tf_vm86_ds;
454 if (vm86->vm86_has_vme == 0)
455 sf.sf_siginfo.si_sc.sc_ps =
456 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
457 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
459 /* See sendsig() for comments. */
460 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
464 * Copy the sigframe out to the user's stack.
466 if (copyout(&sf, fp, sizeof(*fp)) != 0) {
468 printf("process %ld has trashed its stack\n", (long)p->p_pid);
474 regs->tf_esp = (int)fp;
475 if (p->p_sysent->sv_sigcode_base != 0) {
476 regs->tf_eip = p->p_sysent->sv_sigcode_base + szsigcode -
479 /* a.out sysentvec does not use shared page */
480 regs->tf_eip = p->p_sysent->sv_psstrings - szosigcode;
482 regs->tf_eflags &= ~(PSL_T | PSL_D);
483 regs->tf_cs = _ucodesel;
484 regs->tf_ds = _udatasel;
485 regs->tf_es = _udatasel;
486 regs->tf_fs = _udatasel;
488 regs->tf_ss = _udatasel;
490 mtx_lock(&psp->ps_mtx);
492 #endif /* COMPAT_43 */
494 #ifdef COMPAT_FREEBSD4
496 freebsd4_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
498 struct sigframe4 sf, *sfp;
502 struct trapframe *regs;
508 PROC_LOCK_ASSERT(p, MA_OWNED);
509 sig = ksi->ksi_signo;
511 mtx_assert(&psp->ps_mtx, MA_OWNED);
513 oonstack = sigonstack(regs->tf_esp);
515 /* Save user context. */
516 bzero(&sf, sizeof(sf));
517 sf.sf_uc.uc_sigmask = *mask;
518 sf.sf_uc.uc_stack = td->td_sigstk;
519 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
520 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
521 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
522 sf.sf_uc.uc_mcontext.mc_gs = rgs();
523 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
524 bzero(sf.sf_uc.uc_mcontext.mc_fpregs,
525 sizeof(sf.sf_uc.uc_mcontext.mc_fpregs));
526 bzero(sf.sf_uc.uc_mcontext.__spare__,
527 sizeof(sf.sf_uc.uc_mcontext.__spare__));
528 bzero(sf.sf_uc.__spare__, sizeof(sf.sf_uc.__spare__));
530 /* Allocate space for the signal handler context. */
531 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
532 SIGISMEMBER(psp->ps_sigonstack, sig)) {
533 sfp = (struct sigframe4 *)(td->td_sigstk.ss_sp +
534 td->td_sigstk.ss_size - sizeof(struct sigframe4));
535 #if defined(COMPAT_43)
536 td->td_sigstk.ss_flags |= SS_ONSTACK;
539 sfp = (struct sigframe4 *)regs->tf_esp - 1;
541 /* Translate the signal if appropriate. */
542 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
543 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
545 /* Build the argument list for the signal handler. */
547 sf.sf_ucontext = (register_t)&sfp->sf_uc;
548 bzero(&sf.sf_si, sizeof(sf.sf_si));
549 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
550 /* Signal handler installed with SA_SIGINFO. */
551 sf.sf_siginfo = (register_t)&sfp->sf_si;
552 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
554 /* Fill in POSIX parts */
555 sf.sf_si.si_signo = sig;
556 sf.sf_si.si_code = ksi->ksi_code;
557 sf.sf_si.si_addr = ksi->ksi_addr;
559 /* Old FreeBSD-style arguments. */
560 sf.sf_siginfo = ksi->ksi_code;
561 sf.sf_addr = (register_t)ksi->ksi_addr;
562 sf.sf_ahu.sf_handler = catcher;
564 mtx_unlock(&psp->ps_mtx);
568 * If we're a vm86 process, we want to save the segment registers.
569 * We also change eflags to be our emulated eflags, not the actual
572 if (regs->tf_eflags & PSL_VM) {
573 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
574 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
576 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
577 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
578 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
579 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
581 if (vm86->vm86_has_vme == 0)
582 sf.sf_uc.uc_mcontext.mc_eflags =
583 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
584 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
587 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
588 * syscalls made by the signal handler. This just avoids
589 * wasting time for our lazy fixup of such faults. PSL_NT
590 * does nothing in vm86 mode, but vm86 programs can set it
591 * almost legitimately in probes for old cpu types.
593 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
597 * Copy the sigframe out to the user's stack.
599 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
601 printf("process %ld has trashed its stack\n", (long)p->p_pid);
607 regs->tf_esp = (int)sfp;
608 regs->tf_eip = p->p_sysent->sv_sigcode_base + szsigcode -
610 regs->tf_eflags &= ~(PSL_T | PSL_D);
611 regs->tf_cs = _ucodesel;
612 regs->tf_ds = _udatasel;
613 regs->tf_es = _udatasel;
614 regs->tf_fs = _udatasel;
615 regs->tf_ss = _udatasel;
617 mtx_lock(&psp->ps_mtx);
619 #endif /* COMPAT_FREEBSD4 */
622 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
624 struct sigframe sf, *sfp;
629 struct trapframe *regs;
630 struct segment_descriptor *sdp;
636 PROC_LOCK_ASSERT(p, MA_OWNED);
637 sig = ksi->ksi_signo;
639 mtx_assert(&psp->ps_mtx, MA_OWNED);
640 #ifdef COMPAT_FREEBSD4
641 if (SIGISMEMBER(psp->ps_freebsd4, sig)) {
642 freebsd4_sendsig(catcher, ksi, mask);
647 if (SIGISMEMBER(psp->ps_osigset, sig)) {
648 osendsig(catcher, ksi, mask);
653 oonstack = sigonstack(regs->tf_esp);
655 /* Save user context. */
656 bzero(&sf, sizeof(sf));
657 sf.sf_uc.uc_sigmask = *mask;
658 sf.sf_uc.uc_stack = td->td_sigstk;
659 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
660 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
661 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
662 sf.sf_uc.uc_mcontext.mc_gs = rgs();
663 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
664 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */
665 get_fpcontext(td, &sf.sf_uc.uc_mcontext);
668 * Unconditionally fill the fsbase and gsbase into the mcontext.
670 sdp = &td->td_pcb->pcb_fsd;
671 sf.sf_uc.uc_mcontext.mc_fsbase = sdp->sd_hibase << 24 |
673 sdp = &td->td_pcb->pcb_gsd;
674 sf.sf_uc.uc_mcontext.mc_gsbase = sdp->sd_hibase << 24 |
676 sf.sf_uc.uc_mcontext.mc_flags = 0;
677 bzero(sf.sf_uc.uc_mcontext.mc_spare2,
678 sizeof(sf.sf_uc.uc_mcontext.mc_spare2));
679 bzero(sf.sf_uc.__spare__, sizeof(sf.sf_uc.__spare__));
681 /* Allocate space for the signal handler context. */
682 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
683 SIGISMEMBER(psp->ps_sigonstack, sig)) {
684 sp = td->td_sigstk.ss_sp +
685 td->td_sigstk.ss_size - sizeof(struct sigframe);
686 #if defined(COMPAT_43)
687 td->td_sigstk.ss_flags |= SS_ONSTACK;
690 sp = (char *)regs->tf_esp - sizeof(struct sigframe);
691 /* Align to 16 bytes. */
692 sfp = (struct sigframe *)((unsigned int)sp & ~0xF);
694 /* Translate the signal if appropriate. */
695 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
696 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
698 /* Build the argument list for the signal handler. */
700 sf.sf_ucontext = (register_t)&sfp->sf_uc;
701 bzero(&sf.sf_si, sizeof(sf.sf_si));
702 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
703 /* Signal handler installed with SA_SIGINFO. */
704 sf.sf_siginfo = (register_t)&sfp->sf_si;
705 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
707 /* Fill in POSIX parts */
708 sf.sf_si = ksi->ksi_info;
709 sf.sf_si.si_signo = sig; /* maybe a translated signal */
711 /* Old FreeBSD-style arguments. */
712 sf.sf_siginfo = ksi->ksi_code;
713 sf.sf_addr = (register_t)ksi->ksi_addr;
714 sf.sf_ahu.sf_handler = catcher;
716 mtx_unlock(&psp->ps_mtx);
720 * If we're a vm86 process, we want to save the segment registers.
721 * We also change eflags to be our emulated eflags, not the actual
724 if (regs->tf_eflags & PSL_VM) {
725 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
726 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
728 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
729 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
730 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
731 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
733 if (vm86->vm86_has_vme == 0)
734 sf.sf_uc.uc_mcontext.mc_eflags =
735 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
736 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
739 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
740 * syscalls made by the signal handler. This just avoids
741 * wasting time for our lazy fixup of such faults. PSL_NT
742 * does nothing in vm86 mode, but vm86 programs can set it
743 * almost legitimately in probes for old cpu types.
745 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
749 * Copy the sigframe out to the user's stack.
751 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
753 printf("process %ld has trashed its stack\n", (long)p->p_pid);
759 regs->tf_esp = (int)sfp;
760 regs->tf_eip = p->p_sysent->sv_sigcode_base;
761 regs->tf_eflags &= ~(PSL_T | PSL_D);
762 regs->tf_cs = _ucodesel;
763 regs->tf_ds = _udatasel;
764 regs->tf_es = _udatasel;
765 regs->tf_fs = _udatasel;
766 regs->tf_ss = _udatasel;
768 mtx_lock(&psp->ps_mtx);
772 * System call to cleanup state after a signal
773 * has been taken. Reset signal mask and
774 * stack state from context left by sendsig (above).
775 * Return to previous pc and psl as specified by
776 * context left by sendsig. Check carefully to
777 * make sure that the user has not modified the
778 * state to gain improper privileges.
786 struct osigreturn_args /* {
787 struct osigcontext *sigcntxp;
790 struct osigcontext sc;
791 struct trapframe *regs;
792 struct osigcontext *scp;
797 error = copyin(uap->sigcntxp, &sc, sizeof(sc));
802 if (eflags & PSL_VM) {
803 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
804 struct vm86_kernel *vm86;
807 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
808 * set up the vm86 area, and we can't enter vm86 mode.
810 if (td->td_pcb->pcb_ext == 0)
812 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
813 if (vm86->vm86_inited == 0)
816 /* Go back to user mode if both flags are set. */
817 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
818 ksiginfo_init_trap(&ksi);
819 ksi.ksi_signo = SIGBUS;
820 ksi.ksi_code = BUS_OBJERR;
821 ksi.ksi_addr = (void *)regs->tf_eip;
822 trapsignal(td, &ksi);
825 if (vm86->vm86_has_vme) {
826 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
827 (eflags & VME_USERCHANGE) | PSL_VM;
829 vm86->vm86_eflags = eflags; /* save VIF, VIP */
830 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
831 (eflags & VM_USERCHANGE) | PSL_VM;
833 tf->tf_vm86_ds = scp->sc_ds;
834 tf->tf_vm86_es = scp->sc_es;
835 tf->tf_vm86_fs = scp->sc_fs;
836 tf->tf_vm86_gs = scp->sc_gs;
837 tf->tf_ds = _udatasel;
838 tf->tf_es = _udatasel;
839 tf->tf_fs = _udatasel;
842 * Don't allow users to change privileged or reserved flags.
845 * XXX do allow users to change the privileged flag PSL_RF.
846 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
847 * should sometimes set it there too. tf_eflags is kept in
848 * the signal context during signal handling and there is no
849 * other place to remember it, so the PSL_RF bit may be
850 * corrupted by the signal handler without us knowing.
851 * Corruption of the PSL_RF bit at worst causes one more or
852 * one less debugger trap, so allowing it is fairly harmless.
854 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
859 * Don't allow users to load a valid privileged %cs. Let the
860 * hardware check for invalid selectors, excess privilege in
861 * other selectors, invalid %eip's and invalid %esp's.
863 if (!CS_SECURE(scp->sc_cs)) {
864 ksiginfo_init_trap(&ksi);
865 ksi.ksi_signo = SIGBUS;
866 ksi.ksi_code = BUS_OBJERR;
867 ksi.ksi_trapno = T_PROTFLT;
868 ksi.ksi_addr = (void *)regs->tf_eip;
869 trapsignal(td, &ksi);
872 regs->tf_ds = scp->sc_ds;
873 regs->tf_es = scp->sc_es;
874 regs->tf_fs = scp->sc_fs;
877 /* Restore remaining registers. */
878 regs->tf_eax = scp->sc_eax;
879 regs->tf_ebx = scp->sc_ebx;
880 regs->tf_ecx = scp->sc_ecx;
881 regs->tf_edx = scp->sc_edx;
882 regs->tf_esi = scp->sc_esi;
883 regs->tf_edi = scp->sc_edi;
884 regs->tf_cs = scp->sc_cs;
885 regs->tf_ss = scp->sc_ss;
886 regs->tf_isp = scp->sc_isp;
887 regs->tf_ebp = scp->sc_fp;
888 regs->tf_esp = scp->sc_sp;
889 regs->tf_eip = scp->sc_pc;
890 regs->tf_eflags = eflags;
892 #if defined(COMPAT_43)
893 if (scp->sc_onstack & 1)
894 td->td_sigstk.ss_flags |= SS_ONSTACK;
896 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
898 kern_sigprocmask(td, SIG_SETMASK, (sigset_t *)&scp->sc_mask, NULL,
900 return (EJUSTRETURN);
902 #endif /* COMPAT_43 */
904 #ifdef COMPAT_FREEBSD4
909 freebsd4_sigreturn(td, uap)
911 struct freebsd4_sigreturn_args /* {
912 const ucontext4 *sigcntxp;
916 struct trapframe *regs;
917 struct ucontext4 *ucp;
918 int cs, eflags, error;
921 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
926 eflags = ucp->uc_mcontext.mc_eflags;
927 if (eflags & PSL_VM) {
928 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
929 struct vm86_kernel *vm86;
932 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
933 * set up the vm86 area, and we can't enter vm86 mode.
935 if (td->td_pcb->pcb_ext == 0)
937 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
938 if (vm86->vm86_inited == 0)
941 /* Go back to user mode if both flags are set. */
942 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
943 ksiginfo_init_trap(&ksi);
944 ksi.ksi_signo = SIGBUS;
945 ksi.ksi_code = BUS_OBJERR;
946 ksi.ksi_addr = (void *)regs->tf_eip;
947 trapsignal(td, &ksi);
949 if (vm86->vm86_has_vme) {
950 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
951 (eflags & VME_USERCHANGE) | PSL_VM;
953 vm86->vm86_eflags = eflags; /* save VIF, VIP */
954 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
955 (eflags & VM_USERCHANGE) | PSL_VM;
957 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
958 tf->tf_eflags = eflags;
959 tf->tf_vm86_ds = tf->tf_ds;
960 tf->tf_vm86_es = tf->tf_es;
961 tf->tf_vm86_fs = tf->tf_fs;
962 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
963 tf->tf_ds = _udatasel;
964 tf->tf_es = _udatasel;
965 tf->tf_fs = _udatasel;
968 * Don't allow users to change privileged or reserved flags.
971 * XXX do allow users to change the privileged flag PSL_RF.
972 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
973 * should sometimes set it there too. tf_eflags is kept in
974 * the signal context during signal handling and there is no
975 * other place to remember it, so the PSL_RF bit may be
976 * corrupted by the signal handler without us knowing.
977 * Corruption of the PSL_RF bit at worst causes one more or
978 * one less debugger trap, so allowing it is fairly harmless.
980 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
981 uprintf("pid %d (%s): freebsd4_sigreturn eflags = 0x%x\n",
982 td->td_proc->p_pid, td->td_name, eflags);
987 * Don't allow users to load a valid privileged %cs. Let the
988 * hardware check for invalid selectors, excess privilege in
989 * other selectors, invalid %eip's and invalid %esp's.
991 cs = ucp->uc_mcontext.mc_cs;
992 if (!CS_SECURE(cs)) {
993 uprintf("pid %d (%s): freebsd4_sigreturn cs = 0x%x\n",
994 td->td_proc->p_pid, td->td_name, cs);
995 ksiginfo_init_trap(&ksi);
996 ksi.ksi_signo = SIGBUS;
997 ksi.ksi_code = BUS_OBJERR;
998 ksi.ksi_trapno = T_PROTFLT;
999 ksi.ksi_addr = (void *)regs->tf_eip;
1000 trapsignal(td, &ksi);
1004 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
1007 #if defined(COMPAT_43)
1008 if (ucp->uc_mcontext.mc_onstack & 1)
1009 td->td_sigstk.ss_flags |= SS_ONSTACK;
1011 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
1013 kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0);
1014 return (EJUSTRETURN);
1016 #endif /* COMPAT_FREEBSD4 */
1022 sys_sigreturn(td, uap)
1024 struct sigreturn_args /* {
1025 const struct __ucontext *sigcntxp;
1029 struct trapframe *regs;
1031 int cs, eflags, error, ret;
1034 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
1038 regs = td->td_frame;
1039 eflags = ucp->uc_mcontext.mc_eflags;
1040 if (eflags & PSL_VM) {
1041 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
1042 struct vm86_kernel *vm86;
1045 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
1046 * set up the vm86 area, and we can't enter vm86 mode.
1048 if (td->td_pcb->pcb_ext == 0)
1050 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
1051 if (vm86->vm86_inited == 0)
1054 /* Go back to user mode if both flags are set. */
1055 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
1056 ksiginfo_init_trap(&ksi);
1057 ksi.ksi_signo = SIGBUS;
1058 ksi.ksi_code = BUS_OBJERR;
1059 ksi.ksi_addr = (void *)regs->tf_eip;
1060 trapsignal(td, &ksi);
1063 if (vm86->vm86_has_vme) {
1064 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
1065 (eflags & VME_USERCHANGE) | PSL_VM;
1067 vm86->vm86_eflags = eflags; /* save VIF, VIP */
1068 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
1069 (eflags & VM_USERCHANGE) | PSL_VM;
1071 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
1072 tf->tf_eflags = eflags;
1073 tf->tf_vm86_ds = tf->tf_ds;
1074 tf->tf_vm86_es = tf->tf_es;
1075 tf->tf_vm86_fs = tf->tf_fs;
1076 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
1077 tf->tf_ds = _udatasel;
1078 tf->tf_es = _udatasel;
1079 tf->tf_fs = _udatasel;
1082 * Don't allow users to change privileged or reserved flags.
1085 * XXX do allow users to change the privileged flag PSL_RF.
1086 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
1087 * should sometimes set it there too. tf_eflags is kept in
1088 * the signal context during signal handling and there is no
1089 * other place to remember it, so the PSL_RF bit may be
1090 * corrupted by the signal handler without us knowing.
1091 * Corruption of the PSL_RF bit at worst causes one more or
1092 * one less debugger trap, so allowing it is fairly harmless.
1094 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
1095 uprintf("pid %d (%s): sigreturn eflags = 0x%x\n",
1096 td->td_proc->p_pid, td->td_name, eflags);
1101 * Don't allow users to load a valid privileged %cs. Let the
1102 * hardware check for invalid selectors, excess privilege in
1103 * other selectors, invalid %eip's and invalid %esp's.
1105 cs = ucp->uc_mcontext.mc_cs;
1106 if (!CS_SECURE(cs)) {
1107 uprintf("pid %d (%s): sigreturn cs = 0x%x\n",
1108 td->td_proc->p_pid, td->td_name, cs);
1109 ksiginfo_init_trap(&ksi);
1110 ksi.ksi_signo = SIGBUS;
1111 ksi.ksi_code = BUS_OBJERR;
1112 ksi.ksi_trapno = T_PROTFLT;
1113 ksi.ksi_addr = (void *)regs->tf_eip;
1114 trapsignal(td, &ksi);
1118 ret = set_fpcontext(td, &ucp->uc_mcontext);
1121 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
1124 #if defined(COMPAT_43)
1125 if (ucp->uc_mcontext.mc_onstack & 1)
1126 td->td_sigstk.ss_flags |= SS_ONSTACK;
1128 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
1131 kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0);
1132 return (EJUSTRETURN);
1136 * Machine dependent boot() routine
1138 * I haven't seen anything to put here yet
1139 * Possibly some stuff might be grafted back here from boot()
1147 * Flush the D-cache for non-DMA I/O so that the I-cache can
1148 * be made coherent later.
1151 cpu_flush_dcache(void *ptr, size_t len)
1153 /* Not applicable */
1156 /* Get current clock frequency for the given cpu id. */
1158 cpu_est_clockrate(int cpu_id, uint64_t *rate)
1160 uint64_t tsc1, tsc2;
1161 uint64_t acnt, mcnt, perf;
1164 if (pcpu_find(cpu_id) == NULL || rate == NULL)
1166 if ((cpu_feature & CPUID_TSC) == 0)
1167 return (EOPNOTSUPP);
1170 * If TSC is P-state invariant and APERF/MPERF MSRs do not exist,
1171 * DELAY(9) based logic fails.
1173 if (tsc_is_invariant && !tsc_perf_stat)
1174 return (EOPNOTSUPP);
1178 /* Schedule ourselves on the indicated cpu. */
1179 thread_lock(curthread);
1180 sched_bind(curthread, cpu_id);
1181 thread_unlock(curthread);
1185 /* Calibrate by measuring a short delay. */
1186 reg = intr_disable();
1187 if (tsc_is_invariant) {
1188 wrmsr(MSR_MPERF, 0);
1189 wrmsr(MSR_APERF, 0);
1192 mcnt = rdmsr(MSR_MPERF);
1193 acnt = rdmsr(MSR_APERF);
1196 perf = 1000 * acnt / mcnt;
1197 *rate = (tsc2 - tsc1) * perf;
1203 *rate = (tsc2 - tsc1) * 1000;
1208 thread_lock(curthread);
1209 sched_unbind(curthread);
1210 thread_unlock(curthread);
1222 HYPERVISOR_shutdown(SHUTDOWN_poweroff);
1225 int scheduler_running;
1228 cpu_idle_hlt(int busy)
1231 scheduler_running = 1;
1238 * Shutdown the CPU as much as possible
1249 void (*cpu_idle_hook)(void) = NULL; /* ACPI idle hook. */
1250 static int cpu_ident_amdc1e = 0; /* AMD C1E supported. */
1251 static int idle_mwait = 1; /* Use MONITOR/MWAIT for short idle. */
1252 TUNABLE_INT("machdep.idle_mwait", &idle_mwait);
1253 SYSCTL_INT(_machdep, OID_AUTO, idle_mwait, CTLFLAG_RW, &idle_mwait,
1254 0, "Use MONITOR/MWAIT for short idle");
1256 #define STATE_RUNNING 0x0
1257 #define STATE_MWAIT 0x1
1258 #define STATE_SLEEPING 0x2
1261 cpu_idle_acpi(int busy)
1265 state = (int *)PCPU_PTR(monitorbuf);
1266 *state = STATE_SLEEPING;
1268 if (sched_runnable())
1270 else if (cpu_idle_hook)
1273 __asm __volatile("sti; hlt");
1274 *state = STATE_RUNNING;
1279 cpu_idle_hlt(int busy)
1283 state = (int *)PCPU_PTR(monitorbuf);
1284 *state = STATE_SLEEPING;
1286 * We must absolutely guarentee that hlt is the next instruction
1287 * after sti or we introduce a timing window.
1290 if (sched_runnable())
1293 __asm __volatile("sti; hlt");
1294 *state = STATE_RUNNING;
1299 * MWAIT cpu power states. Lower 4 bits are sub-states.
1301 #define MWAIT_C0 0xf0
1302 #define MWAIT_C1 0x00
1303 #define MWAIT_C2 0x10
1304 #define MWAIT_C3 0x20
1305 #define MWAIT_C4 0x30
1308 cpu_idle_mwait(int busy)
1312 state = (int *)PCPU_PTR(monitorbuf);
1313 *state = STATE_MWAIT;
1314 if (!sched_runnable()) {
1315 cpu_monitor(state, 0, 0);
1316 if (*state == STATE_MWAIT)
1317 cpu_mwait(0, MWAIT_C1);
1319 *state = STATE_RUNNING;
1323 cpu_idle_spin(int busy)
1328 state = (int *)PCPU_PTR(monitorbuf);
1329 *state = STATE_RUNNING;
1330 for (i = 0; i < 1000; i++) {
1331 if (sched_runnable())
1338 * C1E renders the local APIC timer dead, so we disable it by
1339 * reading the Interrupt Pending Message register and clearing
1340 * both C1eOnCmpHalt (bit 28) and SmiOnCmpHalt (bit 27).
1343 * "BIOS and Kernel Developer's Guide for AMD NPT Family 0Fh Processors"
1344 * #32559 revision 3.00+
1346 #define MSR_AMDK8_IPM 0xc0010055
1347 #define AMDK8_SMIONCMPHALT (1ULL << 27)
1348 #define AMDK8_C1EONCMPHALT (1ULL << 28)
1349 #define AMDK8_CMPHALT (AMDK8_SMIONCMPHALT | AMDK8_C1EONCMPHALT)
1352 cpu_probe_amdc1e(void)
1356 * Detect the presence of C1E capability mostly on latest
1357 * dual-cores (or future) k8 family.
1359 if (cpu_vendor_id == CPU_VENDOR_AMD &&
1360 (cpu_id & 0x00000f00) == 0x00000f00 &&
1361 (cpu_id & 0x0fff0000) >= 0x00040000) {
1362 cpu_ident_amdc1e = 1;
1367 void (*cpu_idle_fn)(int) = cpu_idle_hlt;
1369 void (*cpu_idle_fn)(int) = cpu_idle_acpi;
1379 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d",
1381 #if defined(MP_WATCHDOG) && !defined(XEN)
1382 ap_watchdog(PCPU_GET(cpuid));
1385 /* If we are busy - try to use fast methods. */
1387 if ((cpu_feature2 & CPUID2_MON) && idle_mwait) {
1388 cpu_idle_mwait(busy);
1394 /* If we have time - switch timers into idle mode. */
1401 /* Apply AMD APIC timer C1E workaround. */
1402 if (cpu_ident_amdc1e && cpu_disable_deep_sleep) {
1403 msr = rdmsr(MSR_AMDK8_IPM);
1404 if (msr & AMDK8_CMPHALT)
1405 wrmsr(MSR_AMDK8_IPM, msr & ~AMDK8_CMPHALT);
1409 /* Call main idle method. */
1412 /* Switch timers mack into active mode. */
1420 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done",
1425 cpu_idle_wakeup(int cpu)
1430 pcpu = pcpu_find(cpu);
1431 state = (int *)pcpu->pc_monitorbuf;
1433 * This doesn't need to be atomic since missing the race will
1434 * simply result in unnecessary IPIs.
1436 if (*state == STATE_SLEEPING)
1438 if (*state == STATE_MWAIT)
1439 *state = STATE_RUNNING;
1444 * Ordered by speed/power consumption.
1450 { cpu_idle_spin, "spin" },
1451 { cpu_idle_mwait, "mwait" },
1452 { cpu_idle_hlt, "hlt" },
1453 { cpu_idle_acpi, "acpi" },
1458 idle_sysctl_available(SYSCTL_HANDLER_ARGS)
1464 avail = malloc(256, M_TEMP, M_WAITOK);
1466 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
1467 if (strstr(idle_tbl[i].id_name, "mwait") &&
1468 (cpu_feature2 & CPUID2_MON) == 0)
1470 if (strcmp(idle_tbl[i].id_name, "acpi") == 0 &&
1471 cpu_idle_hook == NULL)
1473 p += sprintf(p, "%s%s", p != avail ? ", " : "",
1474 idle_tbl[i].id_name);
1476 error = sysctl_handle_string(oidp, avail, 0, req);
1477 free(avail, M_TEMP);
1481 SYSCTL_PROC(_machdep, OID_AUTO, idle_available, CTLTYPE_STRING | CTLFLAG_RD,
1482 0, 0, idle_sysctl_available, "A", "list of available idle functions");
1485 idle_sysctl(SYSCTL_HANDLER_ARGS)
1493 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
1494 if (idle_tbl[i].id_fn == cpu_idle_fn) {
1495 p = idle_tbl[i].id_name;
1499 strncpy(buf, p, sizeof(buf));
1500 error = sysctl_handle_string(oidp, buf, sizeof(buf), req);
1501 if (error != 0 || req->newptr == NULL)
1503 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
1504 if (strstr(idle_tbl[i].id_name, "mwait") &&
1505 (cpu_feature2 & CPUID2_MON) == 0)
1507 if (strcmp(idle_tbl[i].id_name, "acpi") == 0 &&
1508 cpu_idle_hook == NULL)
1510 if (strcmp(idle_tbl[i].id_name, buf))
1512 cpu_idle_fn = idle_tbl[i].id_fn;
1518 SYSCTL_PROC(_machdep, OID_AUTO, idle, CTLTYPE_STRING | CTLFLAG_RW, 0, 0,
1519 idle_sysctl, "A", "currently selected idle function");
1521 uint64_t (*atomic_load_acq_64)(volatile uint64_t *) =
1522 atomic_load_acq_64_i386;
1523 void (*atomic_store_rel_64)(volatile uint64_t *, uint64_t) =
1524 atomic_store_rel_64_i386;
1527 cpu_probe_cmpxchg8b(void)
1530 if ((cpu_feature & CPUID_CX8) != 0 ||
1531 cpu_vendor_id == CPU_VENDOR_RISE) {
1532 atomic_load_acq_64 = atomic_load_acq_64_i586;
1533 atomic_store_rel_64 = atomic_store_rel_64_i586;
1538 * Reset registers to default values on exec.
1541 exec_setregs(struct thread *td, struct image_params *imgp, u_long stack)
1543 struct trapframe *regs = td->td_frame;
1544 struct pcb *pcb = td->td_pcb;
1546 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
1547 pcb->pcb_gs = _udatasel;
1550 mtx_lock_spin(&dt_lock);
1551 if (td->td_proc->p_md.md_ldt)
1554 mtx_unlock_spin(&dt_lock);
1556 bzero((char *)regs, sizeof(struct trapframe));
1557 regs->tf_eip = imgp->entry_addr;
1558 regs->tf_esp = stack;
1559 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
1560 regs->tf_ss = _udatasel;
1561 regs->tf_ds = _udatasel;
1562 regs->tf_es = _udatasel;
1563 regs->tf_fs = _udatasel;
1564 regs->tf_cs = _ucodesel;
1566 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
1567 regs->tf_ebx = imgp->ps_strings;
1570 * Reset the hardware debug registers if they were in use.
1571 * They won't have any meaning for the newly exec'd process.
1573 if (pcb->pcb_flags & PCB_DBREGS) {
1580 if (pcb == curpcb) {
1582 * Clear the debug registers on the running
1583 * CPU, otherwise they will end up affecting
1584 * the next process we switch to.
1588 pcb->pcb_flags &= ~PCB_DBREGS;
1592 * Initialize the math emulator (if any) for the current process.
1593 * Actually, just clear the bit that says that the emulator has
1594 * been initialized. Initialization is delayed until the process
1595 * traps to the emulator (if it is done at all) mainly because
1596 * emulators don't provide an entry point for initialization.
1598 td->td_pcb->pcb_flags &= ~FP_SOFTFP;
1599 pcb->pcb_initial_npxcw = __INITIAL_NPXCW__;
1602 * Drop the FP state if we hold it, so that the process gets a
1603 * clean FP state if it uses the FPU again.
1608 * XXX - Linux emulator
1609 * Make sure sure edx is 0x0 on entry. Linux binaries depend
1612 td->td_retval[1] = 0;
1623 * CR0_MP, CR0_NE and CR0_TS are set for NPX (FPU) support:
1625 * Prepare to trap all ESC (i.e., NPX) instructions and all WAIT
1626 * instructions. We must set the CR0_MP bit and use the CR0_TS
1627 * bit to control the trap, because setting the CR0_EM bit does
1628 * not cause WAIT instructions to trap. It's important to trap
1629 * WAIT instructions - otherwise the "wait" variants of no-wait
1630 * control instructions would degenerate to the "no-wait" variants
1631 * after FP context switches but work correctly otherwise. It's
1632 * particularly important to trap WAITs when there is no NPX -
1633 * otherwise the "wait" variants would always degenerate.
1635 * Try setting CR0_NE to get correct error reporting on 486DX's.
1636 * Setting it should fail or do nothing on lesser processors.
1638 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM;
1643 u_long bootdev; /* not a struct cdev *- encoding is different */
1644 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1645 CTLFLAG_RD, &bootdev, 0, "Maybe the Boot device (not in struct cdev *format)");
1648 * Initialize 386 and configure to run kernel
1652 * Initialize segments & interrupt table
1658 union descriptor *gdt;
1659 union descriptor *ldt;
1661 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1662 union descriptor ldt[NLDT]; /* local descriptor table */
1664 static struct gate_descriptor idt0[NIDT];
1665 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1666 struct region_descriptor r_gdt, r_idt; /* table descriptors */
1667 struct mtx dt_lock; /* lock for GDT and LDT */
1669 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1670 extern int has_f00f_bug;
1673 static struct i386tss dblfault_tss;
1674 static char dblfault_stack[PAGE_SIZE];
1676 extern vm_offset_t proc0kstack;
1680 * software prototypes -- in more palatable form.
1682 * GCODE_SEL through GUDATA_SEL must be in this order for syscall/sysret
1683 * GUFS_SEL and GUGS_SEL must be in this order (swtch.s knows it)
1685 struct soft_segment_descriptor gdt_segs[] = {
1686 /* GNULL_SEL 0 Null Descriptor */
1692 .ssd_xx = 0, .ssd_xx1 = 0,
1695 /* GPRIV_SEL 1 SMP Per-Processor Private Data Descriptor */
1697 .ssd_limit = 0xfffff,
1698 .ssd_type = SDT_MEMRWA,
1701 .ssd_xx = 0, .ssd_xx1 = 0,
1704 /* GUFS_SEL 2 %fs Descriptor for user */
1706 .ssd_limit = 0xfffff,
1707 .ssd_type = SDT_MEMRWA,
1710 .ssd_xx = 0, .ssd_xx1 = 0,
1713 /* GUGS_SEL 3 %gs Descriptor for user */
1715 .ssd_limit = 0xfffff,
1716 .ssd_type = SDT_MEMRWA,
1719 .ssd_xx = 0, .ssd_xx1 = 0,
1722 /* GCODE_SEL 4 Code Descriptor for kernel */
1724 .ssd_limit = 0xfffff,
1725 .ssd_type = SDT_MEMERA,
1728 .ssd_xx = 0, .ssd_xx1 = 0,
1731 /* GDATA_SEL 5 Data Descriptor for kernel */
1733 .ssd_limit = 0xfffff,
1734 .ssd_type = SDT_MEMRWA,
1737 .ssd_xx = 0, .ssd_xx1 = 0,
1740 /* GUCODE_SEL 6 Code Descriptor for user */
1742 .ssd_limit = 0xfffff,
1743 .ssd_type = SDT_MEMERA,
1746 .ssd_xx = 0, .ssd_xx1 = 0,
1749 /* GUDATA_SEL 7 Data Descriptor for user */
1751 .ssd_limit = 0xfffff,
1752 .ssd_type = SDT_MEMRWA,
1755 .ssd_xx = 0, .ssd_xx1 = 0,
1758 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1759 { .ssd_base = 0x400,
1760 .ssd_limit = 0xfffff,
1761 .ssd_type = SDT_MEMRWA,
1764 .ssd_xx = 0, .ssd_xx1 = 0,
1768 /* GPROC0_SEL 9 Proc 0 Tss Descriptor */
1771 .ssd_limit = sizeof(struct i386tss)-1,
1772 .ssd_type = SDT_SYS386TSS,
1775 .ssd_xx = 0, .ssd_xx1 = 0,
1778 /* GLDT_SEL 10 LDT Descriptor */
1779 { .ssd_base = (int) ldt,
1780 .ssd_limit = sizeof(ldt)-1,
1781 .ssd_type = SDT_SYSLDT,
1784 .ssd_xx = 0, .ssd_xx1 = 0,
1787 /* GUSERLDT_SEL 11 User LDT Descriptor per process */
1788 { .ssd_base = (int) ldt,
1789 .ssd_limit = (512 * sizeof(union descriptor)-1),
1790 .ssd_type = SDT_SYSLDT,
1793 .ssd_xx = 0, .ssd_xx1 = 0,
1796 /* GPANIC_SEL 12 Panic Tss Descriptor */
1797 { .ssd_base = (int) &dblfault_tss,
1798 .ssd_limit = sizeof(struct i386tss)-1,
1799 .ssd_type = SDT_SYS386TSS,
1802 .ssd_xx = 0, .ssd_xx1 = 0,
1805 /* GBIOSCODE32_SEL 13 BIOS 32-bit interface (32bit Code) */
1807 .ssd_limit = 0xfffff,
1808 .ssd_type = SDT_MEMERA,
1811 .ssd_xx = 0, .ssd_xx1 = 0,
1814 /* GBIOSCODE16_SEL 14 BIOS 32-bit interface (16bit Code) */
1816 .ssd_limit = 0xfffff,
1817 .ssd_type = SDT_MEMERA,
1820 .ssd_xx = 0, .ssd_xx1 = 0,
1823 /* GBIOSDATA_SEL 15 BIOS 32-bit interface (Data) */
1825 .ssd_limit = 0xfffff,
1826 .ssd_type = SDT_MEMRWA,
1829 .ssd_xx = 0, .ssd_xx1 = 0,
1832 /* GBIOSUTIL_SEL 16 BIOS 16-bit interface (Utility) */
1834 .ssd_limit = 0xfffff,
1835 .ssd_type = SDT_MEMRWA,
1838 .ssd_xx = 0, .ssd_xx1 = 0,
1841 /* GBIOSARGS_SEL 17 BIOS 16-bit interface (Arguments) */
1843 .ssd_limit = 0xfffff,
1844 .ssd_type = SDT_MEMRWA,
1847 .ssd_xx = 0, .ssd_xx1 = 0,
1850 /* GNDIS_SEL 18 NDIS Descriptor */
1856 .ssd_xx = 0, .ssd_xx1 = 0,
1862 static struct soft_segment_descriptor ldt_segs[] = {
1863 /* Null Descriptor - overwritten by call gate */
1869 .ssd_xx = 0, .ssd_xx1 = 0,
1872 /* Null Descriptor - overwritten by call gate */
1878 .ssd_xx = 0, .ssd_xx1 = 0,
1881 /* Null Descriptor - overwritten by call gate */
1887 .ssd_xx = 0, .ssd_xx1 = 0,
1890 /* Code Descriptor for user */
1892 .ssd_limit = 0xfffff,
1893 .ssd_type = SDT_MEMERA,
1896 .ssd_xx = 0, .ssd_xx1 = 0,
1899 /* Null Descriptor - overwritten by call gate */
1905 .ssd_xx = 0, .ssd_xx1 = 0,
1908 /* Data Descriptor for user */
1910 .ssd_limit = 0xfffff,
1911 .ssd_type = SDT_MEMRWA,
1914 .ssd_xx = 0, .ssd_xx1 = 0,
1920 setidt(idx, func, typ, dpl, selec)
1927 struct gate_descriptor *ip;
1930 ip->gd_looffset = (int)func;
1931 ip->gd_selector = selec;
1937 ip->gd_hioffset = ((int)func)>>16 ;
1941 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1942 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1943 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1944 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
1946 #ifdef KDTRACE_HOOKS
1949 IDTVEC(lcall_syscall), IDTVEC(int0x80_syscall);
1953 * Display the index and function name of any IDT entries that don't use
1954 * the default 'rsvd' entry point.
1956 DB_SHOW_COMMAND(idt, db_show_idt)
1958 struct gate_descriptor *ip;
1963 for (idx = 0; idx < NIDT && !db_pager_quit; idx++) {
1964 func = (ip->gd_hioffset << 16 | ip->gd_looffset);
1965 if (func != (uintptr_t)&IDTVEC(rsvd)) {
1966 db_printf("%3d\t", idx);
1967 db_printsym(func, DB_STGY_PROC);
1974 /* Show privileged registers. */
1975 DB_SHOW_COMMAND(sysregs, db_show_sysregs)
1977 uint64_t idtr, gdtr;
1980 db_printf("idtr\t0x%08x/%04x\n",
1981 (u_int)(idtr >> 16), (u_int)idtr & 0xffff);
1983 db_printf("gdtr\t0x%08x/%04x\n",
1984 (u_int)(gdtr >> 16), (u_int)gdtr & 0xffff);
1985 db_printf("ldtr\t0x%04x\n", rldt());
1986 db_printf("tr\t0x%04x\n", rtr());
1987 db_printf("cr0\t0x%08x\n", rcr0());
1988 db_printf("cr2\t0x%08x\n", rcr2());
1989 db_printf("cr3\t0x%08x\n", rcr3());
1990 db_printf("cr4\t0x%08x\n", rcr4());
1996 struct segment_descriptor *sd;
1997 struct soft_segment_descriptor *ssd;
1999 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
2000 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
2001 ssd->ssd_type = sd->sd_type;
2002 ssd->ssd_dpl = sd->sd_dpl;
2003 ssd->ssd_p = sd->sd_p;
2004 ssd->ssd_def32 = sd->sd_def32;
2005 ssd->ssd_gran = sd->sd_gran;
2010 add_smap_entry(struct bios_smap *smap, vm_paddr_t *physmap, int *physmap_idxp)
2012 int i, insert_idx, physmap_idx;
2014 physmap_idx = *physmap_idxp;
2016 if (boothowto & RB_VERBOSE)
2017 printf("SMAP type=%02x base=%016llx len=%016llx\n",
2018 smap->type, smap->base, smap->length);
2020 if (smap->type != SMAP_TYPE_MEMORY)
2023 if (smap->length == 0)
2027 if (smap->base > 0xffffffff) {
2028 printf("%uK of memory above 4GB ignored\n",
2029 (u_int)(smap->length / 1024));
2035 * Find insertion point while checking for overlap. Start off by
2036 * assuming the new entry will be added to the end.
2038 insert_idx = physmap_idx + 2;
2039 for (i = 0; i <= physmap_idx; i += 2) {
2040 if (smap->base < physmap[i + 1]) {
2041 if (smap->base + smap->length <= physmap[i]) {
2045 if (boothowto & RB_VERBOSE)
2047 "Overlapping memory regions, ignoring second region\n");
2052 /* See if we can prepend to the next entry. */
2053 if (insert_idx <= physmap_idx &&
2054 smap->base + smap->length == physmap[insert_idx]) {
2055 physmap[insert_idx] = smap->base;
2059 /* See if we can append to the previous entry. */
2060 if (insert_idx > 0 && smap->base == physmap[insert_idx - 1]) {
2061 physmap[insert_idx - 1] += smap->length;
2066 *physmap_idxp = physmap_idx;
2067 if (physmap_idx == PHYSMAP_SIZE) {
2069 "Too many segments in the physical address map, giving up\n");
2074 * Move the last 'N' entries down to make room for the new
2077 for (i = physmap_idx; i > insert_idx; i -= 2) {
2078 physmap[i] = physmap[i - 2];
2079 physmap[i + 1] = physmap[i - 1];
2082 /* Insert the new entry. */
2083 physmap[insert_idx] = smap->base;
2084 physmap[insert_idx + 1] = smap->base + smap->length;
2095 if (basemem > 640) {
2096 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
2102 * XXX if biosbasemem is now < 640, there is a `hole'
2103 * between the end of base memory and the start of
2104 * ISA memory. The hole may be empty or it may
2105 * contain BIOS code or data. Map it read/write so
2106 * that the BIOS can write to it. (Memory from 0 to
2107 * the physical end of the kernel is mapped read-only
2108 * to begin with and then parts of it are remapped.
2109 * The parts that aren't remapped form holes that
2110 * remain read-only and are unused by the kernel.
2111 * The base memory area is below the physical end of
2112 * the kernel and right now forms a read-only hole.
2113 * The part of it from PAGE_SIZE to
2114 * (trunc_page(biosbasemem * 1024) - 1) will be
2115 * remapped and used by the kernel later.)
2117 * This code is similar to the code used in
2118 * pmap_mapdev, but since no memory needs to be
2119 * allocated we simply change the mapping.
2121 for (pa = trunc_page(basemem * 1024);
2122 pa < ISA_HOLE_START; pa += PAGE_SIZE)
2123 pmap_kenter(KERNBASE + pa, pa);
2126 * Map pages between basemem and ISA_HOLE_START, if any, r/w into
2127 * the vm86 page table so that vm86 can scribble on them using
2128 * the vm86 map too. XXX: why 2 ways for this and only 1 way for
2129 * page 0, at least as initialized here?
2131 pte = (pt_entry_t *)vm86paddr;
2132 for (i = basemem / 4; i < 160; i++)
2133 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
2138 * Populate the (physmap) array with base/bound pairs describing the
2139 * available physical memory in the system, then test this memory and
2140 * build the phys_avail array describing the actually-available memory.
2142 * If we cannot accurately determine the physical memory map, then use
2143 * value from the 0xE801 call, and failing that, the RTC.
2145 * Total memory size may be set by the kernel environment variable
2146 * hw.physmem or the compile-time define MAXMEM.
2148 * XXX first should be vm_paddr_t.
2151 getmemsize(int first)
2153 int has_smap, off, physmap_idx, pa_indx, da_indx;
2154 u_long physmem_tunable, memtest;
2155 vm_paddr_t physmap[PHYSMAP_SIZE];
2157 quad_t dcons_addr, dcons_size;
2159 int hasbrokenint12, i;
2161 struct vm86frame vmf;
2162 struct vm86context vmc;
2164 struct bios_smap *smap, *smapbase, *smapend;
2171 Maxmem = xen_start_info->nr_pages - init_first;
2174 physmap[0] = init_first << PAGE_SHIFT;
2175 physmap[1] = ptoa(Maxmem) - round_page(msgbufsize);
2179 if (arch_i386_is_xbox) {
2181 * We queried the memory size before, so chop off 4MB for
2182 * the framebuffer and inform the OS of this.
2185 physmap[1] = (arch_i386_xbox_memsize * 1024 * 1024) - XBOX_FB_SIZE;
2190 bzero(&vmf, sizeof(vmf));
2191 bzero(physmap, sizeof(physmap));
2195 * Check if the loader supplied an SMAP memory map. If so,
2196 * use that and do not make any VM86 calls.
2200 kmdp = preload_search_by_type("elf kernel");
2202 kmdp = preload_search_by_type("elf32 kernel");
2204 smapbase = (struct bios_smap *)preload_search_info(kmdp,
2205 MODINFO_METADATA | MODINFOMD_SMAP);
2206 if (smapbase != NULL) {
2208 * subr_module.c says:
2209 * "Consumer may safely assume that size value precedes data."
2210 * ie: an int32_t immediately precedes SMAP.
2212 smapsize = *((u_int32_t *)smapbase - 1);
2213 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize);
2216 for (smap = smapbase; smap < smapend; smap++)
2217 if (!add_smap_entry(smap, physmap, &physmap_idx))
2223 * Some newer BIOSes have a broken INT 12H implementation
2224 * which causes a kernel panic immediately. In this case, we
2225 * need use the SMAP to determine the base memory size.
2228 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
2229 if (hasbrokenint12 == 0) {
2230 /* Use INT12 to determine base memory size. */
2231 vm86_intcall(0x12, &vmf);
2232 basemem = vmf.vmf_ax;
2237 * Fetch the memory map with INT 15:E820. Map page 1 R/W into
2238 * the kernel page table so we can use it as a buffer. The
2239 * kernel will unmap this page later.
2241 pmap_kenter(KERNBASE + (1 << PAGE_SHIFT), 1 << PAGE_SHIFT);
2243 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
2244 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
2248 vmf.vmf_eax = 0xE820;
2249 vmf.vmf_edx = SMAP_SIG;
2250 vmf.vmf_ecx = sizeof(struct bios_smap);
2251 i = vm86_datacall(0x15, &vmf, &vmc);
2252 if (i || vmf.vmf_eax != SMAP_SIG)
2255 if (!add_smap_entry(smap, physmap, &physmap_idx))
2257 } while (vmf.vmf_ebx != 0);
2261 * If we didn't fetch the "base memory" size from INT12,
2262 * figure it out from the SMAP (or just guess).
2265 for (i = 0; i <= physmap_idx; i += 2) {
2266 if (physmap[i] == 0x00000000) {
2267 basemem = physmap[i + 1] / 1024;
2272 /* XXX: If we couldn't find basemem from SMAP, just guess. */
2278 if (physmap[1] != 0)
2282 * If we failed to find an SMAP, figure out the extended
2283 * memory size. We will then build a simple memory map with
2284 * two segments, one for "base memory" and the second for
2285 * "extended memory". Note that "extended memory" starts at a
2286 * physical address of 1MB and that both basemem and extmem
2287 * are in units of 1KB.
2289 * First, try to fetch the extended memory size via INT 15:E801.
2291 vmf.vmf_ax = 0xE801;
2292 if (vm86_intcall(0x15, &vmf) == 0) {
2293 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
2296 * If INT15:E801 fails, this is our last ditch effort
2297 * to determine the extended memory size. Currently
2298 * we prefer the RTC value over INT15:88.
2302 vm86_intcall(0x15, &vmf);
2303 extmem = vmf.vmf_ax;
2305 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
2310 * Special hack for chipsets that still remap the 384k hole when
2311 * there's 16MB of memory - this really confuses people that
2312 * are trying to use bus mastering ISA controllers with the
2313 * "16MB limit"; they only have 16MB, but the remapping puts
2314 * them beyond the limit.
2316 * If extended memory is between 15-16MB (16-17MB phys address range),
2319 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
2323 physmap[1] = basemem * 1024;
2325 physmap[physmap_idx] = 0x100000;
2326 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
2331 * Now, physmap contains a map of physical memory.
2335 /* make hole for AP bootstrap code */
2336 physmap[1] = mp_bootaddress(physmap[1]);
2340 * Maxmem isn't the "maximum memory", it's one larger than the
2341 * highest page of the physical address space. It should be
2342 * called something like "Maxphyspage". We may adjust this
2343 * based on ``hw.physmem'' and the results of the memory test.
2345 Maxmem = atop(physmap[physmap_idx + 1]);
2348 Maxmem = MAXMEM / 4;
2351 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable))
2352 Maxmem = atop(physmem_tunable);
2355 * If we have an SMAP, don't allow MAXMEM or hw.physmem to extend
2356 * the amount of memory in the system.
2358 if (has_smap && Maxmem > atop(physmap[physmap_idx + 1]))
2359 Maxmem = atop(physmap[physmap_idx + 1]);
2362 * By default enable the memory test on real hardware, and disable
2363 * it if we appear to be running in a VM. This avoids touching all
2364 * pages unnecessarily, which doesn't matter on real hardware but is
2365 * bad for shared VM hosts. Use a general name so that
2366 * one could eventually do more with the code than just disable it.
2368 memtest = (vm_guest > VM_GUEST_NO) ? 0 : 1;
2369 TUNABLE_ULONG_FETCH("hw.memtest.tests", &memtest);
2371 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
2372 (boothowto & RB_VERBOSE))
2373 printf("Physical memory use set to %ldK\n", Maxmem * 4);
2376 * If Maxmem has been increased beyond what the system has detected,
2377 * extend the last memory segment to the new limit.
2379 if (atop(physmap[physmap_idx + 1]) < Maxmem)
2380 physmap[physmap_idx + 1] = ptoa((vm_paddr_t)Maxmem);
2382 /* call pmap initialization to make new kernel address space */
2383 pmap_bootstrap(first);
2386 * Size up each available chunk of physical memory.
2388 physmap[0] = PAGE_SIZE; /* mask off page 0 */
2391 phys_avail[pa_indx++] = physmap[0];
2392 phys_avail[pa_indx] = physmap[0];
2393 dump_avail[da_indx] = physmap[0];
2397 * Get dcons buffer address
2399 if (getenv_quad("dcons.addr", &dcons_addr) == 0 ||
2400 getenv_quad("dcons.size", &dcons_size) == 0)
2405 * physmap is in bytes, so when converting to page boundaries,
2406 * round up the start address and round down the end address.
2408 for (i = 0; i <= physmap_idx; i += 2) {
2411 end = ptoa((vm_paddr_t)Maxmem);
2412 if (physmap[i + 1] < end)
2413 end = trunc_page(physmap[i + 1]);
2414 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
2415 int tmp, page_bad, full;
2416 int *ptr = (int *)CADDR1;
2420 * block out kernel memory as not available.
2422 if (pa >= KERNLOAD && pa < first)
2426 * block out dcons buffer
2429 && pa >= trunc_page(dcons_addr)
2430 && pa < dcons_addr + dcons_size)
2438 * map page into kernel: valid, read/write,non-cacheable
2440 *pte = pa | PG_V | PG_RW | PG_N;
2445 * Test for alternating 1's and 0's
2447 *(volatile int *)ptr = 0xaaaaaaaa;
2448 if (*(volatile int *)ptr != 0xaaaaaaaa)
2451 * Test for alternating 0's and 1's
2453 *(volatile int *)ptr = 0x55555555;
2454 if (*(volatile int *)ptr != 0x55555555)
2459 *(volatile int *)ptr = 0xffffffff;
2460 if (*(volatile int *)ptr != 0xffffffff)
2465 *(volatile int *)ptr = 0x0;
2466 if (*(volatile int *)ptr != 0x0)
2469 * Restore original value.
2475 * Adjust array of valid/good pages.
2477 if (page_bad == TRUE)
2480 * If this good page is a continuation of the
2481 * previous set of good pages, then just increase
2482 * the end pointer. Otherwise start a new chunk.
2483 * Note that "end" points one higher than end,
2484 * making the range >= start and < end.
2485 * If we're also doing a speculative memory
2486 * test and we at or past the end, bump up Maxmem
2487 * so that we keep going. The first bad page
2488 * will terminate the loop.
2490 if (phys_avail[pa_indx] == pa) {
2491 phys_avail[pa_indx] += PAGE_SIZE;
2494 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
2496 "Too many holes in the physical address space, giving up\n");
2501 phys_avail[pa_indx++] = pa; /* start */
2502 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
2506 if (dump_avail[da_indx] == pa) {
2507 dump_avail[da_indx] += PAGE_SIZE;
2510 if (da_indx == DUMP_AVAIL_ARRAY_END) {
2514 dump_avail[da_indx++] = pa; /* start */
2515 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
2525 phys_avail[0] = physfree;
2526 phys_avail[1] = xen_start_info->nr_pages*PAGE_SIZE;
2528 dump_avail[1] = xen_start_info->nr_pages*PAGE_SIZE;
2534 * The last chunk must contain at least one page plus the message
2535 * buffer to avoid complicating other code (message buffer address
2536 * calculation, etc.).
2538 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
2539 round_page(msgbufsize) >= phys_avail[pa_indx]) {
2540 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
2541 phys_avail[pa_indx--] = 0;
2542 phys_avail[pa_indx--] = 0;
2545 Maxmem = atop(phys_avail[pa_indx]);
2547 /* Trim off space for the message buffer. */
2548 phys_avail[pa_indx] -= round_page(msgbufsize);
2550 /* Map the message buffer. */
2551 for (off = 0; off < round_page(msgbufsize); off += PAGE_SIZE)
2552 pmap_kenter((vm_offset_t)msgbufp + off, phys_avail[pa_indx] +
2559 #define MTOPSIZE (1<<(14 + PAGE_SHIFT))
2565 unsigned long gdtmachpfn;
2566 int error, gsel_tss, metadata_missing, x, pa;
2569 struct callback_register event = {
2570 .type = CALLBACKTYPE_event,
2571 .address = {GSEL(GCODE_SEL, SEL_KPL), (unsigned long)Xhypervisor_callback },
2573 struct callback_register failsafe = {
2574 .type = CALLBACKTYPE_failsafe,
2575 .address = {GSEL(GCODE_SEL, SEL_KPL), (unsigned long)failsafe_callback },
2578 thread0.td_kstack = proc0kstack;
2579 thread0.td_kstack_pages = KSTACK_PAGES;
2580 kstack0_sz = thread0.td_kstack_pages * PAGE_SIZE;
2581 thread0.td_pcb = (struct pcb *)(thread0.td_kstack + kstack0_sz) - 1;
2584 * This may be done better later if it gets more high level
2585 * components in it. If so just link td->td_proc here.
2587 proc_linkup0(&proc0, &thread0);
2589 metadata_missing = 0;
2590 if (xen_start_info->mod_start) {
2591 preload_metadata = (caddr_t)xen_start_info->mod_start;
2592 preload_bootstrap_relocate(KERNBASE);
2594 metadata_missing = 1;
2597 kern_envp = static_env;
2598 else if ((caddr_t)xen_start_info->cmd_line)
2599 kern_envp = xen_setbootenv((caddr_t)xen_start_info->cmd_line);
2601 boothowto |= xen_boothowto(kern_envp);
2603 /* Init basic tunables, hz etc */
2607 * XEN occupies a portion of the upper virtual address space
2608 * At its base it manages an array mapping machine page frames
2609 * to physical page frames - hence we need to be able to
2610 * access 4GB - (64MB - 4MB + 64k)
2612 gdt_segs[GPRIV_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2613 gdt_segs[GUFS_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2614 gdt_segs[GUGS_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2615 gdt_segs[GCODE_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2616 gdt_segs[GDATA_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2617 gdt_segs[GUCODE_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2618 gdt_segs[GUDATA_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2619 gdt_segs[GBIOSLOWMEM_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2622 gdt_segs[GPRIV_SEL].ssd_base = (int) pc;
2623 gdt_segs[GPROC0_SEL].ssd_base = (int) &pc->pc_common_tss;
2625 PT_SET_MA(gdt, xpmap_ptom(VTOP(gdt)) | PG_V | PG_RW);
2626 bzero(gdt, PAGE_SIZE);
2627 for (x = 0; x < NGDT; x++)
2628 ssdtosd(&gdt_segs[x], &gdt[x].sd);
2630 mtx_init(&dt_lock, "descriptor tables", NULL, MTX_SPIN);
2632 gdtmachpfn = vtomach(gdt) >> PAGE_SHIFT;
2633 PT_SET_MA(gdt, xpmap_ptom(VTOP(gdt)) | PG_V);
2634 PANIC_IF(HYPERVISOR_set_gdt(&gdtmachpfn, 512) != 0);
2638 if ((error = HYPERVISOR_set_trap_table(trap_table)) != 0) {
2639 panic("set_trap_table failed - error %d\n", error);
2642 error = HYPERVISOR_callback_op(CALLBACKOP_register, &event);
2644 error = HYPERVISOR_callback_op(CALLBACKOP_register, &failsafe);
2645 #if CONFIG_XEN_COMPAT <= 0x030002
2646 if (error == -ENOXENSYS)
2647 HYPERVISOR_set_callbacks(GSEL(GCODE_SEL, SEL_KPL),
2648 (unsigned long)Xhypervisor_callback,
2649 GSEL(GCODE_SEL, SEL_KPL), (unsigned long)failsafe_callback);
2651 pcpu_init(pc, 0, sizeof(struct pcpu));
2652 for (pa = first; pa < first + DPCPU_SIZE; pa += PAGE_SIZE)
2653 pmap_kenter(pa + KERNBASE, pa);
2654 dpcpu_init((void *)(first + KERNBASE), 0);
2655 first += DPCPU_SIZE;
2656 physfree += DPCPU_SIZE;
2657 init_first += DPCPU_SIZE / PAGE_SIZE;
2659 PCPU_SET(prvspace, pc);
2660 PCPU_SET(curthread, &thread0);
2661 PCPU_SET(curpcb, thread0.td_pcb);
2664 * Initialize mutexes.
2666 * icu_lock: in order to allow an interrupt to occur in a critical
2667 * section, to set pcpu->ipending (etc...) properly, we
2668 * must be able to get the icu lock, so it can't be
2672 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS | MTX_NOPROFILE);
2674 /* make ldt memory segments */
2675 PT_SET_MA(ldt, xpmap_ptom(VTOP(ldt)) | PG_V | PG_RW);
2676 bzero(ldt, PAGE_SIZE);
2677 ldt_segs[LUCODE_SEL].ssd_limit = atop(0 - 1);
2678 ldt_segs[LUDATA_SEL].ssd_limit = atop(0 - 1);
2679 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
2680 ssdtosd(&ldt_segs[x], &ldt[x].sd);
2682 default_proc_ldt.ldt_base = (caddr_t)ldt;
2683 default_proc_ldt.ldt_len = 6;
2684 _default_ldt = (int)&default_proc_ldt;
2685 PCPU_SET(currentldt, _default_ldt);
2686 PT_SET_MA(ldt, *vtopte((unsigned long)ldt) & ~PG_RW);
2687 xen_set_ldt((unsigned long) ldt, (sizeof ldt_segs / sizeof ldt_segs[0]));
2689 #if defined(XEN_PRIVILEGED)
2691 * Initialize the i8254 before the console so that console
2692 * initialization can use DELAY().
2698 * Initialize the console before we print anything out.
2702 if (metadata_missing)
2703 printf("WARNING: loader(8) metadata is missing!\n");
2710 /* Reset and mask the atpics and leave them shut down. */
2714 * Point the ICU spurious interrupt vectors at the APIC spurious
2715 * interrupt handler.
2717 setidt(IDT_IO_INTS + 7, IDTVEC(spuriousint), SDT_SYS386IGT, SEL_KPL,
2718 GSEL(GCODE_SEL, SEL_KPL));
2719 setidt(IDT_IO_INTS + 15, IDTVEC(spuriousint), SDT_SYS386IGT, SEL_KPL,
2720 GSEL(GCODE_SEL, SEL_KPL));
2725 ksym_start = bootinfo.bi_symtab;
2726 ksym_end = bootinfo.bi_esymtab;
2732 if (boothowto & RB_KDB)
2733 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
2736 finishidentcpu(); /* Final stage of CPU initialization */
2737 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL,
2738 GSEL(GCODE_SEL, SEL_KPL));
2739 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL,
2740 GSEL(GCODE_SEL, SEL_KPL));
2741 initializecpu(); /* Initialize CPU registers */
2743 /* make an initial tss so cpu can get interrupt stack on syscall! */
2744 /* Note: -16 is so we can grow the trapframe if we came from vm86 */
2745 PCPU_SET(common_tss.tss_esp0, thread0.td_kstack +
2746 kstack0_sz - sizeof(struct pcb) - 16);
2747 PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL));
2748 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
2749 HYPERVISOR_stack_switch(GSEL(GDATA_SEL, SEL_KPL),
2750 PCPU_GET(common_tss.tss_esp0));
2752 /* pointer to selector slot for %fs/%gs */
2753 PCPU_SET(fsgs_gdt, &gdt[GUFS_SEL].sd);
2755 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
2756 dblfault_tss.tss_esp2 = (int)&dblfault_stack[sizeof(dblfault_stack)];
2757 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
2758 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
2760 dblfault_tss.tss_cr3 = (int)IdlePDPT;
2762 dblfault_tss.tss_cr3 = (int)IdlePTD;
2764 dblfault_tss.tss_eip = (int)dblfault_handler;
2765 dblfault_tss.tss_eflags = PSL_KERNEL;
2766 dblfault_tss.tss_ds = dblfault_tss.tss_es =
2767 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
2768 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
2769 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
2770 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
2774 init_param2(physmem);
2776 /* now running on new page tables, configured,and u/iom is accessible */
2778 msgbufinit(msgbufp, msgbufsize);
2779 /* transfer to user mode */
2781 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
2782 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
2784 /* setup proc 0's pcb */
2785 thread0.td_pcb->pcb_flags = 0;
2787 thread0.td_pcb->pcb_cr3 = (int)IdlePDPT;
2789 thread0.td_pcb->pcb_cr3 = (int)IdlePTD;
2791 thread0.td_pcb->pcb_ext = 0;
2792 thread0.td_frame = &proc0_tf;
2793 thread0.td_pcb->pcb_fsd = PCPU_GET(fsgs_gdt)[0];
2794 thread0.td_pcb->pcb_gsd = PCPU_GET(fsgs_gdt)[1];
2797 cpu_probe_cmpxchg8b();
2805 struct gate_descriptor *gdp;
2806 int gsel_tss, metadata_missing, x, pa;
2810 thread0.td_kstack = proc0kstack;
2811 thread0.td_kstack_pages = KSTACK_PAGES;
2812 kstack0_sz = thread0.td_kstack_pages * PAGE_SIZE;
2813 thread0.td_pcb = (struct pcb *)(thread0.td_kstack + kstack0_sz) - 1;
2816 * This may be done better later if it gets more high level
2817 * components in it. If so just link td->td_proc here.
2819 proc_linkup0(&proc0, &thread0);
2821 metadata_missing = 0;
2822 if (bootinfo.bi_modulep) {
2823 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
2824 preload_bootstrap_relocate(KERNBASE);
2826 metadata_missing = 1;
2829 kern_envp = static_env;
2830 else if (bootinfo.bi_envp)
2831 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
2833 /* Init basic tunables, hz etc */
2837 * Make gdt memory segments. All segments cover the full 4GB
2838 * of address space and permissions are enforced at page level.
2840 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
2841 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
2842 gdt_segs[GUCODE_SEL].ssd_limit = atop(0 - 1);
2843 gdt_segs[GUDATA_SEL].ssd_limit = atop(0 - 1);
2844 gdt_segs[GUFS_SEL].ssd_limit = atop(0 - 1);
2845 gdt_segs[GUGS_SEL].ssd_limit = atop(0 - 1);
2848 gdt_segs[GPRIV_SEL].ssd_limit = atop(0 - 1);
2849 gdt_segs[GPRIV_SEL].ssd_base = (int) pc;
2850 gdt_segs[GPROC0_SEL].ssd_base = (int) &pc->pc_common_tss;
2852 for (x = 0; x < NGDT; x++)
2853 ssdtosd(&gdt_segs[x], &gdt[x].sd);
2855 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
2856 r_gdt.rd_base = (int) gdt;
2857 mtx_init(&dt_lock, "descriptor tables", NULL, MTX_SPIN);
2860 pcpu_init(pc, 0, sizeof(struct pcpu));
2861 for (pa = first; pa < first + DPCPU_SIZE; pa += PAGE_SIZE)
2862 pmap_kenter(pa + KERNBASE, pa);
2863 dpcpu_init((void *)(first + KERNBASE), 0);
2864 first += DPCPU_SIZE;
2865 PCPU_SET(prvspace, pc);
2866 PCPU_SET(curthread, &thread0);
2867 PCPU_SET(curpcb, thread0.td_pcb);
2870 * Initialize mutexes.
2872 * icu_lock: in order to allow an interrupt to occur in a critical
2873 * section, to set pcpu->ipending (etc...) properly, we
2874 * must be able to get the icu lock, so it can't be
2878 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS | MTX_NOPROFILE);
2880 /* make ldt memory segments */
2881 ldt_segs[LUCODE_SEL].ssd_limit = atop(0 - 1);
2882 ldt_segs[LUDATA_SEL].ssd_limit = atop(0 - 1);
2883 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
2884 ssdtosd(&ldt_segs[x], &ldt[x].sd);
2886 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
2888 PCPU_SET(currentldt, _default_ldt);
2891 for (x = 0; x < NIDT; x++)
2892 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL,
2893 GSEL(GCODE_SEL, SEL_KPL));
2894 setidt(IDT_DE, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL,
2895 GSEL(GCODE_SEL, SEL_KPL));
2896 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYS386IGT, SEL_KPL,
2897 GSEL(GCODE_SEL, SEL_KPL));
2898 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYS386IGT, SEL_KPL,
2899 GSEL(GCODE_SEL, SEL_KPL));
2900 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYS386IGT, SEL_UPL,
2901 GSEL(GCODE_SEL, SEL_KPL));
2902 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL,
2903 GSEL(GCODE_SEL, SEL_KPL));
2904 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL,
2905 GSEL(GCODE_SEL, SEL_KPL));
2906 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL,
2907 GSEL(GCODE_SEL, SEL_KPL));
2908 setidt(IDT_NM, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL
2909 , GSEL(GCODE_SEL, SEL_KPL));
2910 setidt(IDT_DF, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
2911 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL,
2912 GSEL(GCODE_SEL, SEL_KPL));
2913 setidt(IDT_TS, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL,
2914 GSEL(GCODE_SEL, SEL_KPL));
2915 setidt(IDT_NP, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL,
2916 GSEL(GCODE_SEL, SEL_KPL));
2917 setidt(IDT_SS, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL,
2918 GSEL(GCODE_SEL, SEL_KPL));
2919 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL,
2920 GSEL(GCODE_SEL, SEL_KPL));
2921 setidt(IDT_PF, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL,
2922 GSEL(GCODE_SEL, SEL_KPL));
2923 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL,
2924 GSEL(GCODE_SEL, SEL_KPL));
2925 setidt(IDT_AC, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL,
2926 GSEL(GCODE_SEL, SEL_KPL));
2927 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL,
2928 GSEL(GCODE_SEL, SEL_KPL));
2929 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL,
2930 GSEL(GCODE_SEL, SEL_KPL));
2931 setidt(IDT_SYSCALL, &IDTVEC(int0x80_syscall), SDT_SYS386TGT, SEL_UPL,
2932 GSEL(GCODE_SEL, SEL_KPL));
2933 #ifdef KDTRACE_HOOKS
2934 setidt(IDT_DTRACE_RET, &IDTVEC(dtrace_ret), SDT_SYS386TGT, SEL_UPL,
2935 GSEL(GCODE_SEL, SEL_KPL));
2938 r_idt.rd_limit = sizeof(idt0) - 1;
2939 r_idt.rd_base = (int) idt;
2944 * The following code queries the PCI ID of 0:0:0. For the XBOX,
2945 * This should be 0x10de / 0x02a5.
2947 * This is exactly what Linux does.
2949 outl(0xcf8, 0x80000000);
2950 if (inl(0xcfc) == 0x02a510de) {
2951 arch_i386_is_xbox = 1;
2952 pic16l_setled(XBOX_LED_GREEN);
2955 * We are an XBOX, but we may have either 64MB or 128MB of
2956 * memory. The PCI host bridge should be programmed for this,
2957 * so we just query it.
2959 outl(0xcf8, 0x80000084);
2960 arch_i386_xbox_memsize = (inl(0xcfc) == 0x7FFFFFF) ? 128 : 64;
2965 * Initialize the i8254 before the console so that console
2966 * initialization can use DELAY().
2971 * Initialize the console before we print anything out.
2975 if (metadata_missing)
2976 printf("WARNING: loader(8) metadata is missing!\n");
2983 /* Reset and mask the atpics and leave them shut down. */
2987 * Point the ICU spurious interrupt vectors at the APIC spurious
2988 * interrupt handler.
2990 setidt(IDT_IO_INTS + 7, IDTVEC(spuriousint), SDT_SYS386IGT, SEL_KPL,
2991 GSEL(GCODE_SEL, SEL_KPL));
2992 setidt(IDT_IO_INTS + 15, IDTVEC(spuriousint), SDT_SYS386IGT, SEL_KPL,
2993 GSEL(GCODE_SEL, SEL_KPL));
2998 ksym_start = bootinfo.bi_symtab;
2999 ksym_end = bootinfo.bi_esymtab;
3005 if (boothowto & RB_KDB)
3006 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
3009 finishidentcpu(); /* Final stage of CPU initialization */
3010 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL,
3011 GSEL(GCODE_SEL, SEL_KPL));
3012 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL,
3013 GSEL(GCODE_SEL, SEL_KPL));
3014 initializecpu(); /* Initialize CPU registers */
3016 /* make an initial tss so cpu can get interrupt stack on syscall! */
3017 /* Note: -16 is so we can grow the trapframe if we came from vm86 */
3018 PCPU_SET(common_tss.tss_esp0, thread0.td_kstack +
3019 kstack0_sz - sizeof(struct pcb) - 16);
3020 PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL));
3021 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
3022 PCPU_SET(tss_gdt, &gdt[GPROC0_SEL].sd);
3023 PCPU_SET(common_tssd, *PCPU_GET(tss_gdt));
3024 PCPU_SET(common_tss.tss_ioopt, (sizeof (struct i386tss)) << 16);
3027 /* pointer to selector slot for %fs/%gs */
3028 PCPU_SET(fsgs_gdt, &gdt[GUFS_SEL].sd);
3030 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
3031 dblfault_tss.tss_esp2 = (int)&dblfault_stack[sizeof(dblfault_stack)];
3032 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
3033 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
3035 dblfault_tss.tss_cr3 = (int)IdlePDPT;
3037 dblfault_tss.tss_cr3 = (int)IdlePTD;
3039 dblfault_tss.tss_eip = (int)dblfault_handler;
3040 dblfault_tss.tss_eflags = PSL_KERNEL;
3041 dblfault_tss.tss_ds = dblfault_tss.tss_es =
3042 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
3043 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
3044 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
3045 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
3049 init_param2(physmem);
3051 /* now running on new page tables, configured,and u/iom is accessible */
3053 msgbufinit(msgbufp, msgbufsize);
3055 /* make a call gate to reenter kernel with */
3056 gdp = &ldt[LSYS5CALLS_SEL].gd;
3058 x = (int) &IDTVEC(lcall_syscall);
3059 gdp->gd_looffset = x;
3060 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
3062 gdp->gd_type = SDT_SYS386CGT;
3063 gdp->gd_dpl = SEL_UPL;
3065 gdp->gd_hioffset = x >> 16;
3067 /* XXX does this work? */
3069 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
3070 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
3072 /* transfer to user mode */
3074 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
3075 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
3077 /* setup proc 0's pcb */
3078 thread0.td_pcb->pcb_flags = 0;
3080 thread0.td_pcb->pcb_cr3 = (int)IdlePDPT;
3082 thread0.td_pcb->pcb_cr3 = (int)IdlePTD;
3084 thread0.td_pcb->pcb_ext = 0;
3085 thread0.td_frame = &proc0_tf;
3088 cpu_probe_cmpxchg8b();
3093 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
3096 pcpu->pc_acpi_id = 0xffffffff;
3100 spinlock_enter(void)
3106 if (td->td_md.md_spinlock_count == 0) {
3107 flags = intr_disable();
3108 td->td_md.md_spinlock_count = 1;
3109 td->td_md.md_saved_flags = flags;
3111 td->td_md.md_spinlock_count++;
3123 flags = td->td_md.md_saved_flags;
3124 td->td_md.md_spinlock_count--;
3125 if (td->td_md.md_spinlock_count == 0)
3126 intr_restore(flags);
3129 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
3130 static void f00f_hack(void *unused);
3131 SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
3134 f00f_hack(void *unused)
3136 struct gate_descriptor *new_idt;
3144 printf("Intel Pentium detected, installing workaround for F00F bug\n");
3146 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2);
3148 panic("kmem_alloc returned 0");
3150 /* Put the problematic entry (#6) at the end of the lower page. */
3151 new_idt = (struct gate_descriptor*)
3152 (tmp + PAGE_SIZE - 7 * sizeof(struct gate_descriptor));
3153 bcopy(idt, new_idt, sizeof(idt0));
3154 r_idt.rd_base = (u_int)new_idt;
3157 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE,
3158 VM_PROT_READ, FALSE) != KERN_SUCCESS)
3159 panic("vm_map_protect failed");
3161 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
3164 * Construct a PCB from a trapframe. This is called from kdb_trap() where
3165 * we want to start a backtrace from the function that caused us to enter
3166 * the debugger. We have the context in the trapframe, but base the trace
3167 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
3168 * enough for a backtrace.
3171 makectx(struct trapframe *tf, struct pcb *pcb)
3174 pcb->pcb_edi = tf->tf_edi;
3175 pcb->pcb_esi = tf->tf_esi;
3176 pcb->pcb_ebp = tf->tf_ebp;
3177 pcb->pcb_ebx = tf->tf_ebx;
3178 pcb->pcb_eip = tf->tf_eip;
3179 pcb->pcb_esp = (ISPL(tf->tf_cs)) ? tf->tf_esp : (int)(tf + 1) - 8;
3183 ptrace_set_pc(struct thread *td, u_long addr)
3186 td->td_frame->tf_eip = addr;
3191 ptrace_single_step(struct thread *td)
3193 td->td_frame->tf_eflags |= PSL_T;
3198 ptrace_clear_single_step(struct thread *td)
3200 td->td_frame->tf_eflags &= ~PSL_T;
3205 fill_regs(struct thread *td, struct reg *regs)
3208 struct trapframe *tp;
3212 regs->r_gs = pcb->pcb_gs;
3213 return (fill_frame_regs(tp, regs));
3217 fill_frame_regs(struct trapframe *tp, struct reg *regs)
3219 regs->r_fs = tp->tf_fs;
3220 regs->r_es = tp->tf_es;
3221 regs->r_ds = tp->tf_ds;
3222 regs->r_edi = tp->tf_edi;
3223 regs->r_esi = tp->tf_esi;
3224 regs->r_ebp = tp->tf_ebp;
3225 regs->r_ebx = tp->tf_ebx;
3226 regs->r_edx = tp->tf_edx;
3227 regs->r_ecx = tp->tf_ecx;
3228 regs->r_eax = tp->tf_eax;
3229 regs->r_eip = tp->tf_eip;
3230 regs->r_cs = tp->tf_cs;
3231 regs->r_eflags = tp->tf_eflags;
3232 regs->r_esp = tp->tf_esp;
3233 regs->r_ss = tp->tf_ss;
3238 set_regs(struct thread *td, struct reg *regs)
3241 struct trapframe *tp;
3244 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
3245 !CS_SECURE(regs->r_cs))
3248 tp->tf_fs = regs->r_fs;
3249 tp->tf_es = regs->r_es;
3250 tp->tf_ds = regs->r_ds;
3251 tp->tf_edi = regs->r_edi;
3252 tp->tf_esi = regs->r_esi;
3253 tp->tf_ebp = regs->r_ebp;
3254 tp->tf_ebx = regs->r_ebx;
3255 tp->tf_edx = regs->r_edx;
3256 tp->tf_ecx = regs->r_ecx;
3257 tp->tf_eax = regs->r_eax;
3258 tp->tf_eip = regs->r_eip;
3259 tp->tf_cs = regs->r_cs;
3260 tp->tf_eflags = regs->r_eflags;
3261 tp->tf_esp = regs->r_esp;
3262 tp->tf_ss = regs->r_ss;
3263 pcb->pcb_gs = regs->r_gs;
3267 #ifdef CPU_ENABLE_SSE
3269 fill_fpregs_xmm(sv_xmm, sv_87)
3270 struct savexmm *sv_xmm;
3271 struct save87 *sv_87;
3273 register struct env87 *penv_87 = &sv_87->sv_env;
3274 register struct envxmm *penv_xmm = &sv_xmm->sv_env;
3277 bzero(sv_87, sizeof(*sv_87));
3279 /* FPU control/status */
3280 penv_87->en_cw = penv_xmm->en_cw;
3281 penv_87->en_sw = penv_xmm->en_sw;
3282 penv_87->en_tw = penv_xmm->en_tw;
3283 penv_87->en_fip = penv_xmm->en_fip;
3284 penv_87->en_fcs = penv_xmm->en_fcs;
3285 penv_87->en_opcode = penv_xmm->en_opcode;
3286 penv_87->en_foo = penv_xmm->en_foo;
3287 penv_87->en_fos = penv_xmm->en_fos;
3290 for (i = 0; i < 8; ++i)
3291 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
3295 set_fpregs_xmm(sv_87, sv_xmm)
3296 struct save87 *sv_87;
3297 struct savexmm *sv_xmm;
3299 register struct env87 *penv_87 = &sv_87->sv_env;
3300 register struct envxmm *penv_xmm = &sv_xmm->sv_env;
3303 /* FPU control/status */
3304 penv_xmm->en_cw = penv_87->en_cw;
3305 penv_xmm->en_sw = penv_87->en_sw;
3306 penv_xmm->en_tw = penv_87->en_tw;
3307 penv_xmm->en_fip = penv_87->en_fip;
3308 penv_xmm->en_fcs = penv_87->en_fcs;
3309 penv_xmm->en_opcode = penv_87->en_opcode;
3310 penv_xmm->en_foo = penv_87->en_foo;
3311 penv_xmm->en_fos = penv_87->en_fos;
3314 for (i = 0; i < 8; ++i)
3315 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
3317 #endif /* CPU_ENABLE_SSE */
3320 fill_fpregs(struct thread *td, struct fpreg *fpregs)
3323 KASSERT(td == curthread || TD_IS_SUSPENDED(td) ||
3324 P_SHOULDSTOP(td->td_proc),
3325 ("not suspended thread %p", td));
3329 bzero(fpregs, sizeof(*fpregs));
3331 #ifdef CPU_ENABLE_SSE
3333 fill_fpregs_xmm(&td->td_pcb->pcb_user_save.sv_xmm,
3334 (struct save87 *)fpregs);
3336 #endif /* CPU_ENABLE_SSE */
3337 bcopy(&td->td_pcb->pcb_user_save.sv_87, fpregs,
3343 set_fpregs(struct thread *td, struct fpreg *fpregs)
3346 #ifdef CPU_ENABLE_SSE
3348 set_fpregs_xmm((struct save87 *)fpregs,
3349 &td->td_pcb->pcb_user_save.sv_xmm);
3351 #endif /* CPU_ENABLE_SSE */
3352 bcopy(fpregs, &td->td_pcb->pcb_user_save.sv_87,
3361 * Get machine context.
3364 get_mcontext(struct thread *td, mcontext_t *mcp, int flags)
3366 struct trapframe *tp;
3367 struct segment_descriptor *sdp;
3371 PROC_LOCK(curthread->td_proc);
3372 mcp->mc_onstack = sigonstack(tp->tf_esp);
3373 PROC_UNLOCK(curthread->td_proc);
3374 mcp->mc_gs = td->td_pcb->pcb_gs;
3375 mcp->mc_fs = tp->tf_fs;
3376 mcp->mc_es = tp->tf_es;
3377 mcp->mc_ds = tp->tf_ds;
3378 mcp->mc_edi = tp->tf_edi;
3379 mcp->mc_esi = tp->tf_esi;
3380 mcp->mc_ebp = tp->tf_ebp;
3381 mcp->mc_isp = tp->tf_isp;
3382 mcp->mc_eflags = tp->tf_eflags;
3383 if (flags & GET_MC_CLEAR_RET) {
3386 mcp->mc_eflags &= ~PSL_C;
3388 mcp->mc_eax = tp->tf_eax;
3389 mcp->mc_edx = tp->tf_edx;
3391 mcp->mc_ebx = tp->tf_ebx;
3392 mcp->mc_ecx = tp->tf_ecx;
3393 mcp->mc_eip = tp->tf_eip;
3394 mcp->mc_cs = tp->tf_cs;
3395 mcp->mc_esp = tp->tf_esp;
3396 mcp->mc_ss = tp->tf_ss;
3397 mcp->mc_len = sizeof(*mcp);
3398 get_fpcontext(td, mcp);
3399 sdp = &td->td_pcb->pcb_fsd;
3400 mcp->mc_fsbase = sdp->sd_hibase << 24 | sdp->sd_lobase;
3401 sdp = &td->td_pcb->pcb_gsd;
3402 mcp->mc_gsbase = sdp->sd_hibase << 24 | sdp->sd_lobase;
3404 bzero(mcp->mc_spare2, sizeof(mcp->mc_spare2));
3409 * Set machine context.
3411 * However, we don't set any but the user modifiable flags, and we won't
3412 * touch the cs selector.
3415 set_mcontext(struct thread *td, const mcontext_t *mcp)
3417 struct trapframe *tp;
3421 if (mcp->mc_len != sizeof(*mcp))
3423 eflags = (mcp->mc_eflags & PSL_USERCHANGE) |
3424 (tp->tf_eflags & ~PSL_USERCHANGE);
3425 if ((ret = set_fpcontext(td, mcp)) == 0) {
3426 tp->tf_fs = mcp->mc_fs;
3427 tp->tf_es = mcp->mc_es;
3428 tp->tf_ds = mcp->mc_ds;
3429 tp->tf_edi = mcp->mc_edi;
3430 tp->tf_esi = mcp->mc_esi;
3431 tp->tf_ebp = mcp->mc_ebp;
3432 tp->tf_ebx = mcp->mc_ebx;
3433 tp->tf_edx = mcp->mc_edx;
3434 tp->tf_ecx = mcp->mc_ecx;
3435 tp->tf_eax = mcp->mc_eax;
3436 tp->tf_eip = mcp->mc_eip;
3437 tp->tf_eflags = eflags;
3438 tp->tf_esp = mcp->mc_esp;
3439 tp->tf_ss = mcp->mc_ss;
3440 td->td_pcb->pcb_gs = mcp->mc_gs;
3447 get_fpcontext(struct thread *td, mcontext_t *mcp)
3451 mcp->mc_fpformat = _MC_FPFMT_NODEV;
3452 mcp->mc_ownedfp = _MC_FPOWNED_NONE;
3453 bzero(mcp->mc_fpstate, sizeof(mcp->mc_fpstate));
3455 mcp->mc_ownedfp = npxgetregs(td);
3456 bcopy(&td->td_pcb->pcb_user_save, &mcp->mc_fpstate[0],
3457 sizeof(mcp->mc_fpstate));
3458 mcp->mc_fpformat = npxformat();
3463 set_fpcontext(struct thread *td, const mcontext_t *mcp)
3466 if (mcp->mc_fpformat == _MC_FPFMT_NODEV)
3468 else if (mcp->mc_fpformat != _MC_FPFMT_387 &&
3469 mcp->mc_fpformat != _MC_FPFMT_XMM)
3471 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE)
3472 /* We don't care what state is left in the FPU or PCB. */
3474 else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU ||
3475 mcp->mc_ownedfp == _MC_FPOWNED_PCB) {
3477 #ifdef CPU_ENABLE_SSE
3479 ((union savefpu *)&mcp->mc_fpstate)->sv_xmm.sv_env.
3480 en_mxcsr &= cpu_mxcsr_mask;
3482 npxsetregs(td, (union savefpu *)&mcp->mc_fpstate);
3490 fpstate_drop(struct thread *td)
3493 KASSERT(PCB_USER_FPU(td->td_pcb), ("fpstate_drop: kernel-owned fpu"));
3496 if (PCPU_GET(fpcurthread) == td)
3500 * XXX force a full drop of the npx. The above only drops it if we
3501 * owned it. npxgetregs() has the same bug in the !cpu_fxsr case.
3503 * XXX I don't much like npxgetregs()'s semantics of doing a full
3504 * drop. Dropping only to the pcb matches fnsave's behaviour.
3505 * We only need to drop to !PCB_INITDONE in sendsig(). But
3506 * sendsig() is the only caller of npxgetregs()... perhaps we just
3507 * have too many layers.
3509 curthread->td_pcb->pcb_flags &= ~(PCB_NPXINITDONE |
3510 PCB_NPXUSERINITDONE);
3515 fill_dbregs(struct thread *td, struct dbreg *dbregs)
3520 dbregs->dr[0] = rdr0();
3521 dbregs->dr[1] = rdr1();
3522 dbregs->dr[2] = rdr2();
3523 dbregs->dr[3] = rdr3();
3524 dbregs->dr[4] = rdr4();
3525 dbregs->dr[5] = rdr5();
3526 dbregs->dr[6] = rdr6();
3527 dbregs->dr[7] = rdr7();
3530 dbregs->dr[0] = pcb->pcb_dr0;
3531 dbregs->dr[1] = pcb->pcb_dr1;
3532 dbregs->dr[2] = pcb->pcb_dr2;
3533 dbregs->dr[3] = pcb->pcb_dr3;
3536 dbregs->dr[6] = pcb->pcb_dr6;
3537 dbregs->dr[7] = pcb->pcb_dr7;
3543 set_dbregs(struct thread *td, struct dbreg *dbregs)
3549 load_dr0(dbregs->dr[0]);
3550 load_dr1(dbregs->dr[1]);
3551 load_dr2(dbregs->dr[2]);
3552 load_dr3(dbregs->dr[3]);
3553 load_dr4(dbregs->dr[4]);
3554 load_dr5(dbregs->dr[5]);
3555 load_dr6(dbregs->dr[6]);
3556 load_dr7(dbregs->dr[7]);
3559 * Don't let an illegal value for dr7 get set. Specifically,
3560 * check for undefined settings. Setting these bit patterns
3561 * result in undefined behaviour and can lead to an unexpected
3564 for (i = 0; i < 4; i++) {
3565 if (DBREG_DR7_ACCESS(dbregs->dr[7], i) == 0x02)
3567 if (DBREG_DR7_LEN(dbregs->dr[7], i) == 0x02)
3574 * Don't let a process set a breakpoint that is not within the
3575 * process's address space. If a process could do this, it
3576 * could halt the system by setting a breakpoint in the kernel
3577 * (if ddb was enabled). Thus, we need to check to make sure
3578 * that no breakpoints are being enabled for addresses outside
3579 * process's address space.
3581 * XXX - what about when the watched area of the user's
3582 * address space is written into from within the kernel
3583 * ... wouldn't that still cause a breakpoint to be generated
3584 * from within kernel mode?
3587 if (DBREG_DR7_ENABLED(dbregs->dr[7], 0)) {
3588 /* dr0 is enabled */
3589 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS)
3593 if (DBREG_DR7_ENABLED(dbregs->dr[7], 1)) {
3594 /* dr1 is enabled */
3595 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS)
3599 if (DBREG_DR7_ENABLED(dbregs->dr[7], 2)) {
3600 /* dr2 is enabled */
3601 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS)
3605 if (DBREG_DR7_ENABLED(dbregs->dr[7], 3)) {
3606 /* dr3 is enabled */
3607 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS)
3611 pcb->pcb_dr0 = dbregs->dr[0];
3612 pcb->pcb_dr1 = dbregs->dr[1];
3613 pcb->pcb_dr2 = dbregs->dr[2];
3614 pcb->pcb_dr3 = dbregs->dr[3];
3615 pcb->pcb_dr6 = dbregs->dr[6];
3616 pcb->pcb_dr7 = dbregs->dr[7];
3618 pcb->pcb_flags |= PCB_DBREGS;
3625 * Return > 0 if a hardware breakpoint has been hit, and the
3626 * breakpoint was in user space. Return 0, otherwise.
3629 user_dbreg_trap(void)
3631 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
3632 u_int32_t bp; /* breakpoint bits extracted from dr6 */
3633 int nbp; /* number of breakpoints that triggered */
3634 caddr_t addr[4]; /* breakpoint addresses */
3638 if ((dr7 & 0x000000ff) == 0) {
3640 * all GE and LE bits in the dr7 register are zero,
3641 * thus the trap couldn't have been caused by the
3642 * hardware debug registers
3649 bp = dr6 & 0x0000000f;
3653 * None of the breakpoint bits are set meaning this
3654 * trap was not caused by any of the debug registers
3660 * at least one of the breakpoints were hit, check to see
3661 * which ones and if any of them are user space addresses
3665 addr[nbp++] = (caddr_t)rdr0();
3668 addr[nbp++] = (caddr_t)rdr1();
3671 addr[nbp++] = (caddr_t)rdr2();
3674 addr[nbp++] = (caddr_t)rdr3();
3677 for (i = 0; i < nbp; i++) {
3678 if (addr[i] < (caddr_t)VM_MAXUSER_ADDRESS) {
3680 * addr[i] is in user space
3687 * None of the breakpoints are in user space.
3695 * Provide inb() and outb() as functions. They are normally only available as
3696 * inline functions, thus cannot be called from the debugger.
3699 /* silence compiler warnings */
3700 u_char inb_(u_short);
3701 void outb_(u_short, u_char);
3710 outb_(u_short port, u_char data)