3 * Bill Paul <wpaul@windriver.com>. All rights reserved.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by Bill Paul.
16 * 4. Neither the name of the author nor the names of any co-contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
33 #include <sys/cdefs.h>
34 __FBSDID("$FreeBSD$");
37 * Driver for the Cicada/Vitesse CS/VSC8xxx 10/100/1000 copper PHY.
40 #include <sys/param.h>
41 #include <sys/systm.h>
42 #include <sys/kernel.h>
43 #include <sys/module.h>
44 #include <sys/socket.h>
48 #include <net/if_arp.h>
49 #include <net/if_media.h>
51 #include <dev/mii/mii.h>
52 #include <dev/mii/miivar.h>
55 #include <dev/mii/ciphyreg.h>
57 #include "miibus_if.h"
59 #include <machine/bus.h>
61 static int ciphy_probe(device_t);
62 static int ciphy_attach(device_t);
64 static device_method_t ciphy_methods[] = {
65 /* device interface */
66 DEVMETHOD(device_probe, ciphy_probe),
67 DEVMETHOD(device_attach, ciphy_attach),
68 DEVMETHOD(device_detach, mii_phy_detach),
69 DEVMETHOD(device_shutdown, bus_generic_shutdown),
73 static devclass_t ciphy_devclass;
75 static driver_t ciphy_driver = {
78 sizeof(struct mii_softc)
81 DRIVER_MODULE(ciphy, miibus, ciphy_driver, ciphy_devclass, 0, 0);
83 static int ciphy_service(struct mii_softc *, struct mii_data *, int);
84 static void ciphy_status(struct mii_softc *);
85 static void ciphy_reset(struct mii_softc *);
86 static void ciphy_fixup(struct mii_softc *);
88 static const struct mii_phydesc ciphys[] = {
89 MII_PHY_DESC(CICADA, CS8201),
90 MII_PHY_DESC(CICADA, CS8201A),
91 MII_PHY_DESC(CICADA, CS8201B),
92 MII_PHY_DESC(CICADA, CS8204),
93 MII_PHY_DESC(CICADA, VSC8211),
94 MII_PHY_DESC(CICADA, CS8244),
95 MII_PHY_DESC(VITESSE, VSC8601),
100 ciphy_probe(device_t dev)
103 return (mii_phy_dev_probe(dev, ciphys, BUS_PROBE_DEFAULT));
107 ciphy_attach(device_t dev)
109 struct mii_softc *sc;
110 struct mii_attach_args *ma;
111 struct mii_data *mii;
113 sc = device_get_softc(dev);
114 ma = device_get_ivars(dev);
115 sc->mii_dev = device_get_parent(dev);
117 LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
119 sc->mii_flags = miibus_get_flags(dev);
120 sc->mii_inst = mii->mii_instance++;
121 sc->mii_phy = ma->mii_phyno;
122 sc->mii_service = ciphy_service;
125 sc->mii_flags |= MIIF_NOISOLATE | MIIF_NOMANPAUSE;
129 sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
130 if (sc->mii_capabilities & BMSR_EXTSTAT)
131 sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
132 device_printf(dev, " ");
133 mii_phy_add_media(sc);
136 MIIBUS_MEDIAINIT(sc->mii_dev);
141 ciphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
143 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
152 * If the interface is not up, don't do anything.
154 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
157 ciphy_fixup(sc); /* XXX hardware bug work-around */
159 switch (IFM_SUBTYPE(ife->ifm_media)) {
163 * If we're already in auto mode, just return.
165 if (PHY_READ(sc, CIPHY_MII_BMCR) & CIPHY_BMCR_AUTOEN)
168 (void)mii_phy_auto(sc);
179 if ((ife->ifm_media & IFM_FDX) != 0) {
180 speed |= CIPHY_BMCR_FDX;
181 gig = CIPHY_1000CTL_AFD;
183 gig = CIPHY_1000CTL_AHD;
185 if (IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T) {
186 gig |= CIPHY_1000CTL_MSE;
187 if ((ife->ifm_media & IFM_ETH_MASTER) != 0 ||
188 (mii->mii_ifp->if_flags & IFF_LINK0) != 0)
189 gig |= CIPHY_1000CTL_MSC;
191 CIPHY_BMCR_AUTOEN | CIPHY_BMCR_STARTNEG;
194 PHY_WRITE(sc, CIPHY_MII_1000CTL, gig);
195 PHY_WRITE(sc, CIPHY_MII_BMCR, speed);
196 PHY_WRITE(sc, CIPHY_MII_ANAR, CIPHY_SEL_TYPE);
199 PHY_WRITE(sc, MII_BMCR, BMCR_ISO | BMCR_PDOWN);
208 * Is the interface even up?
210 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
214 * Only used for autonegotiation.
216 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
220 * Check to see if we have link. If we do, we don't
221 * need to restart the autonegotiation process. Read
222 * the BMSR twice in case it's latched.
224 reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
228 /* Announce link loss right after it happens. */
229 if (++sc->mii_ticks == 0)
232 * Only retry autonegotiation every mii_anegticks seconds.
234 if (sc->mii_ticks <= sc->mii_anegticks)
242 /* Update the media status. */
246 * Callback if something changed. Note that we need to poke
247 * apply fixups for certain PHY revs.
249 if (sc->mii_media_active != mii->mii_media_active ||
250 sc->mii_media_status != mii->mii_media_status ||
251 cmd == MII_MEDIACHG) {
254 mii_phy_update(sc, cmd);
259 ciphy_status(struct mii_softc *sc)
261 struct mii_data *mii = sc->mii_pdata;
264 mii->mii_media_status = IFM_AVALID;
265 mii->mii_media_active = IFM_ETHER;
267 bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
269 if (bmsr & BMSR_LINK)
270 mii->mii_media_status |= IFM_ACTIVE;
272 bmcr = PHY_READ(sc, CIPHY_MII_BMCR);
274 if (bmcr & CIPHY_BMCR_LOOP)
275 mii->mii_media_active |= IFM_LOOP;
277 if (bmcr & CIPHY_BMCR_AUTOEN) {
278 if ((bmsr & CIPHY_BMSR_ACOMP) == 0) {
279 /* Erg, still trying, I guess... */
280 mii->mii_media_active |= IFM_NONE;
285 bmsr = PHY_READ(sc, CIPHY_MII_AUXCSR);
286 switch (bmsr & CIPHY_AUXCSR_SPEED) {
288 mii->mii_media_active |= IFM_10_T;
291 mii->mii_media_active |= IFM_100_TX;
293 case CIPHY_SPEED1000:
294 mii->mii_media_active |= IFM_1000_T;
297 device_printf(sc->mii_dev, "unknown PHY speed %x\n",
298 bmsr & CIPHY_AUXCSR_SPEED);
302 if (bmsr & CIPHY_AUXCSR_FDX)
303 mii->mii_media_active |= IFM_FDX;
305 mii->mii_media_active |= IFM_HDX;
307 if ((IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) &&
308 (PHY_READ(sc, CIPHY_MII_1000STS) & CIPHY_1000STS_MSR) != 0)
309 mii->mii_media_active |= IFM_ETH_MASTER;
313 ciphy_reset(struct mii_softc *sc)
320 #define PHY_SETBIT(x, y, z) \
321 PHY_WRITE(x, y, (PHY_READ(x, y) | (z)))
322 #define PHY_CLRBIT(x, y, z) \
323 PHY_WRITE(x, y, (PHY_READ(x, y) & ~(z)))
326 ciphy_fixup(struct mii_softc *sc)
329 uint16_t status, speed;
332 model = MII_MODEL(PHY_READ(sc, CIPHY_MII_PHYIDR2));
333 status = PHY_READ(sc, CIPHY_MII_AUXCSR);
334 speed = status & CIPHY_AUXCSR_SPEED;
336 if (strcmp(device_get_name(device_get_parent(sc->mii_dev)),
338 /* need to set for 2.5V RGMII for NVIDIA adapters */
339 val = PHY_READ(sc, CIPHY_MII_ECTL1);
340 val &= ~(CIPHY_ECTL1_IOVOL | CIPHY_ECTL1_INTSEL);
341 val |= (CIPHY_IOVOL_2500MV | CIPHY_INTSEL_RGMII);
342 PHY_WRITE(sc, CIPHY_MII_ECTL1, val);
344 val = PHY_READ(sc, CIPHY_MII_AUXCSR);
345 val |= CIPHY_AUXCSR_MDPPS;
346 PHY_WRITE(sc, CIPHY_MII_AUXCSR, val);
347 val = PHY_READ(sc, CIPHY_MII_10BTCSR);
348 val |= CIPHY_10BTCSR_ECHO;
349 PHY_WRITE(sc, CIPHY_MII_10BTCSR, val);
353 case MII_MODEL_CICADA_CS8204:
354 case MII_MODEL_CICADA_CS8201:
356 /* Turn off "aux mode" (whatever that means) */
357 PHY_SETBIT(sc, CIPHY_MII_AUXCSR, CIPHY_AUXCSR_MDPPS);
360 * Work around speed polling bug in VT3119/VT3216
361 * when using MII in full duplex mode.
363 if ((speed == CIPHY_SPEED10 || speed == CIPHY_SPEED100) &&
364 (status & CIPHY_AUXCSR_FDX)) {
365 PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
367 PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
370 /* Enable link/activity LED blink. */
371 PHY_SETBIT(sc, CIPHY_MII_LED, CIPHY_LED_LINKACTBLINK);
375 case MII_MODEL_CICADA_CS8201A:
376 case MII_MODEL_CICADA_CS8201B:
379 * Work around speed polling bug in VT3119/VT3216
380 * when using MII in full duplex mode.
382 if ((speed == CIPHY_SPEED10 || speed == CIPHY_SPEED100) &&
383 (status & CIPHY_AUXCSR_FDX)) {
384 PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
386 PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
390 case MII_MODEL_CICADA_VSC8211:
391 case MII_MODEL_CICADA_CS8244:
392 case MII_MODEL_VITESSE_VSC8601:
395 device_printf(sc->mii_dev, "unknown CICADA PHY model %x\n",