2 * SPDX-License-Identifier: BSD-4-Clause
4 * Copyright (c) 1991 Regents of the University of California.
6 * Copyright (c) 1994 John S. Dyson
8 * Copyright (c) 1994 David Greenman
10 * Copyright (c) 2003 Peter Wemm
11 * All rights reserved.
12 * Copyright (c) 2005-2010 Alan L. Cox <alc@cs.rice.edu>
13 * All rights reserved.
14 * Copyright (c) 2014 Andrew Turner
15 * All rights reserved.
16 * Copyright (c) 2014 The FreeBSD Foundation
17 * All rights reserved.
18 * Copyright (c) 2015-2017 Ruslan Bukin <br@bsdpad.com>
19 * All rights reserved.
21 * This code is derived from software contributed to Berkeley by
22 * the Systems Programming Group of the University of Utah Computer
23 * Science Department and William Jolitz of UUNET Technologies Inc.
25 * Portions of this software were developed by Andrew Turner under
26 * sponsorship from The FreeBSD Foundation.
28 * Portions of this software were developed by SRI International and the
29 * University of Cambridge Computer Laboratory under DARPA/AFRL contract
30 * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
32 * Portions of this software were developed by the University of Cambridge
33 * Computer Laboratory as part of the CTSRD Project, with support from the
34 * UK Higher Education Innovation Fund (HEIF).
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
39 * 1. Redistributions of source code must retain the above copyright
40 * notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce the above copyright
42 * notice, this list of conditions and the following disclaimer in the
43 * documentation and/or other materials provided with the distribution.
44 * 3. All advertising materials mentioning features or use of this software
45 * must display the following acknowledgement:
46 * This product includes software developed by the University of
47 * California, Berkeley and its contributors.
48 * 4. Neither the name of the University nor the names of its contributors
49 * may be used to endorse or promote products derived from this software
50 * without specific prior written permission.
52 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
53 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
54 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
55 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
56 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
57 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
58 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
59 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
60 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
61 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
64 * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91
67 * Copyright (c) 2003 Networks Associates Technology, Inc.
68 * All rights reserved.
70 * This software was developed for the FreeBSD Project by Jake Burkholder,
71 * Safeport Network Services, and Network Associates Laboratories, the
72 * Security Research Division of Network Associates, Inc. under
73 * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA
74 * CHATS research program.
76 * Redistribution and use in source and binary forms, with or without
77 * modification, are permitted provided that the following conditions
79 * 1. Redistributions of source code must retain the above copyright
80 * notice, this list of conditions and the following disclaimer.
81 * 2. Redistributions in binary form must reproduce the above copyright
82 * notice, this list of conditions and the following disclaimer in the
83 * documentation and/or other materials provided with the distribution.
85 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
86 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
87 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
88 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
89 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
90 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
91 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
92 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
93 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
94 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
98 #include <sys/cdefs.h>
99 __FBSDID("$FreeBSD$");
102 * Manages physical address maps.
104 * Since the information managed by this module is
105 * also stored by the logical address mapping module,
106 * this module may throw away valid virtual-to-physical
107 * mappings at almost any time. However, invalidations
108 * of virtual-to-physical mappings must be done as
111 * In order to cope with hardware architectures which
112 * make virtual-to-physical map invalidates expensive,
113 * this module may delay invalidate or reduced protection
114 * operations until such time as they are actually
115 * necessary. This module is given full information as
116 * to which processors are currently using which maps,
117 * and to when physical maps must be made correct.
120 #include <sys/param.h>
122 #include <sys/systm.h>
123 #include <sys/kernel.h>
125 #include <sys/lock.h>
126 #include <sys/malloc.h>
127 #include <sys/mman.h>
128 #include <sys/msgbuf.h>
129 #include <sys/mutex.h>
130 #include <sys/proc.h>
131 #include <sys/rwlock.h>
133 #include <sys/vmem.h>
134 #include <sys/vmmeter.h>
135 #include <sys/sched.h>
136 #include <sys/sysctl.h>
140 #include <vm/vm_param.h>
141 #include <vm/vm_kern.h>
142 #include <vm/vm_page.h>
143 #include <vm/vm_map.h>
144 #include <vm/vm_object.h>
145 #include <vm/vm_extern.h>
146 #include <vm/vm_pageout.h>
147 #include <vm/vm_pager.h>
148 #include <vm/vm_radix.h>
149 #include <vm/vm_reserv.h>
152 #include <machine/machdep.h>
153 #include <machine/md_var.h>
154 #include <machine/pcb.h>
156 #define NPDEPG (PAGE_SIZE/(sizeof (pd_entry_t)))
157 #define NUPDE (NPDEPG * NPDEPG)
158 #define NUSERPGTBLS (NUPDE + NPDEPG)
160 #if !defined(DIAGNOSTIC)
161 #ifdef __GNUC_GNU_INLINE__
162 #define PMAP_INLINE __attribute__((__gnu_inline__)) inline
164 #define PMAP_INLINE extern inline
171 #define PV_STAT(x) do { x ; } while (0)
173 #define PV_STAT(x) do { } while (0)
176 #define pmap_l2_pindex(v) ((v) >> L2_SHIFT)
178 #define NPV_LIST_LOCKS MAXCPU
180 #define PHYS_TO_PV_LIST_LOCK(pa) \
181 (&pv_list_locks[pa_index(pa) % NPV_LIST_LOCKS])
183 #define CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa) do { \
184 struct rwlock **_lockp = (lockp); \
185 struct rwlock *_new_lock; \
187 _new_lock = PHYS_TO_PV_LIST_LOCK(pa); \
188 if (_new_lock != *_lockp) { \
189 if (*_lockp != NULL) \
190 rw_wunlock(*_lockp); \
191 *_lockp = _new_lock; \
196 #define CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m) \
197 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, VM_PAGE_TO_PHYS(m))
199 #define RELEASE_PV_LIST_LOCK(lockp) do { \
200 struct rwlock **_lockp = (lockp); \
202 if (*_lockp != NULL) { \
203 rw_wunlock(*_lockp); \
208 #define VM_PAGE_TO_PV_LIST_LOCK(m) \
209 PHYS_TO_PV_LIST_LOCK(VM_PAGE_TO_PHYS(m))
211 /* The list of all the user pmaps */
212 LIST_HEAD(pmaplist, pmap);
213 static struct pmaplist allpmaps;
215 static MALLOC_DEFINE(M_VMPMAP, "pmap", "PMAP L1");
217 struct pmap kernel_pmap_store;
219 vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */
220 vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */
221 vm_offset_t kernel_vm_end = 0;
223 vm_paddr_t dmap_phys_base; /* The start of the dmap region */
224 vm_paddr_t dmap_phys_max; /* The limit of the dmap region */
225 vm_offset_t dmap_max_addr; /* The virtual address limit of the dmap */
227 /* This code assumes all L1 DMAP entries will be used */
228 CTASSERT((DMAP_MIN_ADDRESS & ~L1_OFFSET) == DMAP_MIN_ADDRESS);
229 CTASSERT((DMAP_MAX_ADDRESS & ~L1_OFFSET) == DMAP_MAX_ADDRESS);
231 static struct rwlock_padalign pvh_global_lock;
234 * Data for the pv entry allocation mechanism
236 static TAILQ_HEAD(pch, pv_chunk) pv_chunks = TAILQ_HEAD_INITIALIZER(pv_chunks);
237 static struct mtx pv_chunks_mutex;
238 static struct rwlock pv_list_locks[NPV_LIST_LOCKS];
240 static void free_pv_chunk(struct pv_chunk *pc);
241 static void free_pv_entry(pmap_t pmap, pv_entry_t pv);
242 static pv_entry_t get_pv_entry(pmap_t pmap, struct rwlock **lockp);
243 static vm_page_t reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp);
244 static void pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va);
245 static pv_entry_t pmap_pvh_remove(struct md_page *pvh, pmap_t pmap,
247 static vm_page_t pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va,
248 vm_page_t m, vm_prot_t prot, vm_page_t mpte, struct rwlock **lockp);
249 static int pmap_remove_l3(pmap_t pmap, pt_entry_t *l3, vm_offset_t sva,
250 pd_entry_t ptepde, struct spglist *free, struct rwlock **lockp);
251 static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va,
252 vm_page_t m, struct rwlock **lockp);
254 static vm_page_t _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex,
255 struct rwlock **lockp);
257 static void _pmap_unwire_l3(pmap_t pmap, vm_offset_t va, vm_page_t m,
258 struct spglist *free);
259 static int pmap_unuse_l3(pmap_t, vm_offset_t, pd_entry_t, struct spglist *);
262 * These load the old table data and store the new value.
263 * They need to be atomic as the System MMU may write to the table at
264 * the same time as the CPU.
266 #define pmap_load_store(table, entry) atomic_swap_64(table, entry)
267 #define pmap_set(table, mask) atomic_set_64(table, mask)
268 #define pmap_load_clear(table) atomic_swap_64(table, 0)
269 #define pmap_load(table) (*table)
271 /********************/
272 /* Inline functions */
273 /********************/
276 pagecopy(void *s, void *d)
279 memcpy(d, s, PAGE_SIZE);
289 #define pmap_l1_index(va) (((va) >> L1_SHIFT) & Ln_ADDR_MASK)
290 #define pmap_l2_index(va) (((va) >> L2_SHIFT) & Ln_ADDR_MASK)
291 #define pmap_l3_index(va) (((va) >> L3_SHIFT) & Ln_ADDR_MASK)
293 #define PTE_TO_PHYS(pte) ((pte >> PTE_PPN0_S) * PAGE_SIZE)
295 static __inline pd_entry_t *
296 pmap_l1(pmap_t pmap, vm_offset_t va)
299 return (&pmap->pm_l1[pmap_l1_index(va)]);
302 static __inline pd_entry_t *
303 pmap_l1_to_l2(pd_entry_t *l1, vm_offset_t va)
308 phys = PTE_TO_PHYS(pmap_load(l1));
309 l2 = (pd_entry_t *)PHYS_TO_DMAP(phys);
311 return (&l2[pmap_l2_index(va)]);
314 static __inline pd_entry_t *
315 pmap_l2(pmap_t pmap, vm_offset_t va)
319 l1 = pmap_l1(pmap, va);
322 if ((pmap_load(l1) & PTE_V) == 0)
324 if ((pmap_load(l1) & PTE_RX) != 0)
327 return (pmap_l1_to_l2(l1, va));
330 static __inline pt_entry_t *
331 pmap_l2_to_l3(pd_entry_t *l2, vm_offset_t va)
336 phys = PTE_TO_PHYS(pmap_load(l2));
337 l3 = (pd_entry_t *)PHYS_TO_DMAP(phys);
339 return (&l3[pmap_l3_index(va)]);
342 static __inline pt_entry_t *
343 pmap_l3(pmap_t pmap, vm_offset_t va)
347 l2 = pmap_l2(pmap, va);
350 if ((pmap_load(l2) & PTE_V) == 0)
352 if ((pmap_load(l2) & PTE_RX) != 0)
355 return (pmap_l2_to_l3(l2, va));
360 pmap_is_write(pt_entry_t entry)
363 return (entry & PTE_W);
367 pmap_is_current(pmap_t pmap)
370 return ((pmap == pmap_kernel()) ||
371 (pmap == curthread->td_proc->p_vmspace->vm_map.pmap));
375 pmap_l3_valid(pt_entry_t l3)
382 pmap_l3_valid_cacheable(pt_entry_t l3)
390 #define PTE_SYNC(pte) cpu_dcache_wb_range((vm_offset_t)pte, sizeof(*pte))
392 /* Checks if the page is dirty. */
394 pmap_page_dirty(pt_entry_t pte)
397 return (pte & PTE_D);
401 pmap_resident_count_inc(pmap_t pmap, int count)
404 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
405 pmap->pm_stats.resident_count += count;
409 pmap_resident_count_dec(pmap_t pmap, int count)
412 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
413 KASSERT(pmap->pm_stats.resident_count >= count,
414 ("pmap %p resident count underflow %ld %d", pmap,
415 pmap->pm_stats.resident_count, count));
416 pmap->pm_stats.resident_count -= count;
420 pmap_distribute_l1(struct pmap *pmap, vm_pindex_t l1index,
423 struct pmap *user_pmap;
426 /* Distribute new kernel L1 entry to all the user pmaps */
427 if (pmap != kernel_pmap)
430 LIST_FOREACH(user_pmap, &allpmaps, pm_list) {
431 l1 = &user_pmap->pm_l1[l1index];
433 pmap_load_store(l1, entry);
440 pmap_early_page_idx(vm_offset_t l1pt, vm_offset_t va, u_int *l1_slot,
446 l1 = (pd_entry_t *)l1pt;
447 *l1_slot = (va >> L1_SHIFT) & Ln_ADDR_MASK;
449 /* Check locore has used a table L1 map */
450 KASSERT((l1[*l1_slot] & PTE_RX) == 0,
451 ("Invalid bootstrap L1 table"));
453 /* Find the address of the L2 table */
454 l2 = (pt_entry_t *)init_pt_va;
455 *l2_slot = pmap_l2_index(va);
461 pmap_early_vtophys(vm_offset_t l1pt, vm_offset_t va)
463 u_int l1_slot, l2_slot;
467 l2 = pmap_early_page_idx(l1pt, va, &l1_slot, &l2_slot);
469 /* Check locore has used L2 superpages */
470 KASSERT((l2[l2_slot] & PTE_RX) != 0,
471 ("Invalid bootstrap L2 table"));
473 /* L2 is superpages */
474 ret = (l2[l2_slot] >> PTE_PPN1_S) << L2_SHIFT;
475 ret += (va & L2_OFFSET);
481 pmap_bootstrap_dmap(vm_offset_t kern_l1, vm_paddr_t min_pa, vm_paddr_t max_pa)
490 pa = dmap_phys_base = min_pa & ~L1_OFFSET;
491 va = DMAP_MIN_ADDRESS;
492 l1 = (pd_entry_t *)kern_l1;
493 l1_slot = pmap_l1_index(DMAP_MIN_ADDRESS);
495 for (; va < DMAP_MAX_ADDRESS && pa < max_pa;
496 pa += L1_SIZE, va += L1_SIZE, l1_slot++) {
497 KASSERT(l1_slot < Ln_ENTRIES, ("Invalid L1 index"));
500 pn = (pa / PAGE_SIZE);
501 entry = (PTE_V | PTE_RWX);
502 entry |= (pn << PTE_PPN0_S);
503 pmap_load_store(&l1[l1_slot], entry);
506 /* Set the upper limit of the DMAP region */
510 cpu_dcache_wb_range((vm_offset_t)l1, PAGE_SIZE);
515 pmap_bootstrap_l3(vm_offset_t l1pt, vm_offset_t va, vm_offset_t l3_start)
517 vm_offset_t l2pt, l3pt;
524 KASSERT((va & L2_OFFSET) == 0, ("Invalid virtual address"));
526 l2 = pmap_l2(kernel_pmap, va);
527 l2 = (pd_entry_t *)((uintptr_t)l2 & ~(PAGE_SIZE - 1));
528 l2pt = (vm_offset_t)l2;
529 l2_slot = pmap_l2_index(va);
532 for (; va < VM_MAX_KERNEL_ADDRESS; l2_slot++, va += L2_SIZE) {
533 KASSERT(l2_slot < Ln_ENTRIES, ("Invalid L2 index"));
535 pa = pmap_early_vtophys(l1pt, l3pt);
536 pn = (pa / PAGE_SIZE);
538 entry |= (pn << PTE_PPN0_S);
539 pmap_load_store(&l2[l2_slot], entry);
544 /* Clean the L2 page table */
545 memset((void *)l3_start, 0, l3pt - l3_start);
546 cpu_dcache_wb_range(l3_start, l3pt - l3_start);
548 cpu_dcache_wb_range((vm_offset_t)l2, PAGE_SIZE);
554 * Bootstrap the system enough to run with virtual memory.
557 pmap_bootstrap(vm_offset_t l1pt, vm_paddr_t kernstart, vm_size_t kernlen)
559 u_int l1_slot, l2_slot, avail_slot, map_slot, used_map_slot;
562 vm_offset_t va, freemempos;
563 vm_offset_t dpcpu, msgbufpv;
564 vm_paddr_t pa, min_pa, max_pa;
567 kern_delta = KERNBASE - kernstart;
570 printf("pmap_bootstrap %lx %lx %lx\n", l1pt, kernstart, kernlen);
571 printf("%lx\n", l1pt);
572 printf("%lx\n", (KERNBASE >> L1_SHIFT) & Ln_ADDR_MASK);
574 /* Set this early so we can use the pagetable walking functions */
575 kernel_pmap_store.pm_l1 = (pd_entry_t *)l1pt;
576 PMAP_LOCK_INIT(kernel_pmap);
579 * Initialize the global pv list lock.
581 rw_init(&pvh_global_lock, "pmap pv global");
583 LIST_INIT(&allpmaps);
585 /* Assume the address we were loaded to is a valid physical address */
586 min_pa = max_pa = KERNBASE - kern_delta;
589 * Find the minimum physical address. physmap is sorted,
590 * but may contain empty ranges.
592 for (i = 0; i < (physmap_idx * 2); i += 2) {
593 if (physmap[i] == physmap[i + 1])
595 if (physmap[i] <= min_pa)
597 if (physmap[i + 1] > max_pa)
598 max_pa = physmap[i + 1];
600 printf("physmap_idx %lx\n", physmap_idx);
601 printf("min_pa %lx\n", min_pa);
602 printf("max_pa %lx\n", max_pa);
604 /* Create a direct map region early so we can use it for pa -> va */
605 pmap_bootstrap_dmap(l1pt, min_pa, max_pa);
608 pa = KERNBASE - kern_delta;
611 * Start to initialize phys_avail by copying from physmap
612 * up to the physical address KERNBASE points at.
614 map_slot = avail_slot = 0;
615 for (; map_slot < (physmap_idx * 2); map_slot += 2) {
616 if (physmap[map_slot] == physmap[map_slot + 1])
619 if (physmap[map_slot] <= pa &&
620 physmap[map_slot + 1] > pa)
623 phys_avail[avail_slot] = physmap[map_slot];
624 phys_avail[avail_slot + 1] = physmap[map_slot + 1];
625 physmem += (phys_avail[avail_slot + 1] -
626 phys_avail[avail_slot]) >> PAGE_SHIFT;
630 /* Add the memory before the kernel */
631 if (physmap[avail_slot] < pa) {
632 phys_avail[avail_slot] = physmap[map_slot];
633 phys_avail[avail_slot + 1] = pa;
634 physmem += (phys_avail[avail_slot + 1] -
635 phys_avail[avail_slot]) >> PAGE_SHIFT;
638 used_map_slot = map_slot;
641 * Read the page table to find out what is already mapped.
642 * This assumes we have mapped a block of memory from KERNBASE
643 * using a single L1 entry.
645 l2 = pmap_early_page_idx(l1pt, KERNBASE, &l1_slot, &l2_slot);
647 /* Sanity check the index, KERNBASE should be the first VA */
648 KASSERT(l2_slot == 0, ("The L2 index is non-zero"));
650 /* Find how many pages we have mapped */
651 for (; l2_slot < Ln_ENTRIES; l2_slot++) {
652 if ((l2[l2_slot] & PTE_V) == 0)
655 /* Check locore used L2 superpages */
656 KASSERT((l2[l2_slot] & PTE_RX) != 0,
657 ("Invalid bootstrap L2 table"));
663 va = roundup2(va, L2_SIZE);
665 freemempos = KERNBASE + kernlen;
666 freemempos = roundup2(freemempos, PAGE_SIZE);
668 /* Create the l3 tables for the early devmap */
669 freemempos = pmap_bootstrap_l3(l1pt,
670 VM_MAX_KERNEL_ADDRESS - L2_SIZE, freemempos);
674 #define alloc_pages(var, np) \
675 (var) = freemempos; \
676 freemempos += (np * PAGE_SIZE); \
677 memset((char *)(var), 0, ((np) * PAGE_SIZE));
679 /* Allocate dynamic per-cpu area. */
680 alloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
681 dpcpu_init((void *)dpcpu, 0);
683 /* Allocate memory for the msgbuf, e.g. for /sbin/dmesg */
684 alloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
685 msgbufp = (void *)msgbufpv;
687 virtual_avail = roundup2(freemempos, L2_SIZE);
688 virtual_end = VM_MAX_KERNEL_ADDRESS - L2_SIZE;
689 kernel_vm_end = virtual_avail;
691 pa = pmap_early_vtophys(l1pt, freemempos);
693 /* Finish initialising physmap */
694 map_slot = used_map_slot;
695 for (; avail_slot < (PHYS_AVAIL_SIZE - 2) &&
696 map_slot < (physmap_idx * 2); map_slot += 2) {
697 if (physmap[map_slot] == physmap[map_slot + 1]) {
701 /* Have we used the current range? */
702 if (physmap[map_slot + 1] <= pa) {
706 /* Do we need to split the entry? */
707 if (physmap[map_slot] < pa) {
708 phys_avail[avail_slot] = pa;
709 phys_avail[avail_slot + 1] = physmap[map_slot + 1];
711 phys_avail[avail_slot] = physmap[map_slot];
712 phys_avail[avail_slot + 1] = physmap[map_slot + 1];
714 physmem += (phys_avail[avail_slot + 1] -
715 phys_avail[avail_slot]) >> PAGE_SHIFT;
719 phys_avail[avail_slot] = 0;
720 phys_avail[avail_slot + 1] = 0;
723 * Maxmem isn't the "maximum memory", it's one larger than the
724 * highest page of the physical address space. It should be
725 * called something like "Maxphyspage".
727 Maxmem = atop(phys_avail[avail_slot - 1]);
733 * Initialize a vm_page's machine-dependent fields.
736 pmap_page_init(vm_page_t m)
739 TAILQ_INIT(&m->md.pv_list);
740 m->md.pv_memattr = VM_MEMATTR_WRITE_BACK;
744 * Initialize the pmap module.
745 * Called by vm_init, to initialize any structures that the pmap
746 * system needs to map virtual memory.
754 * Initialize the pv chunk list mutex.
756 mtx_init(&pv_chunks_mutex, "pmap pv chunk list", NULL, MTX_DEF);
759 * Initialize the pool of pv list locks.
761 for (i = 0; i < NPV_LIST_LOCKS; i++)
762 rw_init(&pv_list_locks[i], "pmap pv list");
766 * Normal, non-SMP, invalidation functions.
767 * We inline these within pmap.c for speed.
770 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
776 __asm __volatile("sfence.vma %0" :: "r" (va) : "memory");
781 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
787 __asm __volatile("sfence.vma");
792 pmap_invalidate_all(pmap_t pmap)
798 __asm __volatile("sfence.vma");
803 * Routine: pmap_extract
805 * Extract the physical page address associated
806 * with the given map/virtual_address pair.
809 pmap_extract(pmap_t pmap, vm_offset_t va)
818 * Start with the l2 tabel. We are unable to allocate
819 * pages in the l1 table.
821 l2p = pmap_l2(pmap, va);
824 if ((l2 & PTE_RX) == 0) {
825 l3p = pmap_l2_to_l3(l2p, va);
828 pa = PTE_TO_PHYS(l3);
829 pa |= (va & L3_OFFSET);
832 /* L2 is superpages */
833 pa = (l2 >> PTE_PPN1_S) << L2_SHIFT;
834 pa |= (va & L2_OFFSET);
842 * Routine: pmap_extract_and_hold
844 * Atomically extract and hold the physical page
845 * with the given pmap and virtual address pair
846 * if that mapping permits the given protection.
849 pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
860 l3p = pmap_l3(pmap, va);
861 if (l3p != NULL && (l3 = pmap_load(l3p)) != 0) {
862 if ((pmap_is_write(l3)) || ((prot & VM_PROT_WRITE) == 0)) {
863 phys = PTE_TO_PHYS(l3);
864 if (vm_page_pa_tryrelock(pmap, phys, &pa))
866 m = PHYS_TO_VM_PAGE(phys);
876 pmap_kextract(vm_offset_t va)
882 if (va >= DMAP_MIN_ADDRESS && va < DMAP_MAX_ADDRESS) {
883 pa = DMAP_TO_PHYS(va);
885 l2 = pmap_l2(kernel_pmap, va);
887 panic("pmap_kextract: No l2");
888 if ((pmap_load(l2) & PTE_RX) != 0) {
890 pa = (pmap_load(l2) >> PTE_PPN1_S) << L2_SHIFT;
891 pa |= (va & L2_OFFSET);
895 l3 = pmap_l2_to_l3(l2, va);
897 panic("pmap_kextract: No l3...");
898 pa = PTE_TO_PHYS(pmap_load(l3));
899 pa |= (va & PAGE_MASK);
904 /***************************************************
905 * Low level mapping routines.....
906 ***************************************************/
909 pmap_kenter_device(vm_offset_t sva, vm_size_t size, vm_paddr_t pa)
916 KASSERT((pa & L3_OFFSET) == 0,
917 ("pmap_kenter_device: Invalid physical address"));
918 KASSERT((sva & L3_OFFSET) == 0,
919 ("pmap_kenter_device: Invalid virtual address"));
920 KASSERT((size & PAGE_MASK) == 0,
921 ("pmap_kenter_device: Mapping is not page-sized"));
925 l3 = pmap_l3(kernel_pmap, va);
926 KASSERT(l3 != NULL, ("Invalid page table, va: 0x%lx", va));
928 pn = (pa / PAGE_SIZE);
929 entry = (PTE_V | PTE_RWX);
930 entry |= (pn << PTE_PPN0_S);
931 pmap_load_store(l3, entry);
939 pmap_invalidate_range(kernel_pmap, sva, va);
943 * Remove a page from the kernel pagetables.
944 * Note: not SMP coherent.
947 pmap_kremove(vm_offset_t va)
951 l3 = pmap_l3(kernel_pmap, va);
952 KASSERT(l3 != NULL, ("pmap_kremove: Invalid address"));
954 if (pmap_l3_valid_cacheable(pmap_load(l3)))
955 cpu_dcache_wb_range(va, L3_SIZE);
958 pmap_invalidate_page(kernel_pmap, va);
962 pmap_kremove_device(vm_offset_t sva, vm_size_t size)
967 KASSERT((sva & L3_OFFSET) == 0,
968 ("pmap_kremove_device: Invalid virtual address"));
969 KASSERT((size & PAGE_MASK) == 0,
970 ("pmap_kremove_device: Mapping is not page-sized"));
974 l3 = pmap_l3(kernel_pmap, va);
975 KASSERT(l3 != NULL, ("Invalid page table, va: 0x%lx", va));
982 pmap_invalidate_range(kernel_pmap, sva, va);
986 * Used to map a range of physical addresses into kernel
987 * virtual address space.
989 * The value passed in '*virt' is a suggested virtual address for
990 * the mapping. Architectures which can support a direct-mapped
991 * physical to virtual region can return the appropriate address
992 * within that region, leaving '*virt' unchanged. Other
993 * architectures should map the pages starting at '*virt' and
994 * update '*virt' with the first usable address after the mapped
998 pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot)
1001 return PHYS_TO_DMAP(start);
1006 * Add a list of wired pages to the kva
1007 * this routine is only used for temporary
1008 * kernel mappings that do not need to have
1009 * page modification or references recorded.
1010 * Note that old mappings are simply written
1011 * over. The page *must* be wired.
1012 * Note: SMP coherent. Uses a ranged shootdown IPI.
1015 pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count)
1025 for (i = 0; i < count; i++) {
1027 pa = VM_PAGE_TO_PHYS(m);
1028 pn = (pa / PAGE_SIZE);
1029 l3 = pmap_l3(kernel_pmap, va);
1031 entry = (PTE_V | PTE_RWX);
1032 entry |= (pn << PTE_PPN0_S);
1033 pmap_load_store(l3, entry);
1038 pmap_invalidate_range(kernel_pmap, sva, va);
1042 * This routine tears out page mappings from the
1043 * kernel -- it is meant only for temporary mappings.
1044 * Note: SMP coherent. Uses a ranged shootdown IPI.
1047 pmap_qremove(vm_offset_t sva, int count)
1052 KASSERT(sva >= VM_MIN_KERNEL_ADDRESS, ("usermode va %lx", sva));
1055 while (count-- > 0) {
1056 l3 = pmap_l3(kernel_pmap, va);
1057 KASSERT(l3 != NULL, ("pmap_kremove: Invalid address"));
1059 if (pmap_l3_valid_cacheable(pmap_load(l3)))
1060 cpu_dcache_wb_range(va, L3_SIZE);
1061 pmap_load_clear(l3);
1066 pmap_invalidate_range(kernel_pmap, sva, va);
1069 /***************************************************
1070 * Page table page management routines.....
1071 ***************************************************/
1072 static __inline void
1073 pmap_free_zero_pages(struct spglist *free)
1077 while ((m = SLIST_FIRST(free)) != NULL) {
1078 SLIST_REMOVE_HEAD(free, plinks.s.ss);
1079 /* Preserve the page's PG_ZERO setting. */
1080 vm_page_free_toq(m);
1085 * Schedule the specified unused page table page to be freed. Specifically,
1086 * add the page to the specified list of pages that will be released to the
1087 * physical memory manager after the TLB has been updated.
1089 static __inline void
1090 pmap_add_delayed_free_list(vm_page_t m, struct spglist *free,
1091 boolean_t set_PG_ZERO)
1095 m->flags |= PG_ZERO;
1097 m->flags &= ~PG_ZERO;
1098 SLIST_INSERT_HEAD(free, m, plinks.s.ss);
1102 * Decrements a page table page's wire count, which is used to record the
1103 * number of valid page table entries within the page. If the wire count
1104 * drops to zero, then the page table page is unmapped. Returns TRUE if the
1105 * page table page was unmapped and FALSE otherwise.
1107 static inline boolean_t
1108 pmap_unwire_l3(pmap_t pmap, vm_offset_t va, vm_page_t m, struct spglist *free)
1112 if (m->wire_count == 0) {
1113 _pmap_unwire_l3(pmap, va, m, free);
1121 _pmap_unwire_l3(pmap_t pmap, vm_offset_t va, vm_page_t m, struct spglist *free)
1125 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1127 * unmap the page table page
1129 if (m->pindex >= NUPDE) {
1132 l1 = pmap_l1(pmap, va);
1133 pmap_load_clear(l1);
1134 pmap_distribute_l1(pmap, pmap_l1_index(va), 0);
1139 l2 = pmap_l2(pmap, va);
1140 pmap_load_clear(l2);
1143 pmap_resident_count_dec(pmap, 1);
1144 if (m->pindex < NUPDE) {
1146 /* We just released a PT, unhold the matching PD */
1149 l1 = pmap_l1(pmap, va);
1150 phys = PTE_TO_PHYS(pmap_load(l1));
1151 pdpg = PHYS_TO_VM_PAGE(phys);
1152 pmap_unwire_l3(pmap, va, pdpg, free);
1154 pmap_invalidate_page(pmap, va);
1159 * Put page on a list so that it is released after
1160 * *ALL* TLB shootdown is done
1162 pmap_add_delayed_free_list(m, free, TRUE);
1166 * After removing an l3 entry, this routine is used to
1167 * conditionally free the page, and manage the hold/wire counts.
1170 pmap_unuse_l3(pmap_t pmap, vm_offset_t va, pd_entry_t ptepde,
1171 struct spglist *free)
1176 if (va >= VM_MAXUSER_ADDRESS)
1178 KASSERT(ptepde != 0, ("pmap_unuse_pt: ptepde != 0"));
1180 phys = PTE_TO_PHYS(ptepde);
1182 mpte = PHYS_TO_VM_PAGE(phys);
1183 return (pmap_unwire_l3(pmap, va, mpte, free));
1187 pmap_pinit0(pmap_t pmap)
1190 PMAP_LOCK_INIT(pmap);
1191 bzero(&pmap->pm_stats, sizeof(pmap->pm_stats));
1192 pmap->pm_l1 = kernel_pmap->pm_l1;
1196 pmap_pinit(pmap_t pmap)
1202 * allocate the l1 page
1204 while ((l1pt = vm_page_alloc(NULL, 0xdeadbeef, VM_ALLOC_NORMAL |
1205 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL)
1208 l1phys = VM_PAGE_TO_PHYS(l1pt);
1209 pmap->pm_l1 = (pd_entry_t *)PHYS_TO_DMAP(l1phys);
1211 if ((l1pt->flags & PG_ZERO) == 0)
1212 pagezero(pmap->pm_l1);
1214 bzero(&pmap->pm_stats, sizeof(pmap->pm_stats));
1216 /* Install kernel pagetables */
1217 memcpy(pmap->pm_l1, kernel_pmap->pm_l1, PAGE_SIZE);
1219 /* Add to the list of all user pmaps */
1220 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list);
1226 * This routine is called if the desired page table page does not exist.
1228 * If page table page allocation fails, this routine may sleep before
1229 * returning NULL. It sleeps only if a lock pointer was given.
1231 * Note: If a page allocation fails at page table level two or three,
1232 * one or two pages may be held during the wait, only to be released
1233 * afterwards. This conservative approach is easily argued to avoid
1237 _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex, struct rwlock **lockp)
1239 vm_page_t m, /*pdppg, */pdpg;
1244 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1247 * Allocate a page table page.
1249 if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ |
1250 VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) {
1251 if (lockp != NULL) {
1252 RELEASE_PV_LIST_LOCK(lockp);
1254 rw_runlock(&pvh_global_lock);
1256 rw_rlock(&pvh_global_lock);
1261 * Indicate the need to retry. While waiting, the page table
1262 * page may have been allocated.
1267 if ((m->flags & PG_ZERO) == 0)
1271 * Map the pagetable page into the process address space, if
1272 * it isn't already there.
1275 if (ptepindex >= NUPDE) {
1277 vm_pindex_t l1index;
1279 l1index = ptepindex - NUPDE;
1280 l1 = &pmap->pm_l1[l1index];
1282 pn = (VM_PAGE_TO_PHYS(m) / PAGE_SIZE);
1284 entry |= (pn << PTE_PPN0_S);
1285 pmap_load_store(l1, entry);
1286 pmap_distribute_l1(pmap, l1index, entry);
1291 vm_pindex_t l1index;
1292 pd_entry_t *l1, *l2;
1294 l1index = ptepindex >> (L1_SHIFT - L2_SHIFT);
1295 l1 = &pmap->pm_l1[l1index];
1296 if (pmap_load(l1) == 0) {
1297 /* recurse for allocating page dir */
1298 if (_pmap_alloc_l3(pmap, NUPDE + l1index,
1300 vm_page_unwire_noq(m);
1301 vm_page_free_zero(m);
1305 phys = PTE_TO_PHYS(pmap_load(l1));
1306 pdpg = PHYS_TO_VM_PAGE(phys);
1310 phys = PTE_TO_PHYS(pmap_load(l1));
1311 l2 = (pd_entry_t *)PHYS_TO_DMAP(phys);
1312 l2 = &l2[ptepindex & Ln_ADDR_MASK];
1314 pn = (VM_PAGE_TO_PHYS(m) / PAGE_SIZE);
1316 entry |= (pn << PTE_PPN0_S);
1317 pmap_load_store(l2, entry);
1322 pmap_resident_count_inc(pmap, 1);
1328 pmap_alloc_l3(pmap_t pmap, vm_offset_t va, struct rwlock **lockp)
1330 vm_pindex_t ptepindex;
1336 * Calculate pagetable page index
1338 ptepindex = pmap_l2_pindex(va);
1341 * Get the page directory entry
1343 l2 = pmap_l2(pmap, va);
1346 * If the page table page is mapped, we just increment the
1347 * hold count, and activate it.
1349 if (l2 != NULL && pmap_load(l2) != 0) {
1350 phys = PTE_TO_PHYS(pmap_load(l2));
1351 m = PHYS_TO_VM_PAGE(phys);
1355 * Here if the pte page isn't mapped, or if it has been
1358 m = _pmap_alloc_l3(pmap, ptepindex, lockp);
1359 if (m == NULL && lockp != NULL)
1366 /***************************************************
1367 * Pmap allocation/deallocation routines.
1368 ***************************************************/
1371 * Release any resources held by the given physical map.
1372 * Called when a pmap initialized by pmap_pinit is being released.
1373 * Should only be called if the map contains no valid mappings.
1376 pmap_release(pmap_t pmap)
1380 KASSERT(pmap->pm_stats.resident_count == 0,
1381 ("pmap_release: pmap resident count %ld != 0",
1382 pmap->pm_stats.resident_count));
1384 m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pmap->pm_l1));
1385 vm_page_unwire_noq(m);
1386 vm_page_free_zero(m);
1388 /* Remove pmap from the allpmaps list */
1389 LIST_REMOVE(pmap, pm_list);
1391 /* Remove kernel pagetables */
1392 bzero(pmap->pm_l1, PAGE_SIZE);
1397 kvm_size(SYSCTL_HANDLER_ARGS)
1399 unsigned long ksize = VM_MAX_KERNEL_ADDRESS - VM_MIN_KERNEL_ADDRESS;
1401 return sysctl_handle_long(oidp, &ksize, 0, req);
1403 SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD,
1404 0, 0, kvm_size, "LU", "Size of KVM");
1407 kvm_free(SYSCTL_HANDLER_ARGS)
1409 unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end;
1411 return sysctl_handle_long(oidp, &kfree, 0, req);
1413 SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD,
1414 0, 0, kvm_free, "LU", "Amount of KVM free");
1418 * grow the number of kernel page table entries, if needed
1421 pmap_growkernel(vm_offset_t addr)
1425 pd_entry_t *l1, *l2;
1429 mtx_assert(&kernel_map->system_mtx, MA_OWNED);
1431 addr = roundup2(addr, L2_SIZE);
1432 if (addr - 1 >= kernel_map->max_offset)
1433 addr = kernel_map->max_offset;
1434 while (kernel_vm_end < addr) {
1435 l1 = pmap_l1(kernel_pmap, kernel_vm_end);
1436 if (pmap_load(l1) == 0) {
1437 /* We need a new PDP entry */
1438 nkpg = vm_page_alloc(NULL, kernel_vm_end >> L1_SHIFT,
1439 VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ |
1440 VM_ALLOC_WIRED | VM_ALLOC_ZERO);
1442 panic("pmap_growkernel: no memory to grow kernel");
1443 if ((nkpg->flags & PG_ZERO) == 0)
1444 pmap_zero_page(nkpg);
1445 paddr = VM_PAGE_TO_PHYS(nkpg);
1447 pn = (paddr / PAGE_SIZE);
1449 entry |= (pn << PTE_PPN0_S);
1450 pmap_load_store(l1, entry);
1451 pmap_distribute_l1(kernel_pmap,
1452 pmap_l1_index(kernel_vm_end), entry);
1455 continue; /* try again */
1457 l2 = pmap_l1_to_l2(l1, kernel_vm_end);
1458 if ((pmap_load(l2) & PTE_A) != 0) {
1459 kernel_vm_end = (kernel_vm_end + L2_SIZE) & ~L2_OFFSET;
1460 if (kernel_vm_end - 1 >= kernel_map->max_offset) {
1461 kernel_vm_end = kernel_map->max_offset;
1467 nkpg = vm_page_alloc(NULL, kernel_vm_end >> L2_SHIFT,
1468 VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
1471 panic("pmap_growkernel: no memory to grow kernel");
1472 if ((nkpg->flags & PG_ZERO) == 0) {
1473 pmap_zero_page(nkpg);
1475 paddr = VM_PAGE_TO_PHYS(nkpg);
1477 pn = (paddr / PAGE_SIZE);
1479 entry |= (pn << PTE_PPN0_S);
1480 pmap_load_store(l2, entry);
1483 pmap_invalidate_page(kernel_pmap, kernel_vm_end);
1485 kernel_vm_end = (kernel_vm_end + L2_SIZE) & ~L2_OFFSET;
1486 if (kernel_vm_end - 1 >= kernel_map->max_offset) {
1487 kernel_vm_end = kernel_map->max_offset;
1494 /***************************************************
1495 * page management routines.
1496 ***************************************************/
1498 CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE);
1499 CTASSERT(_NPCM == 3);
1500 CTASSERT(_NPCPV == 168);
1502 static __inline struct pv_chunk *
1503 pv_to_chunk(pv_entry_t pv)
1506 return ((struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK));
1509 #define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap)
1511 #define PC_FREE0 0xfffffffffffffffful
1512 #define PC_FREE1 0xfffffffffffffffful
1513 #define PC_FREE2 0x000000fffffffffful
1515 static const uint64_t pc_freemask[_NPCM] = { PC_FREE0, PC_FREE1, PC_FREE2 };
1519 static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail;
1521 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0,
1522 "Current number of pv entry chunks");
1523 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0,
1524 "Current number of pv entry chunks allocated");
1525 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0,
1526 "Current number of pv entry chunks frees");
1527 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0,
1528 "Number of times tried to get a chunk page but failed.");
1530 static long pv_entry_frees, pv_entry_allocs, pv_entry_count;
1531 static int pv_entry_spare;
1533 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0,
1534 "Current number of pv entry frees");
1535 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0,
1536 "Current number of pv entry allocs");
1537 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0,
1538 "Current number of pv entries");
1539 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0,
1540 "Current number of spare pv entries");
1545 * We are in a serious low memory condition. Resort to
1546 * drastic measures to free some pages so we can allocate
1547 * another pv entry chunk.
1549 * Returns NULL if PV entries were reclaimed from the specified pmap.
1551 * We do not, however, unmap 2mpages because subsequent accesses will
1552 * allocate per-page pv entries until repromotion occurs, thereby
1553 * exacerbating the shortage of free pv entries.
1556 reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp)
1559 panic("RISCVTODO: reclaim_pv_chunk");
1563 * free the pv_entry back to the free list
1566 free_pv_entry(pmap_t pmap, pv_entry_t pv)
1568 struct pv_chunk *pc;
1569 int idx, field, bit;
1571 rw_assert(&pvh_global_lock, RA_LOCKED);
1572 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1573 PV_STAT(atomic_add_long(&pv_entry_frees, 1));
1574 PV_STAT(atomic_add_int(&pv_entry_spare, 1));
1575 PV_STAT(atomic_subtract_long(&pv_entry_count, 1));
1576 pc = pv_to_chunk(pv);
1577 idx = pv - &pc->pc_pventry[0];
1580 pc->pc_map[field] |= 1ul << bit;
1581 if (pc->pc_map[0] != PC_FREE0 || pc->pc_map[1] != PC_FREE1 ||
1582 pc->pc_map[2] != PC_FREE2) {
1583 /* 98% of the time, pc is already at the head of the list. */
1584 if (__predict_false(pc != TAILQ_FIRST(&pmap->pm_pvchunk))) {
1585 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1586 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1590 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1595 free_pv_chunk(struct pv_chunk *pc)
1599 mtx_lock(&pv_chunks_mutex);
1600 TAILQ_REMOVE(&pv_chunks, pc, pc_lru);
1601 mtx_unlock(&pv_chunks_mutex);
1602 PV_STAT(atomic_subtract_int(&pv_entry_spare, _NPCPV));
1603 PV_STAT(atomic_subtract_int(&pc_chunk_count, 1));
1604 PV_STAT(atomic_add_int(&pc_chunk_frees, 1));
1605 /* entire chunk is free, return it */
1606 m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pc));
1607 #if 0 /* TODO: For minidump */
1608 dump_drop_page(m->phys_addr);
1610 vm_page_unwire(m, PQ_NONE);
1615 * Returns a new PV entry, allocating a new PV chunk from the system when
1616 * needed. If this PV chunk allocation fails and a PV list lock pointer was
1617 * given, a PV chunk is reclaimed from an arbitrary pmap. Otherwise, NULL is
1620 * The given PV list lock may be released.
1623 get_pv_entry(pmap_t pmap, struct rwlock **lockp)
1627 struct pv_chunk *pc;
1630 rw_assert(&pvh_global_lock, RA_LOCKED);
1631 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1632 PV_STAT(atomic_add_long(&pv_entry_allocs, 1));
1634 pc = TAILQ_FIRST(&pmap->pm_pvchunk);
1636 for (field = 0; field < _NPCM; field++) {
1637 if (pc->pc_map[field]) {
1638 bit = ffsl(pc->pc_map[field]) - 1;
1642 if (field < _NPCM) {
1643 pv = &pc->pc_pventry[field * 64 + bit];
1644 pc->pc_map[field] &= ~(1ul << bit);
1645 /* If this was the last item, move it to tail */
1646 if (pc->pc_map[0] == 0 && pc->pc_map[1] == 0 &&
1647 pc->pc_map[2] == 0) {
1648 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1649 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc,
1652 PV_STAT(atomic_add_long(&pv_entry_count, 1));
1653 PV_STAT(atomic_subtract_int(&pv_entry_spare, 1));
1657 /* No free items, allocate another chunk */
1658 m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ |
1661 if (lockp == NULL) {
1662 PV_STAT(pc_chunk_tryfail++);
1665 m = reclaim_pv_chunk(pmap, lockp);
1669 PV_STAT(atomic_add_int(&pc_chunk_count, 1));
1670 PV_STAT(atomic_add_int(&pc_chunk_allocs, 1));
1671 #if 0 /* TODO: This is for minidump */
1672 dump_add_page(m->phys_addr);
1674 pc = (void *)PHYS_TO_DMAP(m->phys_addr);
1676 pc->pc_map[0] = PC_FREE0 & ~1ul; /* preallocated bit 0 */
1677 pc->pc_map[1] = PC_FREE1;
1678 pc->pc_map[2] = PC_FREE2;
1679 mtx_lock(&pv_chunks_mutex);
1680 TAILQ_INSERT_TAIL(&pv_chunks, pc, pc_lru);
1681 mtx_unlock(&pv_chunks_mutex);
1682 pv = &pc->pc_pventry[0];
1683 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1684 PV_STAT(atomic_add_long(&pv_entry_count, 1));
1685 PV_STAT(atomic_add_int(&pv_entry_spare, _NPCPV - 1));
1690 * First find and then remove the pv entry for the specified pmap and virtual
1691 * address from the specified pv list. Returns the pv entry if found and NULL
1692 * otherwise. This operation can be performed on pv lists for either 4KB or
1693 * 2MB page mappings.
1695 static __inline pv_entry_t
1696 pmap_pvh_remove(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
1700 rw_assert(&pvh_global_lock, RA_LOCKED);
1701 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
1702 if (pmap == PV_PMAP(pv) && va == pv->pv_va) {
1703 TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
1712 * First find and then destroy the pv entry for the specified pmap and virtual
1713 * address. This operation can be performed on pv lists for either 4KB or 2MB
1717 pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
1721 pv = pmap_pvh_remove(pvh, pmap, va);
1723 KASSERT(pv != NULL, ("pmap_pvh_free: pv not found"));
1724 free_pv_entry(pmap, pv);
1728 * Conditionally create the PV entry for a 4KB page mapping if the required
1729 * memory can be allocated without resorting to reclamation.
1732 pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m,
1733 struct rwlock **lockp)
1737 rw_assert(&pvh_global_lock, RA_LOCKED);
1738 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1739 /* Pass NULL instead of the lock pointer to disable reclamation. */
1740 if ((pv = get_pv_entry(pmap, NULL)) != NULL) {
1742 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m);
1743 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1751 * pmap_remove_l3: do the things to unmap a page in a process
1754 pmap_remove_l3(pmap_t pmap, pt_entry_t *l3, vm_offset_t va,
1755 pd_entry_t l2e, struct spglist *free, struct rwlock **lockp)
1761 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1762 if (pmap_is_current(pmap) && pmap_l3_valid_cacheable(pmap_load(l3)))
1763 cpu_dcache_wb_range(va, L3_SIZE);
1764 old_l3 = pmap_load_clear(l3);
1766 pmap_invalidate_page(pmap, va);
1767 if (old_l3 & PTE_SW_WIRED)
1768 pmap->pm_stats.wired_count -= 1;
1769 pmap_resident_count_dec(pmap, 1);
1770 if (old_l3 & PTE_SW_MANAGED) {
1771 phys = PTE_TO_PHYS(old_l3);
1772 m = PHYS_TO_VM_PAGE(phys);
1773 if (pmap_page_dirty(old_l3))
1776 vm_page_aflag_set(m, PGA_REFERENCED);
1777 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m);
1778 pmap_pvh_free(&m->md, pmap, va);
1781 return (pmap_unuse_l3(pmap, va, l2e, free));
1785 * Remove the given range of addresses from the specified map.
1787 * It is assumed that the start and end are properly
1788 * rounded to the page size.
1791 pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
1793 struct rwlock *lock;
1794 vm_offset_t va, va_next;
1795 pd_entry_t *l1, *l2;
1796 pt_entry_t l3_pte, *l3;
1797 struct spglist free;
1800 * Perform an unsynchronized read. This is, however, safe.
1802 if (pmap->pm_stats.resident_count == 0)
1807 rw_rlock(&pvh_global_lock);
1811 for (; sva < eva; sva = va_next) {
1812 if (pmap->pm_stats.resident_count == 0)
1815 l1 = pmap_l1(pmap, sva);
1816 if (pmap_load(l1) == 0) {
1817 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
1824 * Calculate index for next page table.
1826 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
1830 l2 = pmap_l1_to_l2(l1, sva);
1834 l3_pte = pmap_load(l2);
1837 * Weed out invalid mappings.
1841 if ((pmap_load(l2) & PTE_RX) != 0)
1845 * Limit our scan to either the end of the va represented
1846 * by the current page table page, or to the end of the
1847 * range being removed.
1853 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
1856 panic("l3 == NULL");
1857 if (pmap_load(l3) == 0) {
1858 if (va != va_next) {
1859 pmap_invalidate_range(pmap, va, sva);
1866 if (pmap_remove_l3(pmap, l3, sva, l3_pte, &free,
1873 pmap_invalidate_range(pmap, va, sva);
1877 rw_runlock(&pvh_global_lock);
1879 pmap_free_zero_pages(&free);
1883 * Routine: pmap_remove_all
1885 * Removes this physical page from
1886 * all physical maps in which it resides.
1887 * Reflects back modify bits to the pager.
1890 * Original versions of this routine were very
1891 * inefficient because they iteratively called
1892 * pmap_remove (slow...)
1896 pmap_remove_all(vm_page_t m)
1900 pt_entry_t *l3, tl3;
1901 pd_entry_t *l2, tl2;
1902 struct spglist free;
1904 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
1905 ("pmap_remove_all: page %p is not managed", m));
1907 rw_wlock(&pvh_global_lock);
1908 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
1911 pmap_resident_count_dec(pmap, 1);
1912 l2 = pmap_l2(pmap, pv->pv_va);
1913 KASSERT(l2 != NULL, ("pmap_remove_all: no l2 table found"));
1914 tl2 = pmap_load(l2);
1916 KASSERT((tl2 & PTE_RX) == 0,
1917 ("pmap_remove_all: found a table when expecting "
1918 "a block in %p's pv list", m));
1920 l3 = pmap_l2_to_l3(l2, pv->pv_va);
1921 if (pmap_is_current(pmap) &&
1922 pmap_l3_valid_cacheable(pmap_load(l3)))
1923 cpu_dcache_wb_range(pv->pv_va, L3_SIZE);
1924 tl3 = pmap_load_clear(l3);
1926 pmap_invalidate_page(pmap, pv->pv_va);
1927 if (tl3 & PTE_SW_WIRED)
1928 pmap->pm_stats.wired_count--;
1929 if ((tl3 & PTE_A) != 0)
1930 vm_page_aflag_set(m, PGA_REFERENCED);
1933 * Update the vm_page_t clean and reference bits.
1935 if (pmap_page_dirty(tl3))
1937 pmap_unuse_l3(pmap, pv->pv_va, pmap_load(l2), &free);
1938 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
1940 free_pv_entry(pmap, pv);
1943 vm_page_aflag_clear(m, PGA_WRITEABLE);
1944 rw_wunlock(&pvh_global_lock);
1945 pmap_free_zero_pages(&free);
1949 * Set the physical protection on the
1950 * specified range of this map as requested.
1953 pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
1955 vm_offset_t va, va_next;
1956 pd_entry_t *l1, *l2;
1957 pt_entry_t *l3p, l3;
1960 if ((prot & VM_PROT_READ) == VM_PROT_NONE) {
1961 pmap_remove(pmap, sva, eva);
1965 if ((prot & VM_PROT_WRITE) == VM_PROT_WRITE)
1969 for (; sva < eva; sva = va_next) {
1971 l1 = pmap_l1(pmap, sva);
1972 if (pmap_load(l1) == 0) {
1973 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
1979 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
1983 l2 = pmap_l1_to_l2(l1, sva);
1986 if (pmap_load(l2) == 0)
1988 if ((pmap_load(l2) & PTE_RX) != 0)
1995 for (l3p = pmap_l2_to_l3(l2, sva); sva != va_next; l3p++,
1997 l3 = pmap_load(l3p);
1998 if (pmap_l3_valid(l3)) {
1999 entry = pmap_load(l3p);
2001 pmap_load_store(l3p, entry);
2003 /* XXX: Use pmap_invalidate_range */
2004 pmap_invalidate_page(pmap, sva);
2012 * Insert the given physical page (p) at
2013 * the specified virtual address (v) in the
2014 * target physical map with the protection requested.
2016 * If specified, the page will be wired down, meaning
2017 * that the related pte can not be reclaimed.
2019 * NB: This is the only routine which MAY NOT lazy-evaluate
2020 * or lose information. That is, this routine must actually
2021 * insert this page into the given map NOW.
2024 pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
2025 u_int flags, int8_t psind __unused)
2027 struct rwlock *lock;
2028 pd_entry_t *l1, *l2;
2029 pt_entry_t new_l3, orig_l3;
2032 vm_paddr_t opa, pa, l2_pa, l3_pa;
2033 vm_page_t mpte, om, l2_m, l3_m;
2040 va = trunc_page(va);
2041 if ((m->oflags & VPO_UNMANAGED) == 0 && !vm_page_xbusied(m))
2042 VM_OBJECT_ASSERT_LOCKED(m->object);
2043 pa = VM_PAGE_TO_PHYS(m);
2044 pn = (pa / PAGE_SIZE);
2046 new_l3 = PTE_V | PTE_R | PTE_X;
2047 if (prot & VM_PROT_WRITE)
2049 if ((va >> 63) == 0)
2052 new_l3 |= (pn << PTE_PPN0_S);
2053 if ((flags & PMAP_ENTER_WIRED) != 0)
2054 new_l3 |= PTE_SW_WIRED;
2056 CTR2(KTR_PMAP, "pmap_enter: %.16lx -> %.16lx", va, pa);
2061 rw_rlock(&pvh_global_lock);
2064 if (va < VM_MAXUSER_ADDRESS) {
2065 nosleep = (flags & PMAP_ENTER_NOSLEEP) != 0;
2066 mpte = pmap_alloc_l3(pmap, va, nosleep ? NULL : &lock);
2067 if (mpte == NULL && nosleep) {
2068 CTR0(KTR_PMAP, "pmap_enter: mpte == NULL");
2071 rw_runlock(&pvh_global_lock);
2073 return (KERN_RESOURCE_SHORTAGE);
2075 l3 = pmap_l3(pmap, va);
2077 l3 = pmap_l3(pmap, va);
2078 /* TODO: This is not optimal, but should mostly work */
2080 l2 = pmap_l2(pmap, va);
2082 l2_m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
2083 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
2086 panic("pmap_enter: l2 pte_m == NULL");
2087 if ((l2_m->flags & PG_ZERO) == 0)
2088 pmap_zero_page(l2_m);
2090 l2_pa = VM_PAGE_TO_PHYS(l2_m);
2091 l2_pn = (l2_pa / PAGE_SIZE);
2093 l1 = pmap_l1(pmap, va);
2095 entry |= (l2_pn << PTE_PPN0_S);
2096 pmap_load_store(l1, entry);
2097 pmap_distribute_l1(pmap, pmap_l1_index(va), entry);
2100 l2 = pmap_l1_to_l2(l1, va);
2104 ("No l2 table after allocating one"));
2106 l3_m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
2107 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | VM_ALLOC_ZERO);
2109 panic("pmap_enter: l3 pte_m == NULL");
2110 if ((l3_m->flags & PG_ZERO) == 0)
2111 pmap_zero_page(l3_m);
2113 l3_pa = VM_PAGE_TO_PHYS(l3_m);
2114 l3_pn = (l3_pa / PAGE_SIZE);
2116 entry |= (l3_pn << PTE_PPN0_S);
2117 pmap_load_store(l2, entry);
2119 l3 = pmap_l2_to_l3(l2, va);
2121 pmap_invalidate_page(pmap, va);
2125 orig_l3 = pmap_load(l3);
2126 opa = PTE_TO_PHYS(orig_l3);
2129 * Is the specified virtual address already mapped?
2131 if (pmap_l3_valid(orig_l3)) {
2133 * Wiring change, just update stats. We don't worry about
2134 * wiring PT pages as they remain resident as long as there
2135 * are valid mappings in them. Hence, if a user page is wired,
2136 * the PT page will be also.
2138 if ((flags & PMAP_ENTER_WIRED) != 0 &&
2139 (orig_l3 & PTE_SW_WIRED) == 0)
2140 pmap->pm_stats.wired_count++;
2141 else if ((flags & PMAP_ENTER_WIRED) == 0 &&
2142 (orig_l3 & PTE_SW_WIRED) != 0)
2143 pmap->pm_stats.wired_count--;
2146 * Remove the extra PT page reference.
2150 KASSERT(mpte->wire_count > 0,
2151 ("pmap_enter: missing reference to page table page,"
2156 * Has the physical page changed?
2160 * No, might be a protection or wiring change.
2162 if ((orig_l3 & PTE_SW_MANAGED) != 0) {
2163 new_l3 |= PTE_SW_MANAGED;
2164 if (pmap_is_write(new_l3))
2165 vm_page_aflag_set(m, PGA_WRITEABLE);
2170 /* Flush the cache, there might be uncommitted data in it */
2171 if (pmap_is_current(pmap) && pmap_l3_valid_cacheable(orig_l3))
2172 cpu_dcache_wb_range(va, L3_SIZE);
2175 * Increment the counters.
2177 if ((new_l3 & PTE_SW_WIRED) != 0)
2178 pmap->pm_stats.wired_count++;
2179 pmap_resident_count_inc(pmap, 1);
2182 * Enter on the PV list if part of our managed memory.
2184 if ((m->oflags & VPO_UNMANAGED) == 0) {
2185 new_l3 |= PTE_SW_MANAGED;
2186 pv = get_pv_entry(pmap, &lock);
2188 CHANGE_PV_LIST_LOCK_TO_PHYS(&lock, pa);
2189 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
2191 if (pmap_is_write(new_l3))
2192 vm_page_aflag_set(m, PGA_WRITEABLE);
2196 * Update the L3 entry.
2200 orig_l3 = pmap_load_store(l3, new_l3);
2202 opa = PTE_TO_PHYS(orig_l3);
2205 if ((orig_l3 & PTE_SW_MANAGED) != 0) {
2206 om = PHYS_TO_VM_PAGE(opa);
2207 if (pmap_page_dirty(orig_l3))
2209 if ((orig_l3 & PTE_A) != 0)
2210 vm_page_aflag_set(om, PGA_REFERENCED);
2211 CHANGE_PV_LIST_LOCK_TO_PHYS(&lock, opa);
2212 pmap_pvh_free(&om->md, pmap, va);
2214 } else if (pmap_page_dirty(orig_l3)) {
2215 if ((orig_l3 & PTE_SW_MANAGED) != 0)
2219 pmap_load_store(l3, new_l3);
2222 pmap_invalidate_page(pmap, va);
2223 if ((pmap != pmap_kernel()) && (pmap == &curproc->p_vmspace->vm_pmap))
2224 cpu_icache_sync_range(va, PAGE_SIZE);
2228 rw_runlock(&pvh_global_lock);
2230 return (KERN_SUCCESS);
2234 * Maps a sequence of resident pages belonging to the same object.
2235 * The sequence begins with the given page m_start. This page is
2236 * mapped at the given virtual address start. Each subsequent page is
2237 * mapped at a virtual address that is offset from start by the same
2238 * amount as the page is offset from m_start within the object. The
2239 * last page in the sequence is the page with the largest offset from
2240 * m_start that can be mapped at a virtual address less than the given
2241 * virtual address end. Not every virtual page between start and end
2242 * is mapped; only those for which a resident page exists with the
2243 * corresponding offset from m_start are mapped.
2246 pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end,
2247 vm_page_t m_start, vm_prot_t prot)
2249 struct rwlock *lock;
2252 vm_pindex_t diff, psize;
2254 VM_OBJECT_ASSERT_LOCKED(m_start->object);
2256 psize = atop(end - start);
2260 rw_rlock(&pvh_global_lock);
2262 while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) {
2263 va = start + ptoa(diff);
2264 mpte = pmap_enter_quick_locked(pmap, va, m, prot, mpte, &lock);
2265 m = TAILQ_NEXT(m, listq);
2269 rw_runlock(&pvh_global_lock);
2274 * this code makes some *MAJOR* assumptions:
2275 * 1. Current pmap & pmap exists.
2278 * 4. No page table pages.
2279 * but is *MUCH* faster than pmap_enter...
2283 pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
2285 struct rwlock *lock;
2288 rw_rlock(&pvh_global_lock);
2290 (void)pmap_enter_quick_locked(pmap, va, m, prot, NULL, &lock);
2293 rw_runlock(&pvh_global_lock);
2298 pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m,
2299 vm_prot_t prot, vm_page_t mpte, struct rwlock **lockp)
2301 struct spglist free;
2309 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva ||
2310 (m->oflags & VPO_UNMANAGED) != 0,
2311 ("pmap_enter_quick_locked: managed mapping within the clean submap"));
2312 rw_assert(&pvh_global_lock, RA_LOCKED);
2313 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2315 CTR2(KTR_PMAP, "pmap_enter_quick_locked: %p %lx", pmap, va);
2317 * In the case that a page table page is not
2318 * resident, we are creating it here.
2320 if (va < VM_MAXUSER_ADDRESS) {
2321 vm_pindex_t l2pindex;
2324 * Calculate pagetable page index
2326 l2pindex = pmap_l2_pindex(va);
2327 if (mpte && (mpte->pindex == l2pindex)) {
2333 l2 = pmap_l2(pmap, va);
2336 * If the page table page is mapped, we just increment
2337 * the hold count, and activate it. Otherwise, we
2338 * attempt to allocate a page table page. If this
2339 * attempt fails, we don't retry. Instead, we give up.
2341 if (l2 != NULL && pmap_load(l2) != 0) {
2342 phys = PTE_TO_PHYS(pmap_load(l2));
2343 mpte = PHYS_TO_VM_PAGE(phys);
2347 * Pass NULL instead of the PV list lock
2348 * pointer, because we don't intend to sleep.
2350 mpte = _pmap_alloc_l3(pmap, l2pindex, NULL);
2355 l3 = (pt_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mpte));
2356 l3 = &l3[pmap_l3_index(va)];
2359 l3 = pmap_l3(kernel_pmap, va);
2362 panic("pmap_enter_quick_locked: No l3");
2363 if (pmap_load(l3) != 0) {
2372 * Enter on the PV list if part of our managed memory.
2374 if ((m->oflags & VPO_UNMANAGED) == 0 &&
2375 !pmap_try_insert_pv_entry(pmap, va, m, lockp)) {
2378 if (pmap_unwire_l3(pmap, va, mpte, &free)) {
2379 pmap_invalidate_page(pmap, va);
2380 pmap_free_zero_pages(&free);
2388 * Increment counters
2390 pmap_resident_count_inc(pmap, 1);
2392 pa = VM_PAGE_TO_PHYS(m);
2393 pn = (pa / PAGE_SIZE);
2395 /* RISCVTODO: check permissions */
2396 entry = (PTE_V | PTE_RWX);
2397 entry |= (pn << PTE_PPN0_S);
2400 * Now validate mapping with RO protection
2402 if ((m->oflags & VPO_UNMANAGED) == 0)
2403 entry |= PTE_SW_MANAGED;
2404 pmap_load_store(l3, entry);
2407 pmap_invalidate_page(pmap, va);
2412 * This code maps large physical mmap regions into the
2413 * processor address space. Note that some shortcuts
2414 * are taken, but the code works.
2417 pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, vm_object_t object,
2418 vm_pindex_t pindex, vm_size_t size)
2421 VM_OBJECT_ASSERT_WLOCKED(object);
2422 KASSERT(object->type == OBJT_DEVICE || object->type == OBJT_SG,
2423 ("pmap_object_init_pt: non-device object"));
2427 * Clear the wired attribute from the mappings for the specified range of
2428 * addresses in the given pmap. Every valid mapping within that range
2429 * must have the wired attribute set. In contrast, invalid mappings
2430 * cannot have the wired attribute set, so they are ignored.
2432 * The wired attribute of the page table entry is not a hardware feature,
2433 * so there is no need to invalidate any TLB entries.
2436 pmap_unwire(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
2438 vm_offset_t va_next;
2439 pd_entry_t *l1, *l2;
2441 boolean_t pv_lists_locked;
2443 pv_lists_locked = FALSE;
2445 for (; sva < eva; sva = va_next) {
2446 l1 = pmap_l1(pmap, sva);
2447 if (pmap_load(l1) == 0) {
2448 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
2454 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
2458 l2 = pmap_l1_to_l2(l1, sva);
2459 if (pmap_load(l2) == 0)
2464 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
2466 if (pmap_load(l3) == 0)
2468 if ((pmap_load(l3) & PTE_SW_WIRED) == 0)
2469 panic("pmap_unwire: l3 %#jx is missing "
2470 "PTE_SW_WIRED", (uintmax_t)*l3);
2473 * PG_W must be cleared atomically. Although the pmap
2474 * lock synchronizes access to PG_W, another processor
2475 * could be setting PG_M and/or PG_A concurrently.
2477 atomic_clear_long(l3, PTE_SW_WIRED);
2478 pmap->pm_stats.wired_count--;
2481 if (pv_lists_locked)
2482 rw_runlock(&pvh_global_lock);
2487 * Copy the range specified by src_addr/len
2488 * from the source map to the range dst_addr/len
2489 * in the destination map.
2491 * This routine is only advisory and need not do anything.
2495 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len,
2496 vm_offset_t src_addr)
2502 * pmap_zero_page zeros the specified hardware page by mapping
2503 * the page into KVM and using bzero to clear its contents.
2506 pmap_zero_page(vm_page_t m)
2508 vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
2510 pagezero((void *)va);
2514 * pmap_zero_page_area zeros the specified hardware page by mapping
2515 * the page into KVM and using bzero to clear its contents.
2517 * off and size may not cover an area beyond a single hardware page.
2520 pmap_zero_page_area(vm_page_t m, int off, int size)
2522 vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
2524 if (off == 0 && size == PAGE_SIZE)
2525 pagezero((void *)va);
2527 bzero((char *)va + off, size);
2531 * pmap_copy_page copies the specified (machine independent)
2532 * page by mapping the page into virtual memory and using
2533 * bcopy to copy the page, one machine dependent page at a
2537 pmap_copy_page(vm_page_t msrc, vm_page_t mdst)
2539 vm_offset_t src = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(msrc));
2540 vm_offset_t dst = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mdst));
2542 pagecopy((void *)src, (void *)dst);
2545 int unmapped_buf_allowed = 1;
2548 pmap_copy_pages(vm_page_t ma[], vm_offset_t a_offset, vm_page_t mb[],
2549 vm_offset_t b_offset, int xfersize)
2553 vm_paddr_t p_a, p_b;
2554 vm_offset_t a_pg_offset, b_pg_offset;
2557 while (xfersize > 0) {
2558 a_pg_offset = a_offset & PAGE_MASK;
2559 m_a = ma[a_offset >> PAGE_SHIFT];
2560 p_a = m_a->phys_addr;
2561 b_pg_offset = b_offset & PAGE_MASK;
2562 m_b = mb[b_offset >> PAGE_SHIFT];
2563 p_b = m_b->phys_addr;
2564 cnt = min(xfersize, PAGE_SIZE - a_pg_offset);
2565 cnt = min(cnt, PAGE_SIZE - b_pg_offset);
2566 if (__predict_false(!PHYS_IN_DMAP(p_a))) {
2567 panic("!DMAP a %lx", p_a);
2569 a_cp = (char *)PHYS_TO_DMAP(p_a) + a_pg_offset;
2571 if (__predict_false(!PHYS_IN_DMAP(p_b))) {
2572 panic("!DMAP b %lx", p_b);
2574 b_cp = (char *)PHYS_TO_DMAP(p_b) + b_pg_offset;
2576 bcopy(a_cp, b_cp, cnt);
2584 pmap_quick_enter_page(vm_page_t m)
2587 return (PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m)));
2591 pmap_quick_remove_page(vm_offset_t addr)
2596 * Returns true if the pmap's pv is one of the first
2597 * 16 pvs linked to from this page. This count may
2598 * be changed upwards or downwards in the future; it
2599 * is only necessary that true be returned for a small
2600 * subset of pmaps for proper page aging.
2603 pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
2605 struct rwlock *lock;
2610 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2611 ("pmap_page_exists_quick: page %p is not managed", m));
2613 rw_rlock(&pvh_global_lock);
2614 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
2616 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
2617 if (PV_PMAP(pv) == pmap) {
2626 rw_runlock(&pvh_global_lock);
2631 * pmap_page_wired_mappings:
2633 * Return the number of managed mappings to the given physical page
2637 pmap_page_wired_mappings(vm_page_t m)
2639 struct rwlock *lock;
2645 if ((m->oflags & VPO_UNMANAGED) != 0)
2647 rw_rlock(&pvh_global_lock);
2648 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
2652 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
2654 if (!PMAP_TRYLOCK(pmap)) {
2655 md_gen = m->md.pv_gen;
2659 if (md_gen != m->md.pv_gen) {
2664 l3 = pmap_l3(pmap, pv->pv_va);
2665 if (l3 != NULL && (pmap_load(l3) & PTE_SW_WIRED) != 0)
2670 rw_runlock(&pvh_global_lock);
2675 * Destroy all managed, non-wired mappings in the given user-space
2676 * pmap. This pmap cannot be active on any processor besides the
2679 * This function cannot be applied to the kernel pmap. Moreover, it
2680 * is not intended for general use. It is only to be used during
2681 * process termination. Consequently, it can be implemented in ways
2682 * that make it faster than pmap_remove(). First, it can more quickly
2683 * destroy mappings by iterating over the pmap's collection of PV
2684 * entries, rather than searching the page table. Second, it doesn't
2685 * have to test and clear the page table entries atomically, because
2686 * no processor is currently accessing the user address space. In
2687 * particular, a page table entry's dirty bit won't change state once
2688 * this function starts.
2691 pmap_remove_pages(pmap_t pmap)
2693 pd_entry_t ptepde, *l2;
2694 pt_entry_t *l3, tl3;
2695 struct spglist free;
2698 struct pv_chunk *pc, *npc;
2699 struct rwlock *lock;
2701 uint64_t inuse, bitmask;
2702 int allfree, field, freed, idx;
2708 rw_rlock(&pvh_global_lock);
2710 TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) {
2713 for (field = 0; field < _NPCM; field++) {
2714 inuse = ~pc->pc_map[field] & pc_freemask[field];
2715 while (inuse != 0) {
2716 bit = ffsl(inuse) - 1;
2717 bitmask = 1UL << bit;
2718 idx = field * 64 + bit;
2719 pv = &pc->pc_pventry[idx];
2722 l2 = pmap_l2(pmap, pv->pv_va);
2723 ptepde = pmap_load(l2);
2724 l3 = pmap_l2_to_l3(l2, pv->pv_va);
2725 tl3 = pmap_load(l3);
2728 * We cannot remove wired pages from a process' mapping at this time
2730 if (tl3 & PTE_SW_WIRED) {
2735 pa = PTE_TO_PHYS(tl3);
2736 m = PHYS_TO_VM_PAGE(pa);
2737 KASSERT(m->phys_addr == pa,
2738 ("vm_page_t %p phys_addr mismatch %016jx %016jx",
2739 m, (uintmax_t)m->phys_addr,
2742 KASSERT((m->flags & PG_FICTITIOUS) != 0 ||
2743 m < &vm_page_array[vm_page_array_size],
2744 ("pmap_remove_pages: bad l3 %#jx",
2747 if (pmap_is_current(pmap) &&
2748 pmap_l3_valid_cacheable(pmap_load(l3)))
2749 cpu_dcache_wb_range(pv->pv_va, L3_SIZE);
2750 pmap_load_clear(l3);
2752 pmap_invalidate_page(pmap, pv->pv_va);
2755 * Update the vm_page_t clean/reference bits.
2757 if (pmap_page_dirty(tl3))
2760 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(&lock, m);
2763 pc->pc_map[field] |= bitmask;
2765 pmap_resident_count_dec(pmap, 1);
2766 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
2769 pmap_unuse_l3(pmap, pv->pv_va, ptepde, &free);
2773 PV_STAT(atomic_add_long(&pv_entry_frees, freed));
2774 PV_STAT(atomic_add_int(&pv_entry_spare, freed));
2775 PV_STAT(atomic_subtract_long(&pv_entry_count, freed));
2777 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
2781 pmap_invalidate_all(pmap);
2784 rw_runlock(&pvh_global_lock);
2786 pmap_free_zero_pages(&free);
2790 * This is used to check if a page has been accessed or modified. As we
2791 * don't have a bit to see if it has been modified we have to assume it
2792 * has been if the page is read/write.
2795 pmap_page_test_mappings(vm_page_t m, boolean_t accessed, boolean_t modified)
2797 struct rwlock *lock;
2799 pt_entry_t *l3, mask, value;
2805 rw_rlock(&pvh_global_lock);
2806 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
2809 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
2811 if (!PMAP_TRYLOCK(pmap)) {
2812 md_gen = m->md.pv_gen;
2816 if (md_gen != m->md.pv_gen) {
2821 l3 = pmap_l3(pmap, pv->pv_va);
2835 mask |= ATTR_AP_RW_BIT;
2836 value |= ATTR_AP(ATTR_AP_RW);
2839 mask |= ATTR_AF | ATTR_DESCR_MASK;
2840 value |= ATTR_AF | L3_PAGE;
2844 rv = (pmap_load(l3) & mask) == value;
2851 rw_runlock(&pvh_global_lock);
2858 * Return whether or not the specified physical page was modified
2859 * in any physical maps.
2862 pmap_is_modified(vm_page_t m)
2865 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2866 ("pmap_is_modified: page %p is not managed", m));
2869 * If the page is not exclusive busied, then PGA_WRITEABLE cannot be
2870 * concurrently set while the object is locked. Thus, if PGA_WRITEABLE
2871 * is clear, no PTEs can have PG_M set.
2873 VM_OBJECT_ASSERT_WLOCKED(m->object);
2874 if (!vm_page_xbusied(m) && (m->aflags & PGA_WRITEABLE) == 0)
2876 return (pmap_page_test_mappings(m, FALSE, TRUE));
2880 * pmap_is_prefaultable:
2882 * Return whether or not the specified virtual address is eligible
2886 pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr)
2893 l3 = pmap_l3(pmap, addr);
2894 if (l3 != NULL && pmap_load(l3) != 0) {
2902 * pmap_is_referenced:
2904 * Return whether or not the specified physical page was referenced
2905 * in any physical maps.
2908 pmap_is_referenced(vm_page_t m)
2911 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2912 ("pmap_is_referenced: page %p is not managed", m));
2913 return (pmap_page_test_mappings(m, TRUE, FALSE));
2917 * Clear the write and modified bits in each of the given page's mappings.
2920 pmap_remove_write(vm_page_t m)
2923 struct rwlock *lock;
2925 pt_entry_t *l3, oldl3;
2929 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2930 ("pmap_remove_write: page %p is not managed", m));
2933 * If the page is not exclusive busied, then PGA_WRITEABLE cannot be
2934 * set by another thread while the object is locked. Thus,
2935 * if PGA_WRITEABLE is clear, no page table entries need updating.
2937 VM_OBJECT_ASSERT_WLOCKED(m->object);
2938 if (!vm_page_xbusied(m) && (m->aflags & PGA_WRITEABLE) == 0)
2940 rw_rlock(&pvh_global_lock);
2941 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
2944 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
2946 if (!PMAP_TRYLOCK(pmap)) {
2947 md_gen = m->md.pv_gen;
2951 if (md_gen != m->md.pv_gen) {
2957 l3 = pmap_l3(pmap, pv->pv_va);
2959 oldl3 = pmap_load(l3);
2961 if (pmap_is_write(oldl3)) {
2962 newl3 = oldl3 & ~(PTE_W);
2963 if (!atomic_cmpset_long(l3, oldl3, newl3))
2965 /* TODO: use pmap_page_dirty(oldl3) ? */
2966 if ((oldl3 & PTE_A) != 0)
2968 pmap_invalidate_page(pmap, pv->pv_va);
2973 vm_page_aflag_clear(m, PGA_WRITEABLE);
2974 rw_runlock(&pvh_global_lock);
2977 static __inline boolean_t
2978 safe_to_clear_referenced(pmap_t pmap, pt_entry_t pte)
2985 * pmap_ts_referenced:
2987 * Return a count of reference bits for a page, clearing those bits.
2988 * It is not necessary for every reference bit to be cleared, but it
2989 * is necessary that 0 only be returned when there are truly no
2990 * reference bits set.
2992 * As an optimization, update the page's dirty field if a modified bit is
2993 * found while counting reference bits. This opportunistic update can be
2994 * performed at low cost and can eliminate the need for some future calls
2995 * to pmap_is_modified(). However, since this function stops after
2996 * finding PMAP_TS_REFERENCED_MAX reference bits, it may not detect some
2997 * dirty pages. Those dirty pages will only be detected by a future call
2998 * to pmap_is_modified().
3001 pmap_ts_referenced(vm_page_t m)
3005 struct rwlock *lock;
3007 pt_entry_t *l3, old_l3;
3009 int cleared, md_gen, not_cleared;
3010 struct spglist free;
3012 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3013 ("pmap_ts_referenced: page %p is not managed", m));
3016 pa = VM_PAGE_TO_PHYS(m);
3017 lock = PHYS_TO_PV_LIST_LOCK(pa);
3018 rw_rlock(&pvh_global_lock);
3022 if ((pvf = TAILQ_FIRST(&m->md.pv_list)) == NULL)
3029 if (!PMAP_TRYLOCK(pmap)) {
3030 md_gen = m->md.pv_gen;
3034 if (md_gen != m->md.pv_gen) {
3039 l2 = pmap_l2(pmap, pv->pv_va);
3041 KASSERT((pmap_load(l2) & PTE_RX) == 0,
3042 ("pmap_ts_referenced: found an invalid l2 table"));
3044 l3 = pmap_l2_to_l3(l2, pv->pv_va);
3045 old_l3 = pmap_load(l3);
3046 if (pmap_page_dirty(old_l3))
3048 if ((old_l3 & PTE_A) != 0) {
3049 if (safe_to_clear_referenced(pmap, old_l3)) {
3051 * TODO: We don't handle the access flag
3052 * at all. We need to be able to set it in
3053 * the exception handler.
3055 panic("RISCVTODO: safe_to_clear_referenced\n");
3056 } else if ((old_l3 & PTE_SW_WIRED) == 0) {
3058 * Wired pages cannot be paged out so
3059 * doing accessed bit emulation for
3060 * them is wasted effort. We do the
3061 * hard work for unwired pages only.
3063 pmap_remove_l3(pmap, l3, pv->pv_va,
3064 pmap_load(l2), &free, &lock);
3065 pmap_invalidate_page(pmap, pv->pv_va);
3070 KASSERT(lock == VM_PAGE_TO_PV_LIST_LOCK(m),
3071 ("inconsistent pv lock %p %p for page %p",
3072 lock, VM_PAGE_TO_PV_LIST_LOCK(m), m));
3077 /* Rotate the PV list if it has more than one entry. */
3078 if (pv != NULL && TAILQ_NEXT(pv, pv_next) != NULL) {
3079 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
3080 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
3083 } while ((pv = TAILQ_FIRST(&m->md.pv_list)) != pvf && cleared +
3084 not_cleared < PMAP_TS_REFERENCED_MAX);
3087 rw_runlock(&pvh_global_lock);
3088 pmap_free_zero_pages(&free);
3089 return (cleared + not_cleared);
3093 * Apply the given advice to the specified range of addresses within the
3094 * given pmap. Depending on the advice, clear the referenced and/or
3095 * modified flags in each mapping and set the mapped page's dirty field.
3098 pmap_advise(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, int advice)
3103 * Clear the modify bits on the specified physical page.
3106 pmap_clear_modify(vm_page_t m)
3109 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3110 ("pmap_clear_modify: page %p is not managed", m));
3111 VM_OBJECT_ASSERT_WLOCKED(m->object);
3112 KASSERT(!vm_page_xbusied(m),
3113 ("pmap_clear_modify: page %p is exclusive busied", m));
3116 * If the page is not PGA_WRITEABLE, then no PTEs can have PG_M set.
3117 * If the object containing the page is locked and the page is not
3118 * exclusive busied, then PGA_WRITEABLE cannot be concurrently set.
3120 if ((m->aflags & PGA_WRITEABLE) == 0)
3123 /* RISCVTODO: We lack support for tracking if a page is modified */
3127 pmap_mapbios(vm_paddr_t pa, vm_size_t size)
3130 return ((void *)PHYS_TO_DMAP(pa));
3134 pmap_unmapbios(vm_paddr_t pa, vm_size_t size)
3139 * Sets the memory attribute for the specified page.
3142 pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma)
3145 m->md.pv_memattr = ma;
3148 * RISCVTODO: Implement the below (from the amd64 pmap)
3149 * If "m" is a normal page, update its direct mapping. This update
3150 * can be relied upon to perform any cache operations that are
3151 * required for data coherence.
3153 if ((m->flags & PG_FICTITIOUS) == 0 &&
3154 PHYS_IN_DMAP(VM_PAGE_TO_PHYS(m)))
3155 panic("RISCVTODO: pmap_page_set_memattr");
3159 * perform the pmap work for mincore
3162 pmap_mincore(pmap_t pmap, vm_offset_t addr, vm_paddr_t *locked_pa)
3165 panic("RISCVTODO: pmap_mincore");
3169 pmap_activate(struct thread *td)
3175 pmap = vmspace_pmap(td->td_proc->p_vmspace);
3176 td->td_pcb->pcb_l1addr = vtophys(pmap->pm_l1);
3178 reg = SATP_MODE_SV39;
3179 reg |= (td->td_pcb->pcb_l1addr >> PAGE_SHIFT);
3180 __asm __volatile("csrw sptbr, %0" :: "r"(reg));
3182 pmap_invalidate_all(pmap);
3187 pmap_sync_icache(pmap_t pm, vm_offset_t va, vm_size_t sz)
3190 panic("RISCVTODO: pmap_sync_icache");
3194 * Increase the starting virtual address of the given mapping if a
3195 * different alignment might result in more superpage mappings.
3198 pmap_align_superpage(vm_object_t object, vm_ooffset_t offset,
3199 vm_offset_t *addr, vm_size_t size)
3204 * Get the kernel virtual address of a set of physical pages. If there are
3205 * physical addresses not covered by the DMAP perform a transient mapping
3206 * that will be removed when calling pmap_unmap_io_transient.
3208 * \param page The pages the caller wishes to obtain the virtual
3209 * address on the kernel memory map.
3210 * \param vaddr On return contains the kernel virtual memory address
3211 * of the pages passed in the page parameter.
3212 * \param count Number of pages passed in.
3213 * \param can_fault TRUE if the thread using the mapped pages can take
3214 * page faults, FALSE otherwise.
3216 * \returns TRUE if the caller must call pmap_unmap_io_transient when
3217 * finished or FALSE otherwise.
3221 pmap_map_io_transient(vm_page_t page[], vm_offset_t vaddr[], int count,
3222 boolean_t can_fault)
3225 boolean_t needs_mapping;
3229 * Allocate any KVA space that we need, this is done in a separate
3230 * loop to prevent calling vmem_alloc while pinned.
3232 needs_mapping = FALSE;
3233 for (i = 0; i < count; i++) {
3234 paddr = VM_PAGE_TO_PHYS(page[i]);
3235 if (__predict_false(paddr >= DMAP_MAX_PHYSADDR)) {
3236 error = vmem_alloc(kernel_arena, PAGE_SIZE,
3237 M_BESTFIT | M_WAITOK, &vaddr[i]);
3238 KASSERT(error == 0, ("vmem_alloc failed: %d", error));
3239 needs_mapping = TRUE;
3241 vaddr[i] = PHYS_TO_DMAP(paddr);
3245 /* Exit early if everything is covered by the DMAP */
3251 for (i = 0; i < count; i++) {
3252 paddr = VM_PAGE_TO_PHYS(page[i]);
3253 if (paddr >= DMAP_MAX_PHYSADDR) {
3255 "pmap_map_io_transient: TODO: Map out of DMAP data");
3259 return (needs_mapping);
3263 pmap_unmap_io_transient(vm_page_t page[], vm_offset_t vaddr[], int count,
3264 boolean_t can_fault)
3271 for (i = 0; i < count; i++) {
3272 paddr = VM_PAGE_TO_PHYS(page[i]);
3273 if (paddr >= DMAP_MAX_PHYSADDR) {
3274 panic("RISCVTODO: pmap_unmap_io_transient: Unmap data");