From 0b570c6d9c18d2528a71596f150b26afc89c1644 Mon Sep 17 00:00:00 2001 From: alc Date: Sat, 13 Jul 2019 16:32:19 +0000 Subject: [PATCH] Revert r349442, which was a workaround for bus errors caused by an errant TLB entry. Specifically, at the start of pmap_enter_quick_locked(), we would sometimes have a TLB entry for an invalid PTE, and we would need to issue a TLB invalidation before exiting pmap_enter_quick_locked(). However, we should never have a TLB entry for an invalid PTE. r349905 has addressed the root cause of the problem, and so we no longer need this workaround. X-MFC after: r349905 --- sys/arm64/arm64/pmap.c | 9 +-------- 1 file changed, 1 insertion(+), 8 deletions(-) diff --git a/sys/arm64/arm64/pmap.c b/sys/arm64/arm64/pmap.c index b3ae5e67092..a0e72020941 100644 --- a/sys/arm64/arm64/pmap.c +++ b/sys/arm64/arm64/pmap.c @@ -3713,14 +3713,7 @@ pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m, cpu_icache_sync_range(PHYS_TO_DMAP(pa), PAGE_SIZE); pmap_load_store(l3, l3_val); - - /* - * XXX In principle, because this L3 entry was invalid, we should not - * need to perform a TLB invalidation here. However, in practice, - * when simply performing a "dsb ishst" here, processes are being - * terminated due to bus errors and segmentation violations. - */ - pmap_invalidate_page(pmap, va); + dsb(ishst); return (mpte); } -- 2.45.0