From 181593adec06083a007fa55857fb00aeceada950 Mon Sep 17 00:00:00 2001 From: Yoshihiro Takahashi Date: Sat, 6 Apr 2002 08:25:05 +0000 Subject: [PATCH] Move ICU_* defines into icu.h. --- sys/amd64/isa/atpic_vector.S | 12 ------------ sys/amd64/isa/icu.h | 34 ++++++++++++++++++++++++++++------ sys/amd64/isa/icu_ipl.S | 14 ++++---------- sys/amd64/isa/icu_ipl.s | 14 ++++---------- sys/amd64/isa/icu_vector.S | 12 ------------ sys/amd64/isa/icu_vector.s | 12 ------------ sys/amd64/isa/intr_machdep.h | 8 -------- sys/i386/isa/atpic_vector.s | 12 ------------ sys/i386/isa/icu.h | 34 ++++++++++++++++++++++++++++------ sys/i386/isa/icu_ipl.s | 14 ++++---------- sys/i386/isa/icu_vector.s | 12 ------------ sys/i386/isa/intr_machdep.h | 8 -------- 12 files changed, 68 insertions(+), 118 deletions(-) diff --git a/sys/amd64/isa/atpic_vector.S b/sys/amd64/isa/atpic_vector.S index de369c179f5..1023635b2ae 100644 --- a/sys/amd64/isa/atpic_vector.S +++ b/sys/amd64/isa/atpic_vector.S @@ -3,18 +3,6 @@ * $FreeBSD$ */ -/* - * modified for PC98 by Kakefuda - */ - -#ifdef PC98 -#define ICU_IMR_OFFSET 2 /* IO_ICU{1,2} + 2 */ -#else -#define ICU_IMR_OFFSET 1 /* IO_ICU{1,2} + 1 */ -#endif - -#define ICU_EOI 0x20 /* XXX - define elsewhere */ - #define IRQ_BIT(irq_num) (1 << ((irq_num) % 8)) #define IRQ_LBIT(irq_num) (1 << (irq_num)) #define IRQ_BYTE(irq_num) ((irq_num) >> 3) diff --git a/sys/amd64/isa/icu.h b/sys/amd64/isa/icu.h index b73495a963a..82e084f467b 100644 --- a/sys/amd64/isa/icu.h +++ b/sys/amd64/isa/icu.h @@ -80,6 +80,25 @@ extern unsigned imen; /* interrupt mask enable */ /* * Interrupt enable bits - in normal order of priority (which we change) */ +#ifdef PC98 +#define IRQ0 0x0001 +#define IRQ1 0x0002 +#define IRQ2 0x0004 +#define IRQ3 0x0008 +#define IRQ4 0x0010 +#define IRQ5 0x0020 +#define IRQ6 0x0040 +#define IRQ7 0x0080 +#define IRQ_SLAVE 0x0080 +#define IRQ8 0x0100 +#define IRQ9 0x0200 +#define IRQ10 0x0400 +#define IRQ11 0x0800 +#define IRQ12 0x1000 +#define IRQ13 0x2000 +#define IRQ14 0x4000 +#define IRQ15 0x8000 +#else #define IRQ0 0x0001 /* highest priority - timer */ #define IRQ1 0x0002 #define IRQ_SLAVE 0x0004 @@ -97,12 +116,6 @@ extern unsigned imen; /* interrupt mask enable */ #define IRQ5 0x0020 #define IRQ6 0x0040 #define IRQ7 0x0080 /* lowest - parallel printer */ - -#ifdef PC98 -#undef IRQ2 -#define IRQ2 0x0004 -#undef IRQ_SLAVE -#define IRQ_SLAVE 0x0080 #endif /* @@ -110,6 +123,15 @@ extern unsigned imen; /* interrupt mask enable */ */ #define ICU_OFFSET 32 /* 0-31 are processor exceptions */ +#ifdef PC98 +#define ICU_IMR_OFFSET 2 +#define ICU_SLAVEID 7 +#else +#define ICU_IMR_OFFSET 1 +#define ICU_SLAVEID 2 +#endif +#define ICU_EOI 0x20 + #ifdef APIC_IO /* 32-47: ISA IRQ0-IRQ15, 48-63: IO APIC IRQ16-IRQ31 */ diff --git a/sys/amd64/isa/icu_ipl.S b/sys/amd64/isa/icu_ipl.S index 36804aa8bd8..8cedbb4f4a6 100644 --- a/sys/amd64/isa/icu_ipl.S +++ b/sys/amd64/isa/icu_ipl.S @@ -47,12 +47,6 @@ imen: .long HWI_MASK .text SUPERALIGN_TEXT -#ifdef PC98 -#define MASK_OFFSET 2 -#else -#define MASK_OFFSET 1 -#endif - ENTRY(INTREN) movl 4(%esp), %eax movl %eax, %ecx @@ -61,12 +55,12 @@ ENTRY(INTREN) movl imen, %eax testb %cl, %cl je 1f - outb %al, $(IO_ICU1 + MASK_OFFSET) + outb %al, $(IO_ICU1 + ICU_IMR_OFFSET) 1: testb %ch, %ch je 2f shrl $8, %eax - outb %al, $(IO_ICU2 + MASK_OFFSET) + outb %al, $(IO_ICU2 + ICU_IMR_OFFSET) 2: ret @@ -77,11 +71,11 @@ ENTRY(INTRDIS) movl imen, %eax testb %cl, %cl je 1f - outb %al, $(IO_ICU1 + MASK_OFFSET) + outb %al, $(IO_ICU1 + ICU_IMR_OFFSET) 1: testb %ch, %ch je 2f shrl $8, %eax - outb %al, $(IO_ICU2 + MASK_OFFSET) + outb %al, $(IO_ICU2 + ICU_IMR_OFFSET) 2: ret diff --git a/sys/amd64/isa/icu_ipl.s b/sys/amd64/isa/icu_ipl.s index 36804aa8bd8..8cedbb4f4a6 100644 --- a/sys/amd64/isa/icu_ipl.s +++ b/sys/amd64/isa/icu_ipl.s @@ -47,12 +47,6 @@ imen: .long HWI_MASK .text SUPERALIGN_TEXT -#ifdef PC98 -#define MASK_OFFSET 2 -#else -#define MASK_OFFSET 1 -#endif - ENTRY(INTREN) movl 4(%esp), %eax movl %eax, %ecx @@ -61,12 +55,12 @@ ENTRY(INTREN) movl imen, %eax testb %cl, %cl je 1f - outb %al, $(IO_ICU1 + MASK_OFFSET) + outb %al, $(IO_ICU1 + ICU_IMR_OFFSET) 1: testb %ch, %ch je 2f shrl $8, %eax - outb %al, $(IO_ICU2 + MASK_OFFSET) + outb %al, $(IO_ICU2 + ICU_IMR_OFFSET) 2: ret @@ -77,11 +71,11 @@ ENTRY(INTRDIS) movl imen, %eax testb %cl, %cl je 1f - outb %al, $(IO_ICU1 + MASK_OFFSET) + outb %al, $(IO_ICU1 + ICU_IMR_OFFSET) 1: testb %ch, %ch je 2f shrl $8, %eax - outb %al, $(IO_ICU2 + MASK_OFFSET) + outb %al, $(IO_ICU2 + ICU_IMR_OFFSET) 2: ret diff --git a/sys/amd64/isa/icu_vector.S b/sys/amd64/isa/icu_vector.S index de369c179f5..1023635b2ae 100644 --- a/sys/amd64/isa/icu_vector.S +++ b/sys/amd64/isa/icu_vector.S @@ -3,18 +3,6 @@ * $FreeBSD$ */ -/* - * modified for PC98 by Kakefuda - */ - -#ifdef PC98 -#define ICU_IMR_OFFSET 2 /* IO_ICU{1,2} + 2 */ -#else -#define ICU_IMR_OFFSET 1 /* IO_ICU{1,2} + 1 */ -#endif - -#define ICU_EOI 0x20 /* XXX - define elsewhere */ - #define IRQ_BIT(irq_num) (1 << ((irq_num) % 8)) #define IRQ_LBIT(irq_num) (1 << (irq_num)) #define IRQ_BYTE(irq_num) ((irq_num) >> 3) diff --git a/sys/amd64/isa/icu_vector.s b/sys/amd64/isa/icu_vector.s index de369c179f5..1023635b2ae 100644 --- a/sys/amd64/isa/icu_vector.s +++ b/sys/amd64/isa/icu_vector.s @@ -3,18 +3,6 @@ * $FreeBSD$ */ -/* - * modified for PC98 by Kakefuda - */ - -#ifdef PC98 -#define ICU_IMR_OFFSET 2 /* IO_ICU{1,2} + 2 */ -#else -#define ICU_IMR_OFFSET 1 /* IO_ICU{1,2} + 1 */ -#endif - -#define ICU_EOI 0x20 /* XXX - define elsewhere */ - #define IRQ_BIT(irq_num) (1 << ((irq_num) % 8)) #define IRQ_LBIT(irq_num) (1 << (irq_num)) #define IRQ_BYTE(irq_num) ((irq_num) >> 3) diff --git a/sys/amd64/isa/intr_machdep.h b/sys/amd64/isa/intr_machdep.h index 8e1a828d90f..d24de2771db 100644 --- a/sys/amd64/isa/intr_machdep.h +++ b/sys/amd64/isa/intr_machdep.h @@ -208,14 +208,6 @@ inthand_t #endif /** TEST_TEST1 */ #endif /* SMP || APIC_IO */ -#ifdef PC98 -#define ICU_IMR_OFFSET 2 /* IO_ICU{1,2} + 2 */ -#define ICU_SLAVEID 7 -#else -#define ICU_IMR_OFFSET 1 /* IO_ICU{1,2} + 1 */ -#define ICU_SLAVEID 2 -#endif - #ifdef APIC_IO /* * This is to accommodate "mixed-mode" programming for diff --git a/sys/i386/isa/atpic_vector.s b/sys/i386/isa/atpic_vector.s index de369c179f5..1023635b2ae 100644 --- a/sys/i386/isa/atpic_vector.s +++ b/sys/i386/isa/atpic_vector.s @@ -3,18 +3,6 @@ * $FreeBSD$ */ -/* - * modified for PC98 by Kakefuda - */ - -#ifdef PC98 -#define ICU_IMR_OFFSET 2 /* IO_ICU{1,2} + 2 */ -#else -#define ICU_IMR_OFFSET 1 /* IO_ICU{1,2} + 1 */ -#endif - -#define ICU_EOI 0x20 /* XXX - define elsewhere */ - #define IRQ_BIT(irq_num) (1 << ((irq_num) % 8)) #define IRQ_LBIT(irq_num) (1 << (irq_num)) #define IRQ_BYTE(irq_num) ((irq_num) >> 3) diff --git a/sys/i386/isa/icu.h b/sys/i386/isa/icu.h index b73495a963a..82e084f467b 100644 --- a/sys/i386/isa/icu.h +++ b/sys/i386/isa/icu.h @@ -80,6 +80,25 @@ extern unsigned imen; /* interrupt mask enable */ /* * Interrupt enable bits - in normal order of priority (which we change) */ +#ifdef PC98 +#define IRQ0 0x0001 +#define IRQ1 0x0002 +#define IRQ2 0x0004 +#define IRQ3 0x0008 +#define IRQ4 0x0010 +#define IRQ5 0x0020 +#define IRQ6 0x0040 +#define IRQ7 0x0080 +#define IRQ_SLAVE 0x0080 +#define IRQ8 0x0100 +#define IRQ9 0x0200 +#define IRQ10 0x0400 +#define IRQ11 0x0800 +#define IRQ12 0x1000 +#define IRQ13 0x2000 +#define IRQ14 0x4000 +#define IRQ15 0x8000 +#else #define IRQ0 0x0001 /* highest priority - timer */ #define IRQ1 0x0002 #define IRQ_SLAVE 0x0004 @@ -97,12 +116,6 @@ extern unsigned imen; /* interrupt mask enable */ #define IRQ5 0x0020 #define IRQ6 0x0040 #define IRQ7 0x0080 /* lowest - parallel printer */ - -#ifdef PC98 -#undef IRQ2 -#define IRQ2 0x0004 -#undef IRQ_SLAVE -#define IRQ_SLAVE 0x0080 #endif /* @@ -110,6 +123,15 @@ extern unsigned imen; /* interrupt mask enable */ */ #define ICU_OFFSET 32 /* 0-31 are processor exceptions */ +#ifdef PC98 +#define ICU_IMR_OFFSET 2 +#define ICU_SLAVEID 7 +#else +#define ICU_IMR_OFFSET 1 +#define ICU_SLAVEID 2 +#endif +#define ICU_EOI 0x20 + #ifdef APIC_IO /* 32-47: ISA IRQ0-IRQ15, 48-63: IO APIC IRQ16-IRQ31 */ diff --git a/sys/i386/isa/icu_ipl.s b/sys/i386/isa/icu_ipl.s index 36804aa8bd8..8cedbb4f4a6 100644 --- a/sys/i386/isa/icu_ipl.s +++ b/sys/i386/isa/icu_ipl.s @@ -47,12 +47,6 @@ imen: .long HWI_MASK .text SUPERALIGN_TEXT -#ifdef PC98 -#define MASK_OFFSET 2 -#else -#define MASK_OFFSET 1 -#endif - ENTRY(INTREN) movl 4(%esp), %eax movl %eax, %ecx @@ -61,12 +55,12 @@ ENTRY(INTREN) movl imen, %eax testb %cl, %cl je 1f - outb %al, $(IO_ICU1 + MASK_OFFSET) + outb %al, $(IO_ICU1 + ICU_IMR_OFFSET) 1: testb %ch, %ch je 2f shrl $8, %eax - outb %al, $(IO_ICU2 + MASK_OFFSET) + outb %al, $(IO_ICU2 + ICU_IMR_OFFSET) 2: ret @@ -77,11 +71,11 @@ ENTRY(INTRDIS) movl imen, %eax testb %cl, %cl je 1f - outb %al, $(IO_ICU1 + MASK_OFFSET) + outb %al, $(IO_ICU1 + ICU_IMR_OFFSET) 1: testb %ch, %ch je 2f shrl $8, %eax - outb %al, $(IO_ICU2 + MASK_OFFSET) + outb %al, $(IO_ICU2 + ICU_IMR_OFFSET) 2: ret diff --git a/sys/i386/isa/icu_vector.s b/sys/i386/isa/icu_vector.s index de369c179f5..1023635b2ae 100644 --- a/sys/i386/isa/icu_vector.s +++ b/sys/i386/isa/icu_vector.s @@ -3,18 +3,6 @@ * $FreeBSD$ */ -/* - * modified for PC98 by Kakefuda - */ - -#ifdef PC98 -#define ICU_IMR_OFFSET 2 /* IO_ICU{1,2} + 2 */ -#else -#define ICU_IMR_OFFSET 1 /* IO_ICU{1,2} + 1 */ -#endif - -#define ICU_EOI 0x20 /* XXX - define elsewhere */ - #define IRQ_BIT(irq_num) (1 << ((irq_num) % 8)) #define IRQ_LBIT(irq_num) (1 << (irq_num)) #define IRQ_BYTE(irq_num) ((irq_num) >> 3) diff --git a/sys/i386/isa/intr_machdep.h b/sys/i386/isa/intr_machdep.h index 8e1a828d90f..d24de2771db 100644 --- a/sys/i386/isa/intr_machdep.h +++ b/sys/i386/isa/intr_machdep.h @@ -208,14 +208,6 @@ inthand_t #endif /** TEST_TEST1 */ #endif /* SMP || APIC_IO */ -#ifdef PC98 -#define ICU_IMR_OFFSET 2 /* IO_ICU{1,2} + 2 */ -#define ICU_SLAVEID 7 -#else -#define ICU_IMR_OFFSET 1 /* IO_ICU{1,2} + 1 */ -#define ICU_SLAVEID 2 -#endif - #ifdef APIC_IO /* * This is to accommodate "mixed-mode" programming for -- 2.45.2