From 2734050154927eaa63d3b65de5d46d05569b3a5b Mon Sep 17 00:00:00 2001 From: Olivier Houchard Date: Tue, 21 Sep 2021 15:49:45 +0200 Subject: [PATCH] arm64: Handle 32bits breakpoint exception. A different exception is raised when we hit a 32bits breakpoint, rather than a 64bits one, so handle those as well when COMPAT_FREEBSD32 is defined. This should fix SIGBUS at least when using breakpoints with thumb2 code. PR: 256468 MFC After: 1 week --- sys/arm64/arm64/trap.c | 3 +++ sys/arm64/include/armreg.h | 1 + 2 files changed, 4 insertions(+) diff --git a/sys/arm64/arm64/trap.c b/sys/arm64/arm64/trap.c index 40bad51e851..af17a6a2951 100644 --- a/sys/arm64/arm64/trap.c +++ b/sys/arm64/arm64/trap.c @@ -555,6 +555,9 @@ do_el0_sync(struct thread *td, struct trapframe *frame) break; case EXCP_BRKPT_EL0: case EXCP_BRK: +#ifdef COMPAT_FREEBSD32 + case EXCP_BRKPT_32: +#endif /* COMPAT_FREEBSD32 */ call_trapsignal(td, SIGTRAP, TRAP_BRKPT, (void *)frame->tf_elr, exception); userret(td, frame); diff --git a/sys/arm64/include/armreg.h b/sys/arm64/include/armreg.h index bc6d34cb3c1..bcbe9d13863 100644 --- a/sys/arm64/include/armreg.h +++ b/sys/arm64/include/armreg.h @@ -238,6 +238,7 @@ #define EXCP_SOFTSTP_EL1 0x33 /* Software Step, from same EL */ #define EXCP_WATCHPT_EL0 0x34 /* Watchpoint, from lower EL */ #define EXCP_WATCHPT_EL1 0x35 /* Watchpoint, from same EL */ +#define EXCP_BRKPT_32 0x38 /* 32bits breakpoint */ #define EXCP_BRK 0x3c /* Breakpoint */ /* ICC_CTLR_EL1 */ -- 2.45.0