From 2e7a9651654f4549dbc4cf53e3c167f3c029f61a Mon Sep 17 00:00:00 2001 From: marius Date: Wed, 21 Nov 2018 18:54:38 +0000 Subject: [PATCH] MFC: r340495 - Restore setting the clock for devices which support the default/legacy transfer mode only (lost with r321385). [1] - Similarly, don't try to set the power class on MMC devices that comply to version 4.0 of the system specification but are operated in default/ legacy transfer or 1-bit bus mode as no power class is specified for these cases. Trying to set a power class nevertheless resulted in an - albeit harmless - error message. PR: 231713 [1] git-svn-id: svn://svn.freebsd.org/base/stable/10@340741 ccf9f872-aa2e-dd11-9fc8-001c23d0bc1f --- sys/dev/mmc/mmc.c | 22 ++++++++++++++-------- 1 file changed, 14 insertions(+), 8 deletions(-) diff --git a/sys/dev/mmc/mmc.c b/sys/dev/mmc/mmc.c index 67b227c67..4e38eb502 100644 --- a/sys/dev/mmc/mmc.c +++ b/sys/dev/mmc/mmc.c @@ -829,9 +829,14 @@ mmc_set_power_class(struct mmc_softc *sc, struct mmc_ivars *ivar) const uint8_t *ext_csd; uint32_t clock; uint8_t value; + enum mmc_bus_timing timing; + enum mmc_bus_width bus_width; dev = sc->dev; - if (mmcbr_get_mode(dev) != mode_mmc || ivar->csd.spec_vers < 4) + timing = mmcbr_get_timing(dev); + bus_width = ivar->bus_width; + if (mmcbr_get_mode(dev) != mode_mmc || ivar->csd.spec_vers < 4 || + timing == bus_timing_normal || bus_width == bus_width_1) return (MMC_ERR_NONE); value = 0; @@ -842,8 +847,8 @@ mmc_set_power_class(struct mmc_softc *sc, struct mmc_ivars *ivar) if (clock <= MMC_TYPE_HS_26_MAX) value = ext_csd[EXT_CSD_PWR_CL_26_195]; else if (clock <= MMC_TYPE_HS_52_MAX) { - if (mmcbr_get_timing(dev) >= bus_timing_mmc_ddr52 && - ivar->bus_width >= bus_width_4) + if (timing >= bus_timing_mmc_ddr52 && + bus_width >= bus_width_4) value = ext_csd[EXT_CSD_PWR_CL_52_195_DDR]; else value = ext_csd[EXT_CSD_PWR_CL_52_195]; @@ -862,13 +867,13 @@ mmc_set_power_class(struct mmc_softc *sc, struct mmc_ivars *ivar) if (clock <= MMC_TYPE_HS_26_MAX) value = ext_csd[EXT_CSD_PWR_CL_26_360]; else if (clock <= MMC_TYPE_HS_52_MAX) { - if (mmcbr_get_timing(dev) == bus_timing_mmc_ddr52 && - ivar->bus_width >= bus_width_4) + if (timing == bus_timing_mmc_ddr52 && + bus_width >= bus_width_4) value = ext_csd[EXT_CSD_PWR_CL_52_360_DDR]; else value = ext_csd[EXT_CSD_PWR_CL_52_360]; } else if (clock <= MMC_TYPE_HS200_HS400ES_MAX) { - if (ivar->bus_width == bus_width_8) + if (bus_width == bus_width_8) value = ext_csd[EXT_CSD_PWR_CL_200_360_DDR]; else value = ext_csd[EXT_CSD_PWR_CL_200_360]; @@ -880,7 +885,7 @@ mmc_set_power_class(struct mmc_softc *sc, struct mmc_ivars *ivar) return (MMC_ERR_INVALID); } - if (ivar->bus_width == bus_width_8) + if (bus_width == bus_width_8) value = (value & EXT_CSD_POWER_CLASS_8BIT_MASK) >> EXT_CSD_POWER_CLASS_8BIT_SHIFT; else @@ -2166,7 +2171,7 @@ mmc_calculate_clock(struct mmc_softc *sc) for (i = 0; i < sc->child_count; i++) { ivar = device_get_ivars(sc->child_list[i]); if ((ivar->timings & ~(1 << bus_timing_normal)) == 0) - continue; + goto clock; rca = ivar->rca; if (mmc_select_card(sc, rca) != MMC_ERR_NONE) { @@ -2232,6 +2237,7 @@ mmc_calculate_clock(struct mmc_softc *sc) } } +clock: /* Set clock (must be done before initial tuning). */ mmcbr_set_clock(dev, max_dtr); mmcbr_update_ios(dev); -- 2.45.0