From 2f0afe4021bfed66a527f186aebcb21df62be0a9 Mon Sep 17 00:00:00 2001 From: jhb Date: Thu, 19 Nov 2015 19:40:30 +0000 Subject: [PATCH] MFC 290416: Chelsio T5 chips do not properly echo the No Snoop and Relaxed Ordering attributes when replying to a TLP from a Root Port. As a workaround, disable No Snoop and Relaxed Ordering in the Root Port of each T5 adapter during attach so that CPU-initiated requests do not contain these flags. Note that this affects CPU-initiated requests to all devices under this root port. Sponsored by: Chelsio git-svn-id: svn://svn.freebsd.org/base/stable/10@291083 ccf9f872-aa2e-dd11-9fc8-001c23d0bc1f --- sys/dev/cxgbe/t4_main.c | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/sys/dev/cxgbe/t4_main.c b/sys/dev/cxgbe/t4_main.c index 22a533309..de4a380b3 100644 --- a/sys/dev/cxgbe/t4_main.c +++ b/sys/dev/cxgbe/t4_main.c @@ -570,6 +570,33 @@ t5_probe(device_t dev) return (ENXIO); } +static void +t5_attribute_workaround(device_t dev) +{ + device_t root_port; + uint32_t v; + + /* + * The T5 chips do not properly echo the No Snoop and Relaxed + * Ordering attributes when replying to a TLP from a Root + * Port. As a workaround, find the parent Root Port and + * disable No Snoop and Relaxed Ordering. Note that this + * affects all devices under this root port. + */ + root_port = pci_find_pcie_root_port(dev); + if (root_port == NULL) { + device_printf(dev, "Unable to find parent root port\n"); + return; + } + + v = pcie_adjust_config(root_port, PCIER_DEVICE_CTL, + PCIEM_CTL_RELAXED_ORD_ENABLE | PCIEM_CTL_NOSNOOP_ENABLE, 0, 2); + if ((v & (PCIEM_CTL_RELAXED_ORD_ENABLE | PCIEM_CTL_NOSNOOP_ENABLE)) != + 0) + device_printf(dev, "Disabled No Snoop/Relaxed Ordering on %s\n", + device_get_nameunit(root_port)); +} + static int t4_attach(device_t dev) { @@ -588,6 +615,8 @@ t4_attach(device_t dev) sc->dev = dev; TUNABLE_INT_FETCH("hw.cxgbe.debug_flags", &sc->debug_flags); + if ((pci_get_device(dev) & 0xff00) == 0x5400) + t5_attribute_workaround(dev); pci_enable_busmaster(dev); if (pci_find_cap(dev, PCIY_EXPRESS, &i) == 0) { uint32_t v; -- 2.45.0