From 3bb092958e6ff243ab39b86b3b12a533b413463f Mon Sep 17 00:00:00 2001 From: hselasky Date: Mon, 14 Jul 2014 07:25:30 +0000 Subject: [PATCH] MFC r268354: Improve support for Intel Lynx Point USB 3.0 controllers by masking the port routing bits like done in Linux. git-svn-id: svn://svn.freebsd.org/base/stable/9@268602 ccf9f872-aa2e-dd11-9fc8-001c23d0bc1f --- sys/dev/usb/controller/xhci_pci.c | 3 +++ sys/dev/usb/controller/xhcireg.h | 2 ++ 2 files changed, 5 insertions(+) diff --git a/sys/dev/usb/controller/xhci_pci.c b/sys/dev/usb/controller/xhci_pci.c index 97ea42157..f8a44dfa1 100644 --- a/sys/dev/usb/controller/xhci_pci.c +++ b/sys/dev/usb/controller/xhci_pci.c @@ -147,6 +147,9 @@ xhci_pci_port_route(device_t self, uint32_t set, uint32_t clear) temp |= set; temp &= ~clear; + /* Don't set bits which the hardware doesn't support */ + temp &= pci_read_config(self, PCI_XHCI_INTEL_USB3PRM, 4); + pci_write_config(self, PCI_XHCI_INTEL_USB3_PSSEN, temp, 4); pci_write_config(self, PCI_XHCI_INTEL_XUSB2PR, temp, 4); diff --git a/sys/dev/usb/controller/xhcireg.h b/sys/dev/usb/controller/xhcireg.h index bd1d635cf..a0b739711 100644 --- a/sys/dev/usb/controller/xhcireg.h +++ b/sys/dev/usb/controller/xhcireg.h @@ -35,7 +35,9 @@ #define PCI_XHCI_FLADJ 0x61 /* RW frame length adjust */ #define PCI_XHCI_INTEL_XUSB2PR 0xD0 /* Intel USB2 Port Routing */ +#define PCI_XHCI_INTEL_USB2PRM 0xD4 /* Intel USB2 Port Routing Mask */ #define PCI_XHCI_INTEL_USB3_PSSEN 0xD8 /* Intel USB3 Port SuperSpeed Enable */ +#define PCI_XHCI_INTEL_USB3PRM 0xDC /* Intel USB3 Port Routing Mask */ /* XHCI capability registers */ #define XHCI_CAPLENGTH 0x00 /* RO capability */ -- 2.45.0