From 3ed2164344def950eedb454e5c7097134b7f8a84 Mon Sep 17 00:00:00 2001 From: kib Date: Thu, 24 May 2018 12:14:14 +0000 Subject: [PATCH] MFC r334004: Add definition for Intel Speculative Store Bypass Disable MSR bits. Security: CVE-2018-3639 Approved by: re (gjb) --- sys/x86/include/specialreg.h | 3 +++ sys/x86/x86/identcpu.c | 1 + 2 files changed, 4 insertions(+) diff --git a/sys/x86/include/specialreg.h b/sys/x86/include/specialreg.h index 9ca3d1a9a88..cdec63de9fe 100644 --- a/sys/x86/include/specialreg.h +++ b/sys/x86/include/specialreg.h @@ -388,10 +388,12 @@ #define CPUID_STDEXT3_IBPB 0x04000000 #define CPUID_STDEXT3_STIBP 0x08000000 #define CPUID_STDEXT3_ARCH_CAP 0x20000000 +#define CPUID_STDEXT3_SSBD 0x80000000 /* MSR IA32_ARCH_CAP(ABILITIES) bits */ #define IA32_ARCH_CAP_RDCL_NO 0x00000001 #define IA32_ARCH_CAP_IBRS_ALL 0x00000002 +#define IA32_ARCH_CAP_SSBD_NO 0x00000004 /* * CPUID manufacturers identifiers @@ -585,6 +587,7 @@ /* MSR IA32_SPEC_CTRL */ #define IA32_SPEC_CTRL_IBRS 0x00000001 #define IA32_SPEC_CTRL_STIBP 0x00000002 +#define IA32_SPEC_CTRL_SSBD 0x00000004 /* MSR IA32_PRED_CMD */ #define IA32_PRED_CMD_IBPB_BARRIER 0x0000000000000001ULL diff --git a/sys/x86/x86/identcpu.c b/sys/x86/x86/identcpu.c index 7f8603c9e46..515ad722cd6 100644 --- a/sys/x86/x86/identcpu.c +++ b/sys/x86/x86/identcpu.c @@ -989,6 +989,7 @@ printcpuinfo(void) "\033IBPB" "\034STIBP" "\036ARCH_CAP" + "\040SSBD" ); } -- 2.45.0