From 49aaa80401f4dc6a03b115ab44716724322c7bf6 Mon Sep 17 00:00:00 2001 From: Michal Meloun Date: Tue, 9 May 2017 11:05:32 +0000 Subject: [PATCH] Introduce pmap_remap_vm_attr(), it allows to remap one VM memattr class to another. This function is intent to be used as workaround for various SoC bugs, mainly access ordering/sequencing related bugs in crossbar fabric. Inspired by: https://reviews.freebsd.org/D10218 MFC after: 2 weeks --- sys/arm/arm/pmap-v6.c | 19 +++++++++++++++++++ sys/arm/include/pmap-v6.h | 1 + 2 files changed, 20 insertions(+) diff --git a/sys/arm/arm/pmap-v6.c b/sys/arm/arm/pmap-v6.c index 28ef0965207..7da59f9da9f 100644 --- a/sys/arm/arm/pmap-v6.c +++ b/sys/arm/arm/pmap-v6.c @@ -497,6 +497,25 @@ pmap_set_tex(void) tlb_flush_all_local(); } +/* + * Remap one vm_meattr class to another one. This can be useful as + * workaround for SOC errata, e.g. if devices must be accessed using + * SO memory class. + */ +void +pmap_remap_vm_attr(vm_memattr_t old_attr, vm_memattr_t new_attr) +{ + int old_idx, new_idx; + + /* Map VM memattrs to indexes to tex_class table. */ + old_idx = pte2_attr_tab[(int)old_attr]; + new_idx = pte2_attr_tab[(int)new_attr]; + + /* Replace TEX attribute and apply it. */ + tex_class[old_idx] = tex_class[new_idx]; + pmap_set_tex(); +} + /* * KERNBASE must be multiple of NPT2_IN_PG * PTE1_SIZE. In other words, * KERNBASE is mapped by first L2 page table in L2 page table page. It diff --git a/sys/arm/include/pmap-v6.h b/sys/arm/include/pmap-v6.h index 9c586155c12..0aaaa5c955b 100644 --- a/sys/arm/include/pmap-v6.h +++ b/sys/arm/include/pmap-v6.h @@ -188,6 +188,7 @@ vm_offset_t pmap_preboot_reserve_pages(u_int); vm_offset_t pmap_preboot_get_vpages(u_int); void pmap_preboot_map_attr(vm_paddr_t, vm_offset_t, vm_size_t, vm_prot_t, vm_memattr_t); +void pmap_remap_vm_attr(vm_memattr_t old_attr, vm_memattr_t new_attr); #endif /* _KERNEL */ #endif /* !_MACHINE_PMAP_V6_H_ */ -- 2.45.2