From 5e38b29306979acd4c06820d6fcde757240dc0dd Mon Sep 17 00:00:00 2001 From: bdragon Date: Wed, 23 Sep 2020 00:32:50 +0000 Subject: [PATCH] [PowerPC64LE] powernv ILE setup code. When running without a hypervisor, we need to set the ILE bit in the LPCR ourselves. For the boot processor, handle it in powernv_attach() like we do for other LPCR bits. No change for the APs, as they will use the lpcr global to set up their own LPCR when they do their own cpudep_ap_early_bootstrap() and pick up this automatically. Sponsored by: Tag1 Consulting, Inc. --- sys/powerpc/include/spr.h | 1 + sys/powerpc/powernv/platform_powernv.c | 4 ++++ 2 files changed, 5 insertions(+) diff --git a/sys/powerpc/include/spr.h b/sys/powerpc/include/spr.h index 4830a43ec45..f97b37bc72a 100644 --- a/sys/powerpc/include/spr.h +++ b/sys/powerpc/include/spr.h @@ -292,6 +292,7 @@ #define SPR_LPCR 0x13e /* .6. Logical Partitioning Control */ #define LPCR_LPES 0x008 /* Bit 60 */ #define LPCR_HVICE 0x002 /* Hypervisor Virtualization Interrupt (Arch 3.0) */ +#define LPCR_ILE (1ULL << 25) /* Interrupt Little-Endian (ISA 2.07) */ #define LPCR_UPRT (1ULL << 22) /* Use Process Table (ISA 3) */ #define LPCR_HR (1ULL << 20) /* Host Radix mode */ #define LPCR_PECE_DRBL (1ULL << 16) /* Directed Privileged Doorbell */ diff --git a/sys/powerpc/powernv/platform_powernv.c b/sys/powerpc/powernv/platform_powernv.c index c9f10c6e9cb..569ad6d9359 100644 --- a/sys/powerpc/powernv/platform_powernv.c +++ b/sys/powerpc/powernv/platform_powernv.c @@ -174,6 +174,10 @@ powernv_attach(platform_t plat) if (cpu_features2 & PPC_FEATURE2_ARCH_3_00) lpcr |= LPCR_HVICE; +#if BYTE_ORDER == LITTLE_ENDIAN + lpcr |= LPCR_ILE; +#endif + mtspr(SPR_LPCR, lpcr); isync(); -- 2.45.0