From 6030b0c672b55d099a1f4c3d18f119d1215b4324 Mon Sep 17 00:00:00 2001 From: Mark Johnston Date: Tue, 22 May 2018 15:38:51 +0000 Subject: [PATCH] Flush caches before initiating a microcode update on Intel CPUs. This apparently works around issues with updates of certain Broadwell CPUs. Reviewed by: emaste, kib, sbruno MFC after: 3 days Differential Revision: https://reviews.freebsd.org/D15520 --- sys/dev/cpuctl/cpuctl.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/sys/dev/cpuctl/cpuctl.c b/sys/dev/cpuctl/cpuctl.c index 2d10c7b7f77..1d0a97a7212 100644 --- a/sys/dev/cpuctl/cpuctl.c +++ b/sys/dev/cpuctl/cpuctl.c @@ -367,8 +367,10 @@ update_intel(int cpu, cpuctl_update_args_t *args, struct thread *td) rdmsr_safe(MSR_BIOS_SIGN, &rev0); /* Get current microcode revision. */ /* - * Perform update. + * Perform update. Flush caches first to work around seeingly + * undocumented errata applying to some Broadwell CPUs. */ + wbinvd(); wrmsr_safe(MSR_BIOS_UPDT_TRIG, (uintptr_t)(ptr)); wrmsr_safe(MSR_BIOS_SIGN, 0); -- 2.45.0