From 83feae78cc82f825018395f60200374953d28337 Mon Sep 17 00:00:00 2001 From: Alexander Motin Date: Thu, 14 Sep 2017 04:51:17 +0000 Subject: [PATCH] Add second entry to LUT on a link side in B2B mode. Each of two entries on a virtual side should have its counterpart on a peer's link side. MFC after: 1 week --- sys/dev/ntb/ntb_hw/ntb_hw_plx.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/sys/dev/ntb/ntb_hw/ntb_hw_plx.c b/sys/dev/ntb/ntb_hw/ntb_hw_plx.c index ced58818ff9..0f4feede5f9 100644 --- a/sys/dev/ntb/ntb_hw/ntb_hw_plx.c +++ b/sys/dev/ntb/ntb_hw/ntb_hw_plx.c @@ -197,8 +197,8 @@ ntb_plx_init(device_t dev) } } - /* Enable Link Interface LUT entry 0 for 0:0.0. */ - PNTX_WRITE(sc, 0xdb4, 1); + /* Enable Link Interface LUT entries 0/1 for peer 0/1. */ + PNTX_WRITE(sc, 0xdb4, 0x00090001); } /* @@ -631,13 +631,12 @@ ntb_plx_mw_set_trans_internal(device_t dev, unsigned mw_idx) val64 = 0; if (size > 0) val64 = (~(size - 1) & ~0xfffff); - val64 |= 0x4; + val64 |= 0xc; PNTX_WRITE(sc, 0xe8 + (mw->mw_bar - 2) * 4, val64); PNTX_WRITE(sc, 0xe8 + (mw->mw_bar - 2) * 4 + 4, val64 >> 32); /* Set Link Interface BAR address. */ val64 = 0x2000000000000000 * mw->mw_bar + off; - val64 |= 0x4; PNTX_WRITE(sc, PCIR_BAR(mw->mw_bar), val64); PNTX_WRITE(sc, PCIR_BAR(mw->mw_bar) + 4, val64 >> 32); } -- 2.45.0