From 8580bfe20ad108b37c61162f9b193ff13a43fab8 Mon Sep 17 00:00:00 2001 From: kib Date: Tue, 14 Aug 2018 17:49:52 +0000 Subject: [PATCH] MFC r337777: Add definitions related to the L1D flush operation capability and MSR. Approved by: so (insta-MFC) --- sys/x86/include/specialreg.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/sys/x86/include/specialreg.h b/sys/x86/include/specialreg.h index 4f6796f382a..960f50cafdf 100644 --- a/sys/x86/include/specialreg.h +++ b/sys/x86/include/specialreg.h @@ -387,6 +387,7 @@ */ #define CPUID_STDEXT3_IBPB 0x04000000 #define CPUID_STDEXT3_STIBP 0x08000000 +#define CPUID_STDEXT3_L1D_FLUSH 0x10000000 #define CPUID_STDEXT3_ARCH_CAP 0x20000000 #define CPUID_STDEXT3_SSBD 0x80000000 @@ -438,6 +439,7 @@ #define MSR_IA32_EXT_CONFIG 0x0ee /* Undocumented. Core Solo/Duo only */ #define MSR_MTRRcap 0x0fe #define MSR_IA32_ARCH_CAP 0x10a +#define MSR_IA32_FLUSH_CMD 0x10b #define MSR_BBL_CR_ADDR 0x116 #define MSR_BBL_CR_DECC 0x118 #define MSR_BBL_CR_CTL 0x119 @@ -592,6 +594,9 @@ /* MSR IA32_PRED_CMD */ #define IA32_PRED_CMD_IBPB_BARRIER 0x0000000000000001ULL +/* MSR IA32_FLUSH_CMD */ +#define IA32_FLUSH_CMD_L1D 0x00000001 + /* * PAT modes. */ -- 2.45.0