From 860e1711e2fab0ac232095ab547119a5e0fc7725 Mon Sep 17 00:00:00 2001 From: hselasky Date: Thu, 16 May 2019 18:17:38 +0000 Subject: [PATCH] MFC r347310: Expose per-lane counters before correction mechanism in mlx5en(4). Sponsored by: Mellanox Technologies --- sys/dev/mlx5/mlx5_en/en.h | 21 +++++++++++++++++++++ sys/dev/mlx5/mlx5_en/mlx5_en_main.c | 12 ++++++++++++ 2 files changed, 33 insertions(+) diff --git a/sys/dev/mlx5/mlx5_en/en.h b/sys/dev/mlx5/mlx5_en/en.h index 8a19cdf988e..fde3039c5ef 100644 --- a/sys/dev/mlx5/mlx5_en/en.h +++ b/sys/dev/mlx5/mlx5_en/en.h @@ -279,6 +279,24 @@ struct mlx5e_vport_stats { m(+1, u64, tx_stat_p4096to8191octets, "tx_stat_p4096to8191octets", "Bytes") \ m(+1, u64, tx_stat_p8192to10239octets, "tx_stat_p8192to10239octets", "Bytes") +#define MLX5E_PPORT_STATISTICAL_DEBUG(m) \ + m(+1, u64, phy_time_since_last_clear, "phy_time_since_last_clear", \ + "Time since last clear in milliseconds") \ + m(+1, u64, phy_received_bits, "phy_received_bits", \ + "Total amount of traffic received in bits before error correction") \ + m(+1, u64, phy_symbol_errors, "phy_symbol_errors", \ + "Total number of symbol errors before error correction") \ + m(+1, u64, phy_corrected_bits, "phy_corrected_bits", \ + "Total number of corrected bits ") \ + m(+1, u64, phy_corrected_bits_lane0, "phy_corrected_bits_lane0", \ + "Total number of corrected bits for lane 0") \ + m(+1, u64, phy_corrected_bits_lane1, "phy_corrected_bits_lane1", \ + "Total number of corrected bits for lane 1") \ + m(+1, u64, phy_corrected_bits_lane2, "phy_corrected_bits_lane2", \ + "Total number of corrected bits for lane 2") \ + m(+1, u64, phy_corrected_bits_lane3, "phy_corrected_bits_lane3", \ + "Total number of corrected bits for lane 3") + #define MLX5E_PPORT_PHYSICAL_LAYER_STATS_DEBUG(m) \ m(+1, u64, time_since_last_clear, "time_since_last_clear", \ "Time since the last counters clear event (msec)") \ @@ -521,6 +539,7 @@ struct mlx5e_vport_stats { MLX5E_PPORT_RFC2863_STATS_DEBUG(m) \ MLX5E_PPORT_PHYSICAL_LAYER_STATS_DEBUG(m) \ MLX5E_PPORT_ETHERNET_EXTENDED_STATS_DEBUG(m) \ + MLX5E_PPORT_STATISTICAL_DEBUG(m) \ MLX5E_PCIE_PERFORMANCE_COUNTERS_64(m) \ MLX5E_PCIE_PERFORMANCE_COUNTERS_32(m) \ MLX5E_PCIE_TIMERS_AND_STATES_COUNTERS_32(m) \ @@ -543,6 +562,8 @@ struct mlx5e_vport_stats { (0 MLX5E_PPORT_PHYSICAL_LAYER_STATS_DEBUG(MLX5E_STATS_COUNT)) #define MLX5E_PPORT_ETHERNET_EXTENDED_STATS_DEBUG_NUM \ (0 MLX5E_PPORT_ETHERNET_EXTENDED_STATS_DEBUG(MLX5E_STATS_COUNT)) +#define MLX5E_PPORT_STATISTICAL_DEBUG_NUM \ + (0 MLX5E_PPORT_STATISTICAL_DEBUG(MLX5E_STATS_COUNT)) #define MLX5E_PORT_STATS_DEBUG_NUM \ (0 MLX5E_PORT_STATS_DEBUG(MLX5E_STATS_COUNT)) diff --git a/sys/dev/mlx5/mlx5_en/mlx5_en_main.c b/sys/dev/mlx5/mlx5_en/mlx5_en_main.c index ccfef98c086..68a8bce31dc 100644 --- a/sys/dev/mlx5/mlx5_en/mlx5_en_main.c +++ b/sys/dev/mlx5/mlx5_en/mlx5_en_main.c @@ -769,6 +769,18 @@ mlx5e_update_pport_counters(struct mlx5e_priv *priv) for (x = 0; x != MLX5E_PPORT_ETHERNET_EXTENDED_STATS_DEBUG_NUM; x++, y++) s_debug->arg[y] = be64toh(ptr[x]); + /* read Extended Statistical Group */ + if (MLX5_CAP_GEN(mdev, pcam_reg) && + MLX5_CAP_PCAM_FEATURE(mdev, ppcnt_statistical_group) && + MLX5_CAP_PCAM_FEATURE(mdev, per_lane_error_counters)) { + /* read Extended Statistical counter group using predefined counter layout */ + MLX5_SET(ppcnt_reg, in, grp, MLX5_PHYSICAL_LAYER_STATISTICAL_GROUP); + mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPCNT, 0, 0); + + for (x = 0; x != MLX5E_PPORT_STATISTICAL_DEBUG_NUM; x++, y++) + s_debug->arg[y] = be64toh(ptr[x]); + } + /* read PCIE counters */ mlx5e_update_pcie_counters(priv); -- 2.45.0