From cb3c3e0a4267b9a9d913739044255a21b093c9a0 Mon Sep 17 00:00:00 2001 From: Emmanuel Vadot Date: Sun, 14 Nov 2021 11:18:41 +0100 Subject: [PATCH] pmic: rockchip: Split the clocks part in its own file No functional changes intended. --- sys/conf/files.arm64 | 1 + sys/dev/iicbus/pmic/rockchip/rk805.c | 115 --------------- sys/dev/iicbus/pmic/rockchip/rk8xx.h | 3 + sys/dev/iicbus/pmic/rockchip/rk8xx_clocks.c | 150 ++++++++++++++++++++ 4 files changed, 154 insertions(+), 115 deletions(-) create mode 100644 sys/dev/iicbus/pmic/rockchip/rk8xx_clocks.c diff --git a/sys/conf/files.arm64 b/sys/conf/files.arm64 index 8ad88488fff..6d73790801e 100644 --- a/sys/conf/files.arm64 +++ b/sys/conf/files.arm64 @@ -541,6 +541,7 @@ arm64/rockchip/rk_dwc3.c optional fdt rk_dwc3 soc_rockchip_rk3399 arm64/rockchip/rk_i2c.c optional fdt rk_i2c soc_rockchip_rk3328 | fdt rk_i2c soc_rockchip_rk3399 arm64/rockchip/rk_i2s.c optional fdt sound soc_rockchip_rk3328 | fdt sound soc_rockchip_rk3399 dev/iicbus/pmic/rockchip/rk805.c optional fdt rk805 soc_rockchip_rk3328 | fdt rk805 soc_rockchip_rk3399 +dev/iicbus/pmic/rockchip/rk8xx_clocks.c optional fdt rk805 soc_rockchip_rk3328 | fdt rk805 soc_rockchip_rk3399 dev/iicbus/pmic/rockchip/rk8xx_regulators.c optional fdt rk805 soc_rockchip_rk3328 | fdt rk805 soc_rockchip_rk3399 dev/iicbus/pmic/rockchip/rk8xx_rtc.c optional fdt rk805 soc_rockchip_rk3328 | fdt rk805 soc_rockchip_rk3399 arm64/rockchip/rk_grf.c optional fdt soc_rockchip_rk3328 | fdt soc_rockchip_rk3399 diff --git a/sys/dev/iicbus/pmic/rockchip/rk805.c b/sys/dev/iicbus/pmic/rockchip/rk805.c index ba5da4e9527..3f842ac8d3e 100644 --- a/sys/dev/iicbus/pmic/rockchip/rk805.c +++ b/sys/dev/iicbus/pmic/rockchip/rk805.c @@ -45,9 +45,6 @@ __FBSDID("$FreeBSD$"); #include #include -#include -#include - #include #include #include @@ -318,118 +315,6 @@ rk8xx_write(device_t dev, uint8_t reg, uint8_t *data, uint8_t size) return (iicdev_writeto(dev, reg, data, size, IIC_INTRWAIT)); } -/* -------------------------------------------------------------------------- */ - -/* Clock class and method */ -struct rk8xx_clk_sc { - device_t base_dev; -}; - -#define CLK32OUT_REG 0x20 -#define CLK32OUT_CLKOUT2_EN 1 - -static int -rk8xx_clk_set_gate_1(struct clknode *clk, bool enable) -{ - struct rk8xx_clk_sc *sc; - uint8_t val; - - sc = clknode_get_softc(clk); - - rk8xx_read(sc->base_dev, CLK32OUT_REG, &val, sizeof(val)); - if (enable) - val |= CLK32OUT_CLKOUT2_EN; - else - val &= ~CLK32OUT_CLKOUT2_EN; - rk8xx_write(sc->base_dev, CLK32OUT_REG, &val, 1); - - return (0); -} - -static int -rk8xx_clk_recalc(struct clknode *clk, uint64_t *freq) -{ - - *freq = 32768; - return (0); -} - -static clknode_method_t rk8xx_clk_clknode_methods_0[] = { - CLKNODEMETHOD(clknode_recalc_freq, rk8xx_clk_recalc), - CLKNODEMETHOD_END -}; - -DEFINE_CLASS_1(rk8xx_clk_clknode_0, rk8xx_clk_clknode_class_0, - rk8xx_clk_clknode_methods_0, sizeof(struct rk8xx_clk_sc), - clknode_class); - -static clknode_method_t rk8xx_clk_clknode_methods_1[] = { - CLKNODEMETHOD(clknode_set_gate, rk8xx_clk_set_gate_1), - CLKNODEMETHOD_END -}; - -DEFINE_CLASS_1(rk8xx_clk_clknode_1, rk8xx_clk_clknode_class_1, - rk8xx_clk_clknode_methods_1, sizeof(struct rk8xx_clk_sc), - rk8xx_clk_clknode_class_0); - -static int -rk8xx_export_clocks(device_t dev) -{ - struct clkdom *clkdom; - struct clknode_init_def clkidef; - struct clknode *clk; - struct rk8xx_clk_sc *clksc; - const char **clknames; - phandle_t node; - int nclks, rv; - - node = ofw_bus_get_node(dev); - - /* clock-output-names are optional. Could use them for clkidef.name. */ - nclks = ofw_bus_string_list_to_array(node, "clock-output-names", - &clknames); - - clkdom = clkdom_create(dev); - - memset(&clkidef, 0, sizeof(clkidef)); - clkidef.id = 0; - clkidef.name = (nclks = 2) ? clknames[0] : "clk32kout1"; - clk = clknode_create(clkdom, &rk8xx_clk_clknode_class_0, &clkidef); - if (clk == NULL) { - device_printf(dev, "Cannot create '%s'.\n", clkidef.name); - return (ENXIO); - } - clksc = clknode_get_softc(clk); - clksc->base_dev = dev; - clknode_register(clkdom, clk); - - memset(&clkidef, 0, sizeof(clkidef)); - clkidef.id = 1; - clkidef.name = (nclks = 2) ? clknames[1] : "clk32kout2"; - clk = clknode_create(clkdom, &rk8xx_clk_clknode_class_1, &clkidef); - if (clk == NULL) { - device_printf(dev, "Cannot create '%s'.\n", clkidef.name); - return (ENXIO); - } - clksc = clknode_get_softc(clk); - clksc->base_dev = dev; - clknode_register(clkdom, clk); - - rv = clkdom_finit(clkdom); - if (rv != 0) { - device_printf(dev, "Cannot finalize clkdom initialization: " - "%d\n", rv); - return (ENXIO); - } - - if (bootverbose) - clkdom_dump(clkdom); - - return (0); -} - -/* -------------------------------------------------------------------------- */ - static int rk8xx_probe(device_t dev) { diff --git a/sys/dev/iicbus/pmic/rockchip/rk8xx.h b/sys/dev/iicbus/pmic/rockchip/rk8xx.h index 8dc186beb5d..83e39b06b07 100644 --- a/sys/dev/iicbus/pmic/rockchip/rk8xx.h +++ b/sys/dev/iicbus/pmic/rockchip/rk8xx.h @@ -102,6 +102,9 @@ struct rk8xx_softc { int rk8xx_read(device_t dev, uint8_t reg, uint8_t *data, uint8_t size); int rk8xx_write(device_t dev, uint8_t reg, uint8_t *data, uint8_t size); +/* rk8xx_clocks.c */ +int rk8xx_export_clocks(device_t dev); + /* rk8xx_regulators.c */ struct rk8xx_reg_sc *rk8xx_reg_attach(device_t dev, phandle_t node, struct rk8xx_regdef *def); diff --git a/sys/dev/iicbus/pmic/rockchip/rk8xx_clocks.c b/sys/dev/iicbus/pmic/rockchip/rk8xx_clocks.c new file mode 100644 index 00000000000..7f28e18a5d7 --- /dev/null +++ b/sys/dev/iicbus/pmic/rockchip/rk8xx_clocks.c @@ -0,0 +1,150 @@ +/*- + * SPDX-License-Identifier: BSD-2-Clause-FreeBSD + * + * Copyright (c) 2018-2021 Emmanuel Vadot + * Copyright (c) 2021 Bjoern A. Zeeb + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include + +#include +#include + +#include + +#include + +/* Clock class and method */ +struct rk8xx_clk_sc { + device_t base_dev; +}; + +#define CLK32OUT_REG 0x20 +#define CLK32OUT_CLKOUT2_EN 1 + +static int +rk8xx_clk_set_gate_1(struct clknode *clk, bool enable) +{ + struct rk8xx_clk_sc *sc; + uint8_t val; + + sc = clknode_get_softc(clk); + + rk8xx_read(sc->base_dev, CLK32OUT_REG, &val, sizeof(val)); + if (enable) + val |= CLK32OUT_CLKOUT2_EN; + else + val &= ~CLK32OUT_CLKOUT2_EN; + rk8xx_write(sc->base_dev, CLK32OUT_REG, &val, 1); + + return (0); +} + +static int +rk8xx_clk_recalc(struct clknode *clk, uint64_t *freq) +{ + + *freq = 32768; + return (0); +} + +static clknode_method_t rk8xx_clk_clknode_methods_0[] = { + CLKNODEMETHOD(clknode_recalc_freq, rk8xx_clk_recalc), + CLKNODEMETHOD_END +}; + +DEFINE_CLASS_1(rk8xx_clk_clknode_0, rk8xx_clk_clknode_class_0, + rk8xx_clk_clknode_methods_0, sizeof(struct rk8xx_clk_sc), + clknode_class); + +static clknode_method_t rk8xx_clk_clknode_methods_1[] = { + CLKNODEMETHOD(clknode_set_gate, rk8xx_clk_set_gate_1), + CLKNODEMETHOD_END +}; + +DEFINE_CLASS_1(rk8xx_clk_clknode_1, rk8xx_clk_clknode_class_1, + rk8xx_clk_clknode_methods_1, sizeof(struct rk8xx_clk_sc), + rk8xx_clk_clknode_class_0); + +int +rk8xx_export_clocks(device_t dev) +{ + struct clkdom *clkdom; + struct clknode_init_def clkidef; + struct clknode *clk; + struct rk8xx_clk_sc *clksc; + const char **clknames; + phandle_t node; + int nclks, rv; + + node = ofw_bus_get_node(dev); + + /* clock-output-names are optional. Could use them for clkidef.name. */ + nclks = ofw_bus_string_list_to_array(node, "clock-output-names", + &clknames); + + clkdom = clkdom_create(dev); + + memset(&clkidef, 0, sizeof(clkidef)); + clkidef.id = 0; + clkidef.name = (nclks = 2) ? clknames[0] : "clk32kout1"; + clk = clknode_create(clkdom, &rk8xx_clk_clknode_class_0, &clkidef); + if (clk == NULL) { + device_printf(dev, "Cannot create '%s'.\n", clkidef.name); + return (ENXIO); + } + clksc = clknode_get_softc(clk); + clksc->base_dev = dev; + clknode_register(clkdom, clk); + + memset(&clkidef, 0, sizeof(clkidef)); + clkidef.id = 1; + clkidef.name = (nclks = 2) ? clknames[1] : "clk32kout2"; + clk = clknode_create(clkdom, &rk8xx_clk_clknode_class_1, &clkidef); + if (clk == NULL) { + device_printf(dev, "Cannot create '%s'.\n", clkidef.name); + return (ENXIO); + } + clksc = clknode_get_softc(clk); + clksc->base_dev = dev; + clknode_register(clkdom, clk); + + rv = clkdom_finit(clkdom); + if (rv != 0) { + device_printf(dev, "Cannot finalize clkdom initialization: " + "%d\n", rv); + return (ENXIO); + } + + if (bootverbose) + clkdom_dump(clkdom); + + return (0); +} -- 2.45.0