From fb350a0d6aa08e299d5b0fbc27fcabec23c9fca0 Mon Sep 17 00:00:00 2001
From: Olivier Houchard <cognet@FreeBSD.org>
Date: Tue, 23 May 2006 12:14:14 +0000
Subject: [PATCH] Use pmap_devmap_bootstrap(), instead of mapping the SACOM1
 registers with pmap_map_entry. More use of macros instead of hardcoding the
 addr.

Submitted by:	kevlo
---
 sys/arm/sa11x0/assabet_machdep.c | 36 +++++++++++++++++++++++++++-----
 sys/arm/sa11x0/sa11x0_io.c       |  7 +++++++
 sys/arm/sa11x0/sa11x0_reg.h      |  2 ++
 sys/arm/sa11x0/uart_cpu_sa1110.c |  3 ++-
 4 files changed, 42 insertions(+), 6 deletions(-)

diff --git a/sys/arm/sa11x0/assabet_machdep.c b/sys/arm/sa11x0/assabet_machdep.c
index ccf7ae0090a..dbf34cc0319 100644
--- a/sys/arm/sa11x0/assabet_machdep.c
+++ b/sys/arm/sa11x0/assabet_machdep.c
@@ -156,6 +156,35 @@ struct pv_addr kernelstack;
 void enable_mmu(vm_offset_t);
 static struct trapframe proc0_tf;
 
+/* Static device mappings. */
+static const struct pmap_devmap assabet_devmap[] = {
+	/*
+	 * Map the on-board devices VA == PA so that we can access them
+	 * with the MMU on or off.
+	 */
+	{
+		SACOM1_VBASE,
+		SACOM1_BASE,
+		SACOM1_SIZE,
+		VM_PROT_READ|VM_PROT_WRITE,
+		PTE_NOCACHE,
+	},
+	{
+		SAIPIC_BASE,
+		SAIPIC_BASE,
+		SAIPIC_SIZE,
+		VM_PROT_READ|VM_PROT_WRITE,
+		PTE_NOCACHE,
+	},
+	{
+		0,
+		0,
+		0,
+		0,
+		0,
+	}
+};
+
 struct arm32_dma_range *
 bus_dma_get_range(void)
 {
@@ -336,11 +365,8 @@ initarm(void *arg, void *arg2)
 	/* Map the vector page. */
 	pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa,
 	    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
-	/* Map SACOM1. */
-	pmap_map_entry(l1pagetable, SACOM1_VBASE, SACOM1_BASE, 
-	    VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
-	pmap_map_entry(l1pagetable, 0x90050000, 0x90050000,
-	    VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
+	/* Map the statically mapped devices. */
+	pmap_devmap_bootstrap(l1pagetable, assabet_devmap);
 	pmap_map_chunk(l1pagetable, sa1_cache_clean_addr, 0xf0000000, 
 	    CPU_SA110_CACHE_CLEAN_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
 
diff --git a/sys/arm/sa11x0/sa11x0_io.c b/sys/arm/sa11x0/sa11x0_io.c
index 964e18257cf..4c64bcf633f 100644
--- a/sys/arm/sa11x0/sa11x0_io.c
+++ b/sys/arm/sa11x0/sa11x0_io.c
@@ -146,6 +146,13 @@ sa11x0_bs_map(t, bpa, size, cacheable, bshp)
 	u_long startpa, endpa, pa;
 	vm_offset_t va;
 	pt_entry_t *pte;
+	const struct pmap_devmap *pd;
+
+	if ((pd = pmap_devmap_find_pa(bpa, size)) != NULL) {
+		/* Device was statically mapped. */
+		*bshp = pd->pd_va + (bpa - pd->pd_pa);
+		return 0;
+	}
 
 	startpa = trunc_page(bpa);
 	endpa = round_page(bpa + size);
diff --git a/sys/arm/sa11x0/sa11x0_reg.h b/sys/arm/sa11x0/sa11x0_reg.h
index fdc27532c97..2bd065aff7c 100644
--- a/sys/arm/sa11x0/sa11x0_reg.h
+++ b/sys/arm/sa11x0/sa11x0_reg.h
@@ -48,9 +48,11 @@
 #define SARCR_BASE		0x90030000	/* Reset Controller */
 #define SAGPIO_BASE		0x90040000	/* GPIO */
 #define SAIPIC_BASE		0x90050000	/* Interrupt Controller */
+#define SAIPIC_SIZE		0x24
 #define SAPPC_BASE		0x90060000	/* Peripheral Pin Controller */
 #define SAUDC_BASE		0x80000000	/* USB Device Controller*/
 #define	SACOM1_BASE		0x80010000	/* GPCLK/UART 1 */
+#define SACOM1_SIZE		0x24
 #define SACOM3_HW_BASE		0x80050000	/* UART 3  */
 #define SAMCP_BASE		0x80060000	/* MCP Controller */
 #define SASSP_BASE		0x80070000	/* Synchronous serial port */
diff --git a/sys/arm/sa11x0/uart_cpu_sa1110.c b/sys/arm/sa11x0/uart_cpu_sa1110.c
index ef0cf6abf1b..e8b548bb851 100644
--- a/sys/arm/sa11x0/uart_cpu_sa1110.c
+++ b/sys/arm/sa11x0/uart_cpu_sa1110.c
@@ -36,6 +36,7 @@ __FBSDID("$FreeBSD$");
 #include <dev/uart/uart.h>
 #include <dev/uart/uart_cpu.h>
 
+#include <arm/sa11x0/sa11x0_reg.h>
 #include <arm/sa11x0/sa11x0_var.h>
 
 bus_space_tag_t uart_bus_space_io;
@@ -57,7 +58,7 @@ uart_cpu_getdev(int devtype, struct uart_devinfo *di)
 	di->ops = uart_sa1110_ops;
 	di->bas.chan = 0;
 	di->bas.bst = &sa11x0_bs_tag;
-	di->bas.bsh = 0x80010000;
+	di->bas.bsh = SACOM1_BASE;
 	di->bas.regshft = 0;
 	di->bas.rclk = 0;
 	di->baudrate = 9600;
-- 
2.45.2