From a3833b88b15499ff5979c36a9ca7113754775ab6 Mon Sep 17 00:00:00 2001 From: Hans Petter Selasky Date: Mon, 7 Oct 2019 13:13:06 +0000 Subject: [PATCH] MFS r353184, r353186, r353188, r353190, r353192, r353194, r353196, r353198, r353200, r353203, r353205, r353207, r353209, r353211, r353213, r353215, r353217, r353219, r353221, r353223, r353225, r353227, r353229, r353231, r353233, r353235, r353237, r353239, r353241, r353243, r353245, r353247, r353249, r353251, r353253, r353255, r353257, r353259, r353261, r353263, r353265 and r353267: Update mlx5core, mlx5en(4) and mlx5ib(4). Sponsored by: Mellanox Technologies Approved by: re (gjb) MFC r352956: Fix reported max SGE calculation in mlx5ib. Add the 512 bytes limit of RDMA READ and the size of remote address to the max SGE calculation. Linux commit: 288c01b746aa MFC r352957: Update warning and error print formats in mlx5ib. MFC r352958: Make sure the number of IRQ vectors doesn't exceed 256 in mlx5core. The "intr" field in "struct mlx5_ifc_eqc_bits" is only 8 bits wide. MFC r352959: Check return value of mlx5_vector2eqn() function in mlx5en. MFC r352960: Fix for missing cleanup code in error case in mlx5en. MFC r352961: Implement macro for asserting priv lock in mlx5en. MFC r352962: Add support for Multi-Physical Function Switch, MPFS, in mlx5en. MPFS is a logical switch in the Mellanox device which forward packets based on a hardware driven L2 address table, to one or more physical- or virtual- functions. The physical- or virtual- function is required to tell the MPFS by using the MPFS firmware commands, which unicast MAC addresses it is requesting from the physical port's traffic. Broadcast and multicast traffic however, is copied to all listening physical- and virtual- functions and does not need a rule in the MPFS switching table. Linux commit: eeb66cdb682678bfd1f02a4547e3649b38ffea7e MFC r352963: Cleanup naming of IRQ vectors in mlx5en. Remove unused IRQ naming functions and arrays. MFC r352964: Export channel IRQ number as part of the "hw_ctx_debug" sysctl(8) in mlx5en(4). MFC r352965: Correct and update some counter names in mlx5en(4). MFC r352966: Add port module event software counters in mlx5core. While at it, fixup PME based on latest PRM defines. MFC r352967: Make the mlx5_vsc_wait_on_flag(9) function global. MFC r352968: Move mlx5_ifc_vsc_space_bits and mlx5_ifc_vsc_addr_bits to mlx5_ifc.h. MFC r352969: Use the MLX5_VSC_DOMAIN_SEMAPHORES constant instead of hand-rolled symbol in mlx5core. MFC r352970: Define MLX5_VSC_DOMAIN_SCAN_CRSPACE. MFC r352971: Read rege map from crdump scan space in mlx5core. MFC r352972: Remove no longer needed fwdump register tables from mlx5core. MFC r352973: Add missing blank line at the end of the print in mlx5core. MFC r352974: Add proper print in case of 0x0 health syndrome in mlx5core. In case of health counter fails to increment it indicates a bad device health. In case when the syndrome indicated by firmware is 0x0, this indicates that firmware is unable to respond to initialization segment reads. Add proper print in this case. MFC r352975: Unify prints in mlx5core. All prints in mlx5core should use on of the macros: mlx5_core_err/dbg/warn MFC r352976: Unify prints in mlx5en(4). All prints in mlx5en(4) should use on of the macros: mlx5_en_err/dbg/warn MFC r352977: Sort the ports registers definitions numerically in mlx5core. MFC r352978: Add definition for the Port Buffer Status Register in mlx5core. MFC r352979: Update definitons for PPTB and PBMC registers layouts in mlx5core. MFC r352980: Add mlx5e_dbg() compatibility macro. MFC r352981: Import Linux code to query/set buffer state in mlx5en(4). MFC r352982: Add support for buffer parameter manipulations in mlx5en(4). The following sysctls are added: dev.mce.N.conf.qos.cable_length dev.mce.N.conf.qos.buffers_size dev.mce.N.conf.qos.buffers_prio MFC r352983 and r353001: Move EEPROM information query from a sysctl in mlx5en(4) to an ioctl in mlx5core. The EEPROM information is not only a property of the mlx5en(4) driver. MFC r352984: Add the ability to query the EEPROM information in mlx5tool(8). MFC r352985: Add sysctl(8) to get and set forward error correction, FEC, configuration in mlx5en(4). MFC r352986: Return an error from ioctl(MLX5_FW_RESET) if reset was rejected in mlx5core. MFC r352987: Remove mkey_be from channel structure in mlx5en(4). Use value from priv structure instead. This saves some space in the channel structure. MFC r352988: Remove unused cpu field from channel structure in mlx5en(4). MFC r352989: Seal transmit path with regards to using destroyed mutex in mlx5en(4). It may happen during link down that the running state may be observed non-zero in the transmit routine, right before the running state is cleared. This may end up using a destroyed mutex. Make all channel mutexes and callouts persistant. Preserve receive and send queue statistics during link toggle. MFC r352991 and 353000: Wait for FW readiness before initializing command interface in mlx5core. Before attempting to initialize the command interface we must wait till the fw_initializing bit is clear. If we fail to meet this condition the hardware will drop our configuration, specifically the descriptors page address. This scenario can happen when the firmware is still executing an FLR flow and did not finish yet so the driver needs to wait for that to finish. Linux commits: 6c780a0267b8 b8a92577f4be. MFC r352992: Use size_t for byte_to_write variable when comparing to eeprom_info_out_len which is also size_t in mlx5tool(8). MFC r352993: Randomize the delay when waiting for VSC flag in mlx5core. The PRM suggests random 0 - 10ms to prevent multiple waiters on the same interval in order to avoid starvation. MFC r352994: Improve mlx5_fwdump_prep logging in mlx5core. MFC r352995: Only update lossy buffers config when manual PFC configuration was done in mlx5en(4). MFC r352996: Add print to show user a reason for rejecting buffer size change in mlx5en(4). MFC r352997: Print numeric error_type and module_status in mlx5core in case the strings are not available. MFC r352998: Bump driver version for mlx5core, mlx5en(4) and mlx5ib(4). --- share/man/man4/mlx5io.4 | 29 +- sys/conf/files | 6 +- sys/dev/mlx5/device.h | 13 +- sys/dev/mlx5/diagnostics.h | 17 + sys/dev/mlx5/driver.h | 38 +- sys/dev/mlx5/mlx5_core/mlx5_cmd.c | 19 +- sys/dev/mlx5/mlx5_core/mlx5_core.h | 21 +- sys/dev/mlx5/mlx5_core/mlx5_diagnostics.c | 156 + sys/dev/mlx5/mlx5_core/mlx5_eq.c | 58 +- sys/dev/mlx5/mlx5_core/mlx5_fs_tree.c | 21 +- sys/dev/mlx5/mlx5_core/mlx5_fw.c | 2 +- sys/dev/mlx5/mlx5_core/mlx5_fwdump.c | 174 +- sys/dev/mlx5/mlx5_core/mlx5_fwdump_regmaps.c | 11187 ----------------- sys/dev/mlx5/mlx5_core/mlx5_health.c | 120 +- sys/dev/mlx5/mlx5_core/mlx5_main.c | 289 +- sys/dev/mlx5/mlx5_core/mlx5_mpfs.c | 127 + sys/dev/mlx5/mlx5_core/mlx5_port.c | 227 +- sys/dev/mlx5/mlx5_core/mlx5_vsc.c | 25 +- sys/dev/mlx5/mlx5_en/en.h | 104 +- sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c | 706 +- sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c | 155 +- sys/dev/mlx5/mlx5_en/mlx5_en_main.c | 324 +- sys/dev/mlx5/mlx5_en/mlx5_en_port_buffer.c | 338 + sys/dev/mlx5/mlx5_en/mlx5_en_rl.c | 15 +- sys/dev/mlx5/mlx5_en/mlx5_en_txrx.c | 4 +- sys/dev/mlx5/mlx5_en/port_buffer.h | 82 + sys/dev/mlx5/mlx5_ib/mlx5_ib.h | 4 +- sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c | 12 +- sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c | 29 +- sys/dev/mlx5/mlx5_ifc.h | 114 +- sys/dev/mlx5/mlx5io.h | 8 + sys/dev/mlx5/mpfs.h | 37 + sys/dev/mlx5/port.h | 46 +- sys/modules/mlx5/Makefile | 2 +- sys/modules/mlx5en/Makefile | 1 + usr.sbin/mlx5tool/mlx5tool.8 | 33 +- usr.sbin/mlx5tool/mlx5tool.c | 92 +- 37 files changed, 2637 insertions(+), 11998 deletions(-) delete mode 100644 sys/dev/mlx5/mlx5_core/mlx5_fwdump_regmaps.c create mode 100644 sys/dev/mlx5/mlx5_core/mlx5_mpfs.c create mode 100644 sys/dev/mlx5/mlx5_en/mlx5_en_port_buffer.c create mode 100644 sys/dev/mlx5/mlx5_en/port_buffer.h create mode 100644 sys/dev/mlx5/mpfs.h diff --git a/share/man/man4/mlx5io.4 b/share/man/man4/mlx5io.4 index 8b30d17c76e..5057ee35620 100644 --- a/share/man/man4/mlx5io.4 +++ b/share/man/man4/mlx5io.4 @@ -25,18 +25,18 @@ .\" .\" $FreeBSD$ .\" -.Dd May 7, 2019 +.Dd October 2, 2019 .Dt mlx5io 4 .Os .Sh NAME .Nm mlx5io -.Nd IOCTL interface to manage Connect-X 4/5 Mellanox network adapters +.Nd IOCTL interface to manage Connect-X 4/5/6 Mellanox network adapters .Sh SYNOPSIS .In dev/mlx5/mlx5io.h .Sh DESCRIPTION The .Nm -interface is provided for management of the Connect-X 4 and 5 network adapters +interface is provided for management of the Connect-X4, 5 and 6 network adapters in the aspects not covered by the generic network configuration, mostly related to the PCIe attachment and internal card working. Interface consists of the commands, which are passed by means of @@ -147,6 +147,29 @@ Requests PCIe link-level reset on the device. The address of the device is specified by the .Vt struct mlx5_tool_addr structure, which should be passed as an argument. +.It Dv MLX5_EEPROM_GET +Fetch EEPROM information. +The argument to the command should point to the input/output +.Vt struct mlx5_eeprom_get +structure where, the +.Dv devaddr +field specifies the address of the device. +.Bd -literal +struct mlx5_eeprom_get { + struct mlx5_tool_addr devaddr; + size_t eeprom_info_page_valid; + uint32_t *eeprom_info_buf; + size_t eeprom_info_out_len; +}; +.Ed +.Pp +On successfull return, the +.Dv eeprom_info_out_len +field reports the length of the EEPROM information. +.Dv eeprom_info_buf +field contains the actual EEPROM information. +.Dv eeprom_info_page_valid +field reports the third page validity. .El .Sh FILES The diff --git a/sys/conf/files b/sys/conf/files index 28265dfca38..b6e6357a4dd 100644 --- a/sys/conf/files +++ b/sys/conf/files @@ -4800,8 +4800,6 @@ dev/mlx5/mlx5_core/mlx5_fw.c optional mlx5 pci \ compile-with "${OFED_C}" dev/mlx5/mlx5_core/mlx5_fwdump.c optional mlx5 pci \ compile-with "${OFED_C}" -dev/mlx5/mlx5_core/mlx5_fwdump_regmaps.c optional mlx5 pci \ - compile-with "${OFED_C}" dev/mlx5/mlx5_core/mlx5_health.c optional mlx5 pci \ compile-with "${OFED_C}" dev/mlx5/mlx5_core/mlx5_mad.c optional mlx5 pci \ @@ -4810,6 +4808,8 @@ dev/mlx5/mlx5_core/mlx5_main.c optional mlx5 pci \ compile-with "${OFED_C}" dev/mlx5/mlx5_core/mlx5_mcg.c optional mlx5 pci \ compile-with "${OFED_C}" +dev/mlx5/mlx5_core/mlx5_mpfs.c optional mlx5 pci \ + compile-with "${OFED_C}" dev/mlx5/mlx5_core/mlx5_mr.c optional mlx5 pci \ compile-with "${OFED_C}" dev/mlx5/mlx5_core/mlx5_pagealloc.c optional mlx5 pci \ @@ -4853,6 +4853,8 @@ dev/mlx5/mlx5_en/mlx5_en_rl.c optional mlx5en pci inet inet6 \ compile-with "${OFED_C}" dev/mlx5/mlx5_en/mlx5_en_txrx.c optional mlx5en pci inet inet6 \ compile-with "${OFED_C}" +dev/mlx5/mlx5_en/mlx5_en_port_buffer.c optional mlx5en pci inet inet6 \ + compile-with "${OFED_C}" # crypto support opencrypto/cast.c optional crypto | ipsec | ipsec_support diff --git a/sys/dev/mlx5/device.h b/sys/dev/mlx5/device.h index d308e287954..f1e8c3f9e93 100644 --- a/sys/dev/mlx5/device.h +++ b/sys/dev/mlx5/device.h @@ -32,8 +32,10 @@ #include #include -#define FW_INIT_TIMEOUT_MILI 2000 -#define FW_INIT_WAIT_MS 2 +#define FW_INIT_TIMEOUT_MILI 2000 +#define FW_INIT_WAIT_MS 2 +#define FW_PRE_INIT_TIMEOUT_MILI 120000 +#define FW_INIT_WARN_MESSAGE_INTERVAL 20000 #if defined(__LITTLE_ENDIAN) #define MLX5_SET_HOST_ENDIANNESS 0 @@ -537,7 +539,7 @@ enum { MLX5_MODULE_STATUS_PLUGGED_ENABLED = 0x1, MLX5_MODULE_STATUS_UNPLUGGED = 0x2, MLX5_MODULE_STATUS_ERROR = 0x3, - MLX5_MODULE_STATUS_PLUGGED_DISABLED = 0x4, + MLX5_MODULE_STATUS_NUM , }; enum { @@ -549,7 +551,7 @@ enum { MLX5_MODULE_EVENT_ERROR_UNSUPPORTED_CABLE = 0x5, MLX5_MODULE_EVENT_ERROR_HIGH_TEMPERATURE = 0x6, MLX5_MODULE_EVENT_ERROR_CABLE_IS_SHORTED = 0x7, - MLX5_MODULE_EVENT_ERROR_PCIE_SYSTEM_POWER_SLOT_EXCEEDED = 0xc, + MLX5_MODULE_EVENT_ERROR_NUM , }; struct mlx5_eqe_port_module_event { @@ -1053,6 +1055,9 @@ enum mlx5_mcam_feature_groups { #define MLX5_CAP_PCAM_FEATURE(mdev, fld) \ MLX5_GET(pcam_reg, (mdev)->caps.pcam, feature_cap_mask.enhanced_features.fld) +#define MLX5_CAP_PCAM_REG(mdev, reg) \ + MLX5_GET(pcam_reg, (mdev)->caps.pcam, port_access_reg_cap_mask.regs_5000_to_507f.reg) + #define MLX5_CAP_MCAM_FEATURE(mdev, fld) \ MLX5_GET(mcam_reg, (mdev)->caps.mcam, mng_feature_cap_mask.enhanced_features.fld) diff --git a/sys/dev/mlx5/diagnostics.h b/sys/dev/mlx5/diagnostics.h index df5c6aa0624..1baa665fb43 100644 --- a/sys/dev/mlx5/diagnostics.h +++ b/sys/dev/mlx5/diagnostics.h @@ -32,6 +32,8 @@ #define MLX5_CORE_DIAGNOSTICS_STRUCT(n, s, t) s, #define MLX5_CORE_DIAGNOSTICS_ENTRY(n, s, t) { #s, (t) }, +static MALLOC_DEFINE(M_MLX5_EEPROM, "MLX5EEPROM", "MLX5 EEPROM information"); + struct mlx5_core_diagnostics_entry { const char *desc; u16 counter_id; @@ -127,6 +129,18 @@ union mlx5_core_general_diagnostics { extern const struct mlx5_core_diagnostics_entry mlx5_core_general_diagnostics_table[MLX5_CORE_GENERAL_DIAGNOSTICS_NUM]; +struct mlx5_eeprom { + int lock_bit; + int i2c_addr; + int page_num; + int device_addr; + int module_num; + int len; + int type; + int page_valid; + u32 *data; +}; + /* function prototypes */ int mlx5_core_set_diagnostics_full(struct mlx5_core_dev *mdev, u8 enable_pci, u8 enable_general); @@ -134,5 +148,8 @@ int mlx5_core_get_diagnostics_full(struct mlx5_core_dev *mdev, union mlx5_core_pci_diagnostics *ppci, union mlx5_core_general_diagnostics *pgen); int mlx5_core_supports_diagnostics(struct mlx5_core_dev *mdev, u16 counter_id); +int mlx5_read_eeprom(struct mlx5_core_dev *dev, struct mlx5_eeprom *eeprom); +int mlx5_get_eeprom_info(struct mlx5_core_dev *dev, struct mlx5_eeprom *eeprom); +int mlx5_get_eeprom(struct mlx5_core_dev *dev, struct mlx5_eeprom *ee); #endif /* MLX5_CORE_DIAGNOSTICS_H */ diff --git a/sys/dev/mlx5/driver.h b/sys/dev/mlx5/driver.h index 9c1d5120c06..46ea58f5b1c 100644 --- a/sys/dev/mlx5/driver.h +++ b/sys/dev/mlx5/driver.h @@ -83,10 +83,6 @@ enum { MLX5_EQ_VEC_COMP_BASE, }; -enum { - MLX5_MAX_IRQ_NAME = 32 -}; - enum { MLX5_ATOMIC_MODE_OFF = 16, MLX5_ATOMIC_MODE_NONE = 0 << MLX5_ATOMIC_MODE_OFF, @@ -130,24 +126,26 @@ enum { MLX5_REG_QCAM = 0x4019, MLX5_REG_DCBX_PARAM = 0x4020, MLX5_REG_DCBX_APP = 0x4021, - MLX5_REG_PCAP = 0x5001, MLX5_REG_FPGA_CAP = 0x4022, MLX5_REG_FPGA_CTRL = 0x4023, MLX5_REG_FPGA_ACCESS_REG = 0x4024, MLX5_REG_FPGA_SHELL_CNTR = 0x4025, + MLX5_REG_PCAP = 0x5001, + MLX5_REG_PMLP = 0x5002, MLX5_REG_PMTU = 0x5003, MLX5_REG_PTYS = 0x5004, MLX5_REG_PAOS = 0x5006, MLX5_REG_PFCC = 0x5007, MLX5_REG_PPCNT = 0x5008, - MLX5_REG_PMAOS = 0x5012, MLX5_REG_PUDE = 0x5009, MLX5_REG_PPTB = 0x500B, MLX5_REG_PBMC = 0x500C, + MLX5_REG_PELC = 0x500E, + MLX5_REG_PVLC = 0x500F, MLX5_REG_PMPE = 0x5010, - MLX5_REG_PELC = 0x500e, - MLX5_REG_PVLC = 0x500f, - MLX5_REG_PMLP = 0x5002, + MLX5_REG_PMAOS = 0x5012, + MLX5_REG_PPLM = 0x5023, + MLX5_REG_PBSR = 0x5038, MLX5_REG_PCAM = 0x507f, MLX5_REG_NODE_DESC = 0x6001, MLX5_REG_HOST_ENDIANNESS = 0x7004, @@ -556,10 +554,6 @@ struct mlx5_mr_table { struct radix_tree_root tree; }; -struct mlx5_irq_info { - char name[MLX5_MAX_IRQ_NAME]; -}; - #ifdef RATELIMIT struct mlx5_rl_entry { u32 rate; @@ -577,11 +571,15 @@ struct mlx5_rl_table { }; #endif +struct mlx5_pme_stats { + u64 status_counters[MLX5_MODULE_STATUS_NUM]; + u64 error_counters[MLX5_MODULE_EVENT_ERROR_NUM]; +}; + struct mlx5_priv { char name[MLX5_MAX_NAME_LEN]; struct mlx5_eq_table eq_table; struct msix_entry *msix_arr; - struct mlx5_irq_info *irq_info; struct mlx5_uuar_info uuari; MLX5_DECLARE_DOORBELL_LOCK(cq_uar_lock); int disable_irqs; @@ -633,6 +631,7 @@ struct mlx5_priv { #ifdef RATELIMIT struct mlx5_rl_table rl_table; #endif + struct mlx5_pme_stats pme_stats; }; enum mlx5_device_state { @@ -701,7 +700,7 @@ struct mlx5_core_dev { struct mlx5_flow_root_namespace *sniffer_rx_root_ns; struct mlx5_flow_root_namespace *sniffer_tx_root_ns; u32 num_q_counter_allocated[MLX5_INTERFACE_NUMBER]; - const struct mlx5_crspace_regmap *dump_rege; + struct mlx5_crspace_regmap *dump_rege; uint32_t *dump_data; unsigned dump_size; bool dump_valid; @@ -717,6 +716,12 @@ struct mlx5_core_dev { struct mlx5_rsvd_gids reserved_gids; atomic_t roce_en; } roce; + + struct { + spinlock_t spinlock; +#define MLX5_MPFS_TABLE_MAX 32 + long bitmap[BITS_TO_LONGS(MLX5_MPFS_TABLE_MAX)]; + } mpfs; #ifdef CONFIG_MLX5_FPGA struct mlx5_fpga_device *fpga; #endif @@ -1023,7 +1028,7 @@ struct mlx5_core_srq *mlx5_core_get_srq(struct mlx5_core_dev *dev, u32 srqn); void mlx5_cmd_comp_handler(struct mlx5_core_dev *dev, u64 vector, enum mlx5_cmd_mode mode); void mlx5_cq_event(struct mlx5_core_dev *dev, u32 cqn, int event_type); int mlx5_create_map_eq(struct mlx5_core_dev *dev, struct mlx5_eq *eq, u8 vecidx, - int nent, u64 mask, const char *name, struct mlx5_uar *uar); + int nent, u64 mask, struct mlx5_uar *uar); int mlx5_destroy_unmap_eq(struct mlx5_core_dev *dev, struct mlx5_eq *eq); int mlx5_start_eqs(struct mlx5_core_dev *dev); int mlx5_stop_eqs(struct mlx5_core_dev *dev); @@ -1093,6 +1098,7 @@ int mlx5_vsc_find_cap(struct mlx5_core_dev *mdev); int mlx5_vsc_lock(struct mlx5_core_dev *mdev); void mlx5_vsc_unlock(struct mlx5_core_dev *mdev); int mlx5_vsc_set_space(struct mlx5_core_dev *mdev, u16 space); +int mlx5_vsc_wait_on_flag(struct mlx5_core_dev *mdev, u32 expected); int mlx5_vsc_write(struct mlx5_core_dev *mdev, u32 addr, const u32 *data); int mlx5_vsc_read(struct mlx5_core_dev *mdev, u32 addr, u32 *data); int mlx5_vsc_lock_addr_space(struct mlx5_core_dev *mdev, u32 addr); diff --git a/sys/dev/mlx5/mlx5_core/mlx5_cmd.c b/sys/dev/mlx5/mlx5_core/mlx5_cmd.c index b13dd1ed702..b7141143995 100644 --- a/sys/dev/mlx5/mlx5_core/mlx5_cmd.c +++ b/sys/dev/mlx5/mlx5_core/mlx5_cmd.c @@ -1489,7 +1489,9 @@ int mlx5_cmd_init(struct mlx5_core_dev *dev) memset(cmd, 0, sizeof(*cmd)); cmd_if_rev = cmdif_rev_get(dev); if (cmd_if_rev != CMD_IF_REV) { - device_printf((&dev->pdev->dev)->bsddev, "ERR: ""Driver cmdif rev(%d) differs from firmware's(%d)\n", CMD_IF_REV, cmd_if_rev); + mlx5_core_err(dev, + "Driver cmdif rev(%d) differs from firmware's(%d)\n", + CMD_IF_REV, cmd_if_rev); return -EINVAL; } @@ -1501,13 +1503,16 @@ int mlx5_cmd_init(struct mlx5_core_dev *dev) cmd->log_sz = cmd_l >> 4 & 0xf; cmd->log_stride = cmd_l & 0xf; if (1 << cmd->log_sz > MLX5_MAX_COMMANDS) { - device_printf((&dev->pdev->dev)->bsddev, "ERR: ""firmware reports too many outstanding commands %d\n", 1 << cmd->log_sz); + mlx5_core_err(dev, + "firmware reports too many outstanding commands %d\n", + 1 << cmd->log_sz); err = -EINVAL; goto err_free_page; } if (cmd->log_sz + cmd->log_stride > MLX5_ADAPTER_PAGE_SHIFT) { - device_printf((&dev->pdev->dev)->bsddev, "ERR: ""command queue size overflow\n"); + mlx5_core_err(dev, + "command queue size overflow\n"); err = -EINVAL; goto err_free_page; } @@ -1518,7 +1523,9 @@ int mlx5_cmd_init(struct mlx5_core_dev *dev) cmd->cmdif_rev = ioread32be(&dev->iseg->cmdif_rev_fw_sub) >> 16; if (cmd->cmdif_rev > CMD_IF_REV) { - device_printf((&dev->pdev->dev)->bsddev, "ERR: ""driver does not support command interface version. driver %d, firmware %d\n", CMD_IF_REV, cmd->cmdif_rev); + mlx5_core_err(dev, + "driver does not support command interface version. driver %d, firmware %d\n", + CMD_IF_REV, cmd->cmdif_rev); err = -ENOTSUPP; goto err_free_page; } @@ -1534,7 +1541,7 @@ int mlx5_cmd_init(struct mlx5_core_dev *dev) cmd_h = (u32)((u64)(cmd->dma) >> 32); cmd_l = (u32)(cmd->dma); if (cmd_l & 0xfff) { - device_printf((&dev->pdev->dev)->bsddev, "ERR: ""invalid command queue address\n"); + mlx5_core_err(dev, "invalid command queue address\n"); err = -ENOMEM; goto err_free_page; } @@ -1551,7 +1558,7 @@ int mlx5_cmd_init(struct mlx5_core_dev *dev) err = create_msg_cache(dev); if (err) { - device_printf((&dev->pdev->dev)->bsddev, "ERR: ""failed to create command cache\n"); + mlx5_core_err(dev, "failed to create command cache\n"); goto err_free_page; } return 0; diff --git a/sys/dev/mlx5/mlx5_core/mlx5_core.h b/sys/dev/mlx5/mlx5_core/mlx5_core.h index a92005e0aff..014477de5f8 100644 --- a/sys/dev/mlx5/mlx5_core/mlx5_core.h +++ b/sys/dev/mlx5/mlx5_core/mlx5_core.h @@ -36,9 +36,9 @@ #define DRIVER_NAME "mlx5_core" #ifndef DRIVER_VERSION -#define DRIVER_VERSION "3.5.1" +#define DRIVER_VERSION "3.5.2" #endif -#define DRIVER_RELDATE "April 2019" +#define DRIVER_RELDATE "September 2019" extern int mlx5_core_debug_mask; @@ -53,13 +53,18 @@ do { \ mlx5_core_dbg(dev, format, ##__VA_ARGS__); \ } while (0) -#define mlx5_core_err(_dev, format, ...) \ - device_printf((&(_dev)->pdev->dev)->bsddev, "ERR: ""%s:%d:(pid %d): " format, \ +#define mlx5_core_err(_dev, format, ...) \ + device_printf((_dev)->pdev->dev.bsddev, "ERR: ""%s:%d:(pid %d): " format, \ __func__, __LINE__, curthread->td_proc->p_pid, \ ##__VA_ARGS__) -#define mlx5_core_warn(_dev, format, ...) \ - device_printf((&(_dev)->pdev->dev)->bsddev, "WARN: ""%s:%d:(pid %d): " format, \ +#define mlx5_core_warn(_dev, format, ...) \ + device_printf((_dev)->pdev->dev.bsddev, "WARN: ""%s:%d:(pid %d): " format, \ + __func__, __LINE__, curthread->td_proc->p_pid, \ + ##__VA_ARGS__) + +#define mlx5_core_info(_dev, format, ...) \ + device_printf((_dev)->pdev->dev.bsddev, "INFO: ""%s:%d:(pid %d): " format, \ __func__, __LINE__, curthread->td_proc->p_pid, \ ##__VA_ARGS__) @@ -102,12 +107,10 @@ int mlx5_firmware_flash(struct mlx5_core_dev *dev, const struct firmware *fw); void mlx5e_init(void); void mlx5e_cleanup(void); -int mlx5_rename_eq(struct mlx5_core_dev *dev, int eq_ix, char *name); - int mlx5_ctl_init(void); void mlx5_ctl_fini(void); void mlx5_fwdump_prep(struct mlx5_core_dev *mdev); -void mlx5_fwdump(struct mlx5_core_dev *mdev); +int mlx5_fwdump(struct mlx5_core_dev *mdev); void mlx5_fwdump_clean(struct mlx5_core_dev *mdev); struct mlx5_crspace_regmap { diff --git a/sys/dev/mlx5/mlx5_core/mlx5_diagnostics.c b/sys/dev/mlx5/mlx5_core/mlx5_diagnostics.c index 592be19d941..00740095b3e 100644 --- a/sys/dev/mlx5/mlx5_core/mlx5_diagnostics.c +++ b/sys/dev/mlx5/mlx5_core/mlx5_diagnostics.c @@ -26,7 +26,10 @@ */ #include +#include #include +#include +#include const struct mlx5_core_diagnostics_entry mlx5_core_pci_diagnostics_table[ @@ -284,3 +287,156 @@ int mlx5_core_supports_diagnostics(struct mlx5_core_dev *dev, u16 counter_id) } return 0; /* not supported counter */ } + +/* + * Read the first three bytes of the eeprom in order to get the needed info + * for the whole reading. + * Byte 0 - Identifier byte + * Byte 1 - Revision byte + * Byte 2 - Status byte + */ +int +mlx5_get_eeprom_info(struct mlx5_core_dev *dev, struct mlx5_eeprom *eeprom) +{ + u32 data = 0; + int size_read = 0; + int ret; + + ret = mlx5_query_module_num(dev, &eeprom->module_num); + if (ret) { + mlx5_core_err(dev, "Failed query module error=%d\n", ret); + return (-ret); + } + + /* Read the first three bytes to get Identifier, Revision and Status */ + ret = mlx5_query_eeprom(dev, eeprom->i2c_addr, eeprom->page_num, + eeprom->device_addr, MLX5_EEPROM_INFO_BYTES, eeprom->module_num, &data, + &size_read); + if (ret) { + mlx5_core_err(dev, + "Failed query EEPROM module error=0x%x\n", ret); + return (-ret); + } + + switch (data & MLX5_EEPROM_IDENTIFIER_BYTE_MASK) { + case SFF_8024_ID_QSFP: + eeprom->type = MLX5_ETH_MODULE_SFF_8436; + eeprom->len = MLX5_ETH_MODULE_SFF_8436_LEN; + break; + case SFF_8024_ID_QSFPPLUS: + case SFF_8024_ID_QSFP28: + if ((data & MLX5_EEPROM_IDENTIFIER_BYTE_MASK) == SFF_8024_ID_QSFP28 || + ((data & MLX5_EEPROM_REVISION_ID_BYTE_MASK) >> 8) >= 0x3) { + eeprom->type = MLX5_ETH_MODULE_SFF_8636; + eeprom->len = MLX5_ETH_MODULE_SFF_8636_LEN; + } else { + eeprom->type = MLX5_ETH_MODULE_SFF_8436; + eeprom->len = MLX5_ETH_MODULE_SFF_8436_LEN; + } + if ((data & MLX5_EEPROM_PAGE_3_VALID_BIT_MASK) == 0) + eeprom->page_valid = 1; + break; + case SFF_8024_ID_SFP: + eeprom->type = MLX5_ETH_MODULE_SFF_8472; + eeprom->len = MLX5_ETH_MODULE_SFF_8472_LEN; + break; + default: + mlx5_core_err(dev, "Not recognized cable type = 0x%x(%s)\n", + data & MLX5_EEPROM_IDENTIFIER_BYTE_MASK, + sff_8024_id[data & MLX5_EEPROM_IDENTIFIER_BYTE_MASK]); + return (EINVAL); + } + return (0); +} + +/* Read both low and high pages of the eeprom */ +int +mlx5_get_eeprom(struct mlx5_core_dev *dev, struct mlx5_eeprom *ee) +{ + int size_read = 0; + int ret; + + if (ee->len == 0) + return (EINVAL); + + /* Read low page of the eeprom */ + while (ee->device_addr < ee->len) { + ret = mlx5_query_eeprom(dev, ee->i2c_addr, ee->page_num, ee->device_addr, + ee->len - ee->device_addr, ee->module_num, + ee->data + (ee->device_addr / 4), &size_read); + if (ret) { + mlx5_core_err(dev, + "Failed reading EEPROM, error = 0x%02x\n", ret); + return (-ret); + } + ee->device_addr += size_read; + } + + /* Read high page of the eeprom */ + if (ee->page_valid == 1) { + ee->device_addr = MLX5_EEPROM_HIGH_PAGE_OFFSET; + ee->page_num = MLX5_EEPROM_HIGH_PAGE; + size_read = 0; + while (ee->device_addr < MLX5_EEPROM_PAGE_LENGTH) { + ret = mlx5_query_eeprom(dev, ee->i2c_addr, ee->page_num, + ee->device_addr, MLX5_EEPROM_PAGE_LENGTH - ee->device_addr, + ee->module_num, ee->data + (ee->len / 4) + + ((ee->device_addr - MLX5_EEPROM_HIGH_PAGE_OFFSET) / 4), + &size_read); + if (ret) { + mlx5_core_err(dev, + "Failed reading EEPROM, error = 0x%02x\n", + ret); + return (-ret); + } + ee->device_addr += size_read; + } + } + return (0); +} + +/* + * Read cable EEPROM module information by first inspecting the first + * three bytes to get the initial information for a whole reading. + * Information will be printed to dmesg. + */ +int +mlx5_read_eeprom(struct mlx5_core_dev *dev, struct mlx5_eeprom *eeprom) +{ + int error; + + eeprom->i2c_addr = MLX5_I2C_ADDR_LOW; + eeprom->device_addr = 0; + eeprom->page_num = MLX5_EEPROM_LOW_PAGE; + eeprom->page_valid = 0; + + /* Read three first bytes to get important info */ + error = mlx5_get_eeprom_info(dev, eeprom); + if (error) { + mlx5_core_err(dev, + "Failed reading EEPROM initial information\n"); + return (error); + } + /* + * Allocate needed length buffer and additional space for + * page 0x03 + */ + eeprom->data = malloc(eeprom->len + MLX5_EEPROM_PAGE_LENGTH, + M_MLX5_EEPROM, M_WAITOK | M_ZERO); + + /* Read the whole eeprom information */ + error = mlx5_get_eeprom(dev, eeprom); + if (error) { + mlx5_core_err(dev, "Failed reading EEPROM\n"); + error = 0; + /* + * Continue printing partial information in case of + * an error + */ + } + free(eeprom->data, M_MLX5_EEPROM); + + return (error); +} + + diff --git a/sys/dev/mlx5/mlx5_core/mlx5_eq.c b/sys/dev/mlx5/mlx5_core/mlx5_eq.c index 43d19f8de6f..c83973cc14b 100644 --- a/sys/dev/mlx5/mlx5_core/mlx5_eq.c +++ b/sys/dev/mlx5/mlx5_core/mlx5_eq.c @@ -219,7 +219,7 @@ mlx5_temp_warning_event(struct mlx5_core_dev *dev, struct mlx5_eqe *eqe) { mlx5_core_warn(dev, - "High temperature on sensors with bit set %#jx %#jx", + "High temperature on sensors with bit set %#jx %#jx\n", (uintmax_t)be64_to_cpu(eqe->data.temp_warning.sensor_warning_msb), (uintmax_t)be64_to_cpu(eqe->data.temp_warning.sensor_warning_lsb)); } @@ -415,7 +415,7 @@ static void init_eq_buf(struct mlx5_eq *eq) } int mlx5_create_map_eq(struct mlx5_core_dev *dev, struct mlx5_eq *eq, u8 vecidx, - int nent, u64 mask, const char *name, struct mlx5_uar *uar) + int nent, u64 mask, struct mlx5_uar *uar) { u32 out[MLX5_ST_SZ_DW(create_eq_out)] = {0}; struct mlx5_priv *priv = &dev->priv; @@ -463,10 +463,8 @@ int mlx5_create_map_eq(struct mlx5_core_dev *dev, struct mlx5_eq *eq, u8 vecidx, eq->irqn = vecidx; eq->dev = dev; eq->doorbell = uar->map + MLX5_EQ_DOORBEL_OFFSET; - snprintf(priv->irq_info[vecidx].name, MLX5_MAX_IRQ_NAME, "%s@pci:%s", - name, pci_name(dev->pdev)); err = request_irq(priv->msix_arr[vecidx].vector, mlx5_msix_handler, 0, - priv->irq_info[vecidx].name, eq); + "mlx5_core", eq); if (err) goto err_eq; #ifdef RSS @@ -568,7 +566,7 @@ int mlx5_start_eqs(struct mlx5_core_dev *dev) err = mlx5_create_map_eq(dev, &table->cmd_eq, MLX5_EQ_VEC_CMD, MLX5_NUM_CMD_EQE, 1ull << MLX5_EVENT_TYPE_CMD, - "mlx5_cmd_eq", &dev->priv.uuari.uars[0]); + &dev->priv.uuari.uars[0]); if (err) { mlx5_core_warn(dev, "failed to create cmd EQ %d\n", err); return err; @@ -578,7 +576,7 @@ int mlx5_start_eqs(struct mlx5_core_dev *dev) err = mlx5_create_map_eq(dev, &table->async_eq, MLX5_EQ_VEC_ASYNC, MLX5_NUM_ASYNC_EQE, async_event_mask, - "mlx5_async_eq", &dev->priv.uuari.uars[0]); + &dev->priv.uuari.uars[0]); if (err) { mlx5_core_warn(dev, "failed to create async EQ %d\n", err); goto err1; @@ -587,7 +585,7 @@ int mlx5_start_eqs(struct mlx5_core_dev *dev) err = mlx5_create_map_eq(dev, &table->pages_eq, MLX5_EQ_VEC_PAGES, /* TODO: sriov max_vf + */ 1, - 1 << MLX5_EVENT_TYPE_PAGE_REQUEST, "mlx5_pages_eq", + 1 << MLX5_EVENT_TYPE_PAGE_REQUEST, &dev->priv.uuari.uars[0]); if (err) { mlx5_core_warn(dev, "failed to create pages EQ %d\n", err); @@ -641,9 +639,9 @@ static const char *mlx5_port_module_event_error_type_to_string(u8 error_type) { switch (error_type) { case MLX5_MODULE_EVENT_ERROR_POWER_BUDGET_EXCEEDED: - return "Power Budget Exceeded"; + return "Power budget exceeded"; case MLX5_MODULE_EVENT_ERROR_LONG_RANGE_FOR_NON_MLNX_CABLE_MODULE: - return "Long Range for non MLNX cable/module"; + return "Long Range for non MLNX cable"; case MLX5_MODULE_EVENT_ERROR_BUS_STUCK: return "Bus stuck(I2C or data shorted)"; case MLX5_MODULE_EVENT_ERROR_NO_EEPROM_RETRY_TIMEOUT: @@ -651,18 +649,11 @@ static const char *mlx5_port_module_event_error_type_to_string(u8 error_type) case MLX5_MODULE_EVENT_ERROR_ENFORCE_PART_NUMBER_LIST: return "Enforce part number list"; case MLX5_MODULE_EVENT_ERROR_UNSUPPORTED_CABLE: - return "Unsupported Cable"; + return "Unknown identifier"; case MLX5_MODULE_EVENT_ERROR_HIGH_TEMPERATURE: return "High Temperature"; case MLX5_MODULE_EVENT_ERROR_CABLE_IS_SHORTED: - return "Cable is shorted"; - case MLX5_MODULE_EVENT_ERROR_PCIE_SYSTEM_POWER_SLOT_EXCEEDED: - return "One or more network ports have been powered " - "down due to insufficient/unadvertised power on " - "the PCIe slot. Please refer to the card's user " - "manual for power specifications or contact " - "Mellanox support."; - + return "Bad or shorted cable/module"; default: return "Unknown error type"; } @@ -682,35 +673,42 @@ static void mlx5_port_module_event(struct mlx5_core_dev *dev, unsigned int module_status; unsigned int error_type; struct mlx5_eqe_port_module_event *module_event_eqe; - struct pci_dev *pdev = dev->pdev; module_event_eqe = &eqe->data.port_module_event; module_num = (unsigned int)module_event_eqe->module; module_status = (unsigned int)module_event_eqe->module_status & - PORT_MODULE_EVENT_MODULE_STATUS_MASK; + PORT_MODULE_EVENT_MODULE_STATUS_MASK; error_type = (unsigned int)module_event_eqe->error_type & - PORT_MODULE_EVENT_ERROR_TYPE_MASK; + PORT_MODULE_EVENT_ERROR_TYPE_MASK; + if (module_status < MLX5_MODULE_STATUS_NUM) + dev->priv.pme_stats.status_counters[module_status]++; switch (module_status) { case MLX5_MODULE_STATUS_PLUGGED_ENABLED: - device_printf((&pdev->dev)->bsddev, "INFO: ""Module %u, status: plugged and enabled\n", module_num); + mlx5_core_info(dev, + "Module %u, status: plugged and enabled\n", + module_num); break; case MLX5_MODULE_STATUS_UNPLUGGED: - device_printf((&pdev->dev)->bsddev, "INFO: ""Module %u, status: unplugged\n", module_num); + mlx5_core_info(dev, + "Module %u, status: unplugged\n", module_num); break; case MLX5_MODULE_STATUS_ERROR: - device_printf((&pdev->dev)->bsddev, "INFO: ""Module %u, status: error, %s\n", module_num, mlx5_port_module_event_error_type_to_string(error_type)); - break; - - case MLX5_MODULE_STATUS_PLUGGED_DISABLED: - device_printf((&pdev->dev)->bsddev, "INFO: ""Module %u, status: plugged but disabled\n", module_num); + mlx5_core_err(dev, + "Module %u, status: error, %s (%d)\n", + module_num, + mlx5_port_module_event_error_type_to_string(error_type), + error_type); + if (error_type < MLX5_MODULE_EVENT_ERROR_NUM) + dev->priv.pme_stats.error_counters[error_type]++; break; default: - device_printf((&pdev->dev)->bsddev, "INFO: ""Module %u, unknown status\n", module_num); + mlx5_core_info(dev, + "Module %u, unknown status %d\n", module_num, module_status); } /* store module status */ if (module_num < MLX5_MAX_PORTS) diff --git a/sys/dev/mlx5/mlx5_core/mlx5_fs_tree.c b/sys/dev/mlx5/mlx5_core/mlx5_fs_tree.c index 8ae5a46b9e9..e7951682e56 100644 --- a/sys/dev/mlx5/mlx5_core/mlx5_fs_tree.c +++ b/sys/dev/mlx5/mlx5_core/mlx5_fs_tree.c @@ -139,7 +139,6 @@ static struct mlx5_flow_root_namespace *find_root(struct fs_base *node) node = parent; if (node->type != FS_TYPE_NAMESPACE) { - printf("mlx5_core: WARN: ""mlx5: flow steering node %s is not in tree or garbaged\n", node->name); return NULL; } @@ -477,7 +476,7 @@ static int connect_prev_fts(struct fs_prio *locked_prio, err = fs_set_star_rule(dev, iter, next_ft); if (err) { mlx5_core_warn(dev, - "mlx5: flow steering can't connect prev and next\n"); + "mlx5: flow steering can't connect prev and next\n"); goto unlock; } else { /* Assume ft's prio is locked */ @@ -605,7 +604,9 @@ static void destroy_star_rule(struct mlx5_flow_table *ft, struct fs_prio *prio) root = find_root(&prio->base); if (!root) - printf("mlx5_core: ERR: ""mlx5: flow steering failed to find root of priority %s", prio->base.name); + mlx5_core_err(dev, + "flow steering failed to find root of priority %s", + prio->base.name); /* In order to ensure atomic deletion, first update * prev ft to point on the next ft. @@ -765,11 +766,13 @@ static struct mlx5_flow_table *_create_ft_common(struct mlx5_flow_namespace *ns, int log_table_sz; int ft_size; char gen_name[20]; - struct mlx5_flow_root_namespace *root = - find_root(&ns->base); + struct mlx5_flow_root_namespace *root = find_root(&ns->base); + struct mlx5_core_dev *dev = fs_get_dev(&ns->base); if (!root) { - printf("mlx5_core: ERR: ""mlx5: flow steering failed to find root of namespace %s", ns->base.name); + mlx5_core_err(dev, + "flow steering failed to find root of namespace %s", + ns->base.name); return ERR_PTR(-ENODEV); } @@ -987,12 +990,16 @@ int mlx5_destroy_flow_table(struct mlx5_flow_table *ft) struct fs_prio *prio; struct mlx5_flow_root_namespace *root; bool is_shared_prio; + struct mlx5_core_dev *dev; fs_get_parent(prio, ft); root = find_root(&prio->base); + dev = fs_get_dev(&prio->base); if (!root) { - printf("mlx5_core: ERR: ""mlx5: flow steering failed to find root of priority %s", prio->base.name); + mlx5_core_err(dev, + "flow steering failed to find root of priority %s", + prio->base.name); return -ENODEV; } diff --git a/sys/dev/mlx5/mlx5_core/mlx5_fw.c b/sys/dev/mlx5/mlx5_core/mlx5_fw.c index 0227e586ca1..d7355a50f2b 100644 --- a/sys/dev/mlx5/mlx5_core/mlx5_fw.c +++ b/sys/dev/mlx5/mlx5_core/mlx5_fw.c @@ -324,7 +324,7 @@ int mlx5_cmd_fast_teardown_hca(struct mlx5_core_dev *dev) } while (!time_after(jiffies, end)); if (mlx5_get_nic_state(dev) != MLX5_NIC_IFC_DISABLED) { - dev_err(&dev->pdev->dev, "NIC IFC still %d after %ums.\n", + mlx5_core_err(dev, "NIC IFC still %d after %ums.\n", mlx5_get_nic_state(dev), delay_ms); return -EIO; } diff --git a/sys/dev/mlx5/mlx5_core/mlx5_fwdump.c b/sys/dev/mlx5/mlx5_core/mlx5_fwdump.c index 27be4d6d561..24e1a41de13 100644 --- a/sys/dev/mlx5/mlx5_core/mlx5_fwdump.c +++ b/sys/dev/mlx5/mlx5_core/mlx5_fwdump.c @@ -1,5 +1,5 @@ /*- - * Copyright (c) 2018, Mellanox Technologies, Ltd. All rights reserved. + * Copyright (c) 2018, 2019 Mellanox Technologies, Ltd. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -32,12 +32,10 @@ __FBSDID("$FreeBSD$"); #include #include #include +#include #include #include - -extern const struct mlx5_crspace_regmap mlx5_crspace_regmap_mt4117[]; -extern const struct mlx5_crspace_regmap mlx5_crspace_regmap_mt4115[]; -extern const struct mlx5_crspace_regmap mlx5_crspace_regmap_connectx5[]; +#include static MALLOC_DEFINE(M_MLX5_DUMP, "MLX5DUMP", "MLX5 Firmware dump"); @@ -64,52 +62,113 @@ mlx5_fwdump_destroy_dd(struct mlx5_core_dev *mdev) void mlx5_fwdump_prep(struct mlx5_core_dev *mdev) { - int error; + device_t dev; + int error, vsc_addr; + unsigned i, sz; + u32 addr, in, out, next_addr; mdev->dump_data = NULL; error = mlx5_vsc_find_cap(mdev); if (error != 0) { /* Inability to create a firmware dump is not fatal. */ - device_printf((&mdev->pdev->dev)->bsddev, "WARN: " - "mlx5_fwdump_prep failed %d\n", error); + mlx5_core_warn(mdev, + "Failed to find vendor-specific capability, error %d\n", + error); return; } - switch (pci_get_device(mdev->pdev->dev.bsddev)) { - case 0x1013: - mdev->dump_rege = mlx5_crspace_regmap_mt4115; - break; - case 0x1015: - mdev->dump_rege = mlx5_crspace_regmap_mt4117; - break; - case 0x1017: - case 0x1019: - mdev->dump_rege = mlx5_crspace_regmap_connectx5; - break; - default: - return; /* silently fail, do not prevent driver attach */ + error = mlx5_vsc_lock(mdev); + if (error != 0) + return; + error = mlx5_vsc_set_space(mdev, MLX5_VSC_DOMAIN_SCAN_CRSPACE); + if (error != 0) { + mlx5_core_warn(mdev, "VSC scan space is not supported\n"); + goto unlock_vsc; + } + dev = mdev->pdev->dev.bsddev; + vsc_addr = mdev->vsc_addr; + if (vsc_addr == 0) { + mlx5_core_warn(mdev, "Cannot read VSC, no address\n"); + goto unlock_vsc; } + + in = 0; + for (sz = 1, addr = 0;;) { + MLX5_VSC_SET(vsc_addr, &in, address, addr); + pci_write_config(dev, vsc_addr + MLX5_VSC_ADDR_OFFSET, in, 4); + error = mlx5_vsc_wait_on_flag(mdev, 1); + if (error != 0) { + mlx5_core_warn(mdev, + "Failed waiting for read complete flag, error %d addr %#x\n", + error, addr); + goto unlock_vsc; + } + pci_read_config(dev, vsc_addr + MLX5_VSC_DATA_OFFSET, 4); + out = pci_read_config(dev, vsc_addr + MLX5_VSC_ADDR_OFFSET, 4); + next_addr = MLX5_VSC_GET(vsc_addr, &out, address); + if (next_addr == 0 || next_addr == addr) + break; + if (next_addr != addr + 4) + sz++; + addr = next_addr; + } + mdev->dump_rege = malloc(sz * sizeof(struct mlx5_crspace_regmap), + M_MLX5_DUMP, M_WAITOK | M_ZERO); + + for (i = 0, addr = 0;;) { + MPASS(i < sz); + mdev->dump_rege[i].cnt++; + MLX5_VSC_SET(vsc_addr, &in, address, addr); + pci_write_config(dev, vsc_addr + MLX5_VSC_ADDR_OFFSET, in, 4); + error = mlx5_vsc_wait_on_flag(mdev, 1); + if (error != 0) { + mlx5_core_warn(mdev, + "Failed waiting for read complete flag, error %d addr %#x\n", + error, addr); + free(mdev->dump_rege, M_MLX5_DUMP); + mdev->dump_rege = NULL; + goto unlock_vsc; + } + pci_read_config(dev, vsc_addr + MLX5_VSC_DATA_OFFSET, 4); + out = pci_read_config(dev, vsc_addr + MLX5_VSC_ADDR_OFFSET, 4); + next_addr = MLX5_VSC_GET(vsc_addr, &out, address); + if (next_addr == 0 || next_addr == addr) + break; + if (next_addr != addr + 4) + mdev->dump_rege[++i].addr = next_addr; + addr = next_addr; + } + KASSERT(i + 1 == sz, + ("inconsistent hw crspace reads: sz %u i %u addr %#lx", + sz, i, (unsigned long)addr)); + mdev->dump_size = mlx5_fwdump_getsize(mdev->dump_rege); mdev->dump_data = malloc(mdev->dump_size * sizeof(uint32_t), M_MLX5_DUMP, M_WAITOK | M_ZERO); mdev->dump_valid = false; mdev->dump_copyout = false; + +unlock_vsc: + mlx5_vsc_unlock(mdev); } -void +int mlx5_fwdump(struct mlx5_core_dev *mdev) { const struct mlx5_crspace_regmap *r; uint32_t i, ri; int error; - dev_info(&mdev->pdev->dev, "Issuing FW dump\n"); + mlx5_core_info(mdev, "Issuing FW dump\n"); mtx_lock(&mdev->dump_lock); - if (mdev->dump_data == NULL) + if (mdev->dump_data == NULL) { + error = EIO; goto failed; + } if (mdev->dump_valid) { /* only one dump */ - dev_warn(&mdev->pdev->dev, + mlx5_core_warn(mdev, "Only one FW dump can be captured aborting FW dump\n"); + error = EEXIST; goto failed; } @@ -134,6 +193,7 @@ mlx5_fwdump(struct mlx5_core_dev *mdev) mlx5_vsc_unlock(mdev); failed: mtx_unlock(&mdev->dump_lock); + return (error); } void @@ -145,6 +205,7 @@ mlx5_fwdump_clean(struct mlx5_core_dev *mdev) msleep(&mdev->dump_copyout, &mdev->dump_lock, 0, "mlx5fwc", 0); mlx5_fwdump_destroy_dd(mdev); mtx_unlock(&mdev->dump_lock); + free(mdev->dump_rege, M_MLX5_DUMP); } static int @@ -253,6 +314,54 @@ mlx5_fw_reset(struct mlx5_core_dev *mdev) return (error); } +static int +mlx5_eeprom_copyout(struct mlx5_core_dev *dev, struct mlx5_eeprom_get *eeprom_info) +{ + struct mlx5_eeprom eeprom; + int error; + + eeprom.i2c_addr = MLX5_I2C_ADDR_LOW; + eeprom.device_addr = 0; + eeprom.page_num = MLX5_EEPROM_LOW_PAGE; + eeprom.page_valid = 0; + + /* Read three first bytes to get important info */ + error = mlx5_get_eeprom_info(dev, &eeprom); + if (error != 0) { + mlx5_core_err(dev, + "Failed reading EEPROM initial information\n"); + return (error); + } + eeprom_info->eeprom_info_page_valid = eeprom.page_valid; + eeprom_info->eeprom_info_out_len = eeprom.len; + + if (eeprom_info->eeprom_info_buf == NULL) + return (0); + /* + * Allocate needed length buffer and additional space for + * page 0x03 + */ + eeprom.data = malloc(eeprom.len + MLX5_EEPROM_PAGE_LENGTH, + M_MLX5_EEPROM, M_WAITOK | M_ZERO); + + /* Read the whole eeprom information */ + error = mlx5_get_eeprom(dev, &eeprom); + if (error != 0) { + mlx5_core_err(dev, "Failed reading EEPROM error = %d\n", + error); + error = 0; + /* + * Continue printing partial information in case of + * an error + */ + } + error = copyout(eeprom.data, eeprom_info->eeprom_info_buf, + eeprom.len); + free(eeprom.data, M_MLX5_EEPROM); + + return (error); +} + static int mlx5_ctl_ioctl(struct cdev *dev, u_long cmd, caddr_t data, int fflag, struct thread *td) @@ -262,6 +371,7 @@ mlx5_ctl_ioctl(struct cdev *dev, u_long cmd, caddr_t data, int fflag, struct mlx5_tool_addr *devaddr; struct mlx5_fw_update *fu; struct firmware fake_fw; + struct mlx5_eeprom_get *eeprom_info; int error; error = 0; @@ -297,7 +407,7 @@ mlx5_ctl_ioctl(struct cdev *dev, u_long cmd, caddr_t data, int fflag, error = mlx5_dbsf_to_core(devaddr, &mdev); if (error != 0) break; - mlx5_fwdump(mdev); + error = mlx5_fwdump(mdev); break; case MLX5_FW_UPDATE: if ((fflag & FWRITE) == 0) { @@ -340,6 +450,18 @@ mlx5_ctl_ioctl(struct cdev *dev, u_long cmd, caddr_t data, int fflag, break; error = mlx5_fw_reset(mdev); break; + case MLX5_EEPROM_GET: + if ((fflag & FREAD) == 0) { + error = EBADF; + break; + } + eeprom_info = (struct mlx5_eeprom_get *)data; + devaddr = &eeprom_info->devaddr; + error = mlx5_dbsf_to_core(devaddr, &mdev); + if (error != 0) + break; + error = mlx5_eeprom_copyout(mdev, eeprom_info); + break; default: error = ENOTTY; break; diff --git a/sys/dev/mlx5/mlx5_core/mlx5_fwdump_regmaps.c b/sys/dev/mlx5/mlx5_core/mlx5_fwdump_regmaps.c deleted file mode 100644 index b2ce8bbc269..00000000000 --- a/sys/dev/mlx5/mlx5_core/mlx5_fwdump_regmaps.c +++ /dev/null @@ -1,11187 +0,0 @@ -/*- - * Copyright (c) 2018, Mellanox Technologies, Ltd. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -__FBSDID("$FreeBSD$"); - -#include -#include -#include - -const struct mlx5_crspace_regmap mlx5_crspace_regmap_mt4117[] = { - {0x000000, 16388}, - {0x010084, 1}, - {0x01008c, 2}, - {0x010180, 6}, - {0x01019c, 9}, - {0x010304, 1}, - {0x0103bc, 52}, - {0x010500, 35}, - {0x010604, 1}, - {0x01060c, 1}, - {0x010624, 1}, - {0x01062c, 1}, - {0x010644, 1}, - {0x01064c, 3}, - {0x010800, 1}, - {0x010814, 3}, - {0x010844, 1}, - {0x01084c, 4}, - {0x011000, 32}, - {0x011200, 32}, - {0x011400, 32}, - {0x011600, 32}, - {0x011800, 32}, - {0x011a00, 5}, - {0x011a24, 1}, - {0x011a2c, 1}, - {0x011a34, 3}, - {0x011a44, 1}, - {0x011a4c, 2}, - {0x012000, 20}, - {0x012088, 22}, - {0x012100, 18}, - {0x012200, 36}, - {0x012300, 3}, - {0x012310, 1}, - {0x012320, 1}, - {0x012330, 1}, - {0x012340, 1}, - {0x012350, 1}, - {0x012360, 1}, - {0x012370, 1}, - {0x012400, 166}, - {0x0126a0, 1}, - {0x012700, 32}, - {0x012800, 1}, - {0x012808, 1}, - {0x012810, 1}, - {0x012818, 1}, - {0x012820, 1}, - {0x012828, 1}, - {0x012830, 1}, - {0x012838, 1}, - {0x012850, 1}, - {0x012858, 1}, - {0x012860, 1}, - {0x012868, 1}, - {0x012870, 1}, - {0x012878, 1}, - {0x012880, 1}, - {0x012888, 1}, - {0x012890, 5}, - {0x012900, 10}, - {0x012940, 6}, - {0x012960, 6}, - {0x012980, 5}, - {0x012a00, 6}, - {0x012a40, 5}, - {0x012a80, 9}, - {0x012ac0, 19}, - {0x012b10, 2}, - {0x014000, 1}, - {0x014010, 10}, - {0x014104, 1}, - {0x01410c, 4}, - {0x014200, 1}, - {0x014210, 4}, - {0x014300, 4}, - {0x014400, 3}, - {0x014410, 1}, - {0x014444, 1}, - {0x01444c, 4}, - {0x014480, 2}, - {0x014500, 35}, - {0x014590, 1}, - {0x014600, 32}, - {0x014704, 1}, - {0x01470c, 1}, - {0x014804, 2}, - {0x014814, 3}, - {0x014824, 2}, - {0x014834, 3}, - {0x014844, 2}, - {0x014854, 5}, - {0x014a00, 4}, - {0x014a14, 2}, - {0x015004, 1}, - {0x01500c, 4}, - {0x015204, 1}, - {0x015214, 4}, - {0x015228, 1}, - {0x015244, 1}, - {0x015250, 4}, - {0x015274, 1}, - {0x01527c, 1}, - {0x0152a4, 1}, - {0x015300, 4}, - {0x015314, 1}, - {0x01531c, 3}, - {0x015404, 2}, - {0x015430, 20}, - {0x015484, 2}, - {0x015498, 5}, - {0x0154bc, 1}, - {0x0154c8, 1}, - {0x0154d4, 2}, - {0x01550c, 3}, - {0x015524, 3}, - {0x015608, 3}, - {0x015618, 4}, - {0x015680, 16}, - {0x015704, 2}, - {0x015730, 20}, - {0x015784, 3}, - {0x015794, 3}, - {0x0157c0, 6}, - {0x015800, 52}, - {0x0158d4, 1}, - {0x0158dc, 1}, - {0x0158e4, 3}, - {0x0158f4, 1}, - {0x0158fc, 52}, - {0x015b04, 2}, - {0x015b14, 3}, - {0x015b24, 2}, - {0x015b38, 6}, - {0x015b60, 5}, - {0x015c04, 1}, - {0x015cb8, 18}, - {0x015d98, 1}, - {0x015e00, 1}, - {0x015e08, 1}, - {0x015e10, 1}, - {0x016000, 32}, - {0x016100, 7}, - {0x016120, 2}, - {0x016144, 3}, - {0x016204, 1}, - {0x01620c, 1}, - {0x016224, 1}, - {0x01622c, 1}, - {0x016234, 1}, - {0x01623c, 1}, - {0x016244, 1}, - {0x01624c, 1}, - {0x016254, 1}, - {0x01625c, 2}, - {0x016270, 1}, - {0x016280, 1}, - {0x016290, 1}, - {0x0162a0, 1}, - {0x0162b0, 1}, - {0x0162c0, 1}, - {0x0162d0, 1}, - {0x0162e0, 1}, - {0x0162f0, 1}, - {0x016300, 1}, - {0x016310, 1}, - {0x016320, 1}, - {0x016330, 1}, - {0x016340, 32}, - {0x016400, 19}, - {0x016454, 7}, - {0x016484, 1}, - {0x01648c, 1}, - {0x016800, 9}, - {0x016840, 16}, - {0x017800, 1}, - {0x017828, 1}, - {0x017850, 1}, - {0x017878, 1}, - {0x0178a0, 12}, - {0x0179ac, 1}, - {0x0179d8, 4}, - {0x017a00, 6}, - {0x017a20, 6}, - {0x017a40, 3}, - {0x017c00, 6}, - {0x017c20, 6}, - {0x017c40, 6}, - {0x017c60, 6}, - {0x017c80, 6}, - {0x017ca0, 6}, - {0x017cc0, 6}, - {0x017ce0, 6}, - {0x017d00, 3}, - {0x017d10, 6}, - {0x018400, 11}, - {0x018430, 2}, - {0x018440, 4}, - {0x018604, 1}, - {0x018618, 2}, - {0x018640, 4}, - {0x018660, 2}, - {0x018800, 1}, - {0x018810, 4}, - {0x018844, 1}, - {0x01884c, 4}, - {0x018880, 2}, - {0x01a400, 12}, - {0x01a444, 1}, - {0x01a44c, 1}, - {0x01a800, 1}, - {0x01a814, 3}, - {0x01a844, 1}, - {0x01a84c, 4}, - {0x01c400, 7}, - {0x01c500, 8}, - {0x01c544, 1}, - {0x01c554, 3}, - {0x01c564, 3}, - {0x01c574, 3}, - {0x01c604, 1}, - {0x01c60c, 3}, - {0x01c800, 1}, - {0x01c814, 3}, - {0x01c844, 1}, - {0x01c84c, 4}, - {0x01f000, 1}, - {0x01f400, 1}, - {0x01f408, 4}, - {0x01f41c, 3}, - {0x01f500, 2}, - {0x01f800, 1}, - {0x01f814, 3}, - {0x01f844, 1}, - {0x01f84c, 4}, - {0x01f880, 3}, - {0x020004, 1}, - {0x02000c, 4}, - {0x020080, 3}, - {0x020090, 5}, - {0x020800, 16}, - {0x020900, 192}, - {0x021004, 1}, - {0x02100c, 4}, - {0x021400, 5}, - {0x021418, 5}, - {0x021480, 1}, - {0x021704, 2}, - {0x02173c, 17}, - {0x0217fc, 2}, - {0x021844, 1}, - {0x022280, 12}, - {0x022408, 6}, - {0x022444, 1}, - {0x022454, 3}, - {0x022504, 1}, - {0x02250c, 4}, - {0x022624, 1}, - {0x02262c, 3}, - {0x02263c, 1}, - {0x022804, 1}, - {0x02280c, 4}, - {0x022904, 4}, - {0x022924, 4}, - {0x024000, 36}, - {0x0240c0, 21}, - {0x024120, 11}, - {0x024200, 5}, - {0x024220, 1}, - {0x024230, 8}, - {0x024258, 1}, - {0x024260, 1}, - {0x024270, 9}, - {0x0242a0, 1}, - {0x0242b0, 4}, - {0x0242c8, 2}, - {0x024300, 5}, - {0x024318, 2}, - {0x02439c, 25}, - {0x024424, 4}, - {0x024464, 13}, - {0x0244a4, 1}, - {0x0244ac, 3}, - {0x0244c0, 2}, - {0x0244d0, 3}, - {0x0244e0, 3}, - {0x0244f0, 3}, - {0x024500, 3}, - {0x024510, 3}, - {0x024520, 3}, - {0x024530, 3}, - {0x024884, 11}, - {0x0248b4, 3}, - {0x0248c4, 1}, - {0x0248cc, 1}, - {0x0248d4, 1}, - {0x0248dc, 1}, - {0x0248f0, 2}, - {0x024908, 6}, - {0x024928, 6}, - {0x024968, 6}, - {0x024984, 3}, - {0x024994, 1}, - {0x02499c, 6}, - {0x0249b8, 7}, - {0x024a08, 6}, - {0x024a28, 6}, - {0x024a68, 6}, - {0x024a84, 1}, - {0x024a8c, 1}, - {0x024a94, 1}, - {0x024a9c, 13}, - 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{0x11c1d0, 10}, - {0x11c200, 19}, - {0x11c250, 10}, - {0x11c280, 19}, - {0x11c2d0, 10}, - {0x11c300, 19}, - {0x11c350, 10}, - {0x11c380, 19}, - {0x11c3d0, 10}, - {0x11c400, 19}, - {0x11c460, 6}, - {0x11c484, 1}, - {0x11c494, 8}, - {0x11c4b8, 9}, - {0x11c4e0, 4}, - {0x11c500, 3}, - {0x11d000, 7}, - {0x11d020, 15}, - {0x11d060, 15}, - {0x11d0a0, 15}, - {0x11d0e0, 15}, - {0x11d120, 15}, - {0x11d160, 15}, - {0x11d1a0, 15}, - {0x11d1e0, 8}, - {0x11d400, 9}, - {0x11d428, 3}, - {0x11d440, 5}, - {0x11d480, 9}, - {0x11d4a8, 3}, - {0x11d4c0, 5}, - {0x11d500, 9}, - {0x11d528, 3}, - {0x11d540, 5}, - {0x11d580, 9}, - {0x11d5a8, 3}, - {0x11d5c0, 5}, - {0x11d600, 6}, - {0x11d620, 6}, - {0x11d640, 6}, - {0x11d660, 6}, - {0x11d680, 6}, - {0x11d6a0, 6}, - {0x11d6c0, 6}, - {0x11d6e0, 6}, - {0x11d708, 2}, - {0x11d718, 4}, - {0x11d734, 1}, - {0x11d73c, 4}, - {0x11d750, 4}, - {0x11d764, 1}, - {0x11d76c, 2}, - {0x11d800, 8}, - {0x11d840, 8}, - {0x11d880, 8}, - {0x11d8c0, 8}, - {0x11d900, 8}, - {0x11d940, 8}, - {0x11d988, 4}, - {0x11da00, 3}, - {0x11da18, 2}, - {0x11da24, 16}, - {0x11da80, 3}, - {0x11da98, 2}, - {0x11daa4, 16}, - {0x11db00, 3}, - {0x11db18, 2}, - {0x11db24, 16}, - {0x11db80, 3}, - {0x11db98, 2}, - {0x11dba4, 16}, - {0x11dc00, 8}, - {0x11dc40, 1}, - {0x11e000, 72}, - {0x11e200, 72}, - {0x11e400, 72}, - {0x11e600, 72}, - {0x11e800, 6}, - {0x11e820, 6}, - {0x11e840, 6}, - {0x11e860, 6}, - {0x11e880, 6}, - {0x11e8a0, 6}, - {0x11e8c0, 6}, - {0x11e8e0, 6}, - {0x11e900, 6}, - {0x11e920, 6}, - {0x11e940, 6}, - {0x11e9fc, 7}, - {0x11ea20, 6}, - {0x11ea40, 6}, - {0x11ea60, 6}, - {0x11ea80, 6}, - {0x11eaa0, 6}, - {0x11eac0, 6}, - {0x11eae0, 6}, - {0x11eb00, 6}, - {0x11eb20, 6}, - {0x11eb40, 6}, - {0x11ebfc, 7}, - {0x11ec20, 6}, - {0x11ec40, 6}, - {0x11ec60, 6}, - {0x11ec80, 6}, - {0x11eca0, 6}, - {0x11ecc0, 6}, - {0x11ece0, 6}, - {0x11ed00, 6}, - {0x11ed20, 6}, - {0x11ed40, 6}, - {0x11edfc, 7}, - {0x11ee20, 6}, - {0x11ee40, 6}, - {0x11ee60, 6}, - {0x11ee80, 6}, - {0x11eea0, 6}, - {0x11eec0, 6}, - {0x11eee0, 6}, - {0x11ef00, 6}, - {0x11ef20, 6}, - {0x11ef40, 6}, - {0x11effc, 15}, - {0x11f040, 2}, - {0x11f080, 14}, - {0x11f0c0, 2}, - {0x11f100, 14}, - {0x11f140, 2}, - {0x11f180, 14}, - {0x11f1c0, 2}, - {0x11f400, 17}, - {0x11f448, 5}, - {0x11f460, 3}, - {0x11f470, 3}, - {0x11f480, 16}, - {0x11f500, 17}, - {0x11f548, 5}, - {0x11f560, 3}, - {0x11f570, 3}, - {0x11f580, 16}, - {0x11f600, 17}, - {0x11f648, 5}, - {0x11f660, 3}, - {0x11f670, 3}, - {0x11f680, 16}, - {0x11f700, 17}, - {0x11f748, 5}, - {0x11f760, 3}, - {0x11f770, 3}, - {0x11f780, 16}, - {0x11f800, 8}, - {0x11f824, 15}, - {0x11f864, 15}, - {0x11f8a4, 15}, - {0x11f8e4, 30}, - {0x11f980, 10}, - {0x11f9ac, 1}, - {0x11f9b4, 5}, - {0x11f9cc, 1}, - {0x11f9d4, 5}, - {0x11f9ec, 1}, - {0x11f9f4, 13}, - {0x11fa80, 4}, - {0x11fa94, 2}, - {0x11faa0, 5}, - {0x11fac0, 5}, - {0x11fae0, 4}, - {0x11fc04, 8}, - {0x11fc40, 13}, - {0x11fd00, 6}, - {0x11fd20, 3}, - {0x11fd30, 3}, - {0x11fd44, 1}, - {0x11fd4c, 1}, - {0x11fd54, 1}, - {0x11fd5c, 8}, - {0x11fd80, 11}, - {0x11fdc0, 3}, - {0, 0} -}; - -const struct mlx5_crspace_regmap mlx5_crspace_regmap_mt4115[] = { - {0x000000, 16388}, - {0x010084, 1}, - {0x01008c, 2}, - {0x010180, 6}, - {0x01019c, 9}, - {0x010304, 1}, - {0x0103bc, 52}, - {0x010500, 35}, - {0x010604, 1}, - {0x01060c, 1}, - {0x010624, 1}, - {0x01062c, 1}, - {0x010644, 1}, - {0x01064c, 3}, - {0x010800, 1}, - {0x010814, 3}, - {0x010844, 1}, - {0x01084c, 4}, - {0x011000, 32}, - {0x011200, 32}, - {0x011400, 32}, - {0x011600, 32}, - {0x011800, 32}, - {0x011a00, 5}, - {0x011a24, 1}, - {0x011a2c, 1}, - {0x011a34, 3}, - {0x011a44, 1}, - {0x011a4c, 2}, - {0x012000, 20}, - {0x012088, 22}, - {0x012100, 18}, - {0x012200, 36}, - {0x012300, 3}, - {0x012310, 1}, - {0x012320, 1}, - {0x012330, 1}, - {0x012340, 1}, - {0x012350, 1}, - {0x012360, 1}, - {0x012370, 1}, - {0x012400, 166}, - {0x0126a0, 1}, - {0x012700, 32}, - {0x012800, 1}, - {0x012808, 1}, - {0x012810, 1}, - {0x012818, 1}, - {0x012820, 1}, - {0x012828, 1}, - {0x012830, 1}, - {0x012838, 1}, - {0x012850, 1}, - {0x012858, 1}, - {0x012860, 1}, - {0x012868, 1}, - {0x012870, 1}, - {0x012878, 1}, - {0x012880, 1}, - {0x012888, 1}, - {0x012890, 5}, - {0x012900, 10}, - {0x012940, 6}, - {0x012960, 6}, - {0x012980, 5}, - {0x012a00, 6}, - {0x012a40, 5}, - {0x012a80, 9}, - {0x012ac0, 19}, - {0x012b10, 2}, - {0x014000, 1}, - {0x014010, 10}, - {0x014104, 1}, - {0x01410c, 4}, - {0x014200, 1}, - {0x014210, 4}, - {0x014300, 4}, - {0x014400, 3}, - {0x014410, 1}, - {0x014444, 1}, - {0x01444c, 4}, - {0x014480, 2}, - {0x014500, 35}, - {0x014590, 1}, - {0x014600, 32}, - {0x014704, 1}, - {0x01470c, 1}, - {0x014804, 2}, - {0x014814, 3}, - {0x014824, 2}, - {0x014834, 3}, - {0x014844, 2}, - {0x014854, 5}, - {0x014a00, 4}, - {0x014a14, 2}, - {0x015004, 1}, - {0x01500c, 4}, - {0x015204, 1}, - {0x015214, 4}, - {0x015228, 1}, - {0x015244, 1}, - {0x015250, 4}, - {0x015274, 1}, - {0x01527c, 1}, - {0x0152a4, 1}, - {0x015300, 4}, - {0x015314, 1}, - {0x01531c, 3}, - {0x015404, 2}, - {0x015430, 20}, - {0x015484, 2}, - {0x015498, 5}, - {0x0154bc, 1}, - {0x0154c8, 1}, - {0x0154d4, 2}, - {0x01550c, 3}, - {0x015524, 3}, - {0x015608, 3}, - {0x015618, 4}, - {0x015680, 16}, - {0x015704, 2}, - {0x015730, 20}, - {0x015784, 3}, - {0x015794, 3}, - {0x0157c0, 6}, - {0x015800, 52}, - {0x0158d4, 1}, - {0x0158dc, 1}, - {0x0158e4, 3}, - {0x0158f4, 1}, - {0x0158fc, 52}, - {0x015b04, 2}, - {0x015b14, 3}, - {0x015b24, 2}, - {0x015b38, 6}, - {0x015b60, 5}, - {0x015c04, 1}, - {0x015cb8, 18}, - {0x015d98, 1}, - {0x015e00, 1}, - {0x015e08, 1}, - {0x015e10, 1}, - {0x016000, 32}, - {0x016100, 7}, - {0x016120, 2}, - {0x016144, 3}, - {0x016204, 1}, - {0x01620c, 1}, - {0x016224, 1}, - {0x01622c, 1}, - {0x016234, 1}, - {0x01623c, 1}, - {0x016244, 1}, - {0x01624c, 1}, - {0x016254, 1}, - {0x01625c, 2}, - {0x016270, 1}, - {0x016280, 1}, - {0x016290, 1}, - {0x0162a0, 1}, - {0x0162b0, 1}, - {0x0162c0, 1}, - {0x0162d0, 1}, - {0x0162e0, 1}, - {0x0162f0, 1}, - {0x016300, 1}, - {0x016310, 1}, - {0x016320, 1}, - {0x016330, 1}, - {0x016340, 32}, - {0x016400, 19}, - {0x016454, 7}, - {0x016484, 1}, - {0x01648c, 1}, - {0x016800, 9}, - {0x016840, 16}, - {0x017800, 1}, - {0x017828, 1}, - {0x017850, 1}, - {0x017878, 1}, - {0x0178a0, 12}, - {0x0179ac, 1}, - {0x0179d8, 4}, - {0x017a00, 6}, - {0x017a20, 6}, - {0x017a40, 3}, - {0x017c00, 6}, - {0x017c20, 6}, - {0x017c40, 6}, - {0x017c60, 6}, - {0x017c80, 6}, - {0x017ca0, 6}, - {0x017cc0, 6}, - {0x017ce0, 6}, - {0x017d00, 3}, - {0x017d10, 5}, - {0x018400, 11}, - {0x018430, 2}, - {0x018440, 4}, - {0x018604, 1}, - {0x018618, 2}, - {0x018640, 4}, - {0x018660, 2}, - {0x018800, 1}, - {0x018810, 4}, - {0x018844, 1}, - {0x01884c, 4}, - {0x018880, 2}, - {0x01a400, 12}, - {0x01a444, 1}, - {0x01a44c, 1}, - {0x01a800, 1}, - {0x01a814, 3}, - {0x01a844, 1}, - {0x01a84c, 4}, - {0x01c400, 7}, - {0x01c500, 8}, - {0x01c544, 1}, - {0x01c554, 3}, - {0x01c564, 3}, - {0x01c574, 3}, - {0x01c604, 1}, - {0x01c60c, 3}, - {0x01c800, 1}, - {0x01c814, 3}, - {0x01c844, 1}, - {0x01c84c, 4}, - {0x01f000, 1}, - {0x01f400, 1}, - {0x01f408, 4}, - {0x01f41c, 3}, - {0x01f500, 2}, - {0x01f800, 1}, - {0x01f814, 3}, - {0x01f844, 1}, - {0x01f84c, 4}, - {0x01f880, 3}, - {0x020004, 1}, - {0x02000c, 4}, - {0x020080, 9}, - {0x020800, 16}, - {0x020900, 192}, - {0x021004, 1}, - {0x02100c, 4}, - {0x021400, 5}, - {0x021418, 5}, - {0x021480, 1}, - {0x021704, 2}, - {0x02173c, 17}, - {0x021804, 1}, - {0x02180c, 4}, - {0x021840, 2}, - {0x022280, 12}, - {0x022408, 6}, - {0x022444, 1}, - {0x022454, 3}, - {0x022504, 1}, - {0x02250c, 4}, - {0x022624, 1}, - {0x02262c, 3}, - {0x02263c, 1}, - {0x022804, 1}, - {0x02280c, 4}, - {0x022904, 4}, - {0x022924, 4}, - {0x024000, 36}, - {0x0240c0, 21}, - {0x024120, 11}, - {0x024200, 5}, - {0x024220, 1}, - {0x024230, 8}, - {0x024258, 1}, - {0x024260, 1}, - {0x024270, 9}, - {0x0242a0, 1}, - {0x0242b0, 4}, - {0x0242c8, 2}, - {0x024300, 5}, - {0x024318, 2}, - {0x02439c, 25}, - {0x024424, 4}, - {0x024464, 13}, - {0x0244a4, 1}, - {0x0244ac, 3}, - {0x0244c0, 2}, - {0x0244d0, 3}, - {0x0244e0, 3}, - {0x0244f0, 3}, - {0x024500, 3}, - {0x024510, 3}, - {0x024520, 3}, - {0x024530, 3}, - {0x024884, 11}, - {0x0248b4, 3}, - {0x0248c4, 1}, - {0x0248cc, 1}, - {0x0248d4, 1}, - {0x0248dc, 1}, - {0x0248f0, 2}, - {0x024908, 6}, - {0x024928, 6}, - {0x024968, 6}, - {0x024984, 3}, - {0x024994, 1}, - {0x02499c, 6}, - {0x0249b8, 7}, - {0x024a08, 6}, - {0x024a28, 6}, - {0x024a68, 6}, - {0x024a84, 1}, - {0x024a8c, 1}, - {0x024a94, 1}, - {0x024a9c, 13}, - {0x024ae0, 6}, - {0x024b00, 7}, - {0x024b20, 6}, - {0x024b40, 8}, - {0x024c00, 2}, - {0x024c24, 3}, - {0x024c34, 3}, - {0x025004, 6}, - {0x025800, 37}, - {0x025904, 1}, - {0x02590c, 1}, - {0x026000, 99}, - {0x026200, 1}, - {0x026800, 7}, - {0x026824, 6}, - {0x026840, 2}, - {0x026864, 1}, - {0x02686c, 1}, - {0x026874, 3}, - {0x026884, 1}, - {0x0268a4, 7}, - {0x026904, 1}, - {0x02690c, 4}, - {0x026940, 1}, - {0x026980, 33}, - {0x026a0c, 7}, - {0x026a30, 1}, - {0x026a44, 4}, - {0x026a60, 1}, - {0x026a70, 1}, - {0x026b00, 9}, - {0x026b44, 2}, - {0x026b68, 6}, - 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{0x11fae0, 4}, - {0x11fc04, 8}, - {0x11fc40, 13}, - {0x11fc80, 16}, - {0x11fd00, 6}, - {0x11fd20, 3}, - {0x11fd30, 3}, - {0x11fd40, 19}, - {0x11fdc0, 3}, - {0, 0}, -}; - -const struct mlx5_crspace_regmap mlx5_crspace_regmap_connectx5[] = { - {0x000000,16418}, - {0x010100,10}, - {0x010140,17}, - {0x011000,35}, - {0x011100,40}, - {0x011200,2}, - {0x011400,3}, - {0x011414,2}, - {0x011420,1}, - {0x011444,5}, - {0x011480,2}, - {0x011490,3}, - {0x011590,1}, - {0x011600,2}, - {0x011800,24}, - {0x012000,4}, - {0x012014,1}, - {0x012020,4}, - {0x012034,1}, - {0x012040,4}, - {0x012054,1}, - {0x012060,4}, - {0x012074,1}, - {0x012080,4}, - {0x012094,1}, - {0x0120a0,4}, - {0x0120b4,1}, - {0x0120c0,4}, - {0x0120d4,1}, - {0x0120e0,4}, - {0x0120f4,1}, - {0x012100,4}, - {0x012114,1}, - {0x012120,4}, - {0x012134,1}, - {0x012140,4}, - {0x012154,1}, - {0x012160,4}, - {0x012174,1}, - {0x012180,4}, - {0x012194,1}, - {0x0121a0,4}, - {0x0121b4,1}, - {0x0121c0,4}, - {0x0121d4,1}, - {0x0121e0,4}, - {0x0121f4,1}, - {0x012200,4}, - {0x012214,1}, - {0x012220,4}, - {0x012234,1}, - {0x012240,54}, - {0x012400,4}, - {0x012414,1}, - {0x012420,4}, - {0x012434,1}, - {0x012440,4}, - {0x012454,1}, - {0x012460,4}, - {0x012474,1}, - {0x012480,4}, - {0x012494,1}, - {0x0124a0,4}, - {0x0124b4,1}, - {0x0124c0,4}, - {0x0124d4,1}, - {0x0124e0,4}, - {0x0124f4,1}, - {0x012500,4}, - {0x012514,1}, - {0x012520,4}, - {0x012534,1}, - {0x012540,4}, - {0x012554,1}, - {0x012560,4}, - {0x012574,1}, - {0x012580,4}, - {0x012594,1}, - {0x0125a0,4}, - {0x0125b4,1}, - {0x0125c0,4}, - {0x0125d4,1}, - {0x0125e0,4}, - {0x0125f4,1}, - {0x012600,4}, - {0x012614,1}, - {0x012620,4}, - {0x012634,1}, - {0x012640,54}, - {0x012800,4}, - {0x012814,1}, - {0x012820,4}, - {0x012834,1}, - {0x012840,4}, - {0x012854,1}, - {0x012860,4}, - {0x012874,1}, - {0x012880,4}, - {0x012894,1}, - {0x0128a0,4}, - {0x0128b4,1}, - {0x0128c0,4}, - {0x0128d4,1}, - {0x0128e0,4}, - {0x0128f4,1}, - {0x012900,4}, - {0x012914,1}, - {0x012920,4}, - {0x012934,1}, - {0x012940,4}, - {0x012954,1}, - {0x012960,4}, - {0x012974,1}, - {0x012980,4}, - {0x012994,1}, - {0x0129a0,4}, - {0x0129b4,1}, - {0x0129c0,4}, - {0x0129d4,1}, - {0x0129e0,4}, - {0x0129f4,1}, - {0x012a00,4}, - {0x012a14,1}, - {0x012a20,4}, - {0x012a34,1}, - {0x012a40,54}, - {0x012c00,4}, - {0x012c14,1}, - {0x012c20,4}, - {0x012c34,1}, - {0x012c40,4}, - {0x012c54,1}, - {0x012c60,4}, - {0x012c74,1}, - {0x012c80,4}, - {0x012c94,1}, - {0x012ca0,4}, - {0x012cb4,1}, - {0x012cc0,4}, - {0x012cd4,1}, - {0x012ce0,4}, - {0x012cf4,1}, - {0x012d00,4}, - {0x012d14,1}, - {0x012d20,4}, - {0x012d34,1}, - {0x012d40,4}, - {0x012d54,1}, - {0x012d60,4}, - {0x012d74,1}, - {0x012d80,4}, - {0x012d94,1}, - {0x012da0,4}, - {0x012db4,1}, - {0x012dc0,4}, - {0x012dd4,1}, - {0x012de0,4}, - {0x012df4,1}, - {0x012e00,4}, - {0x012e14,1}, - {0x012e20,4}, - {0x012e34,1}, - {0x012e40,54}, - {0x013000,144}, - {0x013400,144}, - {0x013800,1}, - {0x013810,1}, - {0x013820,1}, - {0x013830,1}, - {0x013840,1}, - {0x013850,1}, - {0x013860,1}, - {0x013870,1}, - {0x013880,1}, - {0x013890,1}, - {0x0138a0,1}, - {0x0138b0,1}, - {0x0138c0,1}, - {0x0138d0,1}, - {0x0138e0,1}, - {0x0138f0,1}, - {0x013900,1}, - {0x013910,1}, - {0x013a00,4}, - {0x013a14,1}, - {0x013a20,4}, - {0x013a34,1}, - {0x013a40,7}, - {0x013a80,4}, - {0x013a94,1}, - {0x013aa0,4}, - {0x013ab4,1}, - {0x013ac0,7}, - {0x013b00,4}, - {0x013b14,1}, - {0x013b20,4}, - {0x013b34,1}, - {0x013b40,7}, - {0x013b80,4}, - {0x013b94,1}, - {0x013ba0,4}, - {0x013bb4,1}, - {0x013bc0,7}, - {0x013c00,11}, - {0x013c30,11}, - {0x013c60,31}, - {0x013ce0,3}, - {0x013cf0,1}, - {0x013d04,1}, - {0x013d14,5}, - {0x014000,65}, - {0x014108,4}, - {0x014124,4}, - {0x014140,6}, - {0x014160,1}, - {0x014170,1}, - {0x014180,5}, - {0x014198,5}, - {0x015000,33}, - {0x015090,1}, - {0x0150a0,1}, - {0x0150b4,4}, - {0x0150d0,3}, - {0x0150e0,5}, - {0x015100,1}, - {0x015110,15}, - {0x015400,7}, - {0x015420,7}, - {0x015440,7}, - {0x015460,7}, - {0x015480,7}, - {0x0154a0,7}, - {0x0154c0,7}, - {0x0154e0,7}, - {0x015500,7}, - {0x015520,7}, - {0x015540,7}, - {0x015560,7}, - {0x015580,7}, - {0x0155a0,7}, - {0x0155c0,7}, - {0x0155e0,7}, - {0x015600,7}, - {0x015620,7}, - {0x015640,7}, - {0x015660,7}, - {0x015680,7}, - {0x0156a0,7}, - {0x0156c0,7}, - {0x0156e0,7}, - {0x015700,7}, - {0x015720,7}, - {0x015740,7}, - {0x015760,7}, - {0x015780,7}, - {0x0157a0,7}, - {0x0157c0,7}, - {0x0157e0,7}, - {0x016000,1}, - {0x016008,4}, - {0x016024,4}, - {0x016044,1}, - {0x016054,7}, - {0x016080,2}, - {0x016090,1}, - {0x0160a0,1}, - {0x0160b0,2}, - {0x016100,1}, - {0x016108,4}, - {0x016124,4}, - {0x016144,1}, - {0x016154,5}, - {0x016180,2}, - {0x016190,1}, - {0x0161a0,1}, - {0x0161b0,2}, - {0x016200,29}, - {0x017000,72}, - {0x017180,1}, - {0x017190,1}, - {0x0171a0,1}, - {0x0171b0,1}, - {0x0171c0,1}, - {0x0171d0,1}, - {0x0171e0,1}, - {0x0171f0,1}, - {0x017200,23}, - {0x018000,1}, - {0x018008,4}, - {0x018024,4}, - {0x018044,1}, - {0x018054,9}, - {0x018090,2}, - {0x0180a0,1}, - {0x0180b0,1}, - {0x0180c0,2}, - {0x018100,33}, - {0x018188,13}, - {0x0181c0,4}, - {0x0181e0,5}, - {0x019000,3}, - {0x019010,3}, - {0x019020,3}, - {0x019030,3}, - {0x019040,3}, - {0x019050,3}, - {0x019060,3}, - {0x019070,3}, - {0x019080,3}, - {0x019090,3}, - {0x0190a0,3}, - {0x0190b0,3}, - {0x0190c0,3}, - {0x0190d0,3}, - {0x0190e0,3}, - {0x0190f0,3}, - {0x019100,3}, - {0x019110,3}, - {0x019120,3}, - {0x019130,3}, - {0x019140,3}, - {0x019150,3}, - {0x019160,3}, - {0x019170,3}, - {0x019180,3}, - {0x019190,3}, - {0x0191a0,3}, - {0x0191b0,3}, - {0x0191c0,3}, - {0x0191d0,3}, - {0x0191e0,3}, - {0x0191f0,3}, - {0x019200,129}, - {0x019408,4}, - {0x019424,4}, - {0x019440,6}, - {0x019460,1}, - {0x019470,14}, - {0x01a004,2}, - {0x01a034,19}, - {0x01a084,1}, - {0x01a08c,4}, - {0x01a0c0,1}, - {0x01a0d0,8}, - {0x01a100,32}, - {0x01a184,2}, - {0x01a198,2}, - {0x01a1a4,2}, - {0x01a1b8,2}, - {0x01a1c8,3}, - {0x01a1dc,1}, - {0x01a1e8,5}, - {0x01a200,4}, - {0x01a404,1}, - {0x01a40c,4}, - {0x01a444,1}, - {0x01a450,4}, - {0x01a464,1}, - {0x01a474,3}, - {0x01a484,1}, - {0x01a48c,1}, - {0x01a494,9}, - {0x01a500,8}, - {0x01a608,3}, - {0x01a618,4}, - {0x01a63c,2}, - {0x01a650,4}, - {0x01a680,4}, - {0x01a6a0,20}, - {0x01a704,2}, - {0x01a730,20}, - {0x01a784,2}, - {0x01a790,2}, - {0x01a7a0,6}, - {0x01a7c0,2}, - {0x01a800,3}, - {0x01a810,3}, - {0x01a820,3}, - {0x01a830,3}, - {0x01a840,3}, - {0x01a850,3}, - {0x01a860,3}, - {0x01a870,3}, - {0x01a880,9}, - {0x01a900,3}, - {0x01a910,3}, - {0x01a920,3}, - {0x01a930,3}, - {0x01a940,3}, - {0x01a950,3}, - {0x01a960,3}, - {0x01a970,3}, - {0x01a980,2}, - {0x01aa04,1}, - {0x01aa3c,19}, - {0x01ac00,1}, - {0x01ac28,1}, - {0x01ac50,1}, - {0x01ac78,1}, - {0x01aca0,12}, - {0x01ada8,2}, - {0x01add8,4}, - {0x01ae00,19}, - {0x01ae50,6}, - {0x01b000,13}, - {0x01b040,6}, - {0x01b060,1}, - {0x01b080,3}, - {0x01b090,6}, - {0x01b100,9}, - {0x01b128,1}, - {0x01b130,1}, - {0x01b140,2}, - {0x01b150,3}, - {0x01b160,4}, - {0x01b400,14}, - {0x01b440,14}, - {0x01b480,14}, - {0x01b4c0,14}, - {0x01b500,14}, - {0x01b540,14}, - {0x01b580,14}, - {0x01b5c0,14}, - {0x01b600,14}, - {0x01b640,14}, - {0x01b680,14}, - {0x01b6c0,14}, - {0x01b800,2}, - {0x020004,1}, - {0x02000c,4}, - {0x020080,3}, - {0x020094,3}, - {0x020800,224}, - {0x020c00,16}, - {0x021004,1}, - {0x02100c,4}, - {0x021400,5}, - {0x021418,5}, - {0x021480,1}, - {0x021704,2}, - {0x02173c,17}, - {0x0217fc,2}, - {0x021844,1}, - {0x021884,5}, - {0x0218c0,16}, - {0x022280,14}, - {0x022408,6}, - {0x022424,1}, - {0x022444,1}, - {0x022454,5}, - {0x022504,1}, - {0x02250c,4}, - {0x022624,1}, - {0x02262c,3}, - {0x02263c,1}, - {0x022804,1}, - {0x02280c,4}, - {0x022904,4}, - {0x022924,4}, - {0x022a04,5}, - {0x022a80,36}, - {0x024000,32}, - {0x024084,7}, - {0x0240c0,16}, - {0x024108,3}, - {0x024120,11}, - {0x024200,5}, - {0x024220,1}, - {0x024230,8}, - {0x024258,1}, - {0x024260,1}, - {0x024270,9}, - {0x0242a0,1}, - {0x0242b0,4}, - {0x0242c8,2}, - {0x024300,7}, - {0x024320,4}, - {0x024398,9}, - {0x0243c0,16}, - {0x024424,4}, - {0x024464,20}, - {0x0244b8,2}, - {0x0244c4,1}, - {0x0244cc,3}, - {0x0244e0,2}, - {0x0244f0,3}, - {0x024500,3}, - {0x024510,3}, - {0x024520,3}, - {0x024530,3}, - {0x024540,3}, - {0x024550,3}, - {0x024560,3}, - {0x024600,3}, - {0x024884,11}, - {0x0248b4,3}, - {0x0248c4,1}, - {0x0248cc,1}, - {0x0248d4,1}, - {0x0248dc,1}, - {0x0248f0,2}, - {0x024908,6}, - {0x024928,6}, - {0x024968,6}, - {0x024984,3}, - {0x024994,1}, - {0x02499c,6}, - {0x0249b8,16}, - {0x024a08,6}, - {0x024a28,6}, - {0x024a68,6}, - {0x024a84,1}, - {0x024a8c,1}, - {0x024a94,1}, - {0x024a9c,3}, - {0x024ab4,3}, - {0x024ac8,2}, - {0x024b00,8}, - {0x024b60,4}, - {0x024b78,2}, - {0x024b84,1}, - {0x024b8c,1}, - {0x024c00,2}, - {0x024c24,3}, - {0x024c34,3}, - {0x025004,5}, - {0x0257f0,42}, - {0x0258d8,2}, - {0x025904,1}, - {0x02590c,1}, - {0x026000,131}, - {0x026400,2}, - {0x0267fc,9}, - {0x026824,6}, - {0x026840,2}, - {0x026864,1}, - {0x02686c,1}, - {0x026874,3}, - {0x026884,1}, - {0x0268a4,7}, - {0x0268c4,2}, - {0x0268d4,3}, - {0x0268e4,1}, - {0x0268f0,4}, - {0x026904,1}, - {0x02690c,4}, - {0x026940,1}, - {0x026980,33}, - {0x026a0c,7}, - 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{0x13e840,14}, - {0x13e880,14}, - {0x13e8c0,14}, - {0x13e900,14}, - {0x13e940,14}, - {0x13e980,14}, - {0x13e9c0,14}, - {0x13ea00,14}, - {0x13ea40,14}, - {0x13ea80,14}, - {0x13eac0,14}, - {0x13eb00,1}, - {0x13f800,8}, - {0x13f824,15}, - {0x13f864,15}, - {0x13f8a4,15}, - {0x13f8e4,30}, - {0x13f980,10}, - {0x13f9ac,1}, - {0x13f9b4,5}, - {0x13f9cc,1}, - {0x13f9d4,5}, - {0x13f9ec,1}, - {0x13f9f4,13}, - {0x13fa80,4}, - {0x13fa94,2}, - {0x13faa0,5}, - {0x13fac0,5}, - {0x13fae0,4}, - {0x13fc04,8}, - {0x13fc40,13}, - {0x13fc80,16}, - {0x13fd00,14}, - {0x13fd40,3}, - {0x13fd50,3}, - {0x13fd60,3}, - {0x13fd70,11}, - {0x13fdc0,35}, - {0x13fe50,1}, - {0x13fe58,1}, - {0x13fe60,1}, - {0x13fe68,1}, - {0x13fe70,1}, - {0x13fe78,1}, - {0x13fe80,1}, - {0x13fe88,5}, - {0, 0}, -}; diff --git a/sys/dev/mlx5/mlx5_core/mlx5_health.c b/sys/dev/mlx5/mlx5_core/mlx5_health.c index 124951693cd..b9d89f1a552 100644 --- a/sys/dev/mlx5/mlx5_core/mlx5_health.c +++ b/sys/dev/mlx5/mlx5_core/mlx5_health.c @@ -78,9 +78,11 @@ static int lock_sem_sw_reset(struct mlx5_core_dev *dev) ret = -mlx5_vsc_lock_addr_space(dev, MLX5_SEMAPHORE_SW_RESET); if (ret) { if (ret == -EBUSY) - mlx5_core_dbg(dev, "SW reset FW semaphore already locked, another function will handle the reset\n"); + mlx5_core_dbg(dev, + "SW reset FW semaphore already locked, another function will handle the reset\n"); else - mlx5_core_warn(dev, "SW reset semaphore lock return %d\n", ret); + mlx5_core_warn(dev, + "SW reset semaphore lock return %d\n", ret); } /* Unlock GW access */ @@ -216,11 +218,12 @@ static void reset_fw_if_needed(struct mlx5_core_dev *dev) if (fatal_error == MLX5_SENSOR_PCI_COMM_ERR || fatal_error == MLX5_SENSOR_NIC_DISABLED || fatal_error == MLX5_SENSOR_NIC_SW_RESET) { - mlx5_core_warn(dev, "Not issuing FW reset. Either it's already done or won't help.\n"); + mlx5_core_warn(dev, + "Not issuing FW reset. Either it's already done or won't help.\n"); return; } - mlx5_core_warn(dev, "Issuing FW Reset\n"); + mlx5_core_info(dev, "Issuing FW Reset\n"); /* Write the NIC interface field to initiate the reset, the command * interface address also resides here, don't overwrite it. */ @@ -251,8 +254,8 @@ mlx5_health_allow_reset(struct mlx5_core_dev *dev) */ health->last_reset_req = ticks ? : -1; if (!ret) - mlx5_core_warn(dev, "Firmware reset elided due to " - "auto-reset frequency threshold.\n"); + mlx5_core_warn(dev, + "Firmware reset elided due to auto-reset frequency threshold.\n"); return (ret); } @@ -297,7 +300,7 @@ void mlx5_enter_error_state(struct mlx5_core_dev *dev, bool force) /* Execute cr-dump and SW reset */ if (lock != -EBUSY) { - mlx5_fwdump(dev); + (void)mlx5_fwdump(dev); reset_fw_if_needed(dev); delay_ms = MLX5_FW_RESET_WAIT_MS; } @@ -313,7 +316,7 @@ void mlx5_enter_error_state(struct mlx5_core_dev *dev, bool force) } while (!time_after(jiffies, end)); if (!sensor_nic_disabled(dev)) { - dev_err(&dev->pdev->dev, "NIC IFC still %d after %ums.\n", + mlx5_core_err(dev, "NIC IFC still %d after %ums.\n", mlx5_get_nic_state(dev), delay_ms); } @@ -321,7 +324,7 @@ void mlx5_enter_error_state(struct mlx5_core_dev *dev, bool force) if (!lock) unlock_sem_sw_reset(dev); - mlx5_core_err(dev, "system error event triggered\n"); + mlx5_core_info(dev, "System error event triggered\n"); err_state_done: mlx5_core_event(dev, MLX5_DEV_EVENT_SYS_ERROR, 1); @@ -342,9 +345,11 @@ static void mlx5_handle_bad_state(struct mlx5_core_dev *dev) * MLX5_NIC_IFC_DISABLED. */ if (dev->priv.health.fatal_error != MLX5_SENSOR_PCI_COMM_ERR) - mlx5_core_warn(dev, "NIC SW reset is already progress\n"); + mlx5_core_warn(dev, + "NIC SW reset is already progress\n"); else - mlx5_core_warn(dev, "Communication with FW over the PCI link is down\n"); + mlx5_core_warn(dev, + "Communication with FW over the PCI link is down\n"); } else { mlx5_core_warn(dev, "NIC mode %d\n", nic_mode); } @@ -372,7 +377,8 @@ static void health_recover(struct work_struct *work) mtx_lock(&Giant); /* XXX newbus needs this */ if (sensor_pci_no_comm(dev)) { - dev_err(&dev->pdev->dev, "health recovery flow aborted, PCI reads still not working\n"); + mlx5_core_err(dev, + "health recovery flow aborted, PCI reads still not working\n"); recover = false; } @@ -384,13 +390,14 @@ static void health_recover(struct work_struct *work) } if (nic_mode != MLX5_NIC_IFC_DISABLED) { - dev_err(&dev->pdev->dev, "health recovery flow aborted, unexpected NIC IFC mode %d.\n", - nic_mode); + mlx5_core_err(dev, + "health recovery flow aborted, unexpected NIC IFC mode %d.\n", + nic_mode); recover = false; } if (recover) { - dev_err(&dev->pdev->dev, "starting health recovery flow\n"); + mlx5_core_info(dev, "Starting health recovery flow\n"); mlx5_recover_device(dev); } @@ -425,12 +432,13 @@ static void health_care(struct work_struct *work) spin_lock_irqsave(&health->wq_lock, flags); if (!test_bit(MLX5_DROP_NEW_RECOVERY_WORK, &health->flags)) { - mlx5_core_warn(dev, "Scheduling recovery work with %lums delay\n", - recover_delay); + mlx5_core_warn(dev, + "Scheduling recovery work with %lums delay\n", + recover_delay); schedule_delayed_work(&health->recover_work, recover_delay); } else { - dev_err(&dev->pdev->dev, - "new health works are not permitted at this stage\n"); + mlx5_core_err(dev, + "new health works are not permitted at this stage\n"); } spin_unlock_irqrestore(&health->wq_lock, flags); } @@ -455,7 +463,7 @@ void mlx5_trigger_health_work(struct mlx5_core_dev *dev) if (!test_bit(MLX5_DROP_NEW_HEALTH_WORK, &health->flags)) queue_work(health->wq, &health->work); else - dev_err(&dev->pdev->dev, + mlx5_core_err(dev, "new health works are not permitted at this stage\n"); spin_unlock_irqrestore(&health->wq_lock, flags); } @@ -490,31 +498,44 @@ static const char *hsynd_str(u8 synd) } } -static void print_health_info(struct mlx5_core_dev *dev) +static u8 +print_health_info(struct mlx5_core_dev *dev) { struct mlx5_core_health *health = &dev->priv.health; struct mlx5_health_buffer __iomem *h = health->health; + u8 synd = ioread8(&h->synd); char fw_str[18]; u32 fw; int i; - /* If the syndrom is 0, the device is OK and no need to print buffer */ - if (!ioread8(&h->synd)) - return; + /* + * If synd is 0x0 - this indicates that FW is unable to + * respond to initialization segment reads and health buffer + * should not be read. + */ + if (synd == 0) + return (0); for (i = 0; i < ARRAY_SIZE(h->assert_var); i++) - printf("mlx5_core: INFO: ""assert_var[%d] 0x%08x\n", i, ioread32be(h->assert_var + i)); - - printf("mlx5_core: INFO: ""assert_exit_ptr 0x%08x\n", ioread32be(&h->assert_exit_ptr)); - printf("mlx5_core: INFO: ""assert_callra 0x%08x\n", ioread32be(&h->assert_callra)); - snprintf(fw_str, sizeof(fw_str), "%d.%d.%d", fw_rev_maj(dev), fw_rev_min(dev), fw_rev_sub(dev)); - printf("mlx5_core: INFO: ""fw_ver %s\n", fw_str); - printf("mlx5_core: INFO: ""hw_id 0x%08x\n", ioread32be(&h->hw_id)); - printf("mlx5_core: INFO: ""irisc_index %d\n", ioread8(&h->irisc_index)); - printf("mlx5_core: INFO: ""synd 0x%x: %s\n", ioread8(&h->synd), hsynd_str(ioread8(&h->synd))); - printf("mlx5_core: INFO: ""ext_synd 0x%04x\n", ioread16be(&h->ext_synd)); + mlx5_core_info(dev, "assert_var[%d] 0x%08x\n", i, + ioread32be(h->assert_var + i)); + + mlx5_core_info(dev, "assert_exit_ptr 0x%08x\n", + ioread32be(&h->assert_exit_ptr)); + mlx5_core_info(dev, "assert_callra 0x%08x\n", + ioread32be(&h->assert_callra)); + snprintf(fw_str, sizeof(fw_str), "%d.%d.%d", + fw_rev_maj(dev), fw_rev_min(dev), fw_rev_sub(dev)); + mlx5_core_info(dev, "fw_ver %s\n", fw_str); + mlx5_core_info(dev, "hw_id 0x%08x\n", ioread32be(&h->hw_id)); + mlx5_core_info(dev, "irisc_index %d\n", ioread8(&h->irisc_index)); + mlx5_core_info(dev, "synd 0x%x: %s\n", + ioread8(&h->synd), hsynd_str(ioread8(&h->synd))); + mlx5_core_info(dev, "ext_synd 0x%04x\n", ioread16be(&h->ext_synd)); fw = ioread32be(&h->fw_ver); - printf("mlx5_core: INFO: ""raw fw_ver 0x%08x\n", fw); + mlx5_core_info(dev, "raw fw_ver 0x%08x\n", fw); + + return synd; } static void health_watchdog(struct work_struct *work) @@ -532,31 +553,38 @@ static void health_watchdog(struct work_struct *work) err = mlx5_pci_read_power_status(dev, &power, &status); if (err < 0) { - mlx5_core_warn(dev, "Failed reading power status: %d\n", err); + mlx5_core_warn(dev, "Failed reading power status: %d\n", + err); return; } dev->pwr_value = power; if (dev->pwr_status != status) { - device_t bsddev = dev->pdev->dev.bsddev; switch (status) { case 0: dev->pwr_status = status; - device_printf(bsddev, "PCI power is not published by the PCIe slot.\n"); + mlx5_core_info(dev, + "PCI power is not published by the PCIe slot.\n"); break; case 1: dev->pwr_status = status; - device_printf(bsddev, "PCIe slot advertised sufficient power (%uW).\n", power); + mlx5_core_info(dev, + "PCIe slot advertised sufficient power (%uW).\n", + power); break; case 2: dev->pwr_status = status; - device_printf(bsddev, "WARN: Detected insufficient power on the PCIe slot (%uW).\n", power); + mlx5_core_warn(dev, + "Detected insufficient power on the PCIe slot (%uW).\n", + power); break; default: dev->pwr_status = 0; - device_printf(bsddev, "WARN: Unknown power state detected(%d).\n", status); + mlx5_core_warn(dev, + "Unknown power state detected(%d).\n", + status); break; } } @@ -572,8 +600,8 @@ mlx5_trigger_health_watchdog(struct mlx5_core_dev *dev) if (!test_bit(MLX5_DROP_NEW_WATCHDOG_WORK, &health->flags)) queue_work(health->wq_watchdog, &health->work_watchdog); else - dev_err(&dev->pdev->dev, - "scheduling watchdog is not permitted at this stage\n"); + mlx5_core_err(dev, + "scheduling watchdog is not permitted at this stage\n"); spin_unlock_irqrestore(&health->wq_lock, flags); } @@ -596,13 +624,15 @@ static void poll_health(unsigned long data) health->prev = count; if (health->miss_counter == MAX_MISSES) { mlx5_core_err(dev, "device's health compromised - reached miss count\n"); - print_health_info(dev); + if (print_health_info(dev) == 0) + mlx5_core_err(dev, "FW is unable to respond to initialization segment reads\n"); } fatal_error = check_fatal_sensors(dev); if (fatal_error && !health->fatal_error) { - mlx5_core_err(dev, "Fatal error %u detected\n", fatal_error); + mlx5_core_err(dev, + "Fatal error %u detected\n", fatal_error); dev->priv.health.fatal_error = fatal_error; print_health_info(dev); mlx5_trigger_health_work(dev); diff --git a/sys/dev/mlx5/mlx5_core/mlx5_main.c b/sys/dev/mlx5/mlx5_core/mlx5_main.c index 58637f85d44..3f8aabe7487 100644 --- a/sys/dev/mlx5/mlx5_core/mlx5_main.c +++ b/sys/dev/mlx5/mlx5_core/mlx5_main.c @@ -38,6 +38,7 @@ #include #include #include +#include #include #include #include @@ -171,24 +172,25 @@ static struct mlx5_profile profiles[] = { static int set_dma_caps(struct pci_dev *pdev) { + struct mlx5_core_dev *dev = pci_get_drvdata(pdev); int err; err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); if (err) { - device_printf((&pdev->dev)->bsddev, "WARN: ""Warning: couldn't set 64-bit PCI DMA mask\n"); + mlx5_core_warn(dev, "couldn't set 64-bit PCI DMA mask\n"); err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); if (err) { - device_printf((&pdev->dev)->bsddev, "ERR: ""Can't set PCI DMA mask, aborting\n"); + mlx5_core_err(dev, "Can't set PCI DMA mask, aborting\n"); return err; } } err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); if (err) { - device_printf((&pdev->dev)->bsddev, "WARN: ""Warning: couldn't set 64-bit consistent PCI DMA mask\n"); + mlx5_core_warn(dev, "couldn't set 64-bit consistent PCI DMA mask\n"); err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); if (err) { - device_printf((&pdev->dev)->bsddev, "ERR: ""Can't set consistent PCI DMA mask, aborting\n"); + mlx5_core_err(dev, "Can't set consistent PCI DMA mask, aborting\n"); return err; } } @@ -242,16 +244,17 @@ static void mlx5_pci_disable_device(struct mlx5_core_dev *dev) static int request_bar(struct pci_dev *pdev) { + struct mlx5_core_dev *dev = pci_get_drvdata(pdev); int err = 0; if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) { - device_printf((&pdev->dev)->bsddev, "ERR: ""Missing registers BAR, aborting\n"); + mlx5_core_err(dev, "Missing registers BAR, aborting\n"); return -ENODEV; } err = pci_request_regions(pdev, DRIVER_NAME); if (err) - device_printf((&pdev->dev)->bsddev, "ERR: ""Couldn't get PCI resources, aborting\n"); + mlx5_core_err(dev, "Couldn't get PCI resources, aborting\n"); return err; } @@ -275,14 +278,15 @@ static int mlx5_enable_msix(struct mlx5_core_dev *dev) else nvec += MLX5_CAP_GEN(dev, num_ports) * num_online_cpus(); - nvec = min_t(int, nvec, num_eqs); + if (nvec > num_eqs) + nvec = num_eqs; + if (nvec > 256) + nvec = 256; /* limit of firmware API */ if (nvec <= MLX5_EQ_VEC_COMP_BASE) return -ENOMEM; priv->msix_arr = kzalloc(nvec * sizeof(*priv->msix_arr), GFP_KERNEL); - priv->irq_info = kzalloc(nvec * sizeof(*priv->irq_info), GFP_KERNEL); - for (i = 0; i < nvec; i++) priv->msix_arr[i].entry = i; @@ -292,9 +296,7 @@ static int mlx5_enable_msix(struct mlx5_core_dev *dev) return nvec; table->num_comp_vectors = nvec - MLX5_EQ_VEC_COMP_BASE; - return 0; - } static void mlx5_disable_msix(struct mlx5_core_dev *dev) @@ -302,7 +304,6 @@ static void mlx5_disable_msix(struct mlx5_core_dev *dev) struct mlx5_priv *priv = &dev->priv; pci_disable_msix(dev->pdev); - kfree(priv->irq_info); kfree(priv->msix_arr); } @@ -320,7 +321,7 @@ enum { MLX5_DEV_CAP_FLAG_DRAIN_SIGERR, }; -static u16 to_fw_pkey_sz(u32 size) +static u16 to_fw_pkey_sz(struct mlx5_core_dev *dev, u32 size) { switch (size) { case 128: @@ -336,7 +337,7 @@ static u16 to_fw_pkey_sz(u32 size) case 4096: return 5; default: - printf("mlx5_core: WARN: ""invalid pkey table size %d\n", size); + mlx5_core_warn(dev, "invalid pkey table size %d\n", size); return 0; } } @@ -431,7 +432,7 @@ static int handle_hca_cap(struct mlx5_core_dev *dev) 128); /* we limit the size of the pkey table to 128 entries for now */ MLX5_SET(cmd_hca_cap, set_hca_cap, pkey_table_size, - to_fw_pkey_sz(128)); + to_fw_pkey_sz(dev, 128)); if (prof->mask & MLX5_PROF_MASK_QP_SIZE) MLX5_SET(cmd_hca_cap, set_hca_cap, log_max_qp, @@ -545,11 +546,11 @@ static int mlx5_core_set_issi(struct mlx5_core_dev *dev) mlx5_cmd_mbox_status(query_out, &status, &syndrome); if (status == MLX5_CMD_STAT_BAD_OP_ERR) { - pr_debug("Only ISSI 0 is supported\n"); + mlx5_core_dbg(dev, "Only ISSI 0 is supported\n"); return 0; } - printf("mlx5_core: ERR: ""failed to query ISSI\n"); + mlx5_core_err(dev, "failed to query ISSI\n"); return err; } @@ -564,7 +565,7 @@ static int mlx5_core_set_issi(struct mlx5_core_dev *dev) err = mlx5_cmd_exec(dev, set_in, sizeof(set_in), set_out, sizeof(set_out)); if (err) { - printf("mlx5_core: ERR: ""failed to set ISSI=1 err(%d)\n", err); + mlx5_core_err(dev, "failed to set ISSI=1 err(%d)\n", err); return err; } @@ -600,30 +601,6 @@ int mlx5_vector2eqn(struct mlx5_core_dev *dev, int vector, int *eqn, int *irqn) } EXPORT_SYMBOL(mlx5_vector2eqn); -int mlx5_rename_eq(struct mlx5_core_dev *dev, int eq_ix, char *name) -{ - struct mlx5_priv *priv = &dev->priv; - struct mlx5_eq_table *table = &priv->eq_table; - struct mlx5_eq *eq; - int err = -ENOENT; - - spin_lock(&table->lock); - list_for_each_entry(eq, &table->comp_eqs_list, list) { - if (eq->index == eq_ix) { - int irq_ix = eq_ix + MLX5_EQ_VEC_COMP_BASE; - - snprintf(priv->irq_info[irq_ix].name, MLX5_MAX_IRQ_NAME, - "%s-%d", name, eq_ix); - - err = 0; - break; - } - } - spin_unlock(&table->lock); - - return err; -} - static void free_comp_eqs(struct mlx5_core_dev *dev) { struct mlx5_eq_table *table = &dev->priv.eq_table; @@ -645,7 +622,6 @@ static void free_comp_eqs(struct mlx5_core_dev *dev) static int alloc_comp_eqs(struct mlx5_core_dev *dev) { struct mlx5_eq_table *table = &dev->priv.eq_table; - char name[MLX5_MAX_IRQ_NAME]; struct mlx5_eq *eq; int ncomp_vec; int nent; @@ -658,10 +634,9 @@ static int alloc_comp_eqs(struct mlx5_core_dev *dev) for (i = 0; i < ncomp_vec; i++) { eq = kzalloc(sizeof(*eq), GFP_KERNEL); - snprintf(name, MLX5_MAX_IRQ_NAME, "mlx5_comp%d", i); err = mlx5_create_map_eq(dev, eq, i + MLX5_EQ_VEC_COMP_BASE, nent, 0, - name, &dev->priv.uuari.uars[0]); + &dev->priv.uuari.uars[0]); if (err) { kfree(eq); goto clean; @@ -701,19 +676,33 @@ static inline int fw_initializing(struct mlx5_core_dev *dev) return ioread32be(&dev->iseg->initializing) >> 31; } -static int wait_fw_init(struct mlx5_core_dev *dev, u32 max_wait_mili) +static int wait_fw_init(struct mlx5_core_dev *dev, u32 max_wait_mili, + u32 warn_time_mili) { - u64 end = jiffies + msecs_to_jiffies(max_wait_mili); + int warn = jiffies + msecs_to_jiffies(warn_time_mili); + int end = jiffies + msecs_to_jiffies(max_wait_mili); int err = 0; - while (fw_initializing(dev)) { + MPASS(max_wait_mili > warn_time_mili); + + while (fw_initializing(dev) == 1) { if (time_after(jiffies, end)) { err = -EBUSY; break; } + if (warn_time_mili && time_after(jiffies, warn)) { + mlx5_core_warn(dev, + "Waiting for FW initialization, timeout abort in %u s\n", + (unsigned int)(jiffies_to_msecs(end - warn) / 1000)); + warn = jiffies + msecs_to_jiffies(warn_time_mili); + } msleep(FW_INIT_WAIT_MS); } + if (err != 0) + mlx5_core_dbg(dev, "Full initializing bit dword = 0x%x\n", + ioread32be(&dev->iseg->initializing)); + return err; } @@ -877,13 +866,13 @@ static int mlx5_pci_init(struct mlx5_core_dev *dev, struct mlx5_priv *priv) err = mlx5_pci_enable_device(dev); if (err) { - device_printf((&pdev->dev)->bsddev, "ERR: ""Cannot enable PCI device, aborting\n"); + mlx5_core_err(dev, "Cannot enable PCI device, aborting\n"); goto err_dbg; } err = request_bar(pdev); if (err) { - device_printf((&pdev->dev)->bsddev, "ERR: ""error requesting BARs, aborting\n"); + mlx5_core_err(dev, "error requesting BARs, aborting\n"); goto err_disable; } @@ -891,7 +880,7 @@ static int mlx5_pci_init(struct mlx5_core_dev *dev, struct mlx5_priv *priv) err = set_dma_caps(pdev); if (err) { - device_printf((&pdev->dev)->bsddev, "ERR: ""Failed setting DMA capabilities mask, aborting\n"); + mlx5_core_err(dev, "Failed setting DMA capabilities mask, aborting\n"); goto err_clr_master; } @@ -899,7 +888,7 @@ static int mlx5_pci_init(struct mlx5_core_dev *dev, struct mlx5_priv *priv) dev->iseg = ioremap(dev->iseg_base, sizeof(*dev->iseg)); if (!dev->iseg) { err = -ENOMEM; - device_printf((&pdev->dev)->bsddev, "ERR: ""Failed mapping initialization segment, aborting\n"); + mlx5_core_err(dev, "Failed mapping initialization segment, aborting\n"); goto err_clr_master; } @@ -922,28 +911,27 @@ static void mlx5_pci_close(struct mlx5_core_dev *dev, struct mlx5_priv *priv) static int mlx5_init_once(struct mlx5_core_dev *dev, struct mlx5_priv *priv) { - struct pci_dev *pdev = dev->pdev; int err; err = mlx5_vsc_find_cap(dev); if (err) - dev_err(&pdev->dev, "Unable to find vendor specific capabilities\n"); + mlx5_core_err(dev, "Unable to find vendor specific capabilities\n"); err = mlx5_query_hca_caps(dev); if (err) { - dev_err(&pdev->dev, "query hca failed\n"); + mlx5_core_err(dev, "query hca failed\n"); goto out; } err = mlx5_query_board_id(dev); if (err) { - dev_err(&pdev->dev, "query board id failed\n"); + mlx5_core_err(dev, "query board id failed\n"); goto out; } err = mlx5_eq_init(dev); if (err) { - dev_err(&pdev->dev, "failed to initialize eq\n"); + mlx5_core_err(dev, "failed to initialize eq\n"); goto out; } @@ -951,7 +939,7 @@ static int mlx5_init_once(struct mlx5_core_dev *dev, struct mlx5_priv *priv) err = mlx5_init_cq_table(dev); if (err) { - dev_err(&pdev->dev, "failed to initialize cq table\n"); + mlx5_core_err(dev, "failed to initialize cq table\n"); goto err_eq_cleanup; } @@ -965,7 +953,7 @@ static int mlx5_init_once(struct mlx5_core_dev *dev, struct mlx5_priv *priv) #ifdef RATELIMIT err = mlx5_init_rl_table(dev); if (err) { - dev_err(&pdev->dev, "Failed to init rate limiting\n"); + mlx5_core_err(dev, "Failed to init rate limiting\n"); goto err_tables_cleanup; } #endif @@ -1003,17 +991,16 @@ static void mlx5_cleanup_once(struct mlx5_core_dev *dev) static int mlx5_load_one(struct mlx5_core_dev *dev, struct mlx5_priv *priv, bool boot) { - struct pci_dev *pdev = dev->pdev; int err; mutex_lock(&dev->intf_state_mutex); if (test_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state)) { - dev_warn(&dev->pdev->dev, "%s: interface is up, NOP\n", - __func__); + mlx5_core_warn(dev, "interface is up, NOP\n"); goto out; } - device_printf((&pdev->dev)->bsddev, "INFO: ""firmware version: %d.%d.%d\n", fw_rev_maj(dev), fw_rev_min(dev), fw_rev_sub(dev)); + mlx5_core_dbg(dev, "firmware version: %d.%d.%d\n", + fw_rev_maj(dev), fw_rev_min(dev), fw_rev_sub(dev)); /* * On load removing any previous indication of internal error, @@ -1021,105 +1008,119 @@ static int mlx5_load_one(struct mlx5_core_dev *dev, struct mlx5_priv *priv, */ dev->state = MLX5_DEVICE_STATE_UP; + /* wait for firmware to accept initialization segments configurations + */ + err = wait_fw_init(dev, FW_PRE_INIT_TIMEOUT_MILI, + FW_INIT_WARN_MESSAGE_INTERVAL); + if (err) { + dev_err(&dev->pdev->dev, + "Firmware over %d MS in pre-initializing state, aborting\n", + FW_PRE_INIT_TIMEOUT_MILI); + goto out_err; + } + err = mlx5_cmd_init(dev); if (err) { - device_printf((&pdev->dev)->bsddev, "ERR: ""Failed initializing command interface, aborting\n"); + mlx5_core_err(dev, + "Failed initializing command interface, aborting\n"); goto out_err; } - err = wait_fw_init(dev, FW_INIT_TIMEOUT_MILI); + err = wait_fw_init(dev, FW_INIT_TIMEOUT_MILI, 0); if (err) { - device_printf((&dev->pdev->dev)->bsddev, "ERR: ""Firmware over %d MS in initializing state, aborting\n", FW_INIT_TIMEOUT_MILI); + mlx5_core_err(dev, + "Firmware over %d MS in initializing state, aborting\n", + FW_INIT_TIMEOUT_MILI); goto err_cmd_cleanup; } err = mlx5_core_enable_hca(dev); if (err) { - device_printf((&pdev->dev)->bsddev, "ERR: ""enable hca failed\n"); + mlx5_core_err(dev, "enable hca failed\n"); goto err_cmd_cleanup; } err = mlx5_core_set_issi(dev); if (err) { - device_printf((&pdev->dev)->bsddev, "ERR: ""failed to set issi\n"); + mlx5_core_err(dev, "failed to set issi\n"); goto err_disable_hca; } err = mlx5_pagealloc_start(dev); if (err) { - device_printf((&pdev->dev)->bsddev, "ERR: ""mlx5_pagealloc_start failed\n"); + mlx5_core_err(dev, "mlx5_pagealloc_start failed\n"); goto err_disable_hca; } err = mlx5_satisfy_startup_pages(dev, 1); if (err) { - device_printf((&pdev->dev)->bsddev, "ERR: ""failed to allocate boot pages\n"); + mlx5_core_err(dev, "failed to allocate boot pages\n"); goto err_pagealloc_stop; } err = set_hca_ctrl(dev); if (err) { - device_printf((&pdev->dev)->bsddev, "ERR: ""set_hca_ctrl failed\n"); + mlx5_core_err(dev, "set_hca_ctrl failed\n"); goto reclaim_boot_pages; } err = handle_hca_cap(dev); if (err) { - device_printf((&pdev->dev)->bsddev, "ERR: ""handle_hca_cap failed\n"); + mlx5_core_err(dev, "handle_hca_cap failed\n"); goto reclaim_boot_pages; } err = handle_hca_cap_atomic(dev); if (err) { - device_printf((&pdev->dev)->bsddev, "ERR: ""handle_hca_cap_atomic failed\n"); + mlx5_core_err(dev, "handle_hca_cap_atomic failed\n"); goto reclaim_boot_pages; } err = mlx5_satisfy_startup_pages(dev, 0); if (err) { - device_printf((&pdev->dev)->bsddev, "ERR: ""failed to allocate init pages\n"); + mlx5_core_err(dev, "failed to allocate init pages\n"); goto reclaim_boot_pages; } err = mlx5_cmd_init_hca(dev); if (err) { - device_printf((&pdev->dev)->bsddev, "ERR: ""init hca failed\n"); + mlx5_core_err(dev, "init hca failed\n"); goto reclaim_boot_pages; } mlx5_start_health_poll(dev); if (boot && mlx5_init_once(dev, priv)) { - dev_err(&pdev->dev, "sw objs init failed\n"); + mlx5_core_err(dev, "sw objs init failed\n"); goto err_stop_poll; } err = mlx5_enable_msix(dev); if (err) { - device_printf((&pdev->dev)->bsddev, "ERR: ""enable msix failed\n"); + mlx5_core_err(dev, "enable msix failed\n"); goto err_cleanup_once; } err = mlx5_alloc_uuars(dev, &priv->uuari); if (err) { - device_printf((&pdev->dev)->bsddev, "ERR: ""Failed allocating uar, aborting\n"); + mlx5_core_err(dev, "Failed allocating uar, aborting\n"); goto err_disable_msix; } err = mlx5_start_eqs(dev); if (err) { - device_printf((&pdev->dev)->bsddev, "ERR: ""Failed to start pages and async EQs\n"); + mlx5_core_err(dev, "Failed to start pages and async EQs\n"); goto err_free_uar; } err = alloc_comp_eqs(dev); if (err) { - device_printf((&pdev->dev)->bsddev, "ERR: ""Failed to alloc completion EQs\n"); + mlx5_core_err(dev, "Failed to alloc completion EQs\n"); goto err_stop_eqs; } if (map_bf_area(dev)) - device_printf((&pdev->dev)->bsddev, "ERR: ""Failed to map blue flame area\n"); + mlx5_core_err(dev, "Failed to map blue flame area\n"); err = mlx5_init_fs(dev); if (err) { @@ -1127,16 +1128,22 @@ static int mlx5_load_one(struct mlx5_core_dev *dev, struct mlx5_priv *priv, goto err_free_comp_eqs; } + err = mlx5_mpfs_init(dev); + if (err) { + mlx5_core_err(dev, "mpfs init failed %d\n", err); + goto err_fs; + } + err = mlx5_fpga_device_start(dev); if (err) { - dev_err(&pdev->dev, "fpga device start failed %d\n", err); - goto err_fpga_start; + mlx5_core_err(dev, "fpga device start failed %d\n", err); + goto err_mpfs; } err = mlx5_register_device(dev); if (err) { - dev_err(&pdev->dev, "mlx5_register_device failed %d\n", err); - goto err_fs; + mlx5_core_err(dev, "mlx5_register_device failed %d\n", err); + goto err_fpga; } set_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state); @@ -1145,7 +1152,12 @@ static int mlx5_load_one(struct mlx5_core_dev *dev, struct mlx5_priv *priv, mutex_unlock(&dev->intf_state_mutex); return 0; -err_fpga_start: +err_fpga: + mlx5_fpga_device_stop(dev); + +err_mpfs: + mlx5_mpfs_destroy(dev); + err_fs: mlx5_cleanup_fs(dev); @@ -1169,7 +1181,7 @@ static int mlx5_load_one(struct mlx5_core_dev *dev, struct mlx5_priv *priv, err_stop_poll: mlx5_stop_health_poll(dev, boot); if (mlx5_cmd_teardown_hca(dev)) { - device_printf((&dev->pdev->dev)->bsddev, "ERR: ""tear_down_hca failed, skip cleanup\n"); + mlx5_core_err(dev, "tear_down_hca failed, skip cleanup\n"); goto out_err; } @@ -1202,7 +1214,7 @@ static int mlx5_unload_one(struct mlx5_core_dev *dev, struct mlx5_priv *priv, mutex_lock(&dev->intf_state_mutex); if (!test_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state)) { - dev_warn(&dev->pdev->dev, "%s: interface is down, NOP\n", __func__); + mlx5_core_warn(dev, "%s: interface is down, NOP\n", __func__); if (cleanup) mlx5_cleanup_once(dev); goto out; @@ -1211,6 +1223,7 @@ static int mlx5_unload_one(struct mlx5_core_dev *dev, struct mlx5_priv *priv, mlx5_unregister_device(dev); mlx5_fpga_device_stop(dev); + mlx5_mpfs_destroy(dev); mlx5_cleanup_fs(dev); unmap_bf_area(dev); mlx5_wait_for_reclaim_vfs_pages(dev); @@ -1223,7 +1236,7 @@ static int mlx5_unload_one(struct mlx5_core_dev *dev, struct mlx5_priv *priv, mlx5_stop_health_poll(dev, cleanup); err = mlx5_cmd_teardown_hca(dev); if (err) { - device_printf((&dev->pdev->dev)->bsddev, "ERR: ""tear_down_hca failed, skip cleanup\n"); + mlx5_core_err(dev, "tear_down_hca failed, skip cleanup\n"); goto out; } mlx5_pagealloc_stop(dev); @@ -1259,13 +1272,31 @@ struct mlx5_core_event_handler { void *data); }; +#define MLX5_STATS_DESC(a, b, c, d, e, ...) d, e, + +#define MLX5_PORT_MODULE_ERROR_STATS(m) \ +m(+1, u64, power_budget_exceeded, "power_budget", "Module Power Budget Exceeded") \ +m(+1, u64, long_range, "long_range", "Module Long Range for non MLNX cable/module") \ +m(+1, u64, bus_stuck, "bus_stuck", "Module Bus stuck(I2C or data shorted)") \ +m(+1, u64, no_eeprom, "no_eeprom", "No EEPROM/retry timeout") \ +m(+1, u64, enforce_part_number, "enforce_part_number", "Module Enforce part number list") \ +m(+1, u64, unknown_id, "unknown_id", "Module Unknown identifier") \ +m(+1, u64, high_temp, "high_temp", "Module High Temperature") \ +m(+1, u64, cable_shorted, "cable_shorted", "Module Cable is shorted") + +static const char *mlx5_pme_err_desc[] = { + MLX5_PORT_MODULE_ERROR_STATS(MLX5_STATS_DESC) +}; + static int init_one(struct pci_dev *pdev, const struct pci_device_id *id) { struct mlx5_core_dev *dev; struct mlx5_priv *priv; device_t bsddev = pdev->dev.bsddev; - int err; + int i,err; + struct sysctl_oid *pme_sysctl_node; + struct sysctl_oid *pme_err_sysctl_node; dev = kzalloc(sizeof(*dev), GFP_KERNEL); priv = &dev->priv; @@ -1273,7 +1304,9 @@ static int init_one(struct pci_dev *pdev, priv->pci_dev_data = id->driver_data; if (mlx5_prof_sel < 0 || mlx5_prof_sel >= ARRAY_SIZE(profiles)) { - device_printf(bsddev, "WARN: selected profile out of range, selecting default (%d)\n", MLX5_DEFAULT_PROF); + device_printf(bsddev, + "WARN: selected profile out of range, selecting default (%d)\n", + MLX5_DEFAULT_PROF); mlx5_prof_sel = MLX5_DEFAULT_PROF; } dev->profile = &profiles[mlx5_prof_sel]; @@ -1297,6 +1330,41 @@ static int init_one(struct pci_dev *pdev, OID_AUTO, "power_value", CTLFLAG_RD, &dev->pwr_value, 0, "Current power value in Watts"); + pme_sysctl_node = SYSCTL_ADD_NODE(&dev->sysctl_ctx, + SYSCTL_CHILDREN(device_get_sysctl_tree(bsddev)), + OID_AUTO, "pme_stats", CTLFLAG_RD, NULL, + "Port module event statistics"); + if (pme_sysctl_node == NULL) { + err = -ENOMEM; + goto clean_sysctl_ctx; + } + pme_err_sysctl_node = SYSCTL_ADD_NODE(&dev->sysctl_ctx, + SYSCTL_CHILDREN(pme_sysctl_node), + OID_AUTO, "errors", CTLFLAG_RD, NULL, + "Port module event error statistics"); + if (pme_err_sysctl_node == NULL) { + err = -ENOMEM; + goto clean_sysctl_ctx; + } + SYSCTL_ADD_U64(&dev->sysctl_ctx, + SYSCTL_CHILDREN(pme_sysctl_node), OID_AUTO, + "module_plug", CTLFLAG_RD | CTLFLAG_MPSAFE, + &dev->priv.pme_stats.status_counters[MLX5_MODULE_STATUS_PLUGGED_ENABLED], + 0, "Number of time module plugged"); + SYSCTL_ADD_U64(&dev->sysctl_ctx, + SYSCTL_CHILDREN(pme_sysctl_node), OID_AUTO, + "module_unplug", CTLFLAG_RD | CTLFLAG_MPSAFE, + &dev->priv.pme_stats.status_counters[MLX5_MODULE_STATUS_UNPLUGGED], + 0, "Number of time module unplugged"); + for (i = 0 ; i < MLX5_MODULE_EVENT_ERROR_NUM; i++) { + SYSCTL_ADD_U64(&dev->sysctl_ctx, + SYSCTL_CHILDREN(pme_err_sysctl_node), OID_AUTO, + mlx5_pme_err_desc[2 * i], CTLFLAG_RD | CTLFLAG_MPSAFE, + &dev->priv.pme_stats.error_counters[i], + 0, mlx5_pme_err_desc[2 * i + 1]); + } + + INIT_LIST_HEAD(&priv->ctx_list); spin_lock_init(&priv->ctx_lock); mutex_init(&dev->pci_status_mutex); @@ -1304,13 +1372,13 @@ static int init_one(struct pci_dev *pdev, mtx_init(&dev->dump_lock, "mlx5dmp", NULL, MTX_DEF | MTX_NEW); err = mlx5_pci_init(dev, priv); if (err) { - device_printf(bsddev, "ERR: mlx5_pci_init failed %d\n", err); + mlx5_core_err(dev, "mlx5_pci_init failed %d\n", err); goto clean_dev; } err = mlx5_health_init(dev); if (err) { - device_printf(bsddev, "ERR: mlx5_health_init failed %d\n", err); + mlx5_core_err(dev, "mlx5_health_init failed %d\n", err); goto close_pci; } @@ -1318,7 +1386,7 @@ static int init_one(struct pci_dev *pdev, err = mlx5_load_one(dev, priv, true); if (err) { - device_printf(bsddev, "ERR: mlx5_load_one failed %d\n", err); + mlx5_core_err(dev, "mlx5_load_one failed %d\n", err); goto clean_health; } @@ -1335,8 +1403,9 @@ static int init_one(struct pci_dev *pdev, close_pci: mlx5_pci_close(dev, priv); clean_dev: - sysctl_ctx_free(&dev->sysctl_ctx); mtx_destroy(&dev->dump_lock); +clean_sysctl_ctx: + sysctl_ctx_free(&dev->sysctl_ctx); kfree(dev); return err; } @@ -1347,7 +1416,7 @@ static void remove_one(struct pci_dev *pdev) struct mlx5_priv *priv = &dev->priv; if (mlx5_unload_one(dev, priv, true)) { - dev_err(&dev->pdev->dev, "mlx5_unload_one failed\n"); + mlx5_core_err(dev, "mlx5_unload_one failed\n"); mlx5_health_cleanup(dev); return; } @@ -1368,7 +1437,7 @@ static pci_ers_result_t mlx5_pci_err_detected(struct pci_dev *pdev, struct mlx5_core_dev *dev = pci_get_drvdata(pdev); struct mlx5_priv *priv = &dev->priv; - dev_info(&pdev->dev, "%s was called\n", __func__); + mlx5_core_info(dev, "%s was called\n", __func__); mlx5_enter_error_state(dev, false); mlx5_unload_one(dev, priv, false); @@ -1386,12 +1455,12 @@ static pci_ers_result_t mlx5_pci_slot_reset(struct pci_dev *pdev) struct mlx5_core_dev *dev = pci_get_drvdata(pdev); int err = 0; - dev_info(&pdev->dev, "%s was called\n", __func__); + mlx5_core_info(dev,"%s was called\n", __func__); err = mlx5_pci_enable_device(dev); if (err) { - dev_err(&pdev->dev, "%s: mlx5_pci_enable_device failed with error code: %d\n" - , __func__, err); + mlx5_core_err(dev, "mlx5_pci_enable_device failed with error code: %d\n" + ,err); return PCI_ERS_RESULT_DISCONNECT; } pci_set_master(pdev); @@ -1419,29 +1488,31 @@ static void wait_vital(struct pci_dev *pdev) msleep(1000); for (i = 0; i < niter; i++) { if (pci_read_config_word(pdev, 2, &did)) { - dev_warn(&pdev->dev, "failed reading config word\n"); + mlx5_core_warn(dev, "failed reading config word\n"); break; } if (did == pdev->device) { - dev_info(&pdev->dev, "device ID correctly read after %d iterations\n", i); + mlx5_core_info(dev, + "device ID correctly read after %d iterations\n", i); break; } msleep(50); } if (i == niter) - dev_warn(&pdev->dev, "%s-%d: could not read device ID\n", __func__, __LINE__); + mlx5_core_warn(dev, "could not read device ID\n"); for (i = 0; i < niter; i++) { count = ioread32be(health->health_counter); if (count && count != 0xffffffff) { - dev_info(&pdev->dev, "Counter value 0x%x after %d iterations\n", count, i); + mlx5_core_info(dev, + "Counter value 0x%x after %d iterations\n", count, i); break; } msleep(50); } if (i == niter) - dev_warn(&pdev->dev, "%s-%d: could not read device ID\n", __func__, __LINE__); + mlx5_core_warn(dev, "could not read device ID\n"); } static void mlx5_pci_resume(struct pci_dev *pdev) @@ -1450,16 +1521,16 @@ static void mlx5_pci_resume(struct pci_dev *pdev) struct mlx5_priv *priv = &dev->priv; int err; - dev_info(&pdev->dev, "%s was called\n", __func__); + mlx5_core_info(dev,"%s was called\n", __func__); wait_vital(pdev); err = mlx5_load_one(dev, priv, false); if (err) - dev_err(&pdev->dev, "%s: mlx5_load_one failed with error code: %d\n" - , __func__, err); + mlx5_core_err(dev, + "mlx5_load_one failed with error code: %d\n" ,err); else - dev_info(&pdev->dev, "%s: device recovered\n", __func__); + mlx5_core_info(dev,"device recovered\n"); } static const struct pci_error_handlers mlx5_err_handler = { diff --git a/sys/dev/mlx5/mlx5_core/mlx5_mpfs.c b/sys/dev/mlx5/mlx5_core/mlx5_mpfs.c new file mode 100644 index 00000000000..698d6a2d597 --- /dev/null +++ b/sys/dev/mlx5/mlx5_core/mlx5_mpfs.c @@ -0,0 +1,127 @@ +/*- + * Copyright (c) 2019, Mellanox Technologies, Ltd. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#include +#include + +#include +#include +#include +#include + +#include "mlx5_core.h" + +#define MPFS_LOCK(dev) spin_lock(&(dev)->mpfs.spinlock) +#define MPFS_UNLOCK(dev) spin_unlock(&(dev)->mpfs.spinlock) + +int +mlx5_mpfs_add_mac(struct mlx5_core_dev *dev, u32 *p_index, const u8 *mac) +{ + const u32 l2table_size = MIN(1U << MLX5_CAP_GEN(dev, log_max_l2_table), + MLX5_MPFS_TABLE_MAX); + u32 in[MLX5_ST_SZ_DW(set_l2_table_entry_in)] = {}; + u32 out[MLX5_ST_SZ_DW(set_l2_table_entry_out)] = {}; + u8 *in_mac_addr; + u32 index; + int err; + + if (!MLX5_CAP_GEN(dev, eswitch_flow_table)) { + *p_index = 0; + return (0); + } + + MPFS_LOCK(dev); + index = find_first_zero_bit(dev->mpfs.bitmap, l2table_size); + if (index < l2table_size) + set_bit(index, dev->mpfs.bitmap); + MPFS_UNLOCK(dev); + + if (index >= l2table_size) + return (-ENOMEM); + + MLX5_SET(set_l2_table_entry_in, in, opcode, MLX5_CMD_OP_SET_L2_TABLE_ENTRY); + MLX5_SET(set_l2_table_entry_in, in, table_index, index); + + in_mac_addr = MLX5_ADDR_OF(set_l2_table_entry_in, in, mac_address); + ether_addr_copy(&in_mac_addr[2], mac); + + err = mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out)); + if (err != 0) { + MPFS_LOCK(dev); + clear_bit(index, dev->mpfs.bitmap); + MPFS_UNLOCK(dev); + } else { + *p_index = index; + } + return (err); +} + +int +mlx5_mpfs_del_mac(struct mlx5_core_dev *dev, u32 index) +{ + u32 in[MLX5_ST_SZ_DW(delete_l2_table_entry_in)] = {}; + u32 out[MLX5_ST_SZ_DW(delete_l2_table_entry_out)] = {}; + int err; + + if (!MLX5_CAP_GEN(dev, eswitch_flow_table)) { + if (index != 0) + return (-EINVAL); + return (0); + } + + MLX5_SET(delete_l2_table_entry_in, in, opcode, MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY); + MLX5_SET(delete_l2_table_entry_in, in, table_index, index); + + err = mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out)); + if (err == 0) { + MPFS_LOCK(dev); + clear_bit(index, dev->mpfs.bitmap); + MPFS_UNLOCK(dev); + } + return (err); +} + +int +mlx5_mpfs_init(struct mlx5_core_dev *dev) +{ + + spin_lock_init(&dev->mpfs.spinlock); + bitmap_zero(dev->mpfs.bitmap, MLX5_MPFS_TABLE_MAX); + return (0); +} + +void +mlx5_mpfs_destroy(struct mlx5_core_dev *dev) +{ + u32 num; + + num = bitmap_weight(dev->mpfs.bitmap, MLX5_MPFS_TABLE_MAX); + if (num != 0) + mlx5_core_err(dev, "Leaking %u MPFS MAC table entries\n", num); + + spin_lock_destroy(&dev->mpfs.spinlock); +} diff --git a/sys/dev/mlx5/mlx5_core/mlx5_port.c b/sys/dev/mlx5/mlx5_core/mlx5_port.c index 382865247b3..69ce916dcc0 100644 --- a/sys/dev/mlx5/mlx5_core/mlx5_port.c +++ b/sys/dev/mlx5/mlx5_core/mlx5_port.c @@ -618,7 +618,7 @@ int mlx5_core_access_ptys(struct mlx5_core_dev *dev, } EXPORT_SYMBOL_GPL(mlx5_core_access_ptys); -static int mtu_to_ib_mtu(int mtu) +static int mtu_to_ib_mtu(struct mlx5_core_dev *dev, int mtu) { switch (mtu) { case 256: return 1; @@ -627,7 +627,7 @@ static int mtu_to_ib_mtu(int mtu) case 2048: return 4; case 4096: return 5; default: - printf("mlx5_core: WARN: ""invalid mtu\n"); + mlx5_core_warn(dev, "invalid mtu\n"); return -1; } } @@ -661,11 +661,11 @@ int mlx5_core_access_pmtu(struct mlx5_core_dev *dev, if (!write) { pmtu->local_port = MLX5_GET(pmtu_reg, out, local_port); - pmtu->max_mtu = mtu_to_ib_mtu(MLX5_GET(pmtu_reg, out, + pmtu->max_mtu = mtu_to_ib_mtu(dev, MLX5_GET(pmtu_reg, out, max_mtu)); - pmtu->admin_mtu = mtu_to_ib_mtu(MLX5_GET(pmtu_reg, out, + pmtu->admin_mtu = mtu_to_ib_mtu(dev, MLX5_GET(pmtu_reg, out, admin_mtu)); - pmtu->oper_mtu = mtu_to_ib_mtu(MLX5_GET(pmtu_reg, out, + pmtu->oper_mtu = mtu_to_ib_mtu(dev, MLX5_GET(pmtu_reg, out, oper_mtu)); } @@ -1236,3 +1236,220 @@ mlx5_set_mfrl_reg(struct mlx5_core_dev *mdev, u8 reset_level) return (mlx5_core_access_reg(mdev, mfrl, sz, mfrl, sz, MLX5_REG_MFRL, 0, 1)); } + +/* speed in units of 1Mb */ +static const u32 mlx5e_link_speed[/*MLX5E_LINK_MODES_NUMBER*/] = { + [MLX5E_1000BASE_CX_SGMII] = 1000, + [MLX5E_1000BASE_KX] = 1000, + [MLX5E_10GBASE_CX4] = 10000, + [MLX5E_10GBASE_KX4] = 10000, + [MLX5E_10GBASE_KR] = 10000, + [MLX5E_20GBASE_KR2] = 20000, + [MLX5E_40GBASE_CR4] = 40000, + [MLX5E_40GBASE_KR4] = 40000, + [MLX5E_56GBASE_R4] = 56000, + [MLX5E_10GBASE_CR] = 10000, + [MLX5E_10GBASE_SR] = 10000, + [MLX5E_10GBASE_ER_LR] = 10000, + [MLX5E_40GBASE_SR4] = 40000, + [MLX5E_40GBASE_LR4_ER4] = 40000, + [MLX5E_50GBASE_SR2] = 50000, + [MLX5E_100GBASE_CR4] = 100000, + [MLX5E_100GBASE_SR4] = 100000, + [MLX5E_100GBASE_KR4] = 100000, + [MLX5E_100GBASE_LR4] = 100000, + [MLX5E_100BASE_TX] = 100, + [MLX5E_1000BASE_T] = 1000, + [MLX5E_10GBASE_T] = 10000, + [MLX5E_25GBASE_CR] = 25000, + [MLX5E_25GBASE_KR] = 25000, + [MLX5E_25GBASE_SR] = 25000, + [MLX5E_50GBASE_CR2] = 50000, + [MLX5E_50GBASE_KR2] = 50000, +}; + +static const u32 mlx5e_ext_link_speed[/*MLX5E_EXT_LINK_MODES_NUMBER*/] = { + [MLX5E_SGMII_100M] = 100, + [MLX5E_1000BASE_X_SGMII] = 1000, + [MLX5E_5GBASE_R] = 5000, + [MLX5E_10GBASE_XFI_XAUI_1] = 10000, + [MLX5E_40GBASE_XLAUI_4_XLPPI_4] = 40000, + [MLX5E_25GAUI_1_25GBASE_CR_KR] = 25000, + [MLX5E_50GAUI_2_LAUI_2_50GBASE_CR2_KR2] = 50000, + [MLX5E_50GAUI_1_LAUI_1_50GBASE_CR_KR] = 50000, + [MLX5E_CAUI_4_100GBASE_CR4_KR4] = 100000, + [MLX5E_200GAUI_4_200GBASE_CR4_KR4] = 200000, + [MLX5E_400GAUI_8] = 400000, +}; + +static void mlx5e_port_get_speed_arr(struct mlx5_core_dev *mdev, + const u32 **arr, u32 *size) +{ + bool ext = MLX5_CAP_PCAM_FEATURE(mdev, ptys_extended_ethernet); + + *size = ext ? ARRAY_SIZE(mlx5e_ext_link_speed) : + ARRAY_SIZE(mlx5e_link_speed); + *arr = ext ? mlx5e_ext_link_speed : mlx5e_link_speed; +} + +u32 mlx5e_port_ptys2speed(struct mlx5_core_dev *mdev, u32 eth_proto_oper) +{ + unsigned long temp = eth_proto_oper; + const u32 *table; + u32 speed = 0; + u32 max_size; + int i; + + mlx5e_port_get_speed_arr(mdev, &table, &max_size); + i = find_first_bit(&temp, max_size); + if (i < max_size) + speed = table[i]; + return speed; +} + +int mlx5_port_query_eth_proto(struct mlx5_core_dev *dev, u8 port, bool ext, + struct mlx5e_port_eth_proto *eproto) +{ + u32 out[MLX5_ST_SZ_DW(ptys_reg)]; + int err; + + if (!eproto) + return -EINVAL; + + err = mlx5_query_port_ptys(dev, out, sizeof(out), MLX5_PTYS_EN, port); + if (err) + return err; + + eproto->cap = MLX5_GET_ETH_PROTO(ptys_reg, out, ext, + eth_proto_capability); + eproto->admin = MLX5_GET_ETH_PROTO(ptys_reg, out, ext, eth_proto_admin); + eproto->oper = MLX5_GET_ETH_PROTO(ptys_reg, out, ext, eth_proto_oper); + return 0; +} + +int mlx5e_port_linkspeed(struct mlx5_core_dev *mdev, u32 *speed) +{ + struct mlx5e_port_eth_proto eproto; + bool ext; + int err; + + ext = MLX5_CAP_PCAM_FEATURE(mdev, ptys_extended_ethernet); + err = mlx5_port_query_eth_proto(mdev, 1, ext, &eproto); + if (err) + goto out; + + *speed = mlx5e_port_ptys2speed(mdev, eproto.oper); + if (!(*speed)) + err = -EINVAL; + +out: + return err; +} + +int mlx5e_port_query_pbmc(struct mlx5_core_dev *mdev, void *out) +{ + int sz = MLX5_ST_SZ_BYTES(pbmc_reg); + void *in; + int err; + + in = kzalloc(sz, GFP_KERNEL); + if (!in) + return -ENOMEM; + + MLX5_SET(pbmc_reg, in, local_port, 1); + err = mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PBMC, 0, 0); + + kfree(in); + return err; +} + +int mlx5e_port_set_pbmc(struct mlx5_core_dev *mdev, void *in) +{ + int sz = MLX5_ST_SZ_BYTES(pbmc_reg); + void *out; + int err; + + out = kzalloc(sz, GFP_KERNEL); + if (!out) + return -ENOMEM; + + MLX5_SET(pbmc_reg, in, local_port, 1); + err = mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PBMC, 0, 1); + + kfree(out); + return err; +} + +/* buffer[i]: buffer that priority i mapped to */ +int mlx5e_port_query_priority2buffer(struct mlx5_core_dev *mdev, u8 *buffer) +{ + int sz = MLX5_ST_SZ_BYTES(pptb_reg); + u32 prio_x_buff; + void *out; + void *in; + int prio; + int err; + + in = kzalloc(sz, GFP_KERNEL); + out = kzalloc(sz, GFP_KERNEL); + if (!in || !out) { + err = -ENOMEM; + goto out; + } + + MLX5_SET(pptb_reg, in, local_port, 1); + err = mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPTB, 0, 0); + if (err) + goto out; + + prio_x_buff = MLX5_GET(pptb_reg, out, prio_x_buff); + for (prio = 0; prio < 8; prio++) { + buffer[prio] = (u8)(prio_x_buff >> (4 * prio)) & 0xF; + mlx5_core_dbg(mdev, "prio %d, buffer %d\n", prio, buffer[prio]); + } +out: + kfree(in); + kfree(out); + return err; +} + +int mlx5e_port_set_priority2buffer(struct mlx5_core_dev *mdev, u8 *buffer) +{ + int sz = MLX5_ST_SZ_BYTES(pptb_reg); + u32 prio_x_buff; + void *out; + void *in; + int prio; + int err; + + in = kzalloc(sz, GFP_KERNEL); + out = kzalloc(sz, GFP_KERNEL); + if (!in || !out) { + err = -ENOMEM; + goto out; + } + + /* First query the pptb register */ + MLX5_SET(pptb_reg, in, local_port, 1); + err = mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPTB, 0, 0); + if (err) + goto out; + + memcpy(in, out, sz); + MLX5_SET(pptb_reg, in, local_port, 1); + + /* Update the pm and prio_x_buff */ + MLX5_SET(pptb_reg, in, pm, 0xFF); + + prio_x_buff = 0; + for (prio = 0; prio < 8; prio++) + prio_x_buff |= (buffer[prio] << (4 * prio)); + MLX5_SET(pptb_reg, in, prio_x_buff, prio_x_buff); + + err = mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPTB, 0, 1); + +out: + kfree(in); + kfree(out); + return err; +} diff --git a/sys/dev/mlx5/mlx5_core/mlx5_vsc.c b/sys/dev/mlx5/mlx5_core/mlx5_vsc.c index c21bb12679f..81574c14ec3 100644 --- a/sys/dev/mlx5/mlx5_core/mlx5_vsc.c +++ b/sys/dev/mlx5/mlx5_core/mlx5_vsc.c @@ -29,20 +29,6 @@ #include #include -#define MLX5_SEMAPHORE_SPACE_DOMAIN 0xA - -struct mlx5_ifc_vsc_space_bits { - u8 status[0x3]; - u8 reserved0[0xd]; - u8 space[0x10]; -}; - -struct mlx5_ifc_vsc_addr_bits { - u8 flag[0x1]; - u8 reserved0[0x1]; - u8 address[0x1e]; -}; - int mlx5_vsc_lock(struct mlx5_core_dev *mdev) { device_t dev = mdev->pdev->dev.bsddev; @@ -66,7 +52,7 @@ int mlx5_vsc_lock(struct mlx5_core_dev *mdev) * The PRM suggests random 0 - 10ms to prevent multiple * waiters on the same interval in order to avoid starvation */ - DELAY((random() % 11) * 1000); + DELAY((random() % 9000) + 1000); continue; } @@ -96,7 +82,8 @@ void mlx5_vsc_unlock(struct mlx5_core_dev *mdev) pci_write_config(dev, vsc_addr + MLX5_VSC_SEMA_OFFSET, 0, 4); } -static int mlx5_vsc_wait_on_flag(struct mlx5_core_dev *mdev, u32 expected) +int +mlx5_vsc_wait_on_flag(struct mlx5_core_dev *mdev, u32 expected) { device_t dev = mdev->pdev->dev.bsddev; int vsc_addr = mdev->vsc_addr; @@ -112,7 +99,7 @@ static int mlx5_vsc_wait_on_flag(struct mlx5_core_dev *mdev, u32 expected) break; retries++; - DELAY(10); + DELAY((random() % 90) + 10); } return 0; @@ -199,7 +186,7 @@ int mlx5_vsc_lock_addr_space(struct mlx5_core_dev *mdev, u32 addr) int ret; u32 id; - ret = mlx5_vsc_set_space(mdev, MLX5_SEMAPHORE_SPACE_DOMAIN); + ret = mlx5_vsc_set_space(mdev, MLX5_VSC_DOMAIN_SEMAPHORES); if (ret) return ret; @@ -226,7 +213,7 @@ int mlx5_vsc_unlock_addr_space(struct mlx5_core_dev *mdev, u32 addr) u32 data = 0; int ret; - ret = mlx5_vsc_set_space(mdev, MLX5_SEMAPHORE_SPACE_DOMAIN); + ret = mlx5_vsc_set_space(mdev, MLX5_VSC_DOMAIN_SEMAPHORES); if (ret) return ret; diff --git a/sys/dev/mlx5/mlx5_en/en.h b/sys/dev/mlx5/mlx5_en/en.h index 77652103b24..5225dbd744b 100644 --- a/sys/dev/mlx5/mlx5_en/en.h +++ b/sys/dev/mlx5/mlx5_en/en.h @@ -75,6 +75,9 @@ #define MLX5E_MAX_PRIORITY 8 +#define MLX5E_MAX_FEC_10X_25X 4 +#define MLX5E_MAX_FEC_50X 4 + /* IEEE 802.1Qaz standard supported values */ #define IEEE_8021QAZ_MAX_TCS 8 @@ -135,6 +138,10 @@ #define MLX5E_100MB (100000) #define MLX5E_1GB (1000000) +#define MLX5E_ZERO(ptr, field) \ + memset(&(ptr)->field, 0, \ + sizeof(*(ptr)) - __offsetof(__typeof(*(ptr)), field)) + MALLOC_DECLARE(M_MLX5EN); struct mlx5_core_dev; @@ -142,6 +149,21 @@ struct mlx5e_cq; typedef void (mlx5e_cq_comp_t)(struct mlx5_core_cq *); +#define mlx5_en_err(_dev, format, ...) \ + if_printf(_dev, "ERR: ""%s:%d:(pid %d): " format, \ + __func__, __LINE__, curthread->td_proc->p_pid, \ + ##__VA_ARGS__) + +#define mlx5_en_warn(_dev, format, ...) \ + if_printf(_dev, "WARN: ""%s:%d:(pid %d): " format, \ + __func__, __LINE__, curthread->td_proc->p_pid, \ + ##__VA_ARGS__) + +#define mlx5_en_info(_dev, format, ...) \ + if_printf(_dev, "INFO: ""%s:%d:(pid %d): " format, \ + __func__, __LINE__, curthread->td_proc->p_pid, \ + ##__VA_ARGS__) + #define MLX5E_STATS_COUNT(a, ...) a #define MLX5E_STATS_VAR(a, b, c, ...) b c; #define MLX5E_STATS_DESC(a, b, c, d, e, ...) d, e, @@ -255,7 +277,7 @@ struct mlx5e_vport_stats { m(+1, u64, out_broadcast_pkts, "out_broadcast_pkts", "Out broadcast packets") #define MLX5E_PPORT_ETHERNET_EXTENDED_STATS_DEBUG(m) \ - m(+1, u64, port_transmit_wait_high, "port_transmit_wait_high", "Port transmit wait high") \ + m(+1, u64, port_transmit_wait, "port_transmit_wait", "Port transmit wait") \ m(+1, u64, ecn_marked, "ecn_marked", "ECN marked") \ m(+1, u64, no_buffer_discard_mc, "no_buffer_discard_mc", "No buffer discard mc") \ m(+1, u64, rx_ebp, "rx_ebp", "RX EBP") \ @@ -339,14 +361,14 @@ struct mlx5e_vport_stats { /* Per priority statistics for PFC */ #define MLX5E_PPORT_PER_PRIO_STATS_SUB(m,n,p) \ m(n, p, +1, u64, rx_octets, "rx_octets", "Received octets") \ - m(n, p, +1, u64, reserved_0, "reserved_0", "Reserved") \ - m(n, p, +1, u64, reserved_1, "reserved_1", "Reserved") \ - m(n, p, +1, u64, reserved_2, "reserved_2", "Reserved") \ + m(n, p, +1, u64, rx_uc_frames, "rx_uc_frames", "Received unicast frames") \ + m(n, p, +1, u64, rx_mc_frames, "rx_mc_frames", "Received multicast frames") \ + m(n, p, +1, u64, rx_bc_frames, "rx_bc_frames", "Received broadcast frames") \ m(n, p, +1, u64, rx_frames, "rx_frames", "Received frames") \ m(n, p, +1, u64, tx_octets, "tx_octets", "Transmitted octets") \ - m(n, p, +1, u64, reserved_3, "reserved_3", "Reserved") \ - m(n, p, +1, u64, reserved_4, "reserved_4", "Reserved") \ - m(n, p, +1, u64, reserved_5, "reserved_5", "Reserved") \ + m(n, p, +1, u64, tx_uc_frames, "tx_uc_frames", "Transmitted unicast frames") \ + m(n, p, +1, u64, tx_mc_frames, "tx_mc_frames", "Transmitted multicast frames") \ + m(n, p, +1, u64, tx_bc_frames, "tx_bc_frames", "Transmitted broadcast frames") \ m(n, p, +1, u64, tx_frames, "tx_frames", "Transmitted frames") \ m(n, p, +1, u64, rx_pause, "rx_pause", "Received pause frames") \ m(n, p, +1, u64, rx_pause_duration, "rx_pause_duration", \ @@ -696,36 +718,13 @@ struct mlx5e_params_ethtool { u8 prio_tc[MLX5E_MAX_PRIORITY]; u8 dscp2prio[MLX5_MAX_SUPPORTED_DSCP]; u8 trust_state; + u8 fec_mask_10x_25x[MLX5E_MAX_FEC_10X_25X]; + u16 fec_mask_50x[MLX5E_MAX_FEC_50X]; + u8 fec_avail_10x_25x[MLX5E_MAX_FEC_10X_25X]; + u16 fec_avail_50x[MLX5E_MAX_FEC_50X]; + u32 fec_mode_active; }; -/* EEPROM Standards for plug in modules */ -#ifndef MLX5E_ETH_MODULE_SFF_8472 -#define MLX5E_ETH_MODULE_SFF_8472 0x1 -#define MLX5E_ETH_MODULE_SFF_8472_LEN 128 -#endif - -#ifndef MLX5E_ETH_MODULE_SFF_8636 -#define MLX5E_ETH_MODULE_SFF_8636 0x2 -#define MLX5E_ETH_MODULE_SFF_8636_LEN 256 -#endif - -#ifndef MLX5E_ETH_MODULE_SFF_8436 -#define MLX5E_ETH_MODULE_SFF_8436 0x3 -#define MLX5E_ETH_MODULE_SFF_8436_LEN 256 -#endif - -/* EEPROM I2C Addresses */ -#define MLX5E_I2C_ADDR_LOW 0x50 -#define MLX5E_I2C_ADDR_HIGH 0x51 - -#define MLX5E_EEPROM_LOW_PAGE 0x0 -#define MLX5E_EEPROM_HIGH_PAGE 0x3 - -#define MLX5E_EEPROM_HIGH_PAGE_OFFSET 128 -#define MLX5E_EEPROM_PAGE_LENGTH 256 - -#define MLX5E_EEPROM_INFO_BYTES 0x3 - struct mlx5e_cq { /* data path - accessed per cqe */ struct mlx5_cqwq wq; @@ -745,15 +744,18 @@ struct mlx5e_rq_mbuf { }; struct mlx5e_rq { + /* persistant fields */ + struct mtx mtx; + struct mlx5e_rq_stats stats; + /* data path */ +#define mlx5e_rq_zero_start wq struct mlx5_wq_ll wq; - struct mtx mtx; bus_dma_tag_t dma_tag; u32 wqe_sz; u32 nsegs; struct mlx5e_rq_mbuf *mbuf; struct ifnet *ifp; - struct mlx5e_rq_stats stats; struct mlx5e_cq cq; struct lro_ctrl lro; volatile int enabled; @@ -787,10 +789,14 @@ struct mlx5e_snd_tag { }; struct mlx5e_sq { - /* data path */ + /* persistant fields */ struct mtx lock; - bus_dma_tag_t dma_tag; struct mtx comp_lock; + struct mlx5e_sq_stats stats; + + /* data path */ +#define mlx5e_sq_zero_start dma_tag + bus_dma_tag_t dma_tag; /* dirtied @completion */ u16 cc; @@ -810,7 +816,6 @@ struct mlx5e_sq { u32 d32[2]; u64 d64; } doorbell; - struct mlx5e_sq_stats stats; struct mlx5e_cq cq; @@ -863,17 +868,11 @@ mlx5e_sq_queue_level(struct mlx5e_sq *sq) } struct mlx5e_channel { - /* data path */ struct mlx5e_rq rq; struct mlx5e_snd_tag tag; struct mlx5e_sq sq[MLX5E_MAX_TX_NUM_TC]; - u32 mkey_be; - u8 num_tc; - - /* control */ struct mlx5e_priv *priv; int ix; - int cpu; } __aligned(MLX5E_CACHELINE_SIZE); enum mlx5e_traffic_types { @@ -972,6 +971,11 @@ struct mlx5e_clbr_point { u_int clbr_gen; }; +struct mlx5e_dcbx { + u32 cable_len; + u32 xoff; +}; + struct mlx5e_priv { struct mlx5_core_dev *mdev; /* must be first */ @@ -987,6 +991,7 @@ struct mlx5e_priv { #define PRIV_LOCK(priv) sx_xlock(&(priv)->state_lock) #define PRIV_UNLOCK(priv) sx_xunlock(&(priv)->state_lock) #define PRIV_LOCKED(priv) sx_xlocked(&(priv)->state_lock) +#define PRIV_ASSERT_LOCKED(priv) sx_assert(&(priv)->state_lock, SA_XLOCKED) struct sx state_lock; /* Protects Interface state */ struct mlx5_uar cq_uar; u32 pdn; @@ -1039,6 +1044,9 @@ struct mlx5e_priv { struct mlx5e_clbr_point clbr_points[2]; u_int clbr_gen; + struct mlx5e_dcbx dcbx; + bool sw_is_port_buf_owner; + struct mlx5e_channel channel[]; }; @@ -1153,6 +1161,8 @@ mlx5e_unref_channel(struct mlx5e_priv *priv) atomic_fetchadd_int(&priv->channel_refs, -1); } +#define mlx5e_dbg(_IGN, _priv, ...) mlx5_core_dbg((_priv)->mdev, __VA_ARGS__) + extern const struct ethtool_ops mlx5e_ethtool_ops; void mlx5e_create_ethtool(struct mlx5e_priv *); void mlx5e_create_stats(struct sysctl_ctx_list *, @@ -1175,5 +1185,7 @@ void mlx5e_modify_rx_dma(struct mlx5e_priv *priv, uint8_t value); void mlx5e_resume_sq(struct mlx5e_sq *sq); void mlx5e_update_sq_inline(struct mlx5e_sq *sq); void mlx5e_refresh_sq_inline(struct mlx5e_priv *priv); +int mlx5e_update_buf_lossy(struct mlx5e_priv *priv); +int mlx5e_fec_update(struct mlx5e_priv *priv); #endif /* _MLX5_EN_H_ */ diff --git a/sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c b/sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c index 9322e3c880f..e31117a0e03 100644 --- a/sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c +++ b/sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c @@ -1,5 +1,5 @@ /*- - * Copyright (c) 2015 Mellanox Technologies. All rights reserved. + * Copyright (c) 2015-2019 Mellanox Technologies. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -26,7 +26,7 @@ */ #include "en.h" -#include +#include "port_buffer.h" void mlx5e_create_stats(struct sysctl_ctx_list *ctx, @@ -345,6 +345,285 @@ mlx5e_prio_to_tc_handler(SYSCTL_HANDLER_ARGS) return (err); } +int +mlx5e_fec_update(struct mlx5e_priv *priv) +{ + struct mlx5_core_dev *mdev = priv->mdev; + u32 in[MLX5_ST_SZ_DW(pplm_reg)] = {}; + const int sz = MLX5_ST_SZ_BYTES(pplm_reg); + int err; + + if (!MLX5_CAP_GEN(mdev, pcam_reg)) + return (EOPNOTSUPP); + + if (!MLX5_CAP_PCAM_REG(mdev, pplm)) + return (EOPNOTSUPP); + + MLX5_SET(pplm_reg, in, local_port, 1); + + err = -mlx5_core_access_reg(mdev, in, sz, in, sz, MLX5_REG_PPLM, 0, 0); + if (err) + return (err); + + /* get 10x..25x mask */ + priv->params_ethtool.fec_mask_10x_25x[0] = + MLX5_GET(pplm_reg, in, fec_override_admin_10g_40g); + priv->params_ethtool.fec_mask_10x_25x[1] = + MLX5_GET(pplm_reg, in, fec_override_admin_25g) & + MLX5_GET(pplm_reg, in, fec_override_admin_50g); + priv->params_ethtool.fec_mask_10x_25x[2] = + MLX5_GET(pplm_reg, in, fec_override_admin_56g); + priv->params_ethtool.fec_mask_10x_25x[3] = + MLX5_GET(pplm_reg, in, fec_override_admin_100g); + + /* get 10x..25x available bits */ + priv->params_ethtool.fec_avail_10x_25x[0] = + MLX5_GET(pplm_reg, in, fec_override_cap_10g_40g); + priv->params_ethtool.fec_avail_10x_25x[1] = + MLX5_GET(pplm_reg, in, fec_override_cap_25g) & + MLX5_GET(pplm_reg, in, fec_override_cap_50g); + priv->params_ethtool.fec_avail_10x_25x[2] = + MLX5_GET(pplm_reg, in, fec_override_cap_56g); + priv->params_ethtool.fec_avail_10x_25x[3] = + MLX5_GET(pplm_reg, in, fec_override_cap_100g); + + /* get 50x mask */ + priv->params_ethtool.fec_mask_50x[0] = + MLX5_GET(pplm_reg, in, fec_override_admin_50g_1x); + priv->params_ethtool.fec_mask_50x[1] = + MLX5_GET(pplm_reg, in, fec_override_admin_100g_2x); + priv->params_ethtool.fec_mask_50x[2] = + MLX5_GET(pplm_reg, in, fec_override_admin_200g_4x); + priv->params_ethtool.fec_mask_50x[3] = + MLX5_GET(pplm_reg, in, fec_override_admin_400g_8x); + + /* get 50x available bits */ + priv->params_ethtool.fec_avail_50x[0] = + MLX5_GET(pplm_reg, in, fec_override_cap_50g_1x); + priv->params_ethtool.fec_avail_50x[1] = + MLX5_GET(pplm_reg, in, fec_override_cap_100g_2x); + priv->params_ethtool.fec_avail_50x[2] = + MLX5_GET(pplm_reg, in, fec_override_cap_200g_4x); + priv->params_ethtool.fec_avail_50x[3] = + MLX5_GET(pplm_reg, in, fec_override_cap_400g_8x); + + /* get current FEC mask */ + priv->params_ethtool.fec_mode_active = + MLX5_GET(pplm_reg, in, fec_mode_active); + + return (0); +} + +static int +mlx5e_fec_mask_10x_25x_handler(SYSCTL_HANDLER_ARGS) +{ + struct mlx5e_priv *priv = arg1; + struct mlx5_core_dev *mdev = priv->mdev; + u32 out[MLX5_ST_SZ_DW(pplm_reg)] = {}; + u32 in[MLX5_ST_SZ_DW(pplm_reg)] = {}; + const int sz = MLX5_ST_SZ_BYTES(pplm_reg); + u8 fec_mask_10x_25x[MLX5E_MAX_FEC_10X_25X]; + u8 fec_cap_changed = 0; + u8 x; + int err; + + PRIV_LOCK(priv); + err = SYSCTL_OUT(req, priv->params_ethtool.fec_mask_10x_25x, + sizeof(priv->params_ethtool.fec_mask_10x_25x)); + if (err || !req->newptr) + goto done; + + err = SYSCTL_IN(req, fec_mask_10x_25x, + sizeof(fec_mask_10x_25x)); + if (err) + goto done; + + if (!MLX5_CAP_GEN(mdev, pcam_reg)) { + err = EOPNOTSUPP; + goto done; + } + + if (!MLX5_CAP_PCAM_REG(mdev, pplm)) { + err = EOPNOTSUPP; + goto done; + } + + MLX5_SET(pplm_reg, in, local_port, 1); + + err = -mlx5_core_access_reg(mdev, in, sz, in, sz, MLX5_REG_PPLM, 0, 0); + if (err) + goto done; + + /* range check input value */ + for (x = 0; x != MLX5E_MAX_FEC_10X_25X; x++) { + /* check only one bit is set, if any */ + if (fec_mask_10x_25x[x] & (fec_mask_10x_25x[x] - 1)) { + err = ERANGE; + goto done; + } + /* check a supported bit is set, if any */ + if (fec_mask_10x_25x[x] & + ~priv->params_ethtool.fec_avail_10x_25x[x]) { + err = ERANGE; + goto done; + } + fec_cap_changed |= (fec_mask_10x_25x[x] ^ + priv->params_ethtool.fec_mask_10x_25x[x]); + } + + /* check for no changes */ + if (fec_cap_changed == 0) + goto done; + + memset(in, 0, sizeof(in)); + + MLX5_SET(pplm_reg, in, local_port, 1); + + /* set new values */ + MLX5_SET(pplm_reg, in, fec_override_admin_10g_40g, fec_mask_10x_25x[0]); + MLX5_SET(pplm_reg, in, fec_override_admin_25g, fec_mask_10x_25x[1]); + MLX5_SET(pplm_reg, in, fec_override_admin_50g, fec_mask_10x_25x[1]); + MLX5_SET(pplm_reg, in, fec_override_admin_56g, fec_mask_10x_25x[2]); + MLX5_SET(pplm_reg, in, fec_override_admin_100g, fec_mask_10x_25x[3]); + + /* preserve other values */ + MLX5_SET(pplm_reg, in, fec_override_admin_50g_1x, priv->params_ethtool.fec_mask_50x[0]); + MLX5_SET(pplm_reg, in, fec_override_admin_100g_2x, priv->params_ethtool.fec_mask_50x[1]); + MLX5_SET(pplm_reg, in, fec_override_admin_200g_4x, priv->params_ethtool.fec_mask_50x[2]); + MLX5_SET(pplm_reg, in, fec_override_admin_400g_8x, priv->params_ethtool.fec_mask_50x[3]); + + /* send new value to the firmware */ + err = -mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPLM, 0, 1); + if (err) + goto done; + + memcpy(priv->params_ethtool.fec_mask_10x_25x, fec_mask_10x_25x, + sizeof(priv->params_ethtool.fec_mask_10x_25x)); + + mlx5_toggle_port_link(priv->mdev); +done: + PRIV_UNLOCK(priv); + return (err); +} + +static int +mlx5e_fec_avail_10x_25x_handler(SYSCTL_HANDLER_ARGS) +{ + struct mlx5e_priv *priv = arg1; + int err; + + PRIV_LOCK(priv); + err = SYSCTL_OUT(req, priv->params_ethtool.fec_avail_10x_25x, + sizeof(priv->params_ethtool.fec_avail_10x_25x)); + PRIV_UNLOCK(priv); + return (err); +} + +static int +mlx5e_fec_mask_50x_handler(SYSCTL_HANDLER_ARGS) +{ + struct mlx5e_priv *priv = arg1; + struct mlx5_core_dev *mdev = priv->mdev; + u32 out[MLX5_ST_SZ_DW(pplm_reg)] = {}; + u32 in[MLX5_ST_SZ_DW(pplm_reg)] = {}; + const int sz = MLX5_ST_SZ_BYTES(pplm_reg); + u16 fec_mask_50x[MLX5E_MAX_FEC_50X]; + u16 fec_cap_changed = 0; + u8 x; + int err; + + PRIV_LOCK(priv); + err = SYSCTL_OUT(req, priv->params_ethtool.fec_mask_50x, + sizeof(priv->params_ethtool.fec_mask_50x)); + if (err || !req->newptr) + goto done; + + err = SYSCTL_IN(req, fec_mask_50x, + sizeof(fec_mask_50x)); + if (err) + goto done; + + if (!MLX5_CAP_GEN(mdev, pcam_reg)) { + err = EOPNOTSUPP; + goto done; + } + + if (!MLX5_CAP_PCAM_REG(mdev, pplm)) { + err = EOPNOTSUPP; + goto done; + } + + MLX5_SET(pplm_reg, in, local_port, 1); + + err = -mlx5_core_access_reg(mdev, in, sz, in, sz, MLX5_REG_PPLM, 0, 0); + if (err) + goto done; + + /* range check input value */ + for (x = 0; x != MLX5E_MAX_FEC_50X; x++) { + /* check only one bit is set, if any */ + if (fec_mask_50x[x] & (fec_mask_50x[x] - 1)) { + err = ERANGE; + goto done; + } + /* check a supported bit is set, if any */ + if (fec_mask_50x[x] & + ~priv->params_ethtool.fec_avail_50x[x]) { + err = ERANGE; + goto done; + } + fec_cap_changed |= (fec_mask_50x[x] ^ + priv->params_ethtool.fec_mask_50x[x]); + } + + /* check for no changes */ + if (fec_cap_changed == 0) + goto done; + + memset(in, 0, sizeof(in)); + + MLX5_SET(pplm_reg, in, local_port, 1); + + /* set new values */ + MLX5_SET(pplm_reg, in, fec_override_admin_50g_1x, fec_mask_50x[0]); + MLX5_SET(pplm_reg, in, fec_override_admin_100g_2x, fec_mask_50x[1]); + MLX5_SET(pplm_reg, in, fec_override_admin_200g_4x, fec_mask_50x[2]); + MLX5_SET(pplm_reg, in, fec_override_admin_400g_8x, fec_mask_50x[3]); + + /* preserve other values */ + MLX5_SET(pplm_reg, in, fec_override_admin_10g_40g, priv->params_ethtool.fec_mask_10x_25x[0]); + MLX5_SET(pplm_reg, in, fec_override_admin_25g, priv->params_ethtool.fec_mask_10x_25x[1]); + MLX5_SET(pplm_reg, in, fec_override_admin_50g, priv->params_ethtool.fec_mask_10x_25x[1]); + MLX5_SET(pplm_reg, in, fec_override_admin_56g, priv->params_ethtool.fec_mask_10x_25x[2]); + MLX5_SET(pplm_reg, in, fec_override_admin_100g, priv->params_ethtool.fec_mask_10x_25x[3]); + + /* send new value to the firmware */ + err = -mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPLM, 0, 1); + if (err) + goto done; + + memcpy(priv->params_ethtool.fec_mask_50x, fec_mask_50x, + sizeof(priv->params_ethtool.fec_mask_50x)); + + mlx5_toggle_port_link(priv->mdev); +done: + PRIV_UNLOCK(priv); + return (err); +} + +static int +mlx5e_fec_avail_50x_handler(SYSCTL_HANDLER_ARGS) +{ + struct mlx5e_priv *priv = arg1; + int err; + + PRIV_LOCK(priv); + err = SYSCTL_OUT(req, priv->params_ethtool.fec_avail_50x, + sizeof(priv->params_ethtool.fec_avail_50x)); + PRIV_UNLOCK(priv); + return (err); +} + static int mlx5e_trust_state_handler(SYSCTL_HANDLER_ARGS) { @@ -429,6 +708,99 @@ mlx5e_dscp_prio_handler(SYSCTL_HANDLER_ARGS) return (err); } +int +mlx5e_update_buf_lossy(struct mlx5e_priv *priv) +{ + struct ieee_pfc pfc; + + PRIV_ASSERT_LOCKED(priv); + bzero(&pfc, sizeof(pfc)); + pfc.pfc_en = priv->params.rx_priority_flow_control; + return (-mlx5e_port_manual_buffer_config(priv, MLX5E_PORT_BUFFER_PFC, + priv->params_ethtool.hw_mtu, &pfc, NULL, NULL)); +} + +static int +mlx5e_buf_size_handler(SYSCTL_HANDLER_ARGS) +{ + struct mlx5e_priv *priv; + u32 buf_size[MLX5E_MAX_BUFFER]; + struct mlx5e_port_buffer port_buffer; + int error, i; + + priv = arg1; + PRIV_LOCK(priv); + error = -mlx5e_port_query_buffer(priv, &port_buffer); + if (error != 0) + goto done; + for (i = 0; i < nitems(buf_size); i++) + buf_size[i] = port_buffer.buffer[i].size; + error = SYSCTL_OUT(req, buf_size, sizeof(buf_size)); + if (error != 0 || req->newptr == NULL) + goto done; + error = SYSCTL_IN(req, buf_size, sizeof(buf_size)); + if (error != 0) + goto done; + error = -mlx5e_port_manual_buffer_config(priv, MLX5E_PORT_BUFFER_SIZE, + priv->params_ethtool.hw_mtu, NULL, buf_size, NULL); +done: + PRIV_UNLOCK(priv); + return (error); +} + +static int +mlx5e_buf_prio_handler(SYSCTL_HANDLER_ARGS) +{ + struct mlx5e_priv *priv; + struct mlx5_core_dev *mdev; + u8 buffer[MLX5E_MAX_BUFFER]; + int error; + + priv = arg1; + mdev = priv->mdev; + PRIV_LOCK(priv); + error = -mlx5e_port_query_priority2buffer(mdev, buffer); + if (error != 0) + goto done; + error = SYSCTL_OUT(req, buffer, MLX5E_MAX_BUFFER); + if (error != 0 || req->newptr == NULL) + goto done; + error = SYSCTL_IN(req, buffer, MLX5E_MAX_BUFFER); + if (error != 0) + goto done; + error = -mlx5e_port_manual_buffer_config(priv, + MLX5E_PORT_BUFFER_PRIO2BUFFER, + priv->params_ethtool.hw_mtu, NULL, NULL, buffer); + if (error == 0) + error = mlx5e_update_buf_lossy(priv); +done: + PRIV_UNLOCK(priv); + return (error); +} + +static int +mlx5e_cable_length_handler(SYSCTL_HANDLER_ARGS) +{ + struct mlx5e_priv *priv; + u_int cable_len; + int error; + + priv = arg1; + PRIV_LOCK(priv); + cable_len = priv->dcbx.cable_len; + error = sysctl_handle_int(oidp, &cable_len, 0, req); + if (error == 0 && req->newptr != NULL && + cable_len != priv->dcbx.cable_len) { + error = -mlx5e_port_manual_buffer_config(priv, + MLX5E_PORT_BUFFER_CABLE_LEN, priv->params_ethtool.hw_mtu, + NULL, NULL, NULL); + if (error == 0) + priv->dcbx.cable_len = cable_len; + } + PRIV_UNLOCK(priv); + return (error); +} + #define MLX5_PARAM_OFFSET(n) \ __offsetof(struct mlx5e_priv, params_ethtool.n) @@ -684,7 +1056,7 @@ mlx5e_ethtool_handler(SYSCTL_HANDLER_ARGS) } else { priv->params.hw_lro_en = false; - if_printf(priv->ifp, "To enable HW LRO " + mlx5_en_warn(priv->ifp, "To enable HW LRO " "please also enable LRO via ifconfig(8).\n"); } } else { @@ -807,213 +1179,6 @@ mlx5e_ethtool_handler(SYSCTL_HANDLER_ARGS) return (error); } -/* - * Read the first three bytes of the eeprom in order to get the needed info - * for the whole reading. - * Byte 0 - Identifier byte - * Byte 1 - Revision byte - * Byte 2 - Status byte - */ -static int -mlx5e_get_eeprom_info(struct mlx5e_priv *priv, struct mlx5e_eeprom *eeprom) -{ - struct mlx5_core_dev *dev = priv->mdev; - u32 data = 0; - int size_read = 0; - int ret; - - ret = mlx5_query_module_num(dev, &eeprom->module_num); - if (ret) { - if_printf(priv->ifp, "%s:%d: Failed query module error=%d\n", - __func__, __LINE__, ret); - return (ret); - } - - /* Read the first three bytes to get Identifier, Revision and Status */ - ret = mlx5_query_eeprom(dev, eeprom->i2c_addr, eeprom->page_num, - eeprom->device_addr, MLX5E_EEPROM_INFO_BYTES, eeprom->module_num, &data, - &size_read); - if (ret) { - if_printf(priv->ifp, "%s:%d: Failed query eeprom module error=0x%x\n", - __func__, __LINE__, ret); - return (ret); - } - - switch (data & MLX5_EEPROM_IDENTIFIER_BYTE_MASK) { - case SFF_8024_ID_QSFP: - eeprom->type = MLX5E_ETH_MODULE_SFF_8436; - eeprom->len = MLX5E_ETH_MODULE_SFF_8436_LEN; - break; - case SFF_8024_ID_QSFPPLUS: - case SFF_8024_ID_QSFP28: - if ((data & MLX5_EEPROM_IDENTIFIER_BYTE_MASK) == SFF_8024_ID_QSFP28 || - ((data & MLX5_EEPROM_REVISION_ID_BYTE_MASK) >> 8) >= 0x3) { - eeprom->type = MLX5E_ETH_MODULE_SFF_8636; - eeprom->len = MLX5E_ETH_MODULE_SFF_8636_LEN; - } else { - eeprom->type = MLX5E_ETH_MODULE_SFF_8436; - eeprom->len = MLX5E_ETH_MODULE_SFF_8436_LEN; - } - if ((data & MLX5_EEPROM_PAGE_3_VALID_BIT_MASK) == 0) - eeprom->page_valid = 1; - break; - case SFF_8024_ID_SFP: - eeprom->type = MLX5E_ETH_MODULE_SFF_8472; - eeprom->len = MLX5E_ETH_MODULE_SFF_8472_LEN; - break; - default: - if_printf(priv->ifp, "%s:%d: Not recognized cable type = 0x%x(%s)\n", - __func__, __LINE__, data & MLX5_EEPROM_IDENTIFIER_BYTE_MASK, - sff_8024_id[data & MLX5_EEPROM_IDENTIFIER_BYTE_MASK]); - return (EINVAL); - } - return (0); -} - -/* Read both low and high pages of the eeprom */ -static int -mlx5e_get_eeprom(struct mlx5e_priv *priv, struct mlx5e_eeprom *ee) -{ - struct mlx5_core_dev *dev = priv->mdev; - int size_read = 0; - int ret; - - if (ee->len == 0) - return (EINVAL); - - /* Read low page of the eeprom */ - while (ee->device_addr < ee->len) { - ret = mlx5_query_eeprom(dev, ee->i2c_addr, ee->page_num, ee->device_addr, - ee->len - ee->device_addr, ee->module_num, - ee->data + (ee->device_addr / 4), &size_read); - if (ret) { - if_printf(priv->ifp, "%s:%d: Failed reading eeprom, " - "error = 0x%02x\n", __func__, __LINE__, ret); - return (ret); - } - ee->device_addr += size_read; - } - - /* Read high page of the eeprom */ - if (ee->page_valid) { - ee->device_addr = MLX5E_EEPROM_HIGH_PAGE_OFFSET; - ee->page_num = MLX5E_EEPROM_HIGH_PAGE; - size_read = 0; - while (ee->device_addr < MLX5E_EEPROM_PAGE_LENGTH) { - ret = mlx5_query_eeprom(dev, ee->i2c_addr, ee->page_num, - ee->device_addr, MLX5E_EEPROM_PAGE_LENGTH - ee->device_addr, - ee->module_num, ee->data + (ee->len / 4) + - ((ee->device_addr - MLX5E_EEPROM_HIGH_PAGE_OFFSET) / 4), - &size_read); - if (ret) { - if_printf(priv->ifp, "%s:%d: Failed reading eeprom, " - "error = 0x%02x\n", __func__, __LINE__, ret); - return (ret); - } - ee->device_addr += size_read; - } - } - return (0); -} - -static void -mlx5e_print_eeprom(struct mlx5e_eeprom *eeprom) -{ - int row; - int index_in_row; - int byte_to_write = 0; - int line_length = 16; - - printf("\nOffset\t\tValues\n"); - printf("------\t\t------"); - while (byte_to_write < eeprom->len) { - printf("\n0x%04X\t\t", byte_to_write); - for (index_in_row = 0; index_in_row < line_length; index_in_row++) { - printf("%02X ", ((u8 *)eeprom->data)[byte_to_write]); - byte_to_write++; - } - } - - if (eeprom->page_valid) { - row = MLX5E_EEPROM_HIGH_PAGE_OFFSET; - printf("\n\nUpper Page 0x03\n"); - printf("\nOffset\t\tValues\n"); - printf("------\t\t------"); - while (row < MLX5E_EEPROM_PAGE_LENGTH) { - printf("\n0x%04X\t\t", row); - for (index_in_row = 0; index_in_row < line_length; index_in_row++) { - printf("%02X ", ((u8 *)eeprom->data)[byte_to_write]); - byte_to_write++; - row++; - } - } - } -} - -/* - * Read cable EEPROM module information by first inspecting the first - * three bytes to get the initial information for a whole reading. - * Information will be printed to dmesg. - */ -static int -mlx5e_read_eeprom(SYSCTL_HANDLER_ARGS) -{ - struct mlx5e_priv *priv = arg1; - struct mlx5e_eeprom eeprom; - int error; - int result = 0; - - PRIV_LOCK(priv); - error = sysctl_handle_int(oidp, &result, 0, req); - if (error || !req->newptr) - goto done; - - /* Check if device is gone */ - if (priv->gone) { - error = ENXIO; - goto done; - } - - if (result == 1) { - eeprom.i2c_addr = MLX5E_I2C_ADDR_LOW; - eeprom.device_addr = 0; - eeprom.page_num = MLX5E_EEPROM_LOW_PAGE; - eeprom.page_valid = 0; - - /* Read three first bytes to get important info */ - error = mlx5e_get_eeprom_info(priv, &eeprom); - if (error) { - if_printf(priv->ifp, "%s:%d: Failed reading eeprom's " - "initial information\n", __func__, __LINE__); - error = 0; - goto done; - } - /* - * Allocate needed length buffer and additional space for - * page 0x03 - */ - eeprom.data = malloc(eeprom.len + MLX5E_EEPROM_PAGE_LENGTH, - M_MLX5EN, M_WAITOK | M_ZERO); - - /* Read the whole eeprom information */ - error = mlx5e_get_eeprom(priv, &eeprom); - if (error) { - if_printf(priv->ifp, "%s:%d: Failed reading eeprom\n", - __func__, __LINE__); - error = 0; - /* - * Continue printing partial information in case of - * an error - */ - } - mlx5e_print_eeprom(&eeprom); - free(eeprom.data, M_MLX5EN); - } -done: - PRIV_UNLOCK(priv); - return (error); -} - static const char *mlx5e_params_desc[] = { MLX5E_PARAMS(MLX5E_STATS_DESC) }; @@ -1031,30 +1196,49 @@ mlx5e_ethtool_debug_channel_info(SYSCTL_HANDLER_ARGS) struct mlx5e_sq *sq; struct mlx5e_rq *rq; int error, i, tc; + bool opened; priv = arg1; error = sysctl_wire_old_buffer(req, 0); if (error != 0) return (error); - if (sbuf_new_for_sysctl(&sb, NULL, 128, req) == NULL) + if (sbuf_new_for_sysctl(&sb, NULL, 1024, req) == NULL) return (ENOMEM); sbuf_clear_flags(&sb, SBUF_INCLUDENUL); PRIV_LOCK(priv); - if (test_bit(MLX5E_STATE_OPENED, &priv->state) == 0) - goto out; - for (i = 0; i < priv->params.num_channels; i++) { - c = &priv->channel[i]; - rq = &c->rq; - sbuf_printf(&sb, "channel %d rq %d cq %d\n", - c->ix, rq->rqn, rq->cq.mcq.cqn); - for (tc = 0; tc < c->num_tc; tc++) { - sq = &c->sq[tc]; - sbuf_printf(&sb, "channel %d tc %d sq %d cq %d\n", - c->ix, tc, sq->sqn, sq->cq.mcq.cqn); + opened = test_bit(MLX5E_STATE_OPENED, &priv->state); + + sbuf_printf(&sb, "pages irq %d\n", + priv->mdev->priv.msix_arr[MLX5_EQ_VEC_PAGES].vector); + sbuf_printf(&sb, "command irq %d\n", + priv->mdev->priv.msix_arr[MLX5_EQ_VEC_CMD].vector); + sbuf_printf(&sb, "async irq %d\n", + priv->mdev->priv.msix_arr[MLX5_EQ_VEC_ASYNC].vector); + + for (i = 0; i != priv->params.num_channels; i++) { + int eqn_not_used = -1; + int irqn = MLX5_EQ_VEC_COMP_BASE; + + if (mlx5_vector2eqn(priv->mdev, i, &eqn_not_used, &irqn) != 0) + continue; + + c = opened ? &priv->channel[i] : NULL; + rq = opened ? &c->rq : NULL; + sbuf_printf(&sb, "channel %d rq %d cq %d irq %d\n", i, + opened ? rq->rqn : -1, + opened ? rq->cq.mcq.cqn : -1, + priv->mdev->priv.msix_arr[irqn].vector); + + for (tc = 0; tc != priv->num_tc; tc++) { + sq = opened ? &c->sq[tc] : NULL; + sbuf_printf(&sb, "channel %d tc %d sq %d cq %d irq %d\n", + i, tc, + opened ? sq->sqn : -1, + opened ? sq->cq.mcq.cqn : -1, + priv->mdev->priv.msix_arr[irqn].vector); } } -out: PRIV_UNLOCK(priv); error = sbuf_finish(&sb); sbuf_delete(&sb); @@ -1141,8 +1325,11 @@ mlx5e_create_diagnostics(struct mlx5e_priv *priv) void mlx5e_create_ethtool(struct mlx5e_priv *priv) { - struct sysctl_oid *node, *qos_node; + struct sysctl_oid *fec_node; + struct sysctl_oid *qos_node; + struct sysctl_oid *node; const char *pnameunit; + struct mlx5e_port_buffer port_buffer; unsigned x; int i; @@ -1221,6 +1408,54 @@ mlx5e_create_ethtool(struct mlx5e_priv *priv) } } + /* create fec node */ + fec_node = SYSCTL_ADD_NODE(&priv->sysctl_ctx, + SYSCTL_CHILDREN(node), OID_AUTO, + "fec", CTLFLAG_RW, NULL, "Forward Error Correction"); + if (fec_node == NULL) + return; + + if (mlx5e_fec_update(priv) == 0) { + SYSCTL_ADD_U32(&priv->sysctl_ctx, SYSCTL_CHILDREN(fec_node), OID_AUTO, + "mode_active", CTLFLAG_RD | CTLFLAG_MPSAFE, + &priv->params_ethtool.fec_mode_active, 0, + "Current FEC mode bit, if any."); + + SYSCTL_ADD_PROC(&priv->sysctl_ctx, SYSCTL_CHILDREN(fec_node), OID_AUTO, + "mask_10x_25x", CTLTYPE_U8 | CTLFLAG_RWTUN | CTLFLAG_MPSAFE, + priv, 0, &mlx5e_fec_mask_10x_25x_handler, "CU", + "Set FEC masks for 10G_40G, 25G_50G, 56G, 100G respectivly. " + "0:Auto " + "1:NOFEC " + "2:FIRECODE " + "4:RS"); + + SYSCTL_ADD_PROC(&priv->sysctl_ctx, SYSCTL_CHILDREN(fec_node), OID_AUTO, + "avail_10x_25x", CTLTYPE_U8 | CTLFLAG_RD | CTLFLAG_MPSAFE, + priv, 0, &mlx5e_fec_avail_10x_25x_handler, "CU", + "Get available FEC bits for 10G_40G, 25G_50G, 56G, 100G respectivly. " + "0:Auto " + "1:NOFEC " + "2:FIRECODE " + "4:RS"); + + SYSCTL_ADD_PROC(&priv->sysctl_ctx, SYSCTL_CHILDREN(fec_node), OID_AUTO, + "mask_50x", CTLTYPE_U16 | CTLFLAG_RWTUN | CTLFLAG_MPSAFE, + priv, 0, &mlx5e_fec_mask_50x_handler, "SU", + "Set FEC masks for 50G 1x, 100G 2x, 200G 4x, 400G 8x respectivly. " + "0:Auto " + "128:RS " + "512:LL RS"); + + SYSCTL_ADD_PROC(&priv->sysctl_ctx, SYSCTL_CHILDREN(fec_node), OID_AUTO, + "avail_50x", CTLTYPE_U16 | CTLFLAG_RD | CTLFLAG_MPSAFE, + priv, 0, &mlx5e_fec_avail_50x_handler, "SU", + "Get available FEC bits for 50G 1x, 100G 2x, 200G 4x, 400G 8x respectivly. " + "0:Auto " + "128:RS " + "512:LL RS"); + } + SYSCTL_ADD_PROC(&priv->sysctl_ctx, SYSCTL_CHILDREN(node), OID_AUTO, "debug_stats", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, priv, 0, &mlx5e_ethtool_debug_stats, "I", "Extended debug statistics"); @@ -1232,11 +1467,6 @@ mlx5e_create_ethtool(struct mlx5e_priv *priv) __DECONST(void *, pnameunit), 0, "PCI device name"); - /* EEPROM support */ - SYSCTL_ADD_PROC(&priv->sysctl_ctx, SYSCTL_CHILDREN(node), OID_AUTO, "eeprom_info", - CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, priv, 0, - mlx5e_read_eeprom, "I", "EEPROM information"); - /* Diagnostics support */ mlx5e_create_diagnostics(priv); @@ -1293,4 +1523,22 @@ mlx5e_create_ethtool(struct mlx5e_priv *priv) #undef B #undef A } + + if (mlx5e_port_query_buffer(priv, &port_buffer) == 0) { + SYSCTL_ADD_PROC(&priv->sysctl_ctx, SYSCTL_CHILDREN(qos_node), + OID_AUTO, "buffers_size", + CTLTYPE_U32 | CTLFLAG_RWTUN | CTLFLAG_MPSAFE, + priv, 0, mlx5e_buf_size_handler, "IU", + "Set buffers sizes"); + SYSCTL_ADD_PROC(&priv->sysctl_ctx, SYSCTL_CHILDREN(qos_node), + OID_AUTO, "buffers_prio", + CTLTYPE_U8 | CTLFLAG_RWTUN | CTLFLAG_MPSAFE, + priv, 0, mlx5e_buf_prio_handler, "CU", + "Set prio to buffers mapping"); + SYSCTL_ADD_PROC(&priv->sysctl_ctx, SYSCTL_CHILDREN(qos_node), + OID_AUTO, "cable_length", + CTLTYPE_UINT | CTLFLAG_RWTUN | CTLFLAG_MPSAFE, + priv, 0, mlx5e_cable_length_handler, "IU", + "Set cable length in meters for xoff threshold calculation"); + } } diff --git a/sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c b/sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c index 88fb7f75374..6a3641cc85c 100644 --- a/sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c +++ b/sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c @@ -29,6 +29,7 @@ #include #include +#include #define MLX5_SET_CFG(p, f, v) MLX5_SET(create_flow_group_in, p, f, v) @@ -54,6 +55,7 @@ enum { struct mlx5e_eth_addr_hash_node { LIST_ENTRY(mlx5e_eth_addr_hash_node) hlist; u8 action; + u32 mpfs_index; struct mlx5e_eth_addr_info ai; }; @@ -63,29 +65,23 @@ mlx5e_hash_eth_addr(const u8 * addr) return (addr[5]); } -static void +static bool mlx5e_add_eth_addr_to_hash(struct mlx5e_eth_addr_hash_head *hash, - const u8 * addr) + struct mlx5e_eth_addr_hash_node *hn_new) { struct mlx5e_eth_addr_hash_node *hn; - int ix = mlx5e_hash_eth_addr(addr); + u32 ix = mlx5e_hash_eth_addr(hn_new->ai.addr); LIST_FOREACH(hn, &hash[ix], hlist) { - if (bcmp(hn->ai.addr, addr, ETHER_ADDR_LEN) == 0) { + if (bcmp(hn->ai.addr, hn_new->ai.addr, ETHER_ADDR_LEN) == 0) { if (hn->action == MLX5E_ACTION_DEL) hn->action = MLX5E_ACTION_NONE; - return; + free(hn_new, M_MLX5EN); + return (false); } } - - hn = malloc(sizeof(*hn), M_MLX5EN, M_NOWAIT | M_ZERO); - if (hn == NULL) - return; - - ether_addr_copy(hn->ai.addr, addr); - hn->action = MLX5E_ACTION_ADD; - - LIST_INSERT_HEAD(&hash[ix], hn, hlist); + LIST_INSERT_HEAD(&hash[ix], hn_new, hlist); + return (true); } static void @@ -440,7 +436,7 @@ mlx5e_add_eth_addr_rule(struct mlx5e_priv *priv, match_value = mlx5_vzalloc(MLX5_ST_SZ_BYTES(fte_match_param)); match_criteria = mlx5_vzalloc(MLX5_ST_SZ_BYTES(fte_match_param)); if (!match_value || !match_criteria) { - if_printf(priv->ifp, "%s: alloc failed\n", __func__); + mlx5_en_err(priv->ifp, "alloc failed\n"); err = -ENOMEM; goto add_eth_addr_rule_out; } @@ -471,7 +467,7 @@ static int mlx5e_vport_context_update_vlans(struct mlx5e_priv *priv) max_list_size = 1 << MLX5_CAP_GEN(priv->mdev, log_max_vlan_list); if (list_size > max_list_size) { - if_printf(ifp, + mlx5_en_err(ifp, "ifnet vlans list size (%d) > (%d) max vport list size, some vlans will be dropped\n", list_size, max_list_size); list_size = max_list_size; @@ -490,7 +486,7 @@ static int mlx5e_vport_context_update_vlans(struct mlx5e_priv *priv) err = mlx5_modify_nic_vport_vlans(priv->mdev, vlans, list_size); if (err) - if_printf(ifp, "Failed to modify vport vlans list err(%d)\n", + mlx5_en_err(ifp, "Failed to modify vport vlans list err(%d)\n", err); kfree(vlans); @@ -553,7 +549,7 @@ mlx5e_add_vlan_rule_sub(struct mlx5e_priv *priv, if (IS_ERR(*rule_p)) { err = PTR_ERR(*rule_p); *rule_p = NULL; - if_printf(priv->ifp, "%s: add rule failed\n", __func__); + mlx5_en_err(priv->ifp, "add rule failed\n"); } return (err); @@ -570,7 +566,7 @@ mlx5e_add_vlan_rule(struct mlx5e_priv *priv, match_value = mlx5_vzalloc(MLX5_ST_SZ_BYTES(fte_match_param)); match_criteria = mlx5_vzalloc(MLX5_ST_SZ_BYTES(fte_match_param)); if (!match_value || !match_criteria) { - if_printf(priv->ifp, "%s: alloc failed\n", __func__); + mlx5_en_err(priv->ifp, "alloc failed\n"); err = -ENOMEM; goto add_vlan_rule_out; } @@ -757,6 +753,8 @@ mlx5e_execute_action(struct mlx5e_priv *priv, case MLX5E_ACTION_DEL: mlx5e_del_eth_addr_from_flow_table(priv, &hn->ai); + if (hn->mpfs_index != -1U) + mlx5_mpfs_del_mac(priv->mdev, hn->mpfs_index); mlx5e_del_eth_addr_from_hash(hn); break; @@ -765,34 +763,139 @@ mlx5e_execute_action(struct mlx5e_priv *priv, } } +static struct mlx5e_eth_addr_hash_node * +mlx5e_move_hn(struct mlx5e_eth_addr_hash_head *fh, struct mlx5e_eth_addr_hash_head *uh) +{ + struct mlx5e_eth_addr_hash_node *hn; + + hn = LIST_FIRST(fh); + if (hn != NULL) { + LIST_REMOVE(hn, hlist); + LIST_INSERT_HEAD(uh, hn, hlist); + } + return (hn); +} + +static struct mlx5e_eth_addr_hash_node * +mlx5e_remove_hn(struct mlx5e_eth_addr_hash_head *fh) +{ + struct mlx5e_eth_addr_hash_node *hn; + + hn = LIST_FIRST(fh); + if (hn != NULL) + LIST_REMOVE(hn, hlist); + return (hn); +} + static void mlx5e_sync_ifp_addr(struct mlx5e_priv *priv) { + struct mlx5e_eth_addr_hash_head head_free; + struct mlx5e_eth_addr_hash_head head_uc; + struct mlx5e_eth_addr_hash_head head_mc; + struct mlx5e_eth_addr_hash_node *hn; struct ifnet *ifp = priv->ifp; struct ifaddr *ifa; struct ifmultiaddr *ifma; + bool success = false; + size_t x; + size_t num; + + PRIV_ASSERT_LOCKED(priv); + + LIST_INIT(&head_free); + LIST_INIT(&head_uc); + LIST_INIT(&head_mc); +retry: + num = 1; + + if_addr_rlock(ifp); + CK_STAILQ_FOREACH(ifa, &ifp->if_addrhead, ifa_link) { + if (ifa->ifa_addr->sa_family != AF_LINK) + continue; + num++; + } + if_addr_runlock(ifp); + + if_maddr_rlock(ifp); + CK_STAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { + if (ifma->ifma_addr->sa_family != AF_LINK) + continue; + num++; + } + if_maddr_runlock(ifp); + + /* allocate place holders */ + for (x = 0; x != num; x++) { + hn = malloc(sizeof(*hn), M_MLX5EN, M_WAITOK | M_ZERO); + hn->action = MLX5E_ACTION_ADD; + hn->mpfs_index = -1U; + LIST_INSERT_HEAD(&head_free, hn, hlist); + } - /* XXX adding this entry might not be needed */ - mlx5e_add_eth_addr_to_hash(priv->eth_addr.if_uc, + hn = mlx5e_move_hn(&head_free, &head_uc); + if (hn == NULL) + goto cleanup; + + ether_addr_copy(hn->ai.addr, LLADDR((struct sockaddr_dl *)(ifp->if_addr->ifa_addr))); if_addr_rlock(ifp); CK_STAILQ_FOREACH(ifa, &ifp->if_addrhead, ifa_link) { if (ifa->ifa_addr->sa_family != AF_LINK) continue; - mlx5e_add_eth_addr_to_hash(priv->eth_addr.if_uc, + hn = mlx5e_move_hn(&head_free, &head_uc); + if (hn == NULL) + break; + ether_addr_copy(hn->ai.addr, LLADDR((struct sockaddr_dl *)ifa->ifa_addr)); } if_addr_runlock(ifp); + if (ifa != NULL) + goto cleanup; if_maddr_rlock(ifp); CK_STAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { if (ifma->ifma_addr->sa_family != AF_LINK) continue; - mlx5e_add_eth_addr_to_hash(priv->eth_addr.if_mc, + hn = mlx5e_move_hn(&head_free, &head_mc); + if (hn == NULL) + break; + ether_addr_copy(hn->ai.addr, LLADDR((struct sockaddr_dl *)ifma->ifma_addr)); } if_maddr_runlock(ifp); + if (ifma != NULL) + goto cleanup; + + /* insert L2 unicast addresses into hash list */ + + while ((hn = mlx5e_remove_hn(&head_uc)) != NULL) { + if (mlx5e_add_eth_addr_to_hash(priv->eth_addr.if_uc, hn) == 0) + continue; + if (hn->mpfs_index == -1U) + mlx5_mpfs_add_mac(priv->mdev, &hn->mpfs_index, hn->ai.addr); + } + + /* insert L2 multicast addresses into hash list */ + + while ((hn = mlx5e_remove_hn(&head_mc)) != NULL) { + if (mlx5e_add_eth_addr_to_hash(priv->eth_addr.if_mc, hn) == 0) + continue; + } + + success = true; + +cleanup: + while ((hn = mlx5e_remove_hn(&head_uc)) != NULL) + free(hn, M_MLX5EN); + while ((hn = mlx5e_remove_hn(&head_mc)) != NULL) + free(hn, M_MLX5EN); + while ((hn = mlx5e_remove_hn(&head_free)) != NULL) + free(hn, M_MLX5EN); + + if (success == false) + goto retry; } static void mlx5e_fill_addr_array(struct mlx5e_priv *priv, int list_type, @@ -845,7 +948,7 @@ static void mlx5e_vport_context_update_addr_list(struct mlx5e_priv *priv, size++; if (size > max_size) { - if_printf(priv->ifp, + mlx5_en_err(priv->ifp, "ifp %s list size (%d) > (%d) max vport list size, some addresses will be dropped\n", is_uc ? "UC" : "MC", size, max_size); size = max_size; @@ -863,7 +966,7 @@ static void mlx5e_vport_context_update_addr_list(struct mlx5e_priv *priv, err = mlx5_modify_nic_vport_mac_list(priv->mdev, list_type, addr_array, size); out: if (err) - if_printf(priv->ifp, + mlx5_en_err(priv->ifp, "Failed to modify vport %s list err(%d)\n", is_uc ? "UC" : "MC", err); kfree(addr_array); @@ -1491,6 +1594,8 @@ mlx5e_open_flow_table(struct mlx5e_priv *priv) void mlx5e_close_flow_table(struct mlx5e_priv *priv) { + + mlx5e_handle_ifp_addr(priv); mlx5e_destroy_inner_rss_flow_table(priv); mlx5e_destroy_main_flow_table(priv); mlx5e_destroy_vlan_flow_table(priv); diff --git a/sys/dev/mlx5/mlx5_en/mlx5_en_main.c b/sys/dev/mlx5/mlx5_en/mlx5_en_main.c index 2e10026cfc5..cd2a9372d25 100644 --- a/sys/dev/mlx5/mlx5_en/mlx5_en_main.c +++ b/sys/dev/mlx5/mlx5_en/mlx5_en_main.c @@ -31,9 +31,9 @@ #include #ifndef ETH_DRIVER_VERSION -#define ETH_DRIVER_VERSION "3.5.1" +#define ETH_DRIVER_VERSION "3.5.2" #endif -#define DRIVER_RELDATE "April 2019" +#define DRIVER_RELDATE "September 2019" static const char mlx5e_version[] = "mlx5en: Mellanox Ethernet driver " ETH_DRIVER_VERSION " (" DRIVER_RELDATE ")\n"; @@ -428,8 +428,8 @@ mlx5e_update_carrier(struct mlx5e_priv *priv) if (error) { priv->media_active_last = IFM_ETHER; priv->ifp->if_baudrate = 1; - if_printf(priv->ifp, "%s: query port ptys failed: " - "0x%x\n", __func__, error); + mlx5_en_err(priv->ifp, "query port ptys failed: 0x%x\n", + error); return; } @@ -447,8 +447,8 @@ mlx5e_update_carrier(struct mlx5e_priv *priv) } if (media_entry.subtype == 0) { - if_printf(priv->ifp, "%s: Could not find operational " - "media subtype\n", __func__); + mlx5_en_err(priv->ifp, + "Could not find operational media subtype\n"); return; } @@ -456,8 +456,8 @@ mlx5e_update_carrier(struct mlx5e_priv *priv) case IFM_10G_ER: error = mlx5_query_pddr_range_info(mdev, 1, &is_er_type); if (error != 0) { - if_printf(priv->ifp, "%s: query port pddr failed: %d\n", - __func__, error); + mlx5_en_err(priv->ifp, + "query port pddr failed: %d\n", error); } if (error != 0 || is_er_type == 0) media_entry.subtype = IFM_10G_LR; @@ -465,8 +465,8 @@ mlx5e_update_carrier(struct mlx5e_priv *priv) case IFM_40G_LR4: error = mlx5_query_pddr_range_info(mdev, 1, &is_er_type); if (error != 0) { - if_printf(priv->ifp, "%s: query port pddr failed: %d\n", - __func__, error); + mlx5_en_err(priv->ifp, + "query port pddr failed: %d\n", error); } if (error == 0 && is_er_type != 0) media_entry.subtype = IFM_40G_ER4; @@ -545,9 +545,8 @@ mlx5e_set_port_pfc(struct mlx5e_priv *priv) error = -ENXIO; } else if (priv->params.rx_pauseframe_control || priv->params.tx_pauseframe_control) { - if_printf(priv->ifp, - "Global pauseframes must be disabled before " - "enabling PFC.\n"); + mlx5_en_err(priv->ifp, + "Global pauseframes must be disabled before enabling PFC.\n"); error = -EINVAL; } else { error = mlx5e_set_port_pause_and_pfc(priv); @@ -580,7 +579,7 @@ mlx5e_media_change(struct ifnet *dev) error = mlx5_query_port_ptys(mdev, out, sizeof(out), MLX5_PTYS_EN, 1); if (error != 0) { - if_printf(dev, "Query port media capability failed\n"); + mlx5_en_err(dev, "Query port media capability failed\n"); goto done; } @@ -595,14 +594,14 @@ mlx5e_media_change(struct ifnet *dev) if (IFM_SUBTYPE(priv->media.ifm_media) == IFM_AUTO) { link_mode = eth_proto_cap; if (link_mode == 0) { - if_printf(dev, "Port media capability is zero\n"); + mlx5_en_err(dev, "Port media capability is zero\n"); error = EINVAL; goto done; } } else { link_mode = link_mode & eth_proto_cap; if (link_mode == 0) { - if_printf(dev, "Not supported link mode requested\n"); + mlx5_en_err(dev, "Not supported link mode requested\n"); error = EINVAL; goto done; } @@ -611,7 +610,7 @@ mlx5e_media_change(struct ifnet *dev) /* check if PFC is enabled */ if (priv->params.rx_priority_flow_control || priv->params.tx_priority_flow_control) { - if_printf(dev, "PFC must be disabled before enabling global pauseframes.\n"); + mlx5_en_err(dev, "PFC must be disabled before enabling global pauseframes.\n"); error = EINVAL; goto done; } @@ -860,6 +859,7 @@ mlx5e_update_stats_locked(struct mlx5e_priv *priv) u64 rx_packets = 0; u64 rx_bytes = 0; u32 rx_out_of_buffer = 0; + int error; int i; int j; @@ -1016,11 +1016,19 @@ mlx5e_update_stats_locked(struct mlx5e_priv *priv) /* Update diagnostics, if any */ if (priv->params_ethtool.diag_pci_enable || priv->params_ethtool.diag_general_enable) { - int error = mlx5_core_get_diagnostics_full(mdev, + error = mlx5_core_get_diagnostics_full(mdev, priv->params_ethtool.diag_pci_enable ? &priv->params_pci : NULL, priv->params_ethtool.diag_general_enable ? &priv->params_general : NULL); if (error != 0) - if_printf(priv->ifp, "Failed reading diagnostics: %d\n", error); + mlx5_en_err(priv->ifp, + "Failed reading diagnostics: %d\n", error); + } + + /* Update FEC, if any */ + error = mlx5e_fec_update(priv); + if (error != 0 && error != EOPNOTSUPP) { + mlx5_en_err(priv->ifp, + "Updating FEC failed: %d\n", error); } } @@ -1172,8 +1180,8 @@ mlx5e_calibration_callout(void *arg) if (((next->clbr_hw_curr - curr->clbr_hw_curr) >> MLX5E_TSTMP_PREC) == 0) { if (priv->clbr_done != 0) { - if_printf(priv->ifp, "HW failed tstmp frozen %#jx %#jx," - "disabling\n", + mlx5_en_err(priv->ifp, + "HW failed tstmp frozen %#jx %#jx, disabling\n", next->clbr_hw_curr, curr->clbr_hw_prev); priv->clbr_done = 0; } @@ -1264,7 +1272,7 @@ mlx5e_create_rq(struct mlx5e_channel *c, /* set value for constant fields */ for (j = 0; j < rq->nsegs; j++) - wqe->data[j].lkey = c->mkey_be; + wqe->data[j].lkey = cpu_to_be32(priv->mr.key); } INIT_WORK(&rq->dim.work, mlx5e_dim_work); @@ -1472,8 +1480,6 @@ mlx5e_close_rq(struct mlx5e_rq *rq) callout_stop(&rq->watchdog); mtx_unlock(&rq->mtx); - callout_drain(&rq->watchdog); - mlx5e_modify_rq(rq, MLX5_RQC_STATE_RDY, MLX5_RQC_STATE_ERR); } @@ -1555,7 +1561,7 @@ mlx5e_refresh_sq_inline_sub(struct mlx5e_priv *priv, struct mlx5e_channel *c) { int i; - for (i = 0; i != c->num_tc; i++) { + for (i = 0; i != priv->num_tc; i++) { mtx_lock(&c->sq[i].lock); mlx5e_update_sq_inline(&c->sq[i]); mtx_unlock(&c->sq[i].lock); @@ -1620,7 +1626,7 @@ mlx5e_create_sq(struct mlx5e_channel *c, if (err) goto err_sq_wq_destroy; - sq->mkey_be = c->mkey_be; + sq->mkey_be = cpu_to_be32(priv->mr.key); sq->ifp = priv->ifp; sq->priv = priv; sq->tc = tc; @@ -1742,6 +1748,12 @@ mlx5e_open_sq(struct mlx5e_channel *c, { int err; + sq->cev_factor = c->priv->params_ethtool.tx_completion_fact; + + /* ensure the TX completion event factor is not zero */ + if (sq->cev_factor == 0) + sq->cev_factor = 1; + err = mlx5e_create_sq(c, tc, param, sq); if (err) return (err); @@ -1853,9 +1865,6 @@ mlx5e_drain_sq(struct mlx5e_sq *sq) mlx5e_sq_send_nops_locked(sq, 1); mtx_unlock(&sq->lock); - /* make sure it is safe to free the callout */ - callout_drain(&sq->cev_callout); - /* wait till SQ is empty or link is down */ mtx_lock(&sq->lock); while (sq->cc != sq->pc && @@ -1871,7 +1880,7 @@ mlx5e_drain_sq(struct mlx5e_sq *sq) /* error out remaining requests */ error = mlx5e_modify_sq(sq, MLX5_SQC_STATE_RDY, MLX5_SQC_STATE_ERR); if (error != 0) { - if_printf(sq->ifp, + mlx5_en_err(sq->ifp, "mlx5e_modify_sq() from RDY to ERR failed: %d\n", error); } @@ -1913,13 +1922,15 @@ mlx5e_create_cq(struct mlx5e_priv *priv, param->wq.buf_numa_node = 0; param->wq.db_numa_node = 0; + err = mlx5_vector2eqn(mdev, eq_ix, &eqn_not_used, &irqn); + if (err) + return (err); + err = mlx5_cqwq_create(mdev, ¶m->wq, param->cqc, &cq->wq, &cq->wq_ctrl); if (err) return (err); - mlx5_vector2eqn(mdev, eq_ix, &eqn_not_used, &irqn); - mcq->cqe_sz = 64; mcq->set_ci_db = cq->wq_ctrl.db.db; mcq->arm_db = cq->wq_ctrl.db.db + 1; @@ -2038,7 +2049,7 @@ mlx5e_open_tx_cqs(struct mlx5e_channel *c, int err; int tc; - for (tc = 0; tc < c->num_tc; tc++) { + for (tc = 0; tc < c->priv->num_tc; tc++) { /* open completion queue */ err = mlx5e_open_cq(c->priv, &cparam->tx_cq, &c->sq[tc].cq, &mlx5e_tx_cq_comp, c->ix); @@ -2059,7 +2070,7 @@ mlx5e_close_tx_cqs(struct mlx5e_channel *c) { int tc; - for (tc = 0; tc < c->num_tc; tc++) + for (tc = 0; tc < c->priv->num_tc; tc++) mlx5e_close_cq(&c->sq[tc].cq); } @@ -2070,7 +2081,7 @@ mlx5e_open_sqs(struct mlx5e_channel *c, int err; int tc; - for (tc = 0; tc < c->num_tc; tc++) { + for (tc = 0; tc < c->priv->num_tc; tc++) { err = mlx5e_open_sq(c, tc, &cparam->sq, &c->sq[tc]); if (err) goto err_close_sqs; @@ -2090,20 +2101,28 @@ mlx5e_close_sqs_wait(struct mlx5e_channel *c) { int tc; - for (tc = 0; tc < c->num_tc; tc++) + for (tc = 0; tc < c->priv->num_tc; tc++) mlx5e_close_sq_wait(&c->sq[tc]); } static void -mlx5e_chan_mtx_init(struct mlx5e_channel *c) +mlx5e_chan_static_init(struct mlx5e_priv *priv, struct mlx5e_channel *c, int ix) { int tc; + /* setup priv and channel number */ + c->priv = priv; + c->ix = ix; + + /* setup send tag */ + c->tag.m_snd_tag.ifp = priv->ifp; + c->tag.type = IF_SND_TAG_TYPE_UNLIMITED; + mtx_init(&c->rq.mtx, "mlx5rx", MTX_NETWORK_LOCK, MTX_DEF); callout_init_mtx(&c->rq.watchdog, &c->rq.mtx, 0); - for (tc = 0; tc < c->num_tc; tc++) { + for (tc = 0; tc != MLX5E_MAX_TX_NUM_TC; tc++) { struct mlx5e_sq *sq = c->sq + tc; mtx_init(&sq->lock, "mlx5tx", @@ -2112,47 +2131,36 @@ mlx5e_chan_mtx_init(struct mlx5e_channel *c) MTX_NETWORK_LOCK " TX", MTX_DEF); callout_init_mtx(&sq->cev_callout, &sq->lock, 0); - - sq->cev_factor = c->priv->params_ethtool.tx_completion_fact; - - /* ensure the TX completion event factor is not zero */ - if (sq->cev_factor == 0) - sq->cev_factor = 1; } } static void -mlx5e_chan_mtx_destroy(struct mlx5e_channel *c) +mlx5e_chan_static_destroy(struct mlx5e_channel *c) { int tc; + callout_drain(&c->rq.watchdog); + mtx_destroy(&c->rq.mtx); - for (tc = 0; tc < c->num_tc; tc++) { + for (tc = 0; tc != MLX5E_MAX_TX_NUM_TC; tc++) { + callout_drain(&c->sq[tc].cev_callout); mtx_destroy(&c->sq[tc].lock); mtx_destroy(&c->sq[tc].comp_lock); } } static int -mlx5e_open_channel(struct mlx5e_priv *priv, int ix, +mlx5e_open_channel(struct mlx5e_priv *priv, struct mlx5e_channel_param *cparam, struct mlx5e_channel *c) { - int err; - - memset(c, 0, sizeof(*c)); - - c->priv = priv; - c->ix = ix; - /* setup send tag */ - c->tag.m_snd_tag.ifp = priv->ifp; - c->tag.type = IF_SND_TAG_TYPE_UNLIMITED; - c->mkey_be = cpu_to_be32(priv->mr.key); - c->num_tc = priv->num_tc; + int i, err; - /* init mutexes */ - mlx5e_chan_mtx_init(c); + /* zero non-persistant data */ + MLX5E_ZERO(&c->rq, mlx5e_rq_zero_start); + for (i = 0; i != priv->num_tc; i++) + MLX5E_ZERO(&c->sq[i], mlx5e_sq_zero_start); /* open transmit completion queue */ err = mlx5e_open_tx_cqs(c, cparam); @@ -2188,8 +2196,6 @@ mlx5e_open_channel(struct mlx5e_priv *priv, int ix, mlx5e_close_tx_cqs(c); err_free: - /* destroy mutexes */ - mlx5e_chan_mtx_destroy(c); return (err); } @@ -2205,8 +2211,6 @@ mlx5e_close_channel_wait(struct mlx5e_channel *c) mlx5e_close_rq_wait(&c->rq); mlx5e_close_sqs_wait(c); mlx5e_close_tx_cqs(c); - /* destroy mutexes */ - mlx5e_chan_mtx_destroy(c); } static int @@ -2402,14 +2406,16 @@ mlx5e_build_channel_param(struct mlx5e_priv *priv, static int mlx5e_open_channels(struct mlx5e_priv *priv) { - struct mlx5e_channel_param cparam; + struct mlx5e_channel_param *cparam; int err; int i; int j; - mlx5e_build_channel_param(priv, &cparam); + cparam = malloc(sizeof(*cparam), M_MLX5EN, M_WAITOK); + + mlx5e_build_channel_param(priv, cparam); for (i = 0; i < priv->params.num_channels; i++) { - err = mlx5e_open_channel(priv, i, &cparam, &priv->channel[i]); + err = mlx5e_open_channel(priv, cparam, &priv->channel[i]); if (err) goto err_close_channels; } @@ -2419,6 +2425,7 @@ mlx5e_open_channels(struct mlx5e_priv *priv) if (err) goto err_close_channels; } + free(cparam, M_MLX5EN); return (0); err_close_channels: @@ -2426,6 +2433,7 @@ mlx5e_open_channels(struct mlx5e_priv *priv) mlx5e_close_channel(&priv->channel[i]); mlx5e_close_channel_wait(&priv->channel[i]); } + free(cparam, M_MLX5EN); return (err); } @@ -2535,7 +2543,7 @@ mlx5e_refresh_channel_params_sub(struct mlx5e_priv *priv, struct mlx5e_channel * if (err) goto done; - for (i = 0; i != c->num_tc; i++) { + for (i = 0; i != priv->num_tc; i++) { err = mlx5e_refresh_sq_params(priv, &c->sq[i]); if (err) goto done; @@ -2934,16 +2942,17 @@ mlx5e_set_dev_port_mtu(struct ifnet *ifp, int sw_mtu) err = mlx5_set_port_mtu(mdev, hw_mtu); if (err) { - if_printf(ifp, "%s: mlx5_set_port_mtu failed setting %d, err=%d\n", - __func__, sw_mtu, err); + mlx5_en_err(ifp, "mlx5_set_port_mtu failed setting %d, err=%d\n", + sw_mtu, err); return (err); } /* Update vport context MTU */ err = mlx5_set_vport_mtu(mdev, hw_mtu); if (err) { - if_printf(ifp, "%s: Failed updating vport context with MTU size, err=%d\n", - __func__, err); + mlx5_en_err(ifp, + "Failed updating vport context with MTU size, err=%d\n", + err); } ifp->if_mtu = sw_mtu; @@ -2954,17 +2963,19 @@ mlx5e_set_dev_port_mtu(struct ifnet *ifp, int sw_mtu) err = mlx5_query_port_oper_mtu(mdev, &hw_mtu); } if (err) { - if_printf(ifp, "Query port MTU, after setting new " - "MTU value, failed\n"); + mlx5_en_err(ifp, + "Query port MTU, after setting new MTU value, failed\n"); return (err); } else if (MLX5E_HW2SW_MTU(hw_mtu) < sw_mtu) { err = -E2BIG, - if_printf(ifp, "Port MTU %d is smaller than " - "ifp mtu %d\n", hw_mtu, sw_mtu); + mlx5_en_err(ifp, + "Port MTU %d is smaller than ifp mtu %d\n", + hw_mtu, sw_mtu); } else if (MLX5E_HW2SW_MTU(hw_mtu) > sw_mtu) { err = -EINVAL; - if_printf(ifp, "Port MTU %d is bigger than " - "ifp mtu %d\n", hw_mtu, sw_mtu); + mlx5_en_err(ifp, + "Port MTU %d is bigger than ifp mtu %d\n", + hw_mtu, sw_mtu); } priv->params_ethtool.hw_mtu = hw_mtu; @@ -2984,23 +2995,21 @@ mlx5e_open_locked(struct ifnet *ifp) #ifdef RSS if (rss_getnumbuckets() > priv->params.num_channels) { - if_printf(ifp, "NOTE: There are more RSS buckets(%u) than " - "channels(%u) available\n", rss_getnumbuckets(), - priv->params.num_channels); + mlx5_en_info(ifp, + "NOTE: There are more RSS buckets(%u) than channels(%u) available\n", + rss_getnumbuckets(), priv->params.num_channels); } #endif err = mlx5e_open_tises(priv); if (err) { - if_printf(ifp, "%s: mlx5e_open_tises failed, %d\n", - __func__, err); + mlx5_en_err(ifp, "mlx5e_open_tises failed, %d\n", err); return (err); } err = mlx5_vport_alloc_q_counter(priv->mdev, MLX5_INTERFACE_PROTOCOL_ETH, &set_id); if (err) { - if_printf(priv->ifp, - "%s: mlx5_vport_alloc_q_counter failed: %d\n", - __func__, err); + mlx5_en_err(priv->ifp, + "mlx5_vport_alloc_q_counter failed: %d\n", err); goto err_close_tises; } /* store counter set ID */ @@ -3008,32 +3017,30 @@ mlx5e_open_locked(struct ifnet *ifp) err = mlx5e_open_channels(priv); if (err) { - if_printf(ifp, "%s: mlx5e_open_channels failed, %d\n", - __func__, err); + mlx5_en_err(ifp, + "mlx5e_open_channels failed, %d\n", err); goto err_dalloc_q_counter; } err = mlx5e_open_rqt(priv); if (err) { - if_printf(ifp, "%s: mlx5e_open_rqt failed, %d\n", - __func__, err); + mlx5_en_err(ifp, "mlx5e_open_rqt failed, %d\n", err); goto err_close_channels; } err = mlx5e_open_tirs(priv); if (err) { - if_printf(ifp, "%s: mlx5e_open_tir failed, %d\n", - __func__, err); + mlx5_en_err(ifp, "mlx5e_open_tir failed, %d\n", err); goto err_close_rqls; } err = mlx5e_open_flow_table(priv); if (err) { - if_printf(ifp, "%s: mlx5e_open_flow_table failed, %d\n", - __func__, err); + mlx5_en_err(ifp, + "mlx5e_open_flow_table failed, %d\n", err); goto err_close_tirs; } err = mlx5e_add_all_vlan_rules(priv); if (err) { - if_printf(ifp, "%s: mlx5e_add_all_vlan_rules failed, %d\n", - __func__, err); + mlx5_en_err(ifp, + "mlx5e_add_all_vlan_rules failed, %d\n", err); goto err_close_flow_table; } set_bit(MLX5E_STATE_OPENED, &priv->state); @@ -3072,9 +3079,8 @@ mlx5e_open(void *arg) PRIV_LOCK(priv); if (mlx5_set_port_status(priv->mdev, MLX5_PORT_UP)) - if_printf(priv->ifp, - "%s: Setting port status to up failed\n", - __func__); + mlx5_en_err(priv->ifp, + "Setting port status to up failed\n"); mlx5e_open_locked(priv->ifp); priv->ifp->if_drv_flags |= IFF_DRV_RUNNING; @@ -3211,7 +3217,8 @@ mlx5e_ioctl(struct ifnet *ifp, u_long command, caddr_t data) mlx5e_open_locked(ifp); } else { error = EINVAL; - if_printf(ifp, "Invalid MTU value. Min val: %d, Max val: %d\n", + mlx5_en_err(ifp, + "Invalid MTU value. Min val: %d, Max val: %d\n", MLX5E_MTU_MIN, MIN(MLX5E_MTU_MAX, max_mtu)); } PRIV_UNLOCK(priv); @@ -3265,7 +3272,7 @@ mlx5e_ioctl(struct ifnet *ifp, u_long command, caddr_t data) !(IFCAP_TXCSUM & ifp->if_capenable)) { ifp->if_capenable &= ~IFCAP_TSO4; ifp->if_hwassist &= ~CSUM_IP_TSO; - if_printf(ifp, + mlx5_en_err(ifp, "tso4 disabled due to -txcsum.\n"); } } @@ -3277,7 +3284,7 @@ mlx5e_ioctl(struct ifnet *ifp, u_long command, caddr_t data) !(IFCAP_TXCSUM_IPV6 & ifp->if_capenable)) { ifp->if_capenable &= ~IFCAP_TSO6; ifp->if_hwassist &= ~CSUM_IP6_TSO; - if_printf(ifp, + mlx5_en_err(ifp, "tso6 disabled due to -txcsum6.\n"); } } @@ -3288,7 +3295,7 @@ mlx5e_ioctl(struct ifnet *ifp, u_long command, caddr_t data) if (mask & IFCAP_TSO4) { if (!(IFCAP_TSO4 & ifp->if_capenable) && !(IFCAP_TXCSUM & ifp->if_capenable)) { - if_printf(ifp, "enable txcsum first.\n"); + mlx5_en_err(ifp, "enable txcsum first.\n"); error = EAGAIN; goto out; } @@ -3298,7 +3305,7 @@ mlx5e_ioctl(struct ifnet *ifp, u_long command, caddr_t data) if (mask & IFCAP_TSO6) { if (!(IFCAP_TSO6 & ifp->if_capenable) && !(IFCAP_TXCSUM_IPV6 & ifp->if_capenable)) { - if_printf(ifp, "enable txcsum6 first.\n"); + mlx5_en_err(ifp, "enable txcsum6 first.\n"); error = EAGAIN; goto out; } @@ -3378,15 +3385,14 @@ mlx5e_ioctl(struct ifnet *ifp, u_long command, caddr_t data) /* Get module_num which is required for the query_eeprom */ error = mlx5_query_module_num(priv->mdev, &module_num); if (error) { - if_printf(ifp, "Query module num failed, eeprom " - "reading is not supported\n"); + mlx5_en_err(ifp, + "Query module num failed, eeprom reading is not supported\n"); error = EINVAL; goto err_i2c; } /* Check if module is present before doing an access */ module_status = mlx5_query_module_status(priv->mdev, module_num); - if (module_status != MLX5_MODULE_STATUS_PLUGGED_ENABLED && - module_status != MLX5_MODULE_STATUS_PLUGGED_DISABLED) { + if (module_status != MLX5_MODULE_STATUS_PLUGGED_ENABLED) { error = EINVAL; goto err_i2c; } @@ -3395,36 +3401,37 @@ mlx5e_ioctl(struct ifnet *ifp, u_long command, caddr_t data) * The internal conversion is as follows: */ if (i2c.dev_addr == 0xA0) - read_addr = MLX5E_I2C_ADDR_LOW; + read_addr = MLX5_I2C_ADDR_LOW; else if (i2c.dev_addr == 0xA2) - read_addr = MLX5E_I2C_ADDR_HIGH; + read_addr = MLX5_I2C_ADDR_HIGH; else { - if_printf(ifp, "Query eeprom failed, " - "Invalid Address: %X\n", i2c.dev_addr); + mlx5_en_err(ifp, + "Query eeprom failed, Invalid Address: %X\n", + i2c.dev_addr); error = EINVAL; goto err_i2c; } error = mlx5_query_eeprom(priv->mdev, - read_addr, MLX5E_EEPROM_LOW_PAGE, + read_addr, MLX5_EEPROM_LOW_PAGE, (uint32_t)i2c.offset, (uint32_t)i2c.len, module_num, (uint32_t *)i2c.data, &size_read); if (error) { - if_printf(ifp, "Query eeprom failed, eeprom " - "reading is not supported\n"); + mlx5_en_err(ifp, + "Query eeprom failed, eeprom reading is not supported\n"); error = EINVAL; goto err_i2c; } if (i2c.len > MLX5_EEPROM_MAX_BYTES) { error = mlx5_query_eeprom(priv->mdev, - read_addr, MLX5E_EEPROM_LOW_PAGE, + read_addr, MLX5_EEPROM_LOW_PAGE, (uint32_t)(i2c.offset + size_read), (uint32_t)(i2c.len - size_read), module_num, (uint32_t *)(i2c.data + size_read), &size_read); } if (error) { - if_printf(ifp, "Query eeprom failed, eeprom " - "reading is not supported\n"); + mlx5_en_err(ifp, + "Query eeprom failed, eeprom reading is not supported\n"); error = EINVAL; goto err_i2c; } @@ -3560,7 +3567,7 @@ mlx5e_create_mkey(struct mlx5e_priv *priv, u32 pdn, in = mlx5_vzalloc(inlen); if (in == NULL) { - if_printf(ifp, "%s: failed to allocate inbox\n", __func__); + mlx5_en_err(ifp, "failed to allocate inbox\n"); return (-ENOMEM); } @@ -3575,8 +3582,8 @@ mlx5e_create_mkey(struct mlx5e_priv *priv, u32 pdn, err = mlx5_core_create_mkey(mdev, mkey, in, inlen); if (err) - if_printf(ifp, "%s: mlx5_core_create_mkey failed, %d\n", - __func__, err); + mlx5_en_err(ifp, "mlx5_core_create_mkey failed, %d\n", + err); kvfree(in); return (err); @@ -3591,17 +3598,26 @@ static const char *mlx5e_pport_stats_desc[] = { }; static void -mlx5e_priv_mtx_init(struct mlx5e_priv *priv) +mlx5e_priv_static_init(struct mlx5e_priv *priv, const uint32_t channels) { + uint32_t x; + mtx_init(&priv->async_events_mtx, "mlx5async", MTX_NETWORK_LOCK, MTX_DEF); sx_init(&priv->state_lock, "mlx5state"); callout_init_mtx(&priv->watchdog, &priv->async_events_mtx, 0); MLX5_INIT_DOORBELL_LOCK(&priv->doorbell_lock); + for (x = 0; x != channels; x++) + mlx5e_chan_static_init(priv, &priv->channel[x], x); } static void -mlx5e_priv_mtx_destroy(struct mlx5e_priv *priv) +mlx5e_priv_static_destroy(struct mlx5e_priv *priv, const uint32_t channels) { + uint32_t x; + + for (x = 0; x != channels; x++) + mlx5e_chan_static_destroy(&priv->channel[x]); + callout_drain(&priv->watchdog); mtx_destroy(&priv->async_events_mtx); sx_destroy(&priv->state_lock); } @@ -3631,7 +3647,7 @@ mlx5e_disable_tx_dma(struct mlx5e_channel *ch) { int i; - for (i = 0; i < ch->num_tc; i++) + for (i = 0; i < ch->priv->num_tc; i++) mlx5e_drain_sq(&ch->sq[i]); } @@ -3657,7 +3673,7 @@ mlx5e_resume_sq(struct mlx5e_sq *sq) err = mlx5e_modify_sq(sq, MLX5_SQC_STATE_ERR, MLX5_SQC_STATE_RST); if (err != 0) { - if_printf(sq->ifp, + mlx5_en_err(sq->ifp, "mlx5e_modify_sq() from ERR to RST failed: %d\n", err); } @@ -3670,7 +3686,7 @@ mlx5e_resume_sq(struct mlx5e_sq *sq) err = mlx5e_modify_sq(sq, MLX5_SQC_STATE_RST, MLX5_SQC_STATE_RDY); if (err != 0) { - if_printf(sq->ifp, + mlx5_en_err(sq->ifp, "mlx5e_modify_sq() from RST to RDY failed: %d\n", err); } @@ -3683,7 +3699,7 @@ mlx5e_enable_tx_dma(struct mlx5e_channel *ch) { int i; - for (i = 0; i < ch->num_tc; i++) + for (i = 0; i < ch->priv->num_tc; i++) mlx5e_resume_sq(&ch->sq[i]); } @@ -3698,11 +3714,9 @@ mlx5e_disable_rx_dma(struct mlx5e_channel *ch) callout_stop(&rq->watchdog); mtx_unlock(&rq->mtx); - callout_drain(&rq->watchdog); - err = mlx5e_modify_rq(rq, MLX5_RQC_STATE_RDY, MLX5_RQC_STATE_ERR); if (err != 0) { - if_printf(rq->ifp, + mlx5_en_err(rq->ifp, "mlx5e_modify_rq() from RDY to RST failed: %d\n", err); } @@ -3717,7 +3731,7 @@ mlx5e_disable_rx_dma(struct mlx5e_channel *ch) */ err = mlx5e_modify_rq(rq, MLX5_RQC_STATE_ERR, MLX5_RQC_STATE_RST); if (err != 0) { - if_printf(rq->ifp, + mlx5_en_err(rq->ifp, "mlx5e_modify_rq() from ERR to RST failed: %d\n", err); } } @@ -3732,7 +3746,7 @@ mlx5e_enable_rx_dma(struct mlx5e_channel *ch) mlx5_wq_ll_update_db_record(&rq->wq); err = mlx5e_modify_rq(rq, MLX5_RQC_STATE_RST, MLX5_RQC_STATE_RDY); if (err != 0) { - if_printf(rq->ifp, + mlx5_en_err(rq->ifp, "mlx5e_modify_rq() from RST to RDY failed: %d\n", err); } @@ -3865,8 +3879,11 @@ mlx5e_sysctl_rx_priority_flow_control(SYSCTL_HANDLER_ARGS) } /* check if update is required */ - if (rx_pfc != priv->params.rx_priority_flow_control) + if (rx_pfc != priv->params.rx_priority_flow_control) { err = -mlx5e_set_port_pfc(priv); + if (err == 0 && priv->sw_is_port_buf_owner) + err = mlx5e_update_buf_lossy(priv); + } done: if (err != 0) priv->params.rx_priority_flow_control= rx_pfc; @@ -3940,7 +3957,7 @@ mlx5e_setup_pauseframes(struct mlx5e_priv *priv) /* update firmware */ error = mlx5e_set_port_pause_and_pfc(priv); if (error == -EINVAL) { - if_printf(priv->ifp, + mlx5_en_err(priv->ifp, "Global pauseframes must be disabled before enabling PFC.\n"); priv->params.rx_priority_flow_control = 0; priv->params.tx_priority_flow_control = 0; @@ -4115,13 +4132,15 @@ mlx5e_create_ifp(struct mlx5_core_dev *mdev) priv = malloc(sizeof(*priv) + (sizeof(priv->channel[0]) * mdev->priv.eq_table.num_comp_vectors), M_MLX5EN, M_WAITOK | M_ZERO); - mlx5e_priv_mtx_init(priv); ifp = priv->ifp = if_alloc(IFT_ETHER); if (ifp == NULL) { mlx5_core_err(mdev, "if_alloc() failed\n"); goto err_free_priv; } + /* setup all static fields */ + mlx5e_priv_static_init(priv, mdev->priv.eq_table.num_comp_vectors); + ifp->if_softc = priv; if_initname(ifp, "mce", device_get_unit(mdev->pdev->dev.bsddev)); ifp->if_mtu = ETHERMTU; @@ -4200,26 +4219,23 @@ mlx5e_create_ifp(struct mlx5_core_dev *mdev) err = mlx5_alloc_map_uar(mdev, &priv->cq_uar); if (err) { - if_printf(ifp, "%s: mlx5_alloc_map_uar failed, %d\n", - __func__, err); + mlx5_en_err(ifp, "mlx5_alloc_map_uar failed, %d\n", err); goto err_free_wq; } err = mlx5_core_alloc_pd(mdev, &priv->pdn); if (err) { - if_printf(ifp, "%s: mlx5_core_alloc_pd failed, %d\n", - __func__, err); + mlx5_en_err(ifp, "mlx5_core_alloc_pd failed, %d\n", err); goto err_unmap_free_uar; } err = mlx5_alloc_transport_domain(mdev, &priv->tdn); if (err) { - if_printf(ifp, "%s: mlx5_alloc_transport_domain failed, %d\n", - __func__, err); + mlx5_en_err(ifp, + "mlx5_alloc_transport_domain failed, %d\n", err); goto err_dealloc_pd; } err = mlx5e_create_mkey(priv, priv->pdn, &priv->mr); if (err) { - if_printf(ifp, "%s: mlx5e_create_mkey failed, %d\n", - __func__, err); + mlx5_en_err(ifp, "mlx5e_create_mkey failed, %d\n", err); goto err_dealloc_transport_domain; } mlx5_query_nic_vport_mac_address(priv->mdev, 0, dev_addr); @@ -4228,13 +4244,12 @@ mlx5e_create_ifp(struct mlx5_core_dev *mdev) if (MLX5_CAP_GEN(priv->mdev, vport_group_manager) == 0 && is_zero_ether_addr(dev_addr)) { random_ether_addr(dev_addr); - if_printf(ifp, "Assigned random MAC address\n"); + mlx5_en_err(ifp, "Assigned random MAC address\n"); } #ifdef RATELIMIT err = mlx5e_rl_init(priv); if (err) { - if_printf(ifp, "%s: mlx5e_rl_init failed, %d\n", - __func__, err); + mlx5_en_err(ifp, "mlx5e_rl_init failed, %d\n", err); goto err_create_mkey; } #endif @@ -4262,8 +4277,7 @@ mlx5e_create_ifp(struct mlx5_core_dev *mdev) connector_type); } else { eth_proto_cap = 0; - if_printf(ifp, "%s: Query port media capability failed," - " %d\n", __func__, err); + mlx5_en_err(ifp, "Query port media capability failed, %d\n", err); } ifmedia_init(&priv->media, IFM_IMASK | IFM_ETH_FMASK, @@ -4353,10 +4367,10 @@ mlx5e_create_ifp(struct mlx5_core_dev *mdev) sysctl_ctx_free(&priv->sysctl_ctx); if (priv->sysctl_debug) sysctl_ctx_free(&priv->stats.port_stats_debug.ctx); + mlx5e_priv_static_destroy(priv, mdev->priv.eq_table.num_comp_vectors); if_free(ifp); err_free_priv: - mlx5e_priv_mtx_destroy(priv); free(priv, M_MLX5EN); return (NULL); } @@ -4380,8 +4394,8 @@ mlx5e_destroy_ifp(struct mlx5_core_dev *mdev, void *vpriv) * detaching: */ while (READ_ONCE(priv->rl.stats.tx_active_connections) != 0) { - if_printf(priv->ifp, "Waiting for all ratelimit connections " - "to terminate\n"); + mlx5_en_err(priv->ifp, + "Waiting for all ratelimit connections to terminate\n"); pause("W", hz); } #endif @@ -4402,15 +4416,14 @@ mlx5e_destroy_ifp(struct mlx5_core_dev *mdev, void *vpriv) /* wait for all unlimited send tags to go away */ while (priv->channel_refs != 0) { - if_printf(priv->ifp, "Waiting for all unlimited connections " - "to terminate\n"); + mlx5_en_err(priv->ifp, + "Waiting for all unlimited connections to terminate\n"); pause("W", hz); } /* unregister device */ ifmedia_removeall(&priv->media); ether_ifdetach(ifp); - if_free(ifp); #ifdef RATELIMIT mlx5e_rl_cleanup(priv); @@ -4428,7 +4441,8 @@ mlx5e_destroy_ifp(struct mlx5_core_dev *mdev, void *vpriv) mlx5_unmap_free_uar(priv->mdev, &priv->cq_uar); mlx5e_disable_async_events(priv); flush_workqueue(priv->wq); - mlx5e_priv_mtx_destroy(priv); + mlx5e_priv_static_destroy(priv, mdev->priv.eq_table.num_comp_vectors); + if_free(ifp); free(priv, M_MLX5EN); } diff --git a/sys/dev/mlx5/mlx5_en/mlx5_en_port_buffer.c b/sys/dev/mlx5/mlx5_en/mlx5_en_port_buffer.c new file mode 100644 index 00000000000..ebf61d521ce --- /dev/null +++ b/sys/dev/mlx5/mlx5_en/mlx5_en_port_buffer.c @@ -0,0 +1,338 @@ +/*- + * Copyright (c) 2018 Mellanox Technologies. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#include "port_buffer.h" + +#define MLX5E_MAX_PORT_MTU 9216 + +int mlx5e_port_query_buffer(struct mlx5e_priv *priv, + struct mlx5e_port_buffer *port_buffer) +{ + struct mlx5_core_dev *mdev = priv->mdev; + int sz = MLX5_ST_SZ_BYTES(pbmc_reg); + u32 total_used = 0; + void *buffer; + void *out; + int err; + int i; + + out = kzalloc(sz, GFP_KERNEL); + if (!out) + return -ENOMEM; + + err = mlx5e_port_query_pbmc(mdev, out); + if (err) + goto out; + + for (i = 0; i < MLX5E_MAX_BUFFER; i++) { + buffer = MLX5_ADDR_OF(pbmc_reg, out, buffer[i]); + port_buffer->buffer[i].lossy = + MLX5_GET(bufferx_reg, buffer, lossy); + port_buffer->buffer[i].epsb = + MLX5_GET(bufferx_reg, buffer, epsb); + port_buffer->buffer[i].size = + MLX5_GET(bufferx_reg, buffer, size) << MLX5E_BUFFER_CELL_SHIFT; + port_buffer->buffer[i].xon = + MLX5_GET(bufferx_reg, buffer, xon_threshold) << MLX5E_BUFFER_CELL_SHIFT; + port_buffer->buffer[i].xoff = + MLX5_GET(bufferx_reg, buffer, xoff_threshold) << MLX5E_BUFFER_CELL_SHIFT; + total_used += port_buffer->buffer[i].size; + + mlx5e_dbg(HW, priv, "buffer %d: size=%d, xon=%d, xoff=%d, epsb=%d, lossy=%d\n", i, + port_buffer->buffer[i].size, + port_buffer->buffer[i].xon, + port_buffer->buffer[i].xoff, + port_buffer->buffer[i].epsb, + port_buffer->buffer[i].lossy); + } + + port_buffer->port_buffer_size = + MLX5_GET(pbmc_reg, out, port_buffer_size) << MLX5E_BUFFER_CELL_SHIFT; + port_buffer->spare_buffer_size = + port_buffer->port_buffer_size - total_used; + + mlx5e_dbg(HW, priv, "total buffer size=%d, spare buffer size=%d\n", + port_buffer->port_buffer_size, + port_buffer->spare_buffer_size); +out: + kfree(out); + return err; +} + +static int port_set_buffer(struct mlx5e_priv *priv, + struct mlx5e_port_buffer *port_buffer) +{ + struct mlx5_core_dev *mdev = priv->mdev; + int sz = MLX5_ST_SZ_BYTES(pbmc_reg); + void *buffer; + void *in; + int err; + int i; + + in = kzalloc(sz, GFP_KERNEL); + if (!in) + return -ENOMEM; + + err = mlx5e_port_query_pbmc(mdev, in); + if (err) + goto out; + + for (i = 0; i < MLX5E_MAX_BUFFER; i++) { + buffer = MLX5_ADDR_OF(pbmc_reg, in, buffer[i]); + + MLX5_SET(bufferx_reg, buffer, size, + port_buffer->buffer[i].size >> MLX5E_BUFFER_CELL_SHIFT); + MLX5_SET(bufferx_reg, buffer, lossy, + port_buffer->buffer[i].lossy); + MLX5_SET(bufferx_reg, buffer, xoff_threshold, + port_buffer->buffer[i].xoff >> MLX5E_BUFFER_CELL_SHIFT); + MLX5_SET(bufferx_reg, buffer, xon_threshold, + port_buffer->buffer[i].xon >> MLX5E_BUFFER_CELL_SHIFT); + } + + err = mlx5e_port_set_pbmc(mdev, in); +out: + kfree(in); + return err; +} + +/* xoff = ((301+2.16 * len [m]) * speed [Gbps] + 2.72 MTU [B]) */ +static u32 calculate_xoff(struct mlx5e_priv *priv, unsigned int mtu) +{ + u32 speed; + u32 xoff; + int err; + + err = mlx5e_port_linkspeed(priv->mdev, &speed); + if (err) { + mlx5_core_warn(priv->mdev, "cannot get port speed\n"); + speed = SPEED_40000; + } + speed = max_t(u32, speed, SPEED_40000); + xoff = (301 + 216 * priv->dcbx.cable_len / 100) * speed / 1000 + 272 * mtu / 100; + + mlx5e_dbg(HW, priv, "%s: xoff=%d\n", __func__, xoff); + return xoff; +} + +static int update_xoff_threshold(struct mlx5e_priv *priv, + struct mlx5e_port_buffer *port_buffer, u32 xoff) +{ + int i; + + for (i = 0; i < MLX5E_MAX_BUFFER; i++) { + if (port_buffer->buffer[i].lossy) { + port_buffer->buffer[i].xoff = 0; + port_buffer->buffer[i].xon = 0; + continue; + } + + if (port_buffer->buffer[i].size < + (xoff + MLX5E_MAX_PORT_MTU + (1 << MLX5E_BUFFER_CELL_SHIFT))) { + mlx5_en_info(priv->ifp, + "non-lossy buffer %d size %d less than xoff threshold %d\n", + i, port_buffer->buffer[i].size, + xoff + MLX5E_MAX_PORT_MTU + + (1 << MLX5E_BUFFER_CELL_SHIFT)); + return -ENOMEM; + } + + port_buffer->buffer[i].xoff = port_buffer->buffer[i].size - xoff; + port_buffer->buffer[i].xon = + port_buffer->buffer[i].xoff - MLX5E_MAX_PORT_MTU; + } + + return 0; +} + +/** + * update_buffer_lossy() + * mtu: device's MTU + * pfc_en: current pfc configuration + * buffer: current prio to buffer mapping + * xoff: xoff value + * port_buffer: port receive buffer configuration + * change: + * + * Update buffer configuration based on pfc configuraiton and priority + * to buffer mapping. + * Buffer's lossy bit is changed to: + * lossless if there is at least one PFC enabled priority mapped to this buffer + * lossy if all priorities mapped to this buffer are PFC disabled + * + * Return: + * Return 0 if no error. + * Set change to true if buffer configuration is modified. + */ +static int update_buffer_lossy(struct mlx5e_priv *priv, unsigned int mtu, + u8 pfc_en, u8 *buffer, u32 xoff, + struct mlx5e_port_buffer *port_buffer, + bool *change) +{ + bool changed = false; + u8 lossy_count; + u8 prio_count; + u8 lossy; + int prio; + int err; + int i; + + for (i = 0; i < MLX5E_MAX_BUFFER; i++) { + prio_count = 0; + lossy_count = 0; + + for (prio = 0; prio < MLX5E_MAX_PRIORITY; prio++) { + if (buffer[prio] != i) + continue; + + prio_count++; + lossy_count += !(pfc_en & (1 << prio)); + } + + if (lossy_count == prio_count) + lossy = 1; + else /* lossy_count < prio_count */ + lossy = 0; + + if (lossy != port_buffer->buffer[i].lossy) { + port_buffer->buffer[i].lossy = lossy; + changed = true; + } + } + + if (changed) { + err = update_xoff_threshold(priv, port_buffer, xoff); + if (err) + return err; + + *change = true; + } + + return 0; +} + +int mlx5e_port_manual_buffer_config(struct mlx5e_priv *priv, + u32 change, unsigned int mtu, + struct ieee_pfc *pfc, + u32 *buffer_size, + u8 *prio2buffer) +{ + struct mlx5e_port_buffer port_buffer; + u32 xoff = calculate_xoff(priv, mtu); + bool update_prio2buffer = false; + u8 buffer[MLX5E_MAX_PRIORITY]; + bool update_buffer = false; + u32 total_used = 0; + u8 curr_pfc_en; + int err; + int i; + + mlx5e_dbg(HW, priv, "%s: change=%x\n", __func__, change); + + err = mlx5e_port_query_buffer(priv, &port_buffer); + if (err) + return err; + + if (change & MLX5E_PORT_BUFFER_CABLE_LEN) { + update_buffer = true; + err = update_xoff_threshold(priv, &port_buffer, xoff); + if (err) + return err; + } + + if (change & MLX5E_PORT_BUFFER_PFC) { + err = mlx5e_port_query_priority2buffer(priv->mdev, buffer); + if (err) + return err; + + priv->sw_is_port_buf_owner = true; + err = update_buffer_lossy(priv, mtu, pfc->pfc_en, buffer, xoff, + &port_buffer, &update_buffer); + if (err) + return err; + } + + if (change & MLX5E_PORT_BUFFER_PRIO2BUFFER) { + update_prio2buffer = true; + err = mlx5_query_port_pfc(priv->mdev, &curr_pfc_en, NULL); + if (err) + return err; + + err = update_buffer_lossy(priv, mtu, curr_pfc_en, prio2buffer, xoff, + &port_buffer, &update_buffer); + if (err) + return err; + } + + if (change & MLX5E_PORT_BUFFER_SIZE) { + for (i = 0; i < MLX5E_MAX_BUFFER; i++) { + mlx5e_dbg(HW, priv, "%s: buffer[%d]=%d\n", __func__, i, buffer_size[i]); + if (!port_buffer.buffer[i].lossy && !buffer_size[i]) { + mlx5e_dbg(HW, priv, "%s: lossless buffer[%d] size cannot be zero\n", + __func__, i); + return -EINVAL; + } + + port_buffer.buffer[i].size = buffer_size[i]; + total_used += buffer_size[i]; + } + + mlx5e_dbg(HW, priv, "%s: total buffer requested=%d\n", __func__, total_used); + + if (total_used > port_buffer.port_buffer_size) + return -EINVAL; + + update_buffer = true; + err = update_xoff_threshold(priv, &port_buffer, xoff); + if (err) + return err; + } + + /* Need to update buffer configuration if xoff value is changed */ + if (!update_buffer && xoff != priv->dcbx.xoff) { + update_buffer = true; + err = update_xoff_threshold(priv, &port_buffer, xoff); + if (err) + return err; + } + priv->dcbx.xoff = xoff; + + /* Apply the settings */ + if (update_buffer) { + priv->sw_is_port_buf_owner = true; + err = port_set_buffer(priv, &port_buffer); + if (err) + return err; + } + + if (update_prio2buffer) { + priv->sw_is_port_buf_owner = true; + err = mlx5e_port_set_priority2buffer(priv->mdev, prio2buffer); + } + + return err; +} diff --git a/sys/dev/mlx5/mlx5_en/mlx5_en_rl.c b/sys/dev/mlx5/mlx5_en/mlx5_en_rl.c index 4c32b20b8f4..6bb7ffeeb46 100644 --- a/sys/dev/mlx5/mlx5_en/mlx5_en_rl.c +++ b/sys/dev/mlx5/mlx5_en/mlx5_en_rl.c @@ -518,7 +518,7 @@ mlx5e_rl_worker(void *arg) MLX5E_RL_WORKER_LOCK(rlw); if (error != 0) { - if_printf(priv->ifp, + mlx5_en_err(priv->ifp, "mlx5e_rl_open_channel failed: %d\n", error); break; } @@ -551,7 +551,7 @@ mlx5e_rl_worker(void *arg) MLX5E_RL_RUNLOCK(&priv->rl); if (error != 0) { - if_printf(priv->ifp, + mlx5_en_err(priv->ifp, "mlx5e_rl_open_channel failed: %d\n", error); } else { atomic_add_64(&rlw->priv->rl.stats.tx_open_queues, 1ULL); @@ -565,7 +565,7 @@ mlx5e_rl_worker(void *arg) error = mlx5e_rlw_channel_set_rate_locked(rlw, channel, channel->new_rate * 8ULL); if (error != 0) { - if_printf(priv->ifp, + mlx5_en_err(priv->ifp, "mlx5e_rlw_channel_set_rate_locked failed: %d\n", error); } @@ -574,7 +574,7 @@ mlx5e_rl_worker(void *arg) case MLX5E_RL_ST_DESTROY: error = mlx5e_rlw_channel_set_rate_locked(rlw, channel, 0); if (error != 0) { - if_printf(priv->ifp, + mlx5_en_err(priv->ifp, "mlx5e_rlw_channel_set_rate_locked failed: %d\n", error); } @@ -856,7 +856,7 @@ mlx5e_rl_init(struct mlx5e_priv *priv) PRIV_UNLOCK(priv); if (error != 0) { - if_printf(priv->ifp, + mlx5_en_err(priv->ifp, "mlx5e_rl_open_workers failed: %d\n", error); } @@ -894,7 +894,7 @@ mlx5e_rl_open_workers(struct mlx5e_priv *priv) error = kproc_kthread_add(mlx5e_rl_worker, rlw, &rl_proc, &rl_thread, RFHIGHPID, 0, "mlx5-ratelimit", "mlx5-rl-worker-thread-%d", (int)j); if (error != 0) { - if_printf(rl->priv->ifp, + mlx5_en_err(rl->priv->ifp, "kproc_kthread_add failed: %d\n", error); rlw->worker_done = 1; } @@ -1090,7 +1090,8 @@ mlx5e_find_available_tx_ring_index(struct mlx5e_rl_worker *rlw, *pchannel = channel; #ifdef RATELIMIT_DEBUG - if_printf(rlw->priv->ifp, "Channel pointer for rate limit connection is %p\n", channel); + mlx5_en_info(rlw->priv->ifp, + "Channel pointer for rate limit connection is %p\n", channel); #endif return (retval); } diff --git a/sys/dev/mlx5/mlx5_en/mlx5_en_txrx.c b/sys/dev/mlx5/mlx5_en/mlx5_en_txrx.c index 771b4c69ffb..0befd107587 100644 --- a/sys/dev/mlx5/mlx5_en/mlx5_en_txrx.c +++ b/sys/dev/mlx5/mlx5_en/mlx5_en_txrx.c @@ -48,6 +48,6 @@ mlx5e_cq_error_event(struct mlx5_core_cq *mcq, int event) { struct mlx5e_cq *cq = container_of(mcq, struct mlx5e_cq, mcq); - if_printf(cq->priv->ifp, "%s: cqn=0x%.6x event=0x%.2x\n", - __func__, mcq->cqn, event); + mlx5_en_err(cq->priv->ifp, "cqn=0x%.6x event=0x%.2x\n", + mcq->cqn, event); } diff --git a/sys/dev/mlx5/mlx5_en/port_buffer.h b/sys/dev/mlx5/mlx5_en/port_buffer.h new file mode 100644 index 00000000000..1a64749c4ee --- /dev/null +++ b/sys/dev/mlx5/mlx5_en/port_buffer.h @@ -0,0 +1,82 @@ +/*- + * Copyright (c) 2018 Mellanox Technologies. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef __MLX5_EN_PORT_BUFFER_H__ +#define __MLX5_EN_PORT_BUFFER_H__ + +#include "en.h" +#include + +#define MLX5E_MAX_BUFFER 8 +#define MLX5E_BUFFER_CELL_SHIFT 7 +#define MLX5E_DEFAULT_CABLE_LEN 7 /* 7 meters */ + +#define MLX5_BUFFER_SUPPORTED(mdev) (MLX5_CAP_GEN(mdev, pcam_reg) && \ + MLX5_CAP_PCAM_REG(mdev, pbmc) && \ + MLX5_CAP_PCAM_REG(mdev, pptb)) + +enum { + MLX5E_PORT_BUFFER_CABLE_LEN = BIT(0), + MLX5E_PORT_BUFFER_PFC = BIT(1), + MLX5E_PORT_BUFFER_PRIO2BUFFER = BIT(2), + MLX5E_PORT_BUFFER_SIZE = BIT(3), +}; + +struct mlx5e_bufferx_reg { + u8 lossy; + u8 epsb; + u32 size; + u32 xoff; + u32 xon; +}; + +struct mlx5e_port_buffer { + u32 port_buffer_size; + u32 spare_buffer_size; + struct mlx5e_bufferx_reg buffer[MLX5E_MAX_BUFFER]; +}; + +#define IEEE_8021QAZ_MAX_TCS 8 + +struct ieee_pfc { + __u8 pfc_cap; + __u8 pfc_en; + __u8 mbc; + __u16 delay; + __u64 requests[IEEE_8021QAZ_MAX_TCS]; + __u64 indications[IEEE_8021QAZ_MAX_TCS]; +}; + +int mlx5e_port_manual_buffer_config(struct mlx5e_priv *priv, + u32 change, unsigned int mtu, + struct ieee_pfc *pfc, + u32 *buffer_size, + u8 *prio2buffer); + +int mlx5e_port_query_buffer(struct mlx5e_priv *priv, + struct mlx5e_port_buffer *port_buffer); +#endif diff --git a/sys/dev/mlx5/mlx5_ib/mlx5_ib.h b/sys/dev/mlx5/mlx5_ib/mlx5_ib.h index 5e1220b3f13..553b8b76f76 100644 --- a/sys/dev/mlx5/mlx5_ib/mlx5_ib.h +++ b/sys/dev/mlx5/mlx5_ib/mlx5_ib.h @@ -46,11 +46,11 @@ pr_debug("%s:%s:%d:(pid %d): " format, (dev)->ib_dev.name, __func__, \ __LINE__, current->pid, ##arg) #define mlx5_ib_err(dev, format, arg...) \ -pr_err("%s:%s:%d:(pid %d): " format, (dev)->ib_dev.name, __func__, \ +pr_err("%s: ERR: %s:%d:(pid %d): " format, (dev)->ib_dev.name, __func__, \ __LINE__, current->pid, ##arg) #define mlx5_ib_warn(dev, format, arg...) \ -pr_warn("%s:%s:%d:(pid %d): " format, (dev)->ib_dev.name, __func__, \ +pr_warn("%s: WARN: %s:%d:(pid %d): " format, (dev)->ib_dev.name, __func__, \ __LINE__, current->pid, ##arg) #define field_avail(type, fld, sz) (offsetof(type, fld) + \ diff --git a/sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c b/sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c index 8074a7d2c5c..eec585eeeb7 100644 --- a/sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c +++ b/sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c @@ -52,9 +52,9 @@ #define DRIVER_NAME "mlx5ib" #ifndef DRIVER_VERSION -#define DRIVER_VERSION "3.5.1" +#define DRIVER_VERSION "3.5.2" #endif -#define DRIVER_RELDATE "April 2019" +#define DRIVER_RELDATE "September 2019" MODULE_DESCRIPTION("Mellanox Connect-IB HCA IB driver"); MODULE_LICENSE("Dual BSD/GPL"); @@ -636,6 +636,7 @@ static int mlx5_ib_query_device(struct ib_device *ibdev, struct mlx5_ib_dev *dev = to_mdev(ibdev); struct mlx5_core_dev *mdev = dev->mdev; int err = -ENOMEM; + int max_sq_desc; int max_rq_sg; int max_sq_sg; u64 min_page_size = 1ull << MLX5_CAP_GEN(mdev, log_pg_sz); @@ -758,9 +759,10 @@ static int mlx5_ib_query_device(struct ib_device *ibdev, props->max_qp_wr = 1 << MLX5_CAP_GEN(mdev, log_max_qp_sz); max_rq_sg = MLX5_CAP_GEN(mdev, max_wqe_sz_rq) / sizeof(struct mlx5_wqe_data_seg); - max_sq_sg = (MLX5_CAP_GEN(mdev, max_wqe_sz_sq) - - sizeof(struct mlx5_wqe_ctrl_seg)) / - sizeof(struct mlx5_wqe_data_seg); + max_sq_desc = min_t(int, MLX5_CAP_GEN(mdev, max_wqe_sz_sq), 512); + max_sq_sg = (max_sq_desc - sizeof(struct mlx5_wqe_ctrl_seg) - + sizeof(struct mlx5_wqe_raddr_seg)) / + sizeof(struct mlx5_wqe_data_seg); props->max_sge = min(max_rq_sg, max_sq_sg); props->max_sge_rd = MLX5_MAX_SGE_RD; props->max_cq = 1 << MLX5_CAP_GEN(mdev, log_max_cq); diff --git a/sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c b/sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c index c1f2641a0e2..3af655be2c2 100644 --- a/sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c +++ b/sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c @@ -346,6 +346,29 @@ static int calc_send_wqe(struct ib_qp_init_attr *attr) return ALIGN(max_t(int, inl_size, size), MLX5_SEND_WQE_BB); } +static int get_send_sge(struct ib_qp_init_attr *attr, int wqe_size) +{ + int max_sge; + + if (attr->qp_type == IB_QPT_RC) + max_sge = (min_t(int, wqe_size, 512) - + sizeof(struct mlx5_wqe_ctrl_seg) - + sizeof(struct mlx5_wqe_raddr_seg)) / + sizeof(struct mlx5_wqe_data_seg); + else if (attr->qp_type == IB_QPT_XRC_INI) + max_sge = (min_t(int, wqe_size, 512) - + sizeof(struct mlx5_wqe_ctrl_seg) - + sizeof(struct mlx5_wqe_xrc_seg) - + sizeof(struct mlx5_wqe_raddr_seg)) / + sizeof(struct mlx5_wqe_data_seg); + else + max_sge = (wqe_size - sq_overhead(attr)) / + sizeof(struct mlx5_wqe_data_seg); + + return min_t(int, max_sge, wqe_size - sq_overhead(attr) / + sizeof(struct mlx5_wqe_data_seg)); +} + static int calc_sq_size(struct mlx5_ib_dev *dev, struct ib_qp_init_attr *attr, struct mlx5_ib_qp *qp) { @@ -382,7 +405,11 @@ static int calc_sq_size(struct mlx5_ib_dev *dev, struct ib_qp_init_attr *attr, return -ENOMEM; } qp->sq.wqe_shift = ilog2(MLX5_SEND_WQE_BB); - qp->sq.max_gs = attr->cap.max_send_sge; + qp->sq.max_gs = get_send_sge(attr, wqe_size); + if (qp->sq.max_gs < attr->cap.max_send_sge) + return -ENOMEM; + + attr->cap.max_send_sge = qp->sq.max_gs; qp->sq.max_post = wq_size / wqe_size; attr->cap.max_send_wr = qp->sq.max_post; diff --git a/sys/dev/mlx5/mlx5_ifc.h b/sys/dev/mlx5/mlx5_ifc.h index 6f39f569279..971e0a0733a 100644 --- a/sys/dev/mlx5/mlx5_ifc.h +++ b/sys/dev/mlx5/mlx5_ifc.h @@ -1557,26 +1557,19 @@ struct mlx5_ifc_field_select_802_1qau_rp_bits { }; struct mlx5_ifc_pptb_reg_bits { - u8 reserved_0[0x2]; + u8 reserved_at_0[0x2]; u8 mm[0x2]; - u8 reserved_1[0x4]; + u8 reserved_at_4[0x4]; u8 local_port[0x8]; - u8 reserved_2[0x6]; + u8 reserved_at_10[0x6]; u8 cm[0x1]; u8 um[0x1]; u8 pm[0x8]; - u8 prio7buff[0x4]; - u8 prio6buff[0x4]; - u8 prio5buff[0x4]; - u8 prio4buff[0x4]; - u8 prio3buff[0x4]; - u8 prio2buff[0x4]; - u8 prio1buff[0x4]; - u8 prio0buff[0x4]; + u8 prio_x_buff[0x20]; u8 pm_msb[0x8]; - u8 reserved_3[0x10]; + u8 reserved_at_48[0x10]; u8 ctrl_buff[0x4]; u8 untagged_buff[0x4]; }; @@ -7999,31 +7992,47 @@ struct mlx5_ifc_pplr_reg_bits { }; struct mlx5_ifc_pplm_reg_bits { - u8 reserved_0[0x8]; - u8 local_port[0x8]; - u8 reserved_1[0x10]; + u8 reserved_at_0[0x8]; + u8 local_port[0x8]; + u8 reserved_at_10[0x10]; - u8 reserved_2[0x20]; + u8 reserved_at_20[0x20]; - u8 port_profile_mode[0x8]; - u8 static_port_profile[0x8]; - u8 active_port_profile[0x8]; - u8 reserved_3[0x8]; + u8 port_profile_mode[0x8]; + u8 static_port_profile[0x8]; + u8 active_port_profile[0x8]; + u8 reserved_at_58[0x8]; - u8 retransmission_active[0x8]; - u8 fec_mode_active[0x18]; + u8 retransmission_active[0x8]; + u8 fec_mode_active[0x18]; - u8 reserved_4[0x10]; - u8 v_100g_fec_override_cap[0x4]; - u8 v_50g_fec_override_cap[0x4]; - u8 v_25g_fec_override_cap[0x4]; - u8 v_10g_40g_fec_override_cap[0x4]; + u8 rs_fec_correction_bypass_cap[0x4]; + u8 reserved_at_84[0x8]; + u8 fec_override_cap_56g[0x4]; + u8 fec_override_cap_100g[0x4]; + u8 fec_override_cap_50g[0x4]; + u8 fec_override_cap_25g[0x4]; + u8 fec_override_cap_10g_40g[0x4]; - u8 reserved_5[0x10]; - u8 v_100g_fec_override_admin[0x4]; - u8 v_50g_fec_override_admin[0x4]; - u8 v_25g_fec_override_admin[0x4]; - u8 v_10g_40g_fec_override_admin[0x4]; + u8 rs_fec_correction_bypass_admin[0x4]; + u8 reserved_at_a4[0x8]; + u8 fec_override_admin_56g[0x4]; + u8 fec_override_admin_100g[0x4]; + u8 fec_override_admin_50g[0x4]; + u8 fec_override_admin_25g[0x4]; + u8 fec_override_admin_10g_40g[0x4]; + + u8 fec_override_cap_400g_8x[0x10]; + u8 fec_override_cap_200g_4x[0x10]; + u8 fec_override_cap_100g_2x[0x10]; + u8 fec_override_cap_50g_1x[0x10]; + + u8 fec_override_admin_400g_8x[0x10]; + u8 fec_override_admin_200g_4x[0x10]; + u8 fec_override_admin_100g_2x[0x10]; + u8 fec_override_admin_50g_1x[0x10]; + + u8 reserved_at_140[0xC0]; }; struct mlx5_ifc_ppll_reg_bits { @@ -8617,6 +8626,22 @@ struct mlx5_ifc_pcam_enhanced_features_bits { u8 ppcnt_statistical_group[0x1]; }; +struct mlx5_ifc_pcam_regs_5000_to_507f_bits { + u8 port_access_reg_cap_mask_127_to_96[0x20]; + u8 port_access_reg_cap_mask_95_to_64[0x20]; + + u8 port_access_reg_cap_mask_63_to_36[0x1c]; + u8 pplm[0x1]; + u8 port_access_reg_cap_mask_34_to_32[0x3]; + + u8 port_access_reg_cap_mask_31_to_13[0x13]; + u8 pbmc[0x1]; + u8 pptb[0x1]; + u8 port_access_reg_cap_mask_10_to_09[0x2]; + u8 ppcnt[0x1]; + u8 port_access_reg_cap_mask_07_to_00[0x8]; +}; + struct mlx5_ifc_pcam_reg_bits { u8 reserved_at_0[0x8]; u8 feature_group[0x8]; @@ -8626,6 +8651,7 @@ struct mlx5_ifc_pcam_reg_bits { u8 reserved_at_20[0x20]; union { + struct mlx5_ifc_pcam_regs_5000_to_507f_bits regs_5000_to_507f; u8 reserved_at_0[0x80]; } port_access_reg_cap_mask; @@ -8690,21 +8716,20 @@ struct mlx5_ifc_pcap_reg_bits { }; struct mlx5_ifc_pbmc_reg_bits { - u8 reserved_0[0x8]; + u8 reserved_at_0[0x8]; u8 local_port[0x8]; - u8 reserved_1[0x10]; + u8 reserved_at_10[0x10]; u8 xoff_timer_value[0x10]; u8 xoff_refresh[0x10]; - u8 reserved_2[0x10]; + u8 reserved_at_40[0x9]; + u8 fullness_threshold[0x7]; u8 port_buffer_size[0x10]; struct mlx5_ifc_bufferx_reg_bits buffer[10]; - u8 reserved_3[0x40]; - - u8 port_shared_buffer[0x40]; + u8 reserved_at_2e0[0x40]; }; struct mlx5_ifc_paos_reg_bits { @@ -9725,6 +9750,7 @@ struct mlx5_ifc_mtt_bits { enum { MLX5_VSC_DOMAIN_ICMD = 0x1, MLX5_VSC_DOMAIN_PROTECTED_CRSPACE = 0x6, + MLX5_VSC_DOMAIN_SCAN_CRSPACE = 0x7, MLX5_VSC_DOMAIN_SEMAPHORES = 0xA, }; @@ -9749,6 +9775,18 @@ struct mlx5_ifc_vendor_specific_cap_bits { u8 data[0x20]; }; +struct mlx5_ifc_vsc_space_bits { + u8 status[0x3]; + u8 reserved0[0xd]; + u8 space[0x10]; +}; + +struct mlx5_ifc_vsc_addr_bits { + u8 flag[0x1]; + u8 reserved0[0x1]; + u8 address[0x1e]; +}; + enum { MLX5_INITIAL_SEG_NIC_INTERFACE_FULL_DRIVER = 0x0, MLX5_INITIAL_SEG_NIC_INTERFACE_DISABLED = 0x1, diff --git a/sys/dev/mlx5/mlx5io.h b/sys/dev/mlx5/mlx5io.h index 721241307c9..4e88ccd1068 100644 --- a/sys/dev/mlx5/mlx5io.h +++ b/sys/dev/mlx5/mlx5io.h @@ -55,11 +55,19 @@ struct mlx5_fw_update { size_t img_fw_data_len; }; +struct mlx5_eeprom_get { + struct mlx5_tool_addr devaddr; + uint32_t *eeprom_info_buf; + uint8_t eeprom_info_page_valid; + size_t eeprom_info_out_len; +}; + #define MLX5_FWDUMP_GET _IOWR('m', 1, struct mlx5_fwdump_get) #define MLX5_FWDUMP_RESET _IOW('m', 2, struct mlx5_tool_addr) #define MLX5_FWDUMP_FORCE _IOW('m', 3, struct mlx5_tool_addr) #define MLX5_FW_UPDATE _IOW('m', 4, struct mlx5_fw_update) #define MLX5_FW_RESET _IOW('m', 5, struct mlx5_tool_addr) +#define MLX5_EEPROM_GET _IOWR('m', 6, struct mlx5_eeprom_get) #ifndef _KERNEL #define MLX5_DEV_PATH _PATH_DEV"mlx5ctl" diff --git a/sys/dev/mlx5/mpfs.h b/sys/dev/mlx5/mpfs.h new file mode 100644 index 00000000000..d5d4809fc68 --- /dev/null +++ b/sys/dev/mlx5/mpfs.h @@ -0,0 +1,37 @@ +/*- + * Copyright (c) 2019, Mellanox Technologies, Ltd. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef _MLX5_MPFS_H_ +#define _MLX5_MPFS_H_ + +struct mlx5_core_dev; +int mlx5_mpfs_add_mac(struct mlx5_core_dev *dev, u32 *p_index, const u8 *mac); +int mlx5_mpfs_del_mac(struct mlx5_core_dev *dev, u32 index); +int mlx5_mpfs_init(struct mlx5_core_dev *dev); +void mlx5_mpfs_destroy(struct mlx5_core_dev *dev); + +#endif /* _MLX5_MPFS_H_ */ diff --git a/sys/dev/mlx5/port.h b/sys/dev/mlx5/port.h index 1eea3f744ee..043c7038830 100644 --- a/sys/dev/mlx5/port.h +++ b/sys/dev/mlx5/port.h @@ -50,13 +50,34 @@ enum mlx5_an_status { MLX5_AN_LINK_DOWN = 4, }; +/* EEPROM I2C Addresses */ +#define MLX5_I2C_ADDR_LOW 0x50 +#define MLX5_I2C_ADDR_HIGH 0x51 +#define MLX5_EEPROM_PAGE_LENGTH 256 #define MLX5_EEPROM_MAX_BYTES 32 #define MLX5_EEPROM_IDENTIFIER_BYTE_MASK 0x000000ff #define MLX5_EEPROM_REVISION_ID_BYTE_MASK 0x0000ff00 #define MLX5_EEPROM_PAGE_3_VALID_BIT_MASK 0x00040000 -#define MLX5_I2C_ADDR_LOW 0x50 -#define MLX5_I2C_ADDR_HIGH 0x51 -#define MLX5_EEPROM_PAGE_LENGTH 256 +#define MLX5_EEPROM_LOW_PAGE 0x0 +#define MLX5_EEPROM_HIGH_PAGE 0x3 +#define MLX5_EEPROM_HIGH_PAGE_OFFSET 128 +#define MLX5_EEPROM_INFO_BYTES 0x3 + +/* EEPROM Standards for plug in modules */ +#ifndef MLX5_ETH_MODULE_SFF_8472 +#define MLX5_ETH_MODULE_SFF_8472 0x1 +#define MLX5_ETH_MODULE_SFF_8472_LEN 128 +#endif + +#ifndef MLX5_ETH_MODULE_SFF_8636 +#define MLX5_ETH_MODULE_SFF_8636 0x2 +#define MLX5_ETH_MODULE_SFF_8636_LEN 256 +#endif + +#ifndef MLX5_ETH_MODULE_SFF_8436 +#define MLX5_ETH_MODULE_SFF_8436 0x3 +#define MLX5_ETH_MODULE_SFF_8436_LEN 256 +#endif enum mlx5e_link_speed { MLX5E_1000BASE_CX_SGMII = 0, @@ -179,6 +200,15 @@ enum mlx5_qpts_trust_state { MLX5_QPTS_TRUST_DSCP = 2, MLX5_QPTS_TRUST_BOTH = 3, }; +struct mlx5e_port_eth_proto { + u32 cap; + u32 admin; + u32 oper; +}; + +#ifndef SPEED_40000 +#define SPEED_40000 40000 +#endif #define MLX5E_PROT_MASK(link_mode) (1 << (link_mode)) @@ -252,4 +282,14 @@ int mlx5_query_dscp2prio(struct mlx5_core_dev *mdev, u8 *dscp2prio); int mlx5_query_pddr_range_info(struct mlx5_core_dev *mdev, u8 local_port, u8 *is_er_type); +u32 mlx5e_port_ptys2speed(struct mlx5_core_dev *mdev, u32 eth_proto_oper); +int mlx5e_port_linkspeed(struct mlx5_core_dev *mdev, u32 *speed); +int mlx5_port_query_eth_proto(struct mlx5_core_dev *dev, u8 port, bool ext, + struct mlx5e_port_eth_proto *eproto); + +int mlx5e_port_query_pbmc(struct mlx5_core_dev *mdev, void *out); +int mlx5e_port_set_pbmc(struct mlx5_core_dev *mdev, void *in); +int mlx5e_port_query_priority2buffer(struct mlx5_core_dev *mdev, u8 *buffer); +int mlx5e_port_set_priority2buffer(struct mlx5_core_dev *mdev, u8 *buffer); + #endif /* __MLX5_PORT_H__ */ diff --git a/sys/modules/mlx5/Makefile b/sys/modules/mlx5/Makefile index f90db5ba92d..a9afa452650 100644 --- a/sys/modules/mlx5/Makefile +++ b/sys/modules/mlx5/Makefile @@ -14,11 +14,11 @@ mlx5_fs_cmd.c \ mlx5_fs_tree.c \ mlx5_fw.c \ mlx5_fwdump.c \ -mlx5_fwdump_regmaps.c \ mlx5_health.c \ mlx5_mad.c \ mlx5_main.c \ mlx5_mcg.c \ +mlx5_mpfs.c \ mlx5_mr.c \ mlx5_pagealloc.c \ mlx5_pd.c \ diff --git a/sys/modules/mlx5en/Makefile b/sys/modules/mlx5en/Makefile index 608bfb6c0db..c49f7d5894a 100644 --- a/sys/modules/mlx5en/Makefile +++ b/sys/modules/mlx5en/Makefile @@ -11,6 +11,7 @@ mlx5_en_flow_table.c \ mlx5_en_rx.c \ mlx5_en_rl.c \ mlx5_en_txrx.c \ +mlx5_en_port_buffer.c \ device_if.h bus_if.h vnode_if.h pci_if.h \ opt_inet.h opt_inet6.h opt_rss.h opt_ratelimit.h diff --git a/usr.sbin/mlx5tool/mlx5tool.8 b/usr.sbin/mlx5tool/mlx5tool.8 index bc72b77c00c..3d9435037fa 100644 --- a/usr.sbin/mlx5tool/mlx5tool.8 +++ b/usr.sbin/mlx5tool/mlx5tool.8 @@ -30,28 +30,31 @@ .Os .Sh NAME .Nm mlx5tool -.Nd Utility for managing Connect-X 4/5 Mellanox network adapters +.Nd Utility for managing Connect-X 4/5/6 Mellanox network adapters .Sh SYNOPSIS .Nm .Fl d Ar domain:bus:slot:func +.Fl E +.Nm +.Fl d Ar domain:bus:slot:func .Fl e .Nm .Fl d Ar domain:bus:slot:func -.Fl rn +.Fl f Ar file.mfa2 .Nm .Fl d Ar domain:bus:slot:func .Fl o Ar file .Fl w .Nm .Fl d Ar domain:bus:slot:func -.Fl f Ar file.mfa2 +.Fl r .Nm .Fl d Ar domain:bus:slot:func .Fl z .Sh DESCRIPTION The .Nm -utility is provided for management of the Connect-X 4 and 5 network adapters +utility is provided for management of the Connect-X4, 5 and 6 network adapters in the aspects not covered by the generic .Xr ifconfig 8 command, mostly related to the PCIe attachment and internal card working. @@ -73,21 +76,13 @@ analysis of the failure by the Mellanox support team. .Pp The following commands are currently implemented: .Bl -tag -width indent +.It Fl E +Print EEPROM information .It Fl e Take the snapshot of the firmware registers state and store it in the kernel buffer. The buffer must be empty, in other words, no dumps should be written so far, or existing dump cleared with the -.Fl r -command for the specified device. -.It Fl r -Clear the stored firmware dump, preparing the kernel buffer for -the next dump. -.It Fl w -Fetches the stored firmware dump and writes it into the file specified -by the -.Fl o -option argument. .It Fl f Flashes the firmware image .Fa file.mfa2 @@ -100,6 +95,16 @@ newly flashed image, which can be performed by the system reboot or using the .Fl z option. +.Fl r +command for the specified device. +.It Fl r +Clear the stored firmware dump, preparing the kernel buffer for +the next dump. +.It Fl w +Fetches the stored firmware dump and writes it into the file specified +by the +.Fl o +option argument. .It Fl z Performs PCIe link-level reset on the specified device. .El diff --git a/usr.sbin/mlx5tool/mlx5tool.c b/usr.sbin/mlx5tool/mlx5tool.c index 231b3e05de2..4d2cbe51cff 100644 --- a/usr.sbin/mlx5tool/mlx5tool.c +++ b/usr.sbin/mlx5tool/mlx5tool.c @@ -200,6 +200,86 @@ mlx5tool_fw_reset(int ctldev, const struct mlx5_tool_addr *addr) return (0); } +#define MLX5_EEPROM_HIGH_PAGE_OFFSET 128 +#define MLX5_EEPROM_PAGE_LENGTH 256 + +static void +mlx5tool_eeprom_print(struct mlx5_eeprom_get *eeprom_info) +{ + int index_in_row, line_length, row; + size_t byte_to_write; + + byte_to_write = 0; + line_length = 16; + + printf("\nOffset\t\tValues\n"); + printf("------\t\t------"); + while (byte_to_write < eeprom_info->eeprom_info_out_len) { + printf("\n0x%04zX\t\t", byte_to_write); + for (index_in_row = 0; index_in_row < line_length; + index_in_row++) { + printf("%02X ", + ((uint8_t *)eeprom_info->eeprom_info_buf)[ + byte_to_write]); + byte_to_write++; + } + } + + if (eeprom_info->eeprom_info_page_valid) { + row = MLX5_EEPROM_HIGH_PAGE_OFFSET; + printf("\n\nUpper Page 0x03\n"); + printf("\nOffset\t\tValues\n"); + printf("------\t\t------"); + for (row = MLX5_EEPROM_HIGH_PAGE_OFFSET; + row < MLX5_EEPROM_PAGE_LENGTH;) { + printf("\n0x%04X\t\t", row); + for (index_in_row = 0; + index_in_row < line_length; + index_in_row++) { + printf("%02X ", + ((uint8_t *)eeprom_info-> + eeprom_info_buf)[byte_to_write]); + byte_to_write++; + row++; + } + } + } + printf("\n"); +} + +static int +mlx5tool_get_eeprom_info(int ctldev, const struct mlx5_tool_addr *addr) +{ + struct mlx5_eeprom_get eeprom_info; + int error; + + memset(&eeprom_info, 0, sizeof(eeprom_info)); + eeprom_info.devaddr = *addr; + + error = ioctl(ctldev, MLX5_EEPROM_GET, &eeprom_info); + if (error != 0) { + warn("MLX5_EEPROM_GET"); + return (error); + } + eeprom_info.eeprom_info_buf = + malloc(eeprom_info.eeprom_info_out_len + MLX5_EEPROM_PAGE_LENGTH); + if (eeprom_info.eeprom_info_buf == NULL) { + warn("alloc eeprom_info.eeprom_info_buf "); + return (ENOMEM); + } + error = ioctl(ctldev, MLX5_EEPROM_GET, &eeprom_info); + if (error != 0) { + warn("MLX5_EEPROM_GET"); + free(eeprom_info.eeprom_info_buf); + return (error); + } + + mlx5tool_eeprom_print(&eeprom_info); + + free(eeprom_info.eeprom_info_buf); + return (0); +} + static void usage(void) { @@ -209,6 +289,7 @@ usage(void) " -e | -f fw.mfa2 | -z]\n"); fprintf(stderr, "\t-w - write firmware dump to the specified file\n"); fprintf(stderr, "\t-r - reset dump\n"); + fprintf(stderr, "\t-E - get eeprom info\n"); fprintf(stderr, "\t-e - force dump\n"); fprintf(stderr, "\t-f fw.img - flash firmware from fw.img\n"); fprintf(stderr, "\t-z - initiate firmware reset\n"); @@ -221,6 +302,7 @@ enum mlx5_action { ACTION_DUMP_FORCE, ACTION_FW_UPDATE, ACTION_FW_RESET, + ACTION_GET_EEPROM_INFO, ACTION_NONE, }; @@ -238,7 +320,7 @@ main(int argc, char *argv[]) addrstr = NULL; dumpname = NULL; img_fw_path = NULL; - while ((c = getopt(argc, argv, "d:ef:ho:rwz")) != -1) { + while ((c = getopt(argc, argv, "d:Eef:ho:rwz")) != -1) { switch (c) { case 'd': addrstr = optarg; @@ -248,6 +330,11 @@ main(int argc, char *argv[]) usage(); act = ACTION_DUMP_GET; break; + case 'E': + if (act != ACTION_NONE) + usage(); + act = ACTION_GET_EEPROM_INFO; + break; case 'e': if (act != ACTION_NONE) usage(); @@ -303,6 +390,9 @@ main(int argc, char *argv[]) case ACTION_FW_RESET: res = mlx5tool_fw_reset(ctldev, &addr); break; + case ACTION_GET_EEPROM_INFO: + res = mlx5tool_get_eeprom_info(ctldev, &addr); + break; default: res = 0; break; -- 2.45.0