From b681b1daf4eb92c969b8ada9b99435a45d72ccf2 Mon Sep 17 00:00:00 2001 From: nwhitehorn Date: Wed, 23 Jun 2010 13:47:27 +0000 Subject: [PATCH] MFC r209369: Temporarily disable instruction relocation while setting up the kernel's IBAT entry in early boot in order to prevent possible faults from races between the instruction cache and the MMU. PR: powerpc/148003 Approved by: re (kib) git-svn-id: svn://svn.freebsd.org/base/releng/8.1@209465 ccf9f872-aa2e-dd11-9fc8-001c23d0bc1f --- sys/powerpc/aim/mmu_oea.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/sys/powerpc/aim/mmu_oea.c b/sys/powerpc/aim/mmu_oea.c index 8357929e..a7f7b9f5 100644 --- a/sys/powerpc/aim/mmu_oea.c +++ b/sys/powerpc/aim/mmu_oea.c @@ -670,6 +670,7 @@ moea_bootstrap(mmu_t mmup, vm_offset_t kernelstart, vm_offset_t kernelend) vm_size_t size, physsz, hwphyssz; vm_offset_t pa, va, off; void *dpcpu; + register_t msr; /* * Set up BAT0 to map the lowest 256 MB area @@ -700,12 +701,16 @@ moea_bootstrap(mmu_t mmup, vm_offset_t kernelstart, vm_offset_t kernelend) /* * Use an IBAT and a DBAT to map the bottom segment of memory - * where we are. + * where we are. Turn off instruction relocation temporarily + * to prevent faults while reprogramming the IBAT. */ + msr = mfmsr(); + mtmsr(msr & ~PSL_IR); __asm (".balign 32; \n" "mtibatu 0,%0; mtibatl 0,%1; isync; \n" "mtdbatu 0,%0; mtdbatl 0,%1; isync" :: "r"(battable[0].batu), "r"(battable[0].batl)); + mtmsr(msr); /* map pci space */ __asm __volatile("mtdbatu 1,%0" :: "r"(battable[8].batu)); -- 2.42.0