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#ifndef _SCIC_OVERVIEW_H_
#define _SCIC_OVERVIEW_H_

/**

@page core_section SCI Core

@section scic_introduction_section Introduction

The Storage Controller Interface Core (SCIC) provides the underlying fundamental
hardware abstractions required to implement a standard SAS/SATA storage driver.

The following is a list of features that may be found in a core implementation:
-# hardware interrupt handling
-# hardware event handling
-# hardware state machine handling
-# IO and task management state machine handling
-# Phy staggered spin up

@image latex sci_core.eps "SCI Core Class Diagram" width=16cm

@note
For the SCU Driver Standard implementation of the SCI Core interface the
following definitions should be used to augment the cardinalities described
in the previous diagram:
-# There are exactly 4 scic_phy objects in the scic_controller.
-# There are exactly 4 scic_port objects in the scic_controller.
-# There can be a maximum of 4 scic_phy objects managed in a single scic_port.
-# The maximum number of supported controllers in a library is a truly flexible
   value, but the likely maximum number is 4.

*/

#endif // _SCIC_OVERVIEW_H_