2 * SPDX-License-Identifier: BSD-4-Clause
4 * Copyright (c) 1991 Regents of the University of California.
6 * Copyright (c) 1994 John S. Dyson
8 * Copyright (c) 1994 David Greenman
10 * Copyright (c) 2003 Peter Wemm
11 * All rights reserved.
12 * Copyright (c) 2005-2010 Alan L. Cox <alc@cs.rice.edu>
13 * All rights reserved.
14 * Copyright (c) 2014 Andrew Turner
15 * All rights reserved.
16 * Copyright (c) 2014 The FreeBSD Foundation
17 * All rights reserved.
18 * Copyright (c) 2015-2018 Ruslan Bukin <br@bsdpad.com>
19 * All rights reserved.
21 * This code is derived from software contributed to Berkeley by
22 * the Systems Programming Group of the University of Utah Computer
23 * Science Department and William Jolitz of UUNET Technologies Inc.
25 * Portions of this software were developed by Andrew Turner under
26 * sponsorship from The FreeBSD Foundation.
28 * Portions of this software were developed by SRI International and the
29 * University of Cambridge Computer Laboratory under DARPA/AFRL contract
30 * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
32 * Portions of this software were developed by the University of Cambridge
33 * Computer Laboratory as part of the CTSRD Project, with support from the
34 * UK Higher Education Innovation Fund (HEIF).
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
39 * 1. Redistributions of source code must retain the above copyright
40 * notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce the above copyright
42 * notice, this list of conditions and the following disclaimer in the
43 * documentation and/or other materials provided with the distribution.
44 * 3. All advertising materials mentioning features or use of this software
45 * must display the following acknowledgement:
46 * This product includes software developed by the University of
47 * California, Berkeley and its contributors.
48 * 4. Neither the name of the University nor the names of its contributors
49 * may be used to endorse or promote products derived from this software
50 * without specific prior written permission.
52 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
53 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
54 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
55 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
56 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
57 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
58 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
59 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
60 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
61 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
64 * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91
67 * Copyright (c) 2003 Networks Associates Technology, Inc.
68 * All rights reserved.
70 * This software was developed for the FreeBSD Project by Jake Burkholder,
71 * Safeport Network Services, and Network Associates Laboratories, the
72 * Security Research Division of Network Associates, Inc. under
73 * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA
74 * CHATS research program.
76 * Redistribution and use in source and binary forms, with or without
77 * modification, are permitted provided that the following conditions
79 * 1. Redistributions of source code must retain the above copyright
80 * notice, this list of conditions and the following disclaimer.
81 * 2. Redistributions in binary form must reproduce the above copyright
82 * notice, this list of conditions and the following disclaimer in the
83 * documentation and/or other materials provided with the distribution.
85 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
86 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
87 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
88 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
89 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
90 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
91 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
92 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
93 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
94 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
98 #include <sys/cdefs.h>
99 __FBSDID("$FreeBSD$");
102 * Manages physical address maps.
104 * Since the information managed by this module is
105 * also stored by the logical address mapping module,
106 * this module may throw away valid virtual-to-physical
107 * mappings at almost any time. However, invalidations
108 * of virtual-to-physical mappings must be done as
111 * In order to cope with hardware architectures which
112 * make virtual-to-physical map invalidates expensive,
113 * this module may delay invalidate or reduced protection
114 * operations until such time as they are actually
115 * necessary. This module is given full information as
116 * to which processors are currently using which maps,
117 * and to when physical maps must be made correct.
120 #include <sys/param.h>
121 #include <sys/systm.h>
122 #include <sys/bitstring.h>
124 #include <sys/cpuset.h>
125 #include <sys/kernel.h>
127 #include <sys/lock.h>
128 #include <sys/malloc.h>
129 #include <sys/mman.h>
130 #include <sys/msgbuf.h>
131 #include <sys/mutex.h>
132 #include <sys/physmem.h>
133 #include <sys/proc.h>
134 #include <sys/rwlock.h>
135 #include <sys/sbuf.h>
137 #include <sys/vmem.h>
138 #include <sys/vmmeter.h>
139 #include <sys/sched.h>
140 #include <sys/sysctl.h>
144 #include <vm/vm_param.h>
145 #include <vm/vm_kern.h>
146 #include <vm/vm_page.h>
147 #include <vm/vm_map.h>
148 #include <vm/vm_object.h>
149 #include <vm/vm_extern.h>
150 #include <vm/vm_pageout.h>
151 #include <vm/vm_pager.h>
152 #include <vm/vm_phys.h>
153 #include <vm/vm_radix.h>
154 #include <vm/vm_reserv.h>
155 #include <vm/vm_dumpset.h>
158 #include <machine/machdep.h>
159 #include <machine/md_var.h>
160 #include <machine/pcb.h>
161 #include <machine/sbi.h>
163 #define NUL1E (Ln_ENTRIES * Ln_ENTRIES)
164 #define NUL2E (Ln_ENTRIES * NUL1E)
166 #if !defined(DIAGNOSTIC)
167 #ifdef __GNUC_GNU_INLINE__
168 #define PMAP_INLINE __attribute__((__gnu_inline__)) inline
170 #define PMAP_INLINE extern inline
177 #define PV_STAT(x) do { x ; } while (0)
179 #define PV_STAT(x) do { } while (0)
182 #define pmap_l2_pindex(v) ((v) >> L2_SHIFT)
183 #define pa_to_pvh(pa) (&pv_table[pa_index(pa)])
185 #define NPV_LIST_LOCKS MAXCPU
187 #define PHYS_TO_PV_LIST_LOCK(pa) \
188 (&pv_list_locks[pmap_l2_pindex(pa) % NPV_LIST_LOCKS])
190 #define CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa) do { \
191 struct rwlock **_lockp = (lockp); \
192 struct rwlock *_new_lock; \
194 _new_lock = PHYS_TO_PV_LIST_LOCK(pa); \
195 if (_new_lock != *_lockp) { \
196 if (*_lockp != NULL) \
197 rw_wunlock(*_lockp); \
198 *_lockp = _new_lock; \
203 #define CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m) \
204 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, VM_PAGE_TO_PHYS(m))
206 #define RELEASE_PV_LIST_LOCK(lockp) do { \
207 struct rwlock **_lockp = (lockp); \
209 if (*_lockp != NULL) { \
210 rw_wunlock(*_lockp); \
215 #define VM_PAGE_TO_PV_LIST_LOCK(m) \
216 PHYS_TO_PV_LIST_LOCK(VM_PAGE_TO_PHYS(m))
218 /* The list of all the user pmaps */
219 LIST_HEAD(pmaplist, pmap);
220 static struct pmaplist allpmaps = LIST_HEAD_INITIALIZER();
222 struct pmap kernel_pmap_store;
224 vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */
225 vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */
226 vm_offset_t kernel_vm_end = 0;
228 vm_paddr_t dmap_phys_base; /* The start of the dmap region */
229 vm_paddr_t dmap_phys_max; /* The limit of the dmap region */
230 vm_offset_t dmap_max_addr; /* The virtual address limit of the dmap */
232 /* This code assumes all L1 DMAP entries will be used */
233 CTASSERT((DMAP_MIN_ADDRESS & ~L1_OFFSET) == DMAP_MIN_ADDRESS);
234 CTASSERT((DMAP_MAX_ADDRESS & ~L1_OFFSET) == DMAP_MAX_ADDRESS);
236 static struct rwlock_padalign pvh_global_lock;
237 static struct mtx_padalign allpmaps_lock;
239 static SYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD | CTLFLAG_MPSAFE, 0,
240 "VM/pmap parameters");
242 static int superpages_enabled = 1;
243 SYSCTL_INT(_vm_pmap, OID_AUTO, superpages_enabled,
244 CTLFLAG_RDTUN, &superpages_enabled, 0,
245 "Enable support for transparent superpages");
247 static SYSCTL_NODE(_vm_pmap, OID_AUTO, l2, CTLFLAG_RD | CTLFLAG_MPSAFE, 0,
248 "2MB page mapping counters");
250 static u_long pmap_l2_demotions;
251 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, demotions, CTLFLAG_RD,
252 &pmap_l2_demotions, 0,
253 "2MB page demotions");
255 static u_long pmap_l2_mappings;
256 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, mappings, CTLFLAG_RD,
257 &pmap_l2_mappings, 0,
258 "2MB page mappings");
260 static u_long pmap_l2_p_failures;
261 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, p_failures, CTLFLAG_RD,
262 &pmap_l2_p_failures, 0,
263 "2MB page promotion failures");
265 static u_long pmap_l2_promotions;
266 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, promotions, CTLFLAG_RD,
267 &pmap_l2_promotions, 0,
268 "2MB page promotions");
271 * Data for the pv entry allocation mechanism
273 static TAILQ_HEAD(pch, pv_chunk) pv_chunks = TAILQ_HEAD_INITIALIZER(pv_chunks);
274 static struct mtx pv_chunks_mutex;
275 static struct rwlock pv_list_locks[NPV_LIST_LOCKS];
276 static struct md_page *pv_table;
277 static struct md_page pv_dummy;
279 extern cpuset_t all_harts;
282 * Internal flags for pmap_enter()'s helper functions.
284 #define PMAP_ENTER_NORECLAIM 0x1000000 /* Don't reclaim PV entries. */
285 #define PMAP_ENTER_NOREPLACE 0x2000000 /* Don't replace mappings. */
287 static void free_pv_chunk(struct pv_chunk *pc);
288 static void free_pv_entry(pmap_t pmap, pv_entry_t pv);
289 static pv_entry_t get_pv_entry(pmap_t pmap, struct rwlock **lockp);
290 static vm_page_t reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp);
291 static void pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va);
292 static pv_entry_t pmap_pvh_remove(struct md_page *pvh, pmap_t pmap,
294 static bool pmap_demote_l2(pmap_t pmap, pd_entry_t *l2, vm_offset_t va);
295 static bool pmap_demote_l2_locked(pmap_t pmap, pd_entry_t *l2,
296 vm_offset_t va, struct rwlock **lockp);
297 static int pmap_enter_l2(pmap_t pmap, vm_offset_t va, pd_entry_t new_l2,
298 u_int flags, vm_page_t m, struct rwlock **lockp);
299 static vm_page_t pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va,
300 vm_page_t m, vm_prot_t prot, vm_page_t mpte, struct rwlock **lockp);
301 static int pmap_remove_l3(pmap_t pmap, pt_entry_t *l3, vm_offset_t sva,
302 pd_entry_t ptepde, struct spglist *free, struct rwlock **lockp);
303 static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va,
304 vm_page_t m, struct rwlock **lockp);
306 static vm_page_t _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex,
307 struct rwlock **lockp);
309 static void _pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m,
310 struct spglist *free);
311 static int pmap_unuse_pt(pmap_t, vm_offset_t, pd_entry_t, struct spglist *);
313 #define pmap_clear(pte) pmap_store(pte, 0)
314 #define pmap_clear_bits(pte, bits) atomic_clear_64(pte, bits)
315 #define pmap_load_store(pte, entry) atomic_swap_64(pte, entry)
316 #define pmap_load_clear(pte) pmap_load_store(pte, 0)
317 #define pmap_load(pte) atomic_load_64(pte)
318 #define pmap_store(pte, entry) atomic_store_64(pte, entry)
319 #define pmap_store_bits(pte, bits) atomic_set_64(pte, bits)
321 /********************/
322 /* Inline functions */
323 /********************/
326 pagecopy(void *s, void *d)
329 memcpy(d, s, PAGE_SIZE);
339 #define pmap_l1_index(va) (((va) >> L1_SHIFT) & Ln_ADDR_MASK)
340 #define pmap_l2_index(va) (((va) >> L2_SHIFT) & Ln_ADDR_MASK)
341 #define pmap_l3_index(va) (((va) >> L3_SHIFT) & Ln_ADDR_MASK)
343 #define PTE_TO_PHYS(pte) \
344 ((((pte) & ~PTE_HI_MASK) >> PTE_PPN0_S) * PAGE_SIZE)
345 #define L2PTE_TO_PHYS(l2) \
346 ((((l2) & ~PTE_HI_MASK) >> PTE_PPN1_S) << L2_SHIFT)
348 static __inline pd_entry_t *
349 pmap_l1(pmap_t pmap, vm_offset_t va)
352 return (&pmap->pm_l1[pmap_l1_index(va)]);
355 static __inline pd_entry_t *
356 pmap_l1_to_l2(pd_entry_t *l1, vm_offset_t va)
361 phys = PTE_TO_PHYS(pmap_load(l1));
362 l2 = (pd_entry_t *)PHYS_TO_DMAP(phys);
364 return (&l2[pmap_l2_index(va)]);
367 static __inline pd_entry_t *
368 pmap_l2(pmap_t pmap, vm_offset_t va)
372 l1 = pmap_l1(pmap, va);
373 if ((pmap_load(l1) & PTE_V) == 0)
375 if ((pmap_load(l1) & PTE_RX) != 0)
378 return (pmap_l1_to_l2(l1, va));
381 static __inline pt_entry_t *
382 pmap_l2_to_l3(pd_entry_t *l2, vm_offset_t va)
387 phys = PTE_TO_PHYS(pmap_load(l2));
388 l3 = (pd_entry_t *)PHYS_TO_DMAP(phys);
390 return (&l3[pmap_l3_index(va)]);
393 static __inline pt_entry_t *
394 pmap_l3(pmap_t pmap, vm_offset_t va)
398 l2 = pmap_l2(pmap, va);
401 if ((pmap_load(l2) & PTE_V) == 0)
403 if ((pmap_load(l2) & PTE_RX) != 0)
406 return (pmap_l2_to_l3(l2, va));
410 pmap_resident_count_inc(pmap_t pmap, int count)
413 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
414 pmap->pm_stats.resident_count += count;
418 pmap_resident_count_dec(pmap_t pmap, int count)
421 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
422 KASSERT(pmap->pm_stats.resident_count >= count,
423 ("pmap %p resident count underflow %ld %d", pmap,
424 pmap->pm_stats.resident_count, count));
425 pmap->pm_stats.resident_count -= count;
429 pmap_distribute_l1(struct pmap *pmap, vm_pindex_t l1index,
432 struct pmap *user_pmap;
435 /* Distribute new kernel L1 entry to all the user pmaps */
436 if (pmap != kernel_pmap)
439 mtx_lock(&allpmaps_lock);
440 LIST_FOREACH(user_pmap, &allpmaps, pm_list) {
441 l1 = &user_pmap->pm_l1[l1index];
442 pmap_store(l1, entry);
444 mtx_unlock(&allpmaps_lock);
448 pmap_early_page_idx(vm_offset_t l1pt, vm_offset_t va, u_int *l1_slot,
454 l1 = (pd_entry_t *)l1pt;
455 *l1_slot = (va >> L1_SHIFT) & Ln_ADDR_MASK;
457 /* Check locore has used a table L1 map */
458 KASSERT((l1[*l1_slot] & PTE_RX) == 0,
459 ("Invalid bootstrap L1 table"));
461 /* Find the address of the L2 table */
462 l2 = (pt_entry_t *)init_pt_va;
463 *l2_slot = pmap_l2_index(va);
469 pmap_early_vtophys(vm_offset_t l1pt, vm_offset_t va)
471 u_int l1_slot, l2_slot;
475 l2 = pmap_early_page_idx(l1pt, va, &l1_slot, &l2_slot);
477 /* Check locore has used L2 superpages */
478 KASSERT((l2[l2_slot] & PTE_RX) != 0,
479 ("Invalid bootstrap L2 table"));
481 /* L2 is superpages */
482 ret = L2PTE_TO_PHYS(l2[l2_slot]);
483 ret += (va & L2_OFFSET);
489 pmap_bootstrap_dmap(vm_offset_t kern_l1, vm_paddr_t min_pa, vm_paddr_t max_pa)
498 pa = dmap_phys_base = min_pa & ~L1_OFFSET;
499 va = DMAP_MIN_ADDRESS;
500 l1 = (pd_entry_t *)kern_l1;
501 l1_slot = pmap_l1_index(DMAP_MIN_ADDRESS);
503 for (; va < DMAP_MAX_ADDRESS && pa < max_pa;
504 pa += L1_SIZE, va += L1_SIZE, l1_slot++) {
505 KASSERT(l1_slot < Ln_ENTRIES, ("Invalid L1 index"));
508 pn = (pa / PAGE_SIZE);
510 entry |= (pn << PTE_PPN0_S);
511 pmap_store(&l1[l1_slot], entry);
514 /* Set the upper limit of the DMAP region */
522 pmap_bootstrap_l3(vm_offset_t l1pt, vm_offset_t va, vm_offset_t l3_start)
531 KASSERT((va & L2_OFFSET) == 0, ("Invalid virtual address"));
533 l2 = pmap_l2(kernel_pmap, va);
534 l2 = (pd_entry_t *)((uintptr_t)l2 & ~(PAGE_SIZE - 1));
535 l2_slot = pmap_l2_index(va);
538 for (; va < VM_MAX_KERNEL_ADDRESS; l2_slot++, va += L2_SIZE) {
539 KASSERT(l2_slot < Ln_ENTRIES, ("Invalid L2 index"));
541 pa = pmap_early_vtophys(l1pt, l3pt);
542 pn = (pa / PAGE_SIZE);
544 entry |= (pn << PTE_PPN0_S);
545 pmap_store(&l2[l2_slot], entry);
549 /* Clean the L2 page table */
550 memset((void *)l3_start, 0, l3pt - l3_start);
556 * Bootstrap the system enough to run with virtual memory.
559 pmap_bootstrap(vm_offset_t l1pt, vm_paddr_t kernstart, vm_size_t kernlen)
561 u_int l1_slot, l2_slot;
562 vm_offset_t freemempos;
563 vm_offset_t dpcpu, msgbufpv;
564 vm_paddr_t max_pa, min_pa, pa;
568 printf("pmap_bootstrap %lx %lx %lx\n", l1pt, kernstart, kernlen);
570 /* Set this early so we can use the pagetable walking functions */
571 kernel_pmap_store.pm_l1 = (pd_entry_t *)l1pt;
572 PMAP_LOCK_INIT(kernel_pmap);
574 rw_init(&pvh_global_lock, "pmap pv global");
577 * Set the current CPU as active in the kernel pmap. Secondary cores
578 * will add themselves later in init_secondary(). The SBI firmware
579 * may rely on this mask being precise, so CPU_FILL() is not used.
581 CPU_SET(PCPU_GET(hart), &kernel_pmap->pm_active);
583 /* Assume the address we were loaded to is a valid physical address. */
584 min_pa = max_pa = kernstart;
586 physmap_idx = physmem_avail(physmap, nitems(physmap));
590 * Find the minimum physical address. physmap is sorted,
591 * but may contain empty ranges.
593 for (i = 0; i < physmap_idx * 2; i += 2) {
594 if (physmap[i] == physmap[i + 1])
596 if (physmap[i] <= min_pa)
598 if (physmap[i + 1] > max_pa)
599 max_pa = physmap[i + 1];
601 printf("physmap_idx %u\n", physmap_idx);
602 printf("min_pa %lx\n", min_pa);
603 printf("max_pa %lx\n", max_pa);
605 /* Create a direct map region early so we can use it for pa -> va */
606 pmap_bootstrap_dmap(l1pt, min_pa, max_pa);
609 * Read the page table to find out what is already mapped.
610 * This assumes we have mapped a block of memory from KERNBASE
611 * using a single L1 entry.
613 (void)pmap_early_page_idx(l1pt, KERNBASE, &l1_slot, &l2_slot);
615 /* Sanity check the index, KERNBASE should be the first VA */
616 KASSERT(l2_slot == 0, ("The L2 index is non-zero"));
618 freemempos = roundup2(KERNBASE + kernlen, PAGE_SIZE);
620 /* Create the l3 tables for the early devmap */
621 freemempos = pmap_bootstrap_l3(l1pt,
622 VM_MAX_KERNEL_ADDRESS - L2_SIZE, freemempos);
625 * Invalidate the mapping we created for the DTB. At this point a copy
626 * has been created, and we no longer need it. We want to avoid the
627 * possibility of an aliased mapping in the future.
629 l2p = pmap_l2(kernel_pmap, VM_EARLY_DTB_ADDRESS);
630 if ((pmap_load(l2p) & PTE_V) != 0)
635 #define alloc_pages(var, np) \
636 (var) = freemempos; \
637 freemempos += (np * PAGE_SIZE); \
638 memset((char *)(var), 0, ((np) * PAGE_SIZE));
640 /* Allocate dynamic per-cpu area. */
641 alloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
642 dpcpu_init((void *)dpcpu, 0);
644 /* Allocate memory for the msgbuf, e.g. for /sbin/dmesg */
645 alloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
646 msgbufp = (void *)msgbufpv;
648 virtual_avail = roundup2(freemempos, L2_SIZE);
649 virtual_end = VM_MAX_KERNEL_ADDRESS - L2_SIZE;
650 kernel_vm_end = virtual_avail;
652 pa = pmap_early_vtophys(l1pt, freemempos);
654 physmem_exclude_region(kernstart, pa - kernstart, EXFLAG_NOALLOC);
658 * Initialize a vm_page's machine-dependent fields.
661 pmap_page_init(vm_page_t m)
664 TAILQ_INIT(&m->md.pv_list);
665 m->md.pv_memattr = VM_MEMATTR_WRITE_BACK;
669 * Initialize the pmap module.
670 * Called by vm_init, to initialize any structures that the pmap
671 * system needs to map virtual memory.
680 * Initialize the pv chunk and pmap list mutexes.
682 mtx_init(&pv_chunks_mutex, "pmap pv chunk list", NULL, MTX_DEF);
683 mtx_init(&allpmaps_lock, "allpmaps", NULL, MTX_DEF);
686 * Initialize the pool of pv list locks.
688 for (i = 0; i < NPV_LIST_LOCKS; i++)
689 rw_init(&pv_list_locks[i], "pmap pv list");
692 * Calculate the size of the pv head table for superpages.
694 pv_npg = howmany(vm_phys_segs[vm_phys_nsegs - 1].end, L2_SIZE);
697 * Allocate memory for the pv head table for superpages.
699 s = (vm_size_t)(pv_npg * sizeof(struct md_page));
701 pv_table = (struct md_page *)kmem_malloc(s, M_WAITOK | M_ZERO);
702 for (i = 0; i < pv_npg; i++)
703 TAILQ_INIT(&pv_table[i].pv_list);
704 TAILQ_INIT(&pv_dummy.pv_list);
706 if (superpages_enabled)
707 pagesizes[1] = L2_SIZE;
712 * For SMP, these functions have to use IPIs for coherence.
714 * In general, the calling thread uses a plain fence to order the
715 * writes to the page tables before invoking an SBI callback to invoke
716 * sfence_vma() on remote CPUs.
719 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
724 mask = pmap->pm_active;
725 CPU_CLR(PCPU_GET(hart), &mask);
727 if (!CPU_EMPTY(&mask) && smp_started)
728 sbi_remote_sfence_vma(mask.__bits, va, 1);
734 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
739 mask = pmap->pm_active;
740 CPU_CLR(PCPU_GET(hart), &mask);
742 if (!CPU_EMPTY(&mask) && smp_started)
743 sbi_remote_sfence_vma(mask.__bits, sva, eva - sva + 1);
746 * Might consider a loop of sfence_vma_page() for a small
747 * number of pages in the future.
754 pmap_invalidate_all(pmap_t pmap)
759 mask = pmap->pm_active;
760 CPU_CLR(PCPU_GET(hart), &mask);
763 * XXX: The SBI doc doesn't detail how to specify x0 as the
764 * address to perform a global fence. BBL currently treats
765 * all sfence_vma requests as global however.
768 if (!CPU_EMPTY(&mask) && smp_started)
769 sbi_remote_sfence_vma(mask.__bits, 0, 0);
775 * Normal, non-SMP, invalidation functions.
776 * We inline these within pmap.c for speed.
779 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
786 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
790 * Might consider a loop of sfence_vma_page() for a small
791 * number of pages in the future.
797 pmap_invalidate_all(pmap_t pmap)
805 * Routine: pmap_extract
807 * Extract the physical page address associated
808 * with the given map/virtual_address pair.
811 pmap_extract(pmap_t pmap, vm_offset_t va)
820 * Start with the l2 tabel. We are unable to allocate
821 * pages in the l1 table.
823 l2p = pmap_l2(pmap, va);
826 if ((l2 & PTE_RX) == 0) {
827 l3p = pmap_l2_to_l3(l2p, va);
830 pa = PTE_TO_PHYS(l3);
831 pa |= (va & L3_OFFSET);
834 /* L2 is superpages */
835 pa = L2PTE_TO_PHYS(l2);
836 pa |= (va & L2_OFFSET);
844 * Routine: pmap_extract_and_hold
846 * Atomically extract and hold the physical page
847 * with the given pmap and virtual address pair
848 * if that mapping permits the given protection.
851 pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
859 l3p = pmap_l3(pmap, va);
860 if (l3p != NULL && (l3 = pmap_load(l3p)) != 0) {
861 if ((l3 & PTE_W) != 0 || (prot & VM_PROT_WRITE) == 0) {
862 phys = PTE_TO_PHYS(l3);
863 m = PHYS_TO_VM_PAGE(phys);
864 if (!vm_page_wire_mapped(m))
873 pmap_kextract(vm_offset_t va)
879 if (va >= DMAP_MIN_ADDRESS && va < DMAP_MAX_ADDRESS) {
880 pa = DMAP_TO_PHYS(va);
882 l2 = pmap_l2(kernel_pmap, va);
884 panic("pmap_kextract: No l2");
885 if ((pmap_load(l2) & PTE_RX) != 0) {
887 pa = L2PTE_TO_PHYS(pmap_load(l2));
888 pa |= (va & L2_OFFSET);
892 l3 = pmap_l2_to_l3(l2, va);
894 panic("pmap_kextract: No l3...");
895 pa = PTE_TO_PHYS(pmap_load(l3));
896 pa |= (va & PAGE_MASK);
901 /***************************************************
902 * Low level mapping routines.....
903 ***************************************************/
906 pmap_kenter_device(vm_offset_t sva, vm_size_t size, vm_paddr_t pa)
913 KASSERT((pa & L3_OFFSET) == 0,
914 ("pmap_kenter_device: Invalid physical address"));
915 KASSERT((sva & L3_OFFSET) == 0,
916 ("pmap_kenter_device: Invalid virtual address"));
917 KASSERT((size & PAGE_MASK) == 0,
918 ("pmap_kenter_device: Mapping is not page-sized"));
922 l3 = pmap_l3(kernel_pmap, va);
923 KASSERT(l3 != NULL, ("Invalid page table, va: 0x%lx", va));
925 pn = (pa / PAGE_SIZE);
927 entry |= (pn << PTE_PPN0_S);
928 pmap_store(l3, entry);
934 pmap_invalidate_range(kernel_pmap, sva, va);
938 * Remove a page from the kernel pagetables.
939 * Note: not SMP coherent.
942 pmap_kremove(vm_offset_t va)
946 l3 = pmap_l3(kernel_pmap, va);
947 KASSERT(l3 != NULL, ("pmap_kremove: Invalid address"));
954 pmap_kremove_device(vm_offset_t sva, vm_size_t size)
959 KASSERT((sva & L3_OFFSET) == 0,
960 ("pmap_kremove_device: Invalid virtual address"));
961 KASSERT((size & PAGE_MASK) == 0,
962 ("pmap_kremove_device: Mapping is not page-sized"));
966 l3 = pmap_l3(kernel_pmap, va);
967 KASSERT(l3 != NULL, ("Invalid page table, va: 0x%lx", va));
974 pmap_invalidate_range(kernel_pmap, sva, va);
978 * Used to map a range of physical addresses into kernel
979 * virtual address space.
981 * The value passed in '*virt' is a suggested virtual address for
982 * the mapping. Architectures which can support a direct-mapped
983 * physical to virtual region can return the appropriate address
984 * within that region, leaving '*virt' unchanged. Other
985 * architectures should map the pages starting at '*virt' and
986 * update '*virt' with the first usable address after the mapped
990 pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot)
993 return PHYS_TO_DMAP(start);
997 * Add a list of wired pages to the kva
998 * this routine is only used for temporary
999 * kernel mappings that do not need to have
1000 * page modification or references recorded.
1001 * Note that old mappings are simply written
1002 * over. The page *must* be wired.
1003 * Note: SMP coherent. Uses a ranged shootdown IPI.
1006 pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count)
1016 for (i = 0; i < count; i++) {
1018 pa = VM_PAGE_TO_PHYS(m);
1019 pn = (pa / PAGE_SIZE);
1020 l3 = pmap_l3(kernel_pmap, va);
1023 entry |= (pn << PTE_PPN0_S);
1024 pmap_store(l3, entry);
1028 pmap_invalidate_range(kernel_pmap, sva, va);
1032 * This routine tears out page mappings from the
1033 * kernel -- it is meant only for temporary mappings.
1034 * Note: SMP coherent. Uses a ranged shootdown IPI.
1037 pmap_qremove(vm_offset_t sva, int count)
1042 KASSERT(sva >= VM_MIN_KERNEL_ADDRESS, ("usermode va %lx", sva));
1044 for (va = sva; count-- > 0; va += PAGE_SIZE) {
1045 l3 = pmap_l3(kernel_pmap, va);
1046 KASSERT(l3 != NULL, ("pmap_kremove: Invalid address"));
1049 pmap_invalidate_range(kernel_pmap, sva, va);
1053 pmap_ps_enabled(pmap_t pmap __unused)
1056 return (superpages_enabled);
1059 /***************************************************
1060 * Page table page management routines.....
1061 ***************************************************/
1063 * Schedule the specified unused page table page to be freed. Specifically,
1064 * add the page to the specified list of pages that will be released to the
1065 * physical memory manager after the TLB has been updated.
1067 static __inline void
1068 pmap_add_delayed_free_list(vm_page_t m, struct spglist *free,
1069 boolean_t set_PG_ZERO)
1073 m->flags |= PG_ZERO;
1075 m->flags &= ~PG_ZERO;
1076 SLIST_INSERT_HEAD(free, m, plinks.s.ss);
1080 * Inserts the specified page table page into the specified pmap's collection
1081 * of idle page table pages. Each of a pmap's page table pages is responsible
1082 * for mapping a distinct range of virtual addresses. The pmap's collection is
1083 * ordered by this virtual address range.
1085 * If "promoted" is false, then the page table page "ml3" must be zero filled.
1088 pmap_insert_pt_page(pmap_t pmap, vm_page_t ml3, bool promoted)
1091 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1092 ml3->valid = promoted ? VM_PAGE_BITS_ALL : 0;
1093 return (vm_radix_insert(&pmap->pm_root, ml3));
1097 * Removes the page table page mapping the specified virtual address from the
1098 * specified pmap's collection of idle page table pages, and returns it.
1099 * Otherwise, returns NULL if there is no page table page corresponding to the
1100 * specified virtual address.
1102 static __inline vm_page_t
1103 pmap_remove_pt_page(pmap_t pmap, vm_offset_t va)
1106 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1107 return (vm_radix_remove(&pmap->pm_root, pmap_l2_pindex(va)));
1111 * Decrements a page table page's reference count, which is used to record the
1112 * number of valid page table entries within the page. If the reference count
1113 * drops to zero, then the page table page is unmapped. Returns TRUE if the
1114 * page table page was unmapped and FALSE otherwise.
1116 static inline boolean_t
1117 pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m, struct spglist *free)
1121 if (m->ref_count == 0) {
1122 _pmap_unwire_ptp(pmap, va, m, free);
1130 _pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m, struct spglist *free)
1134 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1135 if (m->pindex >= NUL1E) {
1137 l1 = pmap_l1(pmap, va);
1139 pmap_distribute_l1(pmap, pmap_l1_index(va), 0);
1142 l2 = pmap_l2(pmap, va);
1145 pmap_resident_count_dec(pmap, 1);
1146 if (m->pindex < NUL1E) {
1150 l1 = pmap_l1(pmap, va);
1151 phys = PTE_TO_PHYS(pmap_load(l1));
1152 pdpg = PHYS_TO_VM_PAGE(phys);
1153 pmap_unwire_ptp(pmap, va, pdpg, free);
1155 pmap_invalidate_page(pmap, va);
1160 * Put page on a list so that it is released after
1161 * *ALL* TLB shootdown is done
1163 pmap_add_delayed_free_list(m, free, TRUE);
1167 * After removing a page table entry, this routine is used to
1168 * conditionally free the page, and manage the reference count.
1171 pmap_unuse_pt(pmap_t pmap, vm_offset_t va, pd_entry_t ptepde,
1172 struct spglist *free)
1176 if (va >= VM_MAXUSER_ADDRESS)
1178 KASSERT(ptepde != 0, ("pmap_unuse_pt: ptepde != 0"));
1179 mpte = PHYS_TO_VM_PAGE(PTE_TO_PHYS(ptepde));
1180 return (pmap_unwire_ptp(pmap, va, mpte, free));
1184 pmap_pinit0(pmap_t pmap)
1187 PMAP_LOCK_INIT(pmap);
1188 bzero(&pmap->pm_stats, sizeof(pmap->pm_stats));
1189 pmap->pm_l1 = kernel_pmap->pm_l1;
1190 pmap->pm_satp = SATP_MODE_SV39 | (vtophys(pmap->pm_l1) >> PAGE_SHIFT);
1191 CPU_ZERO(&pmap->pm_active);
1192 pmap_activate_boot(pmap);
1196 pmap_pinit(pmap_t pmap)
1202 * allocate the l1 page
1204 while ((l1pt = vm_page_alloc(NULL, 0xdeadbeef, VM_ALLOC_NORMAL |
1205 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL)
1208 l1phys = VM_PAGE_TO_PHYS(l1pt);
1209 pmap->pm_l1 = (pd_entry_t *)PHYS_TO_DMAP(l1phys);
1210 pmap->pm_satp = SATP_MODE_SV39 | (l1phys >> PAGE_SHIFT);
1212 if ((l1pt->flags & PG_ZERO) == 0)
1213 pagezero(pmap->pm_l1);
1215 bzero(&pmap->pm_stats, sizeof(pmap->pm_stats));
1217 CPU_ZERO(&pmap->pm_active);
1219 /* Install kernel pagetables */
1220 memcpy(pmap->pm_l1, kernel_pmap->pm_l1, PAGE_SIZE);
1222 /* Add to the list of all user pmaps */
1223 mtx_lock(&allpmaps_lock);
1224 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list);
1225 mtx_unlock(&allpmaps_lock);
1227 vm_radix_init(&pmap->pm_root);
1233 * This routine is called if the desired page table page does not exist.
1235 * If page table page allocation fails, this routine may sleep before
1236 * returning NULL. It sleeps only if a lock pointer was given.
1238 * Note: If a page allocation fails at page table level two or three,
1239 * one or two pages may be held during the wait, only to be released
1240 * afterwards. This conservative approach is easily argued to avoid
1244 _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex, struct rwlock **lockp)
1246 vm_page_t m, /*pdppg, */pdpg;
1251 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1254 * Allocate a page table page.
1256 if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ |
1257 VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) {
1258 if (lockp != NULL) {
1259 RELEASE_PV_LIST_LOCK(lockp);
1261 rw_runlock(&pvh_global_lock);
1263 rw_rlock(&pvh_global_lock);
1268 * Indicate the need to retry. While waiting, the page table
1269 * page may have been allocated.
1274 if ((m->flags & PG_ZERO) == 0)
1278 * Map the pagetable page into the process address space, if
1279 * it isn't already there.
1282 if (ptepindex >= NUL1E) {
1284 vm_pindex_t l1index;
1286 l1index = ptepindex - NUL1E;
1287 l1 = &pmap->pm_l1[l1index];
1289 pn = (VM_PAGE_TO_PHYS(m) / PAGE_SIZE);
1291 entry |= (pn << PTE_PPN0_S);
1292 pmap_store(l1, entry);
1293 pmap_distribute_l1(pmap, l1index, entry);
1295 vm_pindex_t l1index;
1296 pd_entry_t *l1, *l2;
1298 l1index = ptepindex >> (L1_SHIFT - L2_SHIFT);
1299 l1 = &pmap->pm_l1[l1index];
1300 if (pmap_load(l1) == 0) {
1301 /* recurse for allocating page dir */
1302 if (_pmap_alloc_l3(pmap, NUL1E + l1index,
1304 vm_page_unwire_noq(m);
1305 vm_page_free_zero(m);
1309 phys = PTE_TO_PHYS(pmap_load(l1));
1310 pdpg = PHYS_TO_VM_PAGE(phys);
1314 phys = PTE_TO_PHYS(pmap_load(l1));
1315 l2 = (pd_entry_t *)PHYS_TO_DMAP(phys);
1316 l2 = &l2[ptepindex & Ln_ADDR_MASK];
1318 pn = (VM_PAGE_TO_PHYS(m) / PAGE_SIZE);
1320 entry |= (pn << PTE_PPN0_S);
1321 pmap_store(l2, entry);
1324 pmap_resident_count_inc(pmap, 1);
1330 pmap_alloc_l2(pmap_t pmap, vm_offset_t va, struct rwlock **lockp)
1334 vm_pindex_t l2pindex;
1337 l1 = pmap_l1(pmap, va);
1338 if (l1 != NULL && (pmap_load(l1) & PTE_RWX) == 0) {
1339 /* Add a reference to the L2 page. */
1340 l2pg = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l1)));
1343 /* Allocate a L2 page. */
1344 l2pindex = pmap_l2_pindex(va) >> Ln_ENTRIES_SHIFT;
1345 l2pg = _pmap_alloc_l3(pmap, NUL2E + l2pindex, lockp);
1346 if (l2pg == NULL && lockp != NULL)
1353 pmap_alloc_l3(pmap_t pmap, vm_offset_t va, struct rwlock **lockp)
1355 vm_pindex_t ptepindex;
1361 * Calculate pagetable page index
1363 ptepindex = pmap_l2_pindex(va);
1366 * Get the page directory entry
1368 l2 = pmap_l2(pmap, va);
1371 * If the page table page is mapped, we just increment the
1372 * hold count, and activate it.
1374 if (l2 != NULL && pmap_load(l2) != 0) {
1375 phys = PTE_TO_PHYS(pmap_load(l2));
1376 m = PHYS_TO_VM_PAGE(phys);
1380 * Here if the pte page isn't mapped, or if it has been
1383 m = _pmap_alloc_l3(pmap, ptepindex, lockp);
1384 if (m == NULL && lockp != NULL)
1390 /***************************************************
1391 * Pmap allocation/deallocation routines.
1392 ***************************************************/
1395 * Release any resources held by the given physical map.
1396 * Called when a pmap initialized by pmap_pinit is being released.
1397 * Should only be called if the map contains no valid mappings.
1400 pmap_release(pmap_t pmap)
1404 KASSERT(pmap->pm_stats.resident_count == 0,
1405 ("pmap_release: pmap resident count %ld != 0",
1406 pmap->pm_stats.resident_count));
1407 KASSERT(CPU_EMPTY(&pmap->pm_active),
1408 ("releasing active pmap %p", pmap));
1410 mtx_lock(&allpmaps_lock);
1411 LIST_REMOVE(pmap, pm_list);
1412 mtx_unlock(&allpmaps_lock);
1414 m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pmap->pm_l1));
1415 vm_page_unwire_noq(m);
1420 kvm_size(SYSCTL_HANDLER_ARGS)
1422 unsigned long ksize = VM_MAX_KERNEL_ADDRESS - VM_MIN_KERNEL_ADDRESS;
1424 return sysctl_handle_long(oidp, &ksize, 0, req);
1426 SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG | CTLFLAG_RD | CTLFLAG_MPSAFE,
1427 0, 0, kvm_size, "LU",
1431 kvm_free(SYSCTL_HANDLER_ARGS)
1433 unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end;
1435 return sysctl_handle_long(oidp, &kfree, 0, req);
1437 SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG | CTLFLAG_RD | CTLFLAG_MPSAFE,
1438 0, 0, kvm_free, "LU",
1439 "Amount of KVM free");
1442 * grow the number of kernel page table entries, if needed
1445 pmap_growkernel(vm_offset_t addr)
1449 pd_entry_t *l1, *l2;
1453 mtx_assert(&kernel_map->system_mtx, MA_OWNED);
1455 addr = roundup2(addr, L2_SIZE);
1456 if (addr - 1 >= vm_map_max(kernel_map))
1457 addr = vm_map_max(kernel_map);
1458 while (kernel_vm_end < addr) {
1459 l1 = pmap_l1(kernel_pmap, kernel_vm_end);
1460 if (pmap_load(l1) == 0) {
1461 /* We need a new PDP entry */
1462 nkpg = vm_page_alloc(NULL, kernel_vm_end >> L1_SHIFT,
1463 VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ |
1464 VM_ALLOC_WIRED | VM_ALLOC_ZERO);
1466 panic("pmap_growkernel: no memory to grow kernel");
1467 if ((nkpg->flags & PG_ZERO) == 0)
1468 pmap_zero_page(nkpg);
1469 paddr = VM_PAGE_TO_PHYS(nkpg);
1471 pn = (paddr / PAGE_SIZE);
1473 entry |= (pn << PTE_PPN0_S);
1474 pmap_store(l1, entry);
1475 pmap_distribute_l1(kernel_pmap,
1476 pmap_l1_index(kernel_vm_end), entry);
1477 continue; /* try again */
1479 l2 = pmap_l1_to_l2(l1, kernel_vm_end);
1480 if ((pmap_load(l2) & PTE_V) != 0 &&
1481 (pmap_load(l2) & PTE_RWX) == 0) {
1482 kernel_vm_end = (kernel_vm_end + L2_SIZE) & ~L2_OFFSET;
1483 if (kernel_vm_end - 1 >= vm_map_max(kernel_map)) {
1484 kernel_vm_end = vm_map_max(kernel_map);
1490 nkpg = vm_page_alloc(NULL, kernel_vm_end >> L2_SHIFT,
1491 VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
1494 panic("pmap_growkernel: no memory to grow kernel");
1495 if ((nkpg->flags & PG_ZERO) == 0) {
1496 pmap_zero_page(nkpg);
1498 paddr = VM_PAGE_TO_PHYS(nkpg);
1500 pn = (paddr / PAGE_SIZE);
1502 entry |= (pn << PTE_PPN0_S);
1503 pmap_store(l2, entry);
1505 pmap_invalidate_page(kernel_pmap, kernel_vm_end);
1507 kernel_vm_end = (kernel_vm_end + L2_SIZE) & ~L2_OFFSET;
1508 if (kernel_vm_end - 1 >= vm_map_max(kernel_map)) {
1509 kernel_vm_end = vm_map_max(kernel_map);
1515 /***************************************************
1516 * page management routines.
1517 ***************************************************/
1519 CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE);
1520 CTASSERT(_NPCM == 3);
1521 CTASSERT(_NPCPV == 168);
1523 static __inline struct pv_chunk *
1524 pv_to_chunk(pv_entry_t pv)
1527 return ((struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK));
1530 #define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap)
1532 #define PC_FREE0 0xfffffffffffffffful
1533 #define PC_FREE1 0xfffffffffffffffful
1534 #define PC_FREE2 0x000000fffffffffful
1536 static const uint64_t pc_freemask[_NPCM] = { PC_FREE0, PC_FREE1, PC_FREE2 };
1540 static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail;
1542 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0,
1543 "Current number of pv entry chunks");
1544 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0,
1545 "Current number of pv entry chunks allocated");
1546 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0,
1547 "Current number of pv entry chunks frees");
1548 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0,
1549 "Number of times tried to get a chunk page but failed.");
1551 static long pv_entry_frees, pv_entry_allocs, pv_entry_count;
1552 static int pv_entry_spare;
1554 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0,
1555 "Current number of pv entry frees");
1556 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0,
1557 "Current number of pv entry allocs");
1558 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0,
1559 "Current number of pv entries");
1560 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0,
1561 "Current number of spare pv entries");
1566 * We are in a serious low memory condition. Resort to
1567 * drastic measures to free some pages so we can allocate
1568 * another pv entry chunk.
1570 * Returns NULL if PV entries were reclaimed from the specified pmap.
1572 * We do not, however, unmap 2mpages because subsequent accesses will
1573 * allocate per-page pv entries until repromotion occurs, thereby
1574 * exacerbating the shortage of free pv entries.
1577 reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp)
1580 panic("RISCVTODO: reclaim_pv_chunk");
1584 * free the pv_entry back to the free list
1587 free_pv_entry(pmap_t pmap, pv_entry_t pv)
1589 struct pv_chunk *pc;
1590 int idx, field, bit;
1592 rw_assert(&pvh_global_lock, RA_LOCKED);
1593 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1594 PV_STAT(atomic_add_long(&pv_entry_frees, 1));
1595 PV_STAT(atomic_add_int(&pv_entry_spare, 1));
1596 PV_STAT(atomic_subtract_long(&pv_entry_count, 1));
1597 pc = pv_to_chunk(pv);
1598 idx = pv - &pc->pc_pventry[0];
1601 pc->pc_map[field] |= 1ul << bit;
1602 if (pc->pc_map[0] != PC_FREE0 || pc->pc_map[1] != PC_FREE1 ||
1603 pc->pc_map[2] != PC_FREE2) {
1604 /* 98% of the time, pc is already at the head of the list. */
1605 if (__predict_false(pc != TAILQ_FIRST(&pmap->pm_pvchunk))) {
1606 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1607 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1611 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1616 free_pv_chunk(struct pv_chunk *pc)
1620 mtx_lock(&pv_chunks_mutex);
1621 TAILQ_REMOVE(&pv_chunks, pc, pc_lru);
1622 mtx_unlock(&pv_chunks_mutex);
1623 PV_STAT(atomic_subtract_int(&pv_entry_spare, _NPCPV));
1624 PV_STAT(atomic_subtract_int(&pc_chunk_count, 1));
1625 PV_STAT(atomic_add_int(&pc_chunk_frees, 1));
1626 /* entire chunk is free, return it */
1627 m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pc));
1628 dump_drop_page(m->phys_addr);
1629 vm_page_unwire_noq(m);
1634 * Returns a new PV entry, allocating a new PV chunk from the system when
1635 * needed. If this PV chunk allocation fails and a PV list lock pointer was
1636 * given, a PV chunk is reclaimed from an arbitrary pmap. Otherwise, NULL is
1639 * The given PV list lock may be released.
1642 get_pv_entry(pmap_t pmap, struct rwlock **lockp)
1646 struct pv_chunk *pc;
1649 rw_assert(&pvh_global_lock, RA_LOCKED);
1650 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1651 PV_STAT(atomic_add_long(&pv_entry_allocs, 1));
1653 pc = TAILQ_FIRST(&pmap->pm_pvchunk);
1655 for (field = 0; field < _NPCM; field++) {
1656 if (pc->pc_map[field]) {
1657 bit = ffsl(pc->pc_map[field]) - 1;
1661 if (field < _NPCM) {
1662 pv = &pc->pc_pventry[field * 64 + bit];
1663 pc->pc_map[field] &= ~(1ul << bit);
1664 /* If this was the last item, move it to tail */
1665 if (pc->pc_map[0] == 0 && pc->pc_map[1] == 0 &&
1666 pc->pc_map[2] == 0) {
1667 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1668 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc,
1671 PV_STAT(atomic_add_long(&pv_entry_count, 1));
1672 PV_STAT(atomic_subtract_int(&pv_entry_spare, 1));
1676 /* No free items, allocate another chunk */
1677 m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ |
1680 if (lockp == NULL) {
1681 PV_STAT(pc_chunk_tryfail++);
1684 m = reclaim_pv_chunk(pmap, lockp);
1688 PV_STAT(atomic_add_int(&pc_chunk_count, 1));
1689 PV_STAT(atomic_add_int(&pc_chunk_allocs, 1));
1690 dump_add_page(m->phys_addr);
1691 pc = (void *)PHYS_TO_DMAP(m->phys_addr);
1693 pc->pc_map[0] = PC_FREE0 & ~1ul; /* preallocated bit 0 */
1694 pc->pc_map[1] = PC_FREE1;
1695 pc->pc_map[2] = PC_FREE2;
1696 mtx_lock(&pv_chunks_mutex);
1697 TAILQ_INSERT_TAIL(&pv_chunks, pc, pc_lru);
1698 mtx_unlock(&pv_chunks_mutex);
1699 pv = &pc->pc_pventry[0];
1700 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1701 PV_STAT(atomic_add_long(&pv_entry_count, 1));
1702 PV_STAT(atomic_add_int(&pv_entry_spare, _NPCPV - 1));
1707 * Ensure that the number of spare PV entries in the specified pmap meets or
1708 * exceeds the given count, "needed".
1710 * The given PV list lock may be released.
1713 reserve_pv_entries(pmap_t pmap, int needed, struct rwlock **lockp)
1715 struct pch new_tail;
1716 struct pv_chunk *pc;
1721 rw_assert(&pvh_global_lock, RA_LOCKED);
1722 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1723 KASSERT(lockp != NULL, ("reserve_pv_entries: lockp is NULL"));
1726 * Newly allocated PV chunks must be stored in a private list until
1727 * the required number of PV chunks have been allocated. Otherwise,
1728 * reclaim_pv_chunk() could recycle one of these chunks. In
1729 * contrast, these chunks must be added to the pmap upon allocation.
1731 TAILQ_INIT(&new_tail);
1734 TAILQ_FOREACH(pc, &pmap->pm_pvchunk, pc_list) {
1735 bit_count((bitstr_t *)pc->pc_map, 0,
1736 sizeof(pc->pc_map) * NBBY, &free);
1740 if (avail >= needed)
1743 for (reclaimed = false; avail < needed; avail += _NPCPV) {
1744 m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ |
1747 m = reclaim_pv_chunk(pmap, lockp);
1754 dump_add_page(m->phys_addr);
1756 pc = (void *)PHYS_TO_DMAP(m->phys_addr);
1758 pc->pc_map[0] = PC_FREE0;
1759 pc->pc_map[1] = PC_FREE1;
1760 pc->pc_map[2] = PC_FREE2;
1761 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1762 TAILQ_INSERT_TAIL(&new_tail, pc, pc_lru);
1765 * The reclaim might have freed a chunk from the current pmap.
1766 * If that chunk contained available entries, we need to
1767 * re-count the number of available entries.
1772 if (!TAILQ_EMPTY(&new_tail)) {
1773 mtx_lock(&pv_chunks_mutex);
1774 TAILQ_CONCAT(&pv_chunks, &new_tail, pc_lru);
1775 mtx_unlock(&pv_chunks_mutex);
1780 * First find and then remove the pv entry for the specified pmap and virtual
1781 * address from the specified pv list. Returns the pv entry if found and NULL
1782 * otherwise. This operation can be performed on pv lists for either 4KB or
1783 * 2MB page mappings.
1785 static __inline pv_entry_t
1786 pmap_pvh_remove(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
1790 rw_assert(&pvh_global_lock, RA_LOCKED);
1791 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
1792 if (pmap == PV_PMAP(pv) && va == pv->pv_va) {
1793 TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
1802 * First find and then destroy the pv entry for the specified pmap and virtual
1803 * address. This operation can be performed on pv lists for either 4KB or 2MB
1807 pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
1811 pv = pmap_pvh_remove(pvh, pmap, va);
1813 KASSERT(pv != NULL, ("pmap_pvh_free: pv not found for %#lx", va));
1814 free_pv_entry(pmap, pv);
1818 * Conditionally create the PV entry for a 4KB page mapping if the required
1819 * memory can be allocated without resorting to reclamation.
1822 pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m,
1823 struct rwlock **lockp)
1827 rw_assert(&pvh_global_lock, RA_LOCKED);
1828 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1829 /* Pass NULL instead of the lock pointer to disable reclamation. */
1830 if ((pv = get_pv_entry(pmap, NULL)) != NULL) {
1832 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m);
1833 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1841 * After demotion from a 2MB page mapping to 512 4KB page mappings,
1842 * destroy the pv entry for the 2MB page mapping and reinstantiate the pv
1843 * entries for each of the 4KB page mappings.
1845 static void __unused
1846 pmap_pv_demote_l2(pmap_t pmap, vm_offset_t va, vm_paddr_t pa,
1847 struct rwlock **lockp)
1849 struct md_page *pvh;
1850 struct pv_chunk *pc;
1853 vm_offset_t va_last;
1856 rw_assert(&pvh_global_lock, RA_LOCKED);
1857 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1858 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa);
1861 * Transfer the 2mpage's pv entry for this mapping to the first
1862 * page's pv list. Once this transfer begins, the pv list lock
1863 * must not be released until the last pv entry is reinstantiated.
1865 pvh = pa_to_pvh(pa);
1867 pv = pmap_pvh_remove(pvh, pmap, va);
1868 KASSERT(pv != NULL, ("pmap_pv_demote_l2: pv not found"));
1869 m = PHYS_TO_VM_PAGE(pa);
1870 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1872 /* Instantiate the remaining 511 pv entries. */
1873 va_last = va + L2_SIZE - PAGE_SIZE;
1875 pc = TAILQ_FIRST(&pmap->pm_pvchunk);
1876 KASSERT(pc->pc_map[0] != 0 || pc->pc_map[1] != 0 ||
1877 pc->pc_map[2] != 0, ("pmap_pv_demote_l2: missing spare"));
1878 for (field = 0; field < _NPCM; field++) {
1879 while (pc->pc_map[field] != 0) {
1880 bit = ffsl(pc->pc_map[field]) - 1;
1881 pc->pc_map[field] &= ~(1ul << bit);
1882 pv = &pc->pc_pventry[field * 64 + bit];
1886 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
1887 ("pmap_pv_demote_l2: page %p is not managed", m));
1888 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1894 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1895 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list);
1898 if (pc->pc_map[0] == 0 && pc->pc_map[1] == 0 && pc->pc_map[2] == 0) {
1899 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1900 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list);
1905 #if VM_NRESERVLEVEL > 0
1907 pmap_pv_promote_l2(pmap_t pmap, vm_offset_t va, vm_paddr_t pa,
1908 struct rwlock **lockp)
1910 struct md_page *pvh;
1913 vm_offset_t va_last;
1915 rw_assert(&pvh_global_lock, RA_LOCKED);
1916 KASSERT((va & L2_OFFSET) == 0,
1917 ("pmap_pv_promote_l2: misaligned va %#lx", va));
1919 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa);
1921 m = PHYS_TO_VM_PAGE(pa);
1922 pv = pmap_pvh_remove(&m->md, pmap, va);
1923 KASSERT(pv != NULL, ("pmap_pv_promote_l2: pv for %#lx not found", va));
1924 pvh = pa_to_pvh(pa);
1925 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_next);
1928 va_last = va + L2_SIZE - PAGE_SIZE;
1932 pmap_pvh_free(&m->md, pmap, va);
1933 } while (va < va_last);
1935 #endif /* VM_NRESERVLEVEL > 0 */
1938 * Create the PV entry for a 2MB page mapping. Always returns true unless the
1939 * flag PMAP_ENTER_NORECLAIM is specified. If that flag is specified, returns
1940 * false if the PV entry cannot be allocated without resorting to reclamation.
1943 pmap_pv_insert_l2(pmap_t pmap, vm_offset_t va, pd_entry_t l2e, u_int flags,
1944 struct rwlock **lockp)
1946 struct md_page *pvh;
1950 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1951 /* Pass NULL instead of the lock pointer to disable reclamation. */
1952 if ((pv = get_pv_entry(pmap, (flags & PMAP_ENTER_NORECLAIM) != 0 ?
1953 NULL : lockp)) == NULL)
1956 pa = PTE_TO_PHYS(l2e);
1957 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa);
1958 pvh = pa_to_pvh(pa);
1959 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_next);
1965 pmap_remove_kernel_l2(pmap_t pmap, pt_entry_t *l2, vm_offset_t va)
1967 pt_entry_t newl2, oldl2;
1971 KASSERT(!VIRT_IN_DMAP(va), ("removing direct mapping of %#lx", va));
1972 KASSERT(pmap == kernel_pmap, ("pmap %p is not kernel_pmap", pmap));
1973 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1975 ml3 = pmap_remove_pt_page(pmap, va);
1977 panic("pmap_remove_kernel_l2: Missing pt page");
1979 ml3pa = VM_PAGE_TO_PHYS(ml3);
1980 newl2 = ml3pa | PTE_V;
1983 * If this page table page was unmapped by a promotion, then it
1984 * contains valid mappings. Zero it to invalidate those mappings.
1986 if (ml3->valid != 0)
1987 pagezero((void *)PHYS_TO_DMAP(ml3pa));
1990 * Demote the mapping.
1992 oldl2 = pmap_load_store(l2, newl2);
1993 KASSERT(oldl2 == 0, ("%s: found existing mapping at %p: %#lx",
1994 __func__, l2, oldl2));
1998 * pmap_remove_l2: Do the things to unmap a level 2 superpage.
2001 pmap_remove_l2(pmap_t pmap, pt_entry_t *l2, vm_offset_t sva,
2002 pd_entry_t l1e, struct spglist *free, struct rwlock **lockp)
2004 struct md_page *pvh;
2006 vm_offset_t eva, va;
2009 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2010 KASSERT((sva & L2_OFFSET) == 0, ("pmap_remove_l2: sva is not aligned"));
2011 oldl2 = pmap_load_clear(l2);
2012 KASSERT((oldl2 & PTE_RWX) != 0,
2013 ("pmap_remove_l2: L2e %lx is not a superpage mapping", oldl2));
2016 * The sfence.vma documentation states that it is sufficient to specify
2017 * a single address within a superpage mapping. However, since we do
2018 * not perform any invalidation upon promotion, TLBs may still be
2019 * caching 4KB mappings within the superpage, so we must invalidate the
2022 pmap_invalidate_range(pmap, sva, sva + L2_SIZE);
2023 if ((oldl2 & PTE_SW_WIRED) != 0)
2024 pmap->pm_stats.wired_count -= L2_SIZE / PAGE_SIZE;
2025 pmap_resident_count_dec(pmap, L2_SIZE / PAGE_SIZE);
2026 if ((oldl2 & PTE_SW_MANAGED) != 0) {
2027 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, PTE_TO_PHYS(oldl2));
2028 pvh = pa_to_pvh(PTE_TO_PHYS(oldl2));
2029 pmap_pvh_free(pvh, pmap, sva);
2030 eva = sva + L2_SIZE;
2031 for (va = sva, m = PHYS_TO_VM_PAGE(PTE_TO_PHYS(oldl2));
2032 va < eva; va += PAGE_SIZE, m++) {
2033 if ((oldl2 & PTE_D) != 0)
2035 if ((oldl2 & PTE_A) != 0)
2036 vm_page_aflag_set(m, PGA_REFERENCED);
2037 if (TAILQ_EMPTY(&m->md.pv_list) &&
2038 TAILQ_EMPTY(&pvh->pv_list))
2039 vm_page_aflag_clear(m, PGA_WRITEABLE);
2042 if (pmap == kernel_pmap) {
2043 pmap_remove_kernel_l2(pmap, l2, sva);
2045 ml3 = pmap_remove_pt_page(pmap, sva);
2047 KASSERT(ml3->valid == VM_PAGE_BITS_ALL,
2048 ("pmap_remove_l2: l3 page not promoted"));
2049 pmap_resident_count_dec(pmap, 1);
2050 KASSERT(ml3->ref_count == Ln_ENTRIES,
2051 ("pmap_remove_l2: l3 page ref count error"));
2053 vm_page_unwire_noq(ml3);
2054 pmap_add_delayed_free_list(ml3, free, FALSE);
2057 return (pmap_unuse_pt(pmap, sva, l1e, free));
2061 * pmap_remove_l3: do the things to unmap a page in a process
2064 pmap_remove_l3(pmap_t pmap, pt_entry_t *l3, vm_offset_t va,
2065 pd_entry_t l2e, struct spglist *free, struct rwlock **lockp)
2067 struct md_page *pvh;
2072 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2073 old_l3 = pmap_load_clear(l3);
2074 pmap_invalidate_page(pmap, va);
2075 if (old_l3 & PTE_SW_WIRED)
2076 pmap->pm_stats.wired_count -= 1;
2077 pmap_resident_count_dec(pmap, 1);
2078 if (old_l3 & PTE_SW_MANAGED) {
2079 phys = PTE_TO_PHYS(old_l3);
2080 m = PHYS_TO_VM_PAGE(phys);
2081 if ((old_l3 & PTE_D) != 0)
2084 vm_page_aflag_set(m, PGA_REFERENCED);
2085 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m);
2086 pmap_pvh_free(&m->md, pmap, va);
2087 if (TAILQ_EMPTY(&m->md.pv_list) &&
2088 (m->flags & PG_FICTITIOUS) == 0) {
2089 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
2090 if (TAILQ_EMPTY(&pvh->pv_list))
2091 vm_page_aflag_clear(m, PGA_WRITEABLE);
2095 return (pmap_unuse_pt(pmap, va, l2e, free));
2099 * Remove the given range of addresses from the specified map.
2101 * It is assumed that the start and end are properly
2102 * rounded to the page size.
2105 pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
2107 struct spglist free;
2108 struct rwlock *lock;
2109 vm_offset_t va, va_next;
2110 pd_entry_t *l1, *l2, l2e;
2114 * Perform an unsynchronized read. This is, however, safe.
2116 if (pmap->pm_stats.resident_count == 0)
2121 rw_rlock(&pvh_global_lock);
2125 for (; sva < eva; sva = va_next) {
2126 if (pmap->pm_stats.resident_count == 0)
2129 l1 = pmap_l1(pmap, sva);
2130 if (pmap_load(l1) == 0) {
2131 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
2138 * Calculate index for next page table.
2140 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
2144 l2 = pmap_l1_to_l2(l1, sva);
2147 if ((l2e = pmap_load(l2)) == 0)
2149 if ((l2e & PTE_RWX) != 0) {
2150 if (sva + L2_SIZE == va_next && eva >= va_next) {
2151 (void)pmap_remove_l2(pmap, l2, sva,
2152 pmap_load(l1), &free, &lock);
2154 } else if (!pmap_demote_l2_locked(pmap, l2, sva,
2157 * The large page mapping was destroyed.
2161 l2e = pmap_load(l2);
2165 * Limit our scan to either the end of the va represented
2166 * by the current page table page, or to the end of the
2167 * range being removed.
2173 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
2175 if (pmap_load(l3) == 0) {
2176 if (va != va_next) {
2177 pmap_invalidate_range(pmap, va, sva);
2184 if (pmap_remove_l3(pmap, l3, sva, l2e, &free, &lock)) {
2190 pmap_invalidate_range(pmap, va, sva);
2194 rw_runlock(&pvh_global_lock);
2196 vm_page_free_pages_toq(&free, false);
2200 * Routine: pmap_remove_all
2202 * Removes this physical page from
2203 * all physical maps in which it resides.
2204 * Reflects back modify bits to the pager.
2207 * Original versions of this routine were very
2208 * inefficient because they iteratively called
2209 * pmap_remove (slow...)
2213 pmap_remove_all(vm_page_t m)
2215 struct spglist free;
2216 struct md_page *pvh;
2218 pt_entry_t *l3, l3e;
2219 pd_entry_t *l2, l2e;
2223 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2224 ("pmap_remove_all: page %p is not managed", m));
2226 pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy :
2227 pa_to_pvh(VM_PAGE_TO_PHYS(m));
2229 rw_wlock(&pvh_global_lock);
2230 while ((pv = TAILQ_FIRST(&pvh->pv_list)) != NULL) {
2234 l2 = pmap_l2(pmap, va);
2235 (void)pmap_demote_l2(pmap, l2, va);
2238 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
2241 pmap_resident_count_dec(pmap, 1);
2242 l2 = pmap_l2(pmap, pv->pv_va);
2243 KASSERT(l2 != NULL, ("pmap_remove_all: no l2 table found"));
2244 l2e = pmap_load(l2);
2246 KASSERT((l2e & PTE_RX) == 0,
2247 ("pmap_remove_all: found a superpage in %p's pv list", m));
2249 l3 = pmap_l2_to_l3(l2, pv->pv_va);
2250 l3e = pmap_load_clear(l3);
2251 pmap_invalidate_page(pmap, pv->pv_va);
2252 if (l3e & PTE_SW_WIRED)
2253 pmap->pm_stats.wired_count--;
2254 if ((l3e & PTE_A) != 0)
2255 vm_page_aflag_set(m, PGA_REFERENCED);
2258 * Update the vm_page_t clean and reference bits.
2260 if ((l3e & PTE_D) != 0)
2262 pmap_unuse_pt(pmap, pv->pv_va, pmap_load(l2), &free);
2263 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
2265 free_pv_entry(pmap, pv);
2268 vm_page_aflag_clear(m, PGA_WRITEABLE);
2269 rw_wunlock(&pvh_global_lock);
2270 vm_page_free_pages_toq(&free, false);
2274 * Set the physical protection on the
2275 * specified range of this map as requested.
2278 pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
2280 pd_entry_t *l1, *l2, l2e;
2281 pt_entry_t *l3, l3e, mask;
2284 vm_offset_t va_next;
2285 bool anychanged, pv_lists_locked;
2287 if ((prot & VM_PROT_READ) == VM_PROT_NONE) {
2288 pmap_remove(pmap, sva, eva);
2292 if ((prot & (VM_PROT_WRITE | VM_PROT_EXECUTE)) ==
2293 (VM_PROT_WRITE | VM_PROT_EXECUTE))
2297 pv_lists_locked = false;
2299 if ((prot & VM_PROT_WRITE) == 0)
2300 mask |= PTE_W | PTE_D;
2301 if ((prot & VM_PROT_EXECUTE) == 0)
2305 for (; sva < eva; sva = va_next) {
2306 l1 = pmap_l1(pmap, sva);
2307 if (pmap_load(l1) == 0) {
2308 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
2314 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
2318 l2 = pmap_l1_to_l2(l1, sva);
2319 if (l2 == NULL || (l2e = pmap_load(l2)) == 0)
2321 if ((l2e & PTE_RWX) != 0) {
2322 if (sva + L2_SIZE == va_next && eva >= va_next) {
2324 if ((prot & VM_PROT_WRITE) == 0 &&
2325 (l2e & (PTE_SW_MANAGED | PTE_D)) ==
2326 (PTE_SW_MANAGED | PTE_D)) {
2327 pa = PTE_TO_PHYS(l2e);
2328 m = PHYS_TO_VM_PAGE(pa);
2329 for (mt = m; mt < &m[Ln_ENTRIES]; mt++)
2332 if (!atomic_fcmpset_long(l2, &l2e, l2e & ~mask))
2337 if (!pv_lists_locked) {
2338 pv_lists_locked = true;
2339 if (!rw_try_rlock(&pvh_global_lock)) {
2341 pmap_invalidate_all(
2344 rw_rlock(&pvh_global_lock);
2348 if (!pmap_demote_l2(pmap, l2, sva)) {
2350 * The large page mapping was destroyed.
2360 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
2362 l3e = pmap_load(l3);
2364 if ((l3e & PTE_V) == 0)
2366 if ((prot & VM_PROT_WRITE) == 0 &&
2367 (l3e & (PTE_SW_MANAGED | PTE_D)) ==
2368 (PTE_SW_MANAGED | PTE_D)) {
2369 m = PHYS_TO_VM_PAGE(PTE_TO_PHYS(l3e));
2372 if (!atomic_fcmpset_long(l3, &l3e, l3e & ~mask))
2378 pmap_invalidate_all(pmap);
2379 if (pv_lists_locked)
2380 rw_runlock(&pvh_global_lock);
2385 pmap_fault_fixup(pmap_t pmap, vm_offset_t va, vm_prot_t ftype)
2387 pd_entry_t *l2, l2e;
2388 pt_entry_t bits, *pte, oldpte;
2393 l2 = pmap_l2(pmap, va);
2394 if (l2 == NULL || ((l2e = pmap_load(l2)) & PTE_V) == 0)
2396 if ((l2e & PTE_RWX) == 0) {
2397 pte = pmap_l2_to_l3(l2, va);
2398 if (pte == NULL || ((oldpte = pmap_load(pte)) & PTE_V) == 0)
2405 if ((pmap != kernel_pmap && (oldpte & PTE_U) == 0) ||
2406 (ftype == VM_PROT_WRITE && (oldpte & PTE_W) == 0) ||
2407 (ftype == VM_PROT_EXECUTE && (oldpte & PTE_X) == 0) ||
2408 (ftype == VM_PROT_READ && (oldpte & PTE_R) == 0))
2412 if (ftype == VM_PROT_WRITE)
2416 * Spurious faults can occur if the implementation caches invalid
2417 * entries in the TLB, or if simultaneous accesses on multiple CPUs
2418 * race with each other.
2420 if ((oldpte & bits) != bits)
2421 pmap_store_bits(pte, bits);
2430 pmap_demote_l2(pmap_t pmap, pd_entry_t *l2, vm_offset_t va)
2432 struct rwlock *lock;
2436 rv = pmap_demote_l2_locked(pmap, l2, va, &lock);
2443 * Tries to demote a 2MB page mapping. If demotion fails, the 2MB page
2444 * mapping is invalidated.
2447 pmap_demote_l2_locked(pmap_t pmap, pd_entry_t *l2, vm_offset_t va,
2448 struct rwlock **lockp)
2450 struct spglist free;
2452 pd_entry_t newl2, oldl2;
2453 pt_entry_t *firstl3, newl3;
2457 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2459 oldl2 = pmap_load(l2);
2460 KASSERT((oldl2 & PTE_RWX) != 0,
2461 ("pmap_demote_l2_locked: oldl2 is not a leaf entry"));
2462 if ((oldl2 & PTE_A) == 0 || (mpte = pmap_remove_pt_page(pmap, va)) ==
2464 if ((oldl2 & PTE_A) == 0 || (mpte = vm_page_alloc(NULL,
2465 pmap_l2_pindex(va), (VIRT_IN_DMAP(va) ? VM_ALLOC_INTERRUPT :
2466 VM_ALLOC_NORMAL) | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED)) ==
2469 (void)pmap_remove_l2(pmap, l2, va & ~L2_OFFSET,
2470 pmap_load(pmap_l1(pmap, va)), &free, lockp);
2471 vm_page_free_pages_toq(&free, true);
2472 CTR2(KTR_PMAP, "pmap_demote_l2_locked: "
2473 "failure for va %#lx in pmap %p", va, pmap);
2476 if (va < VM_MAXUSER_ADDRESS) {
2477 mpte->ref_count = Ln_ENTRIES;
2478 pmap_resident_count_inc(pmap, 1);
2481 mptepa = VM_PAGE_TO_PHYS(mpte);
2482 firstl3 = (pt_entry_t *)PHYS_TO_DMAP(mptepa);
2483 newl2 = ((mptepa / PAGE_SIZE) << PTE_PPN0_S) | PTE_V;
2484 KASSERT((oldl2 & PTE_A) != 0,
2485 ("pmap_demote_l2_locked: oldl2 is missing PTE_A"));
2486 KASSERT((oldl2 & (PTE_D | PTE_W)) != PTE_W,
2487 ("pmap_demote_l2_locked: oldl2 is missing PTE_D"));
2491 * If the page table page is not leftover from an earlier promotion,
2494 if (mpte->valid == 0) {
2495 for (i = 0; i < Ln_ENTRIES; i++)
2496 pmap_store(firstl3 + i, newl3 + (i << PTE_PPN0_S));
2498 KASSERT(PTE_TO_PHYS(pmap_load(firstl3)) == PTE_TO_PHYS(newl3),
2499 ("pmap_demote_l2_locked: firstl3 and newl3 map different physical "
2503 * If the mapping has changed attributes, update the page table
2506 if ((pmap_load(firstl3) & PTE_PROMOTE) != (newl3 & PTE_PROMOTE))
2507 for (i = 0; i < Ln_ENTRIES; i++)
2508 pmap_store(firstl3 + i, newl3 + (i << PTE_PPN0_S));
2511 * The spare PV entries must be reserved prior to demoting the
2512 * mapping, that is, prior to changing the L2 entry. Otherwise, the
2513 * state of the L2 entry and the PV lists will be inconsistent, which
2514 * can result in reclaim_pv_chunk() attempting to remove a PV entry from
2515 * the wrong PV list and pmap_pv_demote_l2() failing to find the
2516 * expected PV entry for the 2MB page mapping that is being demoted.
2518 if ((oldl2 & PTE_SW_MANAGED) != 0)
2519 reserve_pv_entries(pmap, Ln_ENTRIES - 1, lockp);
2522 * Demote the mapping.
2524 pmap_store(l2, newl2);
2527 * Demote the PV entry.
2529 if ((oldl2 & PTE_SW_MANAGED) != 0)
2530 pmap_pv_demote_l2(pmap, va, PTE_TO_PHYS(oldl2), lockp);
2532 atomic_add_long(&pmap_l2_demotions, 1);
2533 CTR2(KTR_PMAP, "pmap_demote_l2_locked: success for va %#lx in pmap %p",
2538 #if VM_NRESERVLEVEL > 0
2540 pmap_promote_l2(pmap_t pmap, pd_entry_t *l2, vm_offset_t va,
2541 struct rwlock **lockp)
2543 pt_entry_t *firstl3, *l3;
2547 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2550 KASSERT((pmap_load(l2) & PTE_RWX) == 0,
2551 ("pmap_promote_l2: invalid l2 entry %p", l2));
2553 firstl3 = (pt_entry_t *)PHYS_TO_DMAP(PTE_TO_PHYS(pmap_load(l2)));
2554 pa = PTE_TO_PHYS(pmap_load(firstl3));
2555 if ((pa & L2_OFFSET) != 0) {
2556 CTR2(KTR_PMAP, "pmap_promote_l2: failure for va %#lx pmap %p",
2558 atomic_add_long(&pmap_l2_p_failures, 1);
2563 for (l3 = firstl3 + 1; l3 < firstl3 + Ln_ENTRIES; l3++) {
2564 if (PTE_TO_PHYS(pmap_load(l3)) != pa) {
2566 "pmap_promote_l2: failure for va %#lx pmap %p",
2568 atomic_add_long(&pmap_l2_p_failures, 1);
2571 if ((pmap_load(l3) & PTE_PROMOTE) !=
2572 (pmap_load(firstl3) & PTE_PROMOTE)) {
2574 "pmap_promote_l2: failure for va %#lx pmap %p",
2576 atomic_add_long(&pmap_l2_p_failures, 1);
2582 ml3 = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l2)));
2583 KASSERT(ml3->pindex == pmap_l2_pindex(va),
2584 ("pmap_promote_l2: page table page's pindex is wrong"));
2585 if (pmap_insert_pt_page(pmap, ml3, true)) {
2586 CTR2(KTR_PMAP, "pmap_promote_l2: failure for va %#lx pmap %p",
2588 atomic_add_long(&pmap_l2_p_failures, 1);
2592 if ((pmap_load(firstl3) & PTE_SW_MANAGED) != 0)
2593 pmap_pv_promote_l2(pmap, va, PTE_TO_PHYS(pmap_load(firstl3)),
2596 pmap_store(l2, pmap_load(firstl3));
2598 atomic_add_long(&pmap_l2_promotions, 1);
2599 CTR2(KTR_PMAP, "pmap_promote_l2: success for va %#lx in pmap %p", va,
2605 * Insert the given physical page (p) at
2606 * the specified virtual address (v) in the
2607 * target physical map with the protection requested.
2609 * If specified, the page will be wired down, meaning
2610 * that the related pte can not be reclaimed.
2612 * NB: This is the only routine which MAY NOT lazy-evaluate
2613 * or lose information. That is, this routine must actually
2614 * insert this page into the given map NOW.
2617 pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
2618 u_int flags, int8_t psind)
2620 struct rwlock *lock;
2621 pd_entry_t *l1, *l2, l2e;
2622 pt_entry_t new_l3, orig_l3;
2625 vm_paddr_t opa, pa, l2_pa, l3_pa;
2626 vm_page_t mpte, om, l2_m, l3_m;
2628 pn_t l2_pn, l3_pn, pn;
2632 va = trunc_page(va);
2633 if ((m->oflags & VPO_UNMANAGED) == 0)
2634 VM_PAGE_OBJECT_BUSY_ASSERT(m);
2635 pa = VM_PAGE_TO_PHYS(m);
2636 pn = (pa / PAGE_SIZE);
2638 new_l3 = PTE_V | PTE_R | PTE_A;
2639 if (prot & VM_PROT_EXECUTE)
2641 if (flags & VM_PROT_WRITE)
2643 if (prot & VM_PROT_WRITE)
2645 if (va < VM_MAX_USER_ADDRESS)
2648 new_l3 |= (pn << PTE_PPN0_S);
2649 if ((flags & PMAP_ENTER_WIRED) != 0)
2650 new_l3 |= PTE_SW_WIRED;
2653 * Set modified bit gratuitously for writeable mappings if
2654 * the page is unmanaged. We do not want to take a fault
2655 * to do the dirty bit accounting for these mappings.
2657 if ((m->oflags & VPO_UNMANAGED) != 0) {
2658 if (prot & VM_PROT_WRITE)
2661 new_l3 |= PTE_SW_MANAGED;
2663 CTR2(KTR_PMAP, "pmap_enter: %.16lx -> %.16lx", va, pa);
2667 rw_rlock(&pvh_global_lock);
2670 /* Assert the required virtual and physical alignment. */
2671 KASSERT((va & L2_OFFSET) == 0,
2672 ("pmap_enter: va %#lx unaligned", va));
2673 KASSERT(m->psind > 0, ("pmap_enter: m->psind < psind"));
2674 rv = pmap_enter_l2(pmap, va, new_l3, flags, m, &lock);
2678 l2 = pmap_l2(pmap, va);
2679 if (l2 != NULL && ((l2e = pmap_load(l2)) & PTE_V) != 0 &&
2680 ((l2e & PTE_RWX) == 0 || pmap_demote_l2_locked(pmap, l2,
2682 l3 = pmap_l2_to_l3(l2, va);
2683 if (va < VM_MAXUSER_ADDRESS) {
2684 mpte = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l2)));
2687 } else if (va < VM_MAXUSER_ADDRESS) {
2688 nosleep = (flags & PMAP_ENTER_NOSLEEP) != 0;
2689 mpte = pmap_alloc_l3(pmap, va, nosleep ? NULL : &lock);
2690 if (mpte == NULL && nosleep) {
2691 CTR0(KTR_PMAP, "pmap_enter: mpte == NULL");
2694 rw_runlock(&pvh_global_lock);
2696 return (KERN_RESOURCE_SHORTAGE);
2698 l3 = pmap_l3(pmap, va);
2700 l3 = pmap_l3(pmap, va);
2701 /* TODO: This is not optimal, but should mostly work */
2704 l2_m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
2705 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
2708 panic("pmap_enter: l2 pte_m == NULL");
2709 if ((l2_m->flags & PG_ZERO) == 0)
2710 pmap_zero_page(l2_m);
2712 l2_pa = VM_PAGE_TO_PHYS(l2_m);
2713 l2_pn = (l2_pa / PAGE_SIZE);
2715 l1 = pmap_l1(pmap, va);
2717 entry |= (l2_pn << PTE_PPN0_S);
2718 pmap_store(l1, entry);
2719 pmap_distribute_l1(pmap, pmap_l1_index(va), entry);
2720 l2 = pmap_l1_to_l2(l1, va);
2723 l3_m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
2724 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | VM_ALLOC_ZERO);
2726 panic("pmap_enter: l3 pte_m == NULL");
2727 if ((l3_m->flags & PG_ZERO) == 0)
2728 pmap_zero_page(l3_m);
2730 l3_pa = VM_PAGE_TO_PHYS(l3_m);
2731 l3_pn = (l3_pa / PAGE_SIZE);
2733 entry |= (l3_pn << PTE_PPN0_S);
2734 pmap_store(l2, entry);
2735 l3 = pmap_l2_to_l3(l2, va);
2737 pmap_invalidate_page(pmap, va);
2740 orig_l3 = pmap_load(l3);
2741 opa = PTE_TO_PHYS(orig_l3);
2745 * Is the specified virtual address already mapped?
2747 if ((orig_l3 & PTE_V) != 0) {
2749 * Wiring change, just update stats. We don't worry about
2750 * wiring PT pages as they remain resident as long as there
2751 * are valid mappings in them. Hence, if a user page is wired,
2752 * the PT page will be also.
2754 if ((flags & PMAP_ENTER_WIRED) != 0 &&
2755 (orig_l3 & PTE_SW_WIRED) == 0)
2756 pmap->pm_stats.wired_count++;
2757 else if ((flags & PMAP_ENTER_WIRED) == 0 &&
2758 (orig_l3 & PTE_SW_WIRED) != 0)
2759 pmap->pm_stats.wired_count--;
2762 * Remove the extra PT page reference.
2766 KASSERT(mpte->ref_count > 0,
2767 ("pmap_enter: missing reference to page table page,"
2772 * Has the physical page changed?
2776 * No, might be a protection or wiring change.
2778 if ((orig_l3 & PTE_SW_MANAGED) != 0 &&
2779 (new_l3 & PTE_W) != 0)
2780 vm_page_aflag_set(m, PGA_WRITEABLE);
2785 * The physical page has changed. Temporarily invalidate
2786 * the mapping. This ensures that all threads sharing the
2787 * pmap keep a consistent view of the mapping, which is
2788 * necessary for the correct handling of COW faults. It
2789 * also permits reuse of the old mapping's PV entry,
2790 * avoiding an allocation.
2792 * For consistency, handle unmanaged mappings the same way.
2794 orig_l3 = pmap_load_clear(l3);
2795 KASSERT(PTE_TO_PHYS(orig_l3) == opa,
2796 ("pmap_enter: unexpected pa update for %#lx", va));
2797 if ((orig_l3 & PTE_SW_MANAGED) != 0) {
2798 om = PHYS_TO_VM_PAGE(opa);
2801 * The pmap lock is sufficient to synchronize with
2802 * concurrent calls to pmap_page_test_mappings() and
2803 * pmap_ts_referenced().
2805 if ((orig_l3 & PTE_D) != 0)
2807 if ((orig_l3 & PTE_A) != 0)
2808 vm_page_aflag_set(om, PGA_REFERENCED);
2809 CHANGE_PV_LIST_LOCK_TO_PHYS(&lock, opa);
2810 pv = pmap_pvh_remove(&om->md, pmap, va);
2812 ("pmap_enter: no PV entry for %#lx", va));
2813 if ((new_l3 & PTE_SW_MANAGED) == 0)
2814 free_pv_entry(pmap, pv);
2815 if ((om->a.flags & PGA_WRITEABLE) != 0 &&
2816 TAILQ_EMPTY(&om->md.pv_list) &&
2817 ((om->flags & PG_FICTITIOUS) != 0 ||
2818 TAILQ_EMPTY(&pa_to_pvh(opa)->pv_list)))
2819 vm_page_aflag_clear(om, PGA_WRITEABLE);
2821 pmap_invalidate_page(pmap, va);
2825 * Increment the counters.
2827 if ((new_l3 & PTE_SW_WIRED) != 0)
2828 pmap->pm_stats.wired_count++;
2829 pmap_resident_count_inc(pmap, 1);
2832 * Enter on the PV list if part of our managed memory.
2834 if ((new_l3 & PTE_SW_MANAGED) != 0) {
2836 pv = get_pv_entry(pmap, &lock);
2839 CHANGE_PV_LIST_LOCK_TO_PHYS(&lock, pa);
2840 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
2842 if ((new_l3 & PTE_W) != 0)
2843 vm_page_aflag_set(m, PGA_WRITEABLE);
2848 * Sync the i-cache on all harts before updating the PTE
2849 * if the new PTE is executable.
2851 if (prot & VM_PROT_EXECUTE)
2852 pmap_sync_icache(pmap, va, PAGE_SIZE);
2855 * Update the L3 entry.
2858 orig_l3 = pmap_load_store(l3, new_l3);
2859 pmap_invalidate_page(pmap, va);
2860 KASSERT(PTE_TO_PHYS(orig_l3) == pa,
2861 ("pmap_enter: invalid update"));
2862 if ((orig_l3 & (PTE_D | PTE_SW_MANAGED)) ==
2863 (PTE_D | PTE_SW_MANAGED))
2866 pmap_store(l3, new_l3);
2869 #if VM_NRESERVLEVEL > 0
2870 if (mpte != NULL && mpte->ref_count == Ln_ENTRIES &&
2871 pmap_ps_enabled(pmap) &&
2872 (m->flags & PG_FICTITIOUS) == 0 &&
2873 vm_reserv_level_iffullpop(m) == 0)
2874 pmap_promote_l2(pmap, l2, va, &lock);
2881 rw_runlock(&pvh_global_lock);
2887 * Tries to create a read- and/or execute-only 2MB page mapping. Returns true
2888 * if successful. Returns false if (1) a page table page cannot be allocated
2889 * without sleeping, (2) a mapping already exists at the specified virtual
2890 * address, or (3) a PV entry cannot be allocated without reclaiming another
2894 pmap_enter_2mpage(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
2895 struct rwlock **lockp)
2900 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2902 pn = VM_PAGE_TO_PHYS(m) / PAGE_SIZE;
2903 new_l2 = (pd_entry_t)((pn << PTE_PPN0_S) | PTE_R | PTE_V);
2904 if ((m->oflags & VPO_UNMANAGED) == 0)
2905 new_l2 |= PTE_SW_MANAGED;
2906 if ((prot & VM_PROT_EXECUTE) != 0)
2908 if (va < VM_MAXUSER_ADDRESS)
2910 return (pmap_enter_l2(pmap, va, new_l2, PMAP_ENTER_NOSLEEP |
2911 PMAP_ENTER_NOREPLACE | PMAP_ENTER_NORECLAIM, NULL, lockp) ==
2916 * Tries to create the specified 2MB page mapping. Returns KERN_SUCCESS if
2917 * the mapping was created, and either KERN_FAILURE or KERN_RESOURCE_SHORTAGE
2918 * otherwise. Returns KERN_FAILURE if PMAP_ENTER_NOREPLACE was specified and
2919 * a mapping already exists at the specified virtual address. Returns
2920 * KERN_RESOURCE_SHORTAGE if PMAP_ENTER_NOSLEEP was specified and a page table
2921 * page allocation failed. Returns KERN_RESOURCE_SHORTAGE if
2922 * PMAP_ENTER_NORECLAIM was specified and a PV entry allocation failed.
2924 * The parameter "m" is only used when creating a managed, writeable mapping.
2927 pmap_enter_l2(pmap_t pmap, vm_offset_t va, pd_entry_t new_l2, u_int flags,
2928 vm_page_t m, struct rwlock **lockp)
2930 struct spglist free;
2931 pd_entry_t *l2, *l3, oldl2;
2935 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2937 if ((l2pg = pmap_alloc_l2(pmap, va, (flags & PMAP_ENTER_NOSLEEP) != 0 ?
2938 NULL : lockp)) == NULL) {
2939 CTR2(KTR_PMAP, "pmap_enter_l2: failure for va %#lx in pmap %p",
2941 return (KERN_RESOURCE_SHORTAGE);
2944 l2 = (pd_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(l2pg));
2945 l2 = &l2[pmap_l2_index(va)];
2946 if ((oldl2 = pmap_load(l2)) != 0) {
2947 KASSERT(l2pg->ref_count > 1,
2948 ("pmap_enter_l2: l2pg's ref count is too low"));
2949 if ((flags & PMAP_ENTER_NOREPLACE) != 0) {
2952 "pmap_enter_l2: failure for va %#lx in pmap %p",
2954 return (KERN_FAILURE);
2957 if ((oldl2 & PTE_RWX) != 0)
2958 (void)pmap_remove_l2(pmap, l2, va,
2959 pmap_load(pmap_l1(pmap, va)), &free, lockp);
2961 for (sva = va; sva < va + L2_SIZE; sva += PAGE_SIZE) {
2962 l3 = pmap_l2_to_l3(l2, sva);
2963 if ((pmap_load(l3) & PTE_V) != 0 &&
2964 pmap_remove_l3(pmap, l3, sva, oldl2, &free,
2968 vm_page_free_pages_toq(&free, true);
2969 if (va >= VM_MAXUSER_ADDRESS) {
2971 * Both pmap_remove_l2() and pmap_remove_l3() will
2972 * leave the kernel page table page zero filled.
2974 mt = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l2)));
2975 if (pmap_insert_pt_page(pmap, mt, false))
2976 panic("pmap_enter_l2: trie insert failed");
2978 KASSERT(pmap_load(l2) == 0,
2979 ("pmap_enter_l2: non-zero L2 entry %p", l2));
2982 if ((new_l2 & PTE_SW_MANAGED) != 0) {
2984 * Abort this mapping if its PV entry could not be created.
2986 if (!pmap_pv_insert_l2(pmap, va, new_l2, flags, lockp)) {
2988 if (pmap_unwire_ptp(pmap, va, l2pg, &free)) {
2990 * Although "va" is not mapped, paging-structure
2991 * caches could nonetheless have entries that
2992 * refer to the freed page table pages.
2993 * Invalidate those entries.
2995 pmap_invalidate_page(pmap, va);
2996 vm_page_free_pages_toq(&free, true);
2999 "pmap_enter_l2: failure for va %#lx in pmap %p",
3001 return (KERN_RESOURCE_SHORTAGE);
3003 if ((new_l2 & PTE_W) != 0)
3004 for (mt = m; mt < &m[L2_SIZE / PAGE_SIZE]; mt++)
3005 vm_page_aflag_set(mt, PGA_WRITEABLE);
3009 * Increment counters.
3011 if ((new_l2 & PTE_SW_WIRED) != 0)
3012 pmap->pm_stats.wired_count += L2_SIZE / PAGE_SIZE;
3013 pmap->pm_stats.resident_count += L2_SIZE / PAGE_SIZE;
3016 * Map the superpage.
3018 pmap_store(l2, new_l2);
3020 atomic_add_long(&pmap_l2_mappings, 1);
3021 CTR2(KTR_PMAP, "pmap_enter_l2: success for va %#lx in pmap %p",
3024 return (KERN_SUCCESS);
3028 * Maps a sequence of resident pages belonging to the same object.
3029 * The sequence begins with the given page m_start. This page is
3030 * mapped at the given virtual address start. Each subsequent page is
3031 * mapped at a virtual address that is offset from start by the same
3032 * amount as the page is offset from m_start within the object. The
3033 * last page in the sequence is the page with the largest offset from
3034 * m_start that can be mapped at a virtual address less than the given
3035 * virtual address end. Not every virtual page between start and end
3036 * is mapped; only those for which a resident page exists with the
3037 * corresponding offset from m_start are mapped.
3040 pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end,
3041 vm_page_t m_start, vm_prot_t prot)
3043 struct rwlock *lock;
3046 vm_pindex_t diff, psize;
3048 VM_OBJECT_ASSERT_LOCKED(m_start->object);
3050 psize = atop(end - start);
3054 rw_rlock(&pvh_global_lock);
3056 while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) {
3057 va = start + ptoa(diff);
3058 if ((va & L2_OFFSET) == 0 && va + L2_SIZE <= end &&
3059 m->psind == 1 && pmap_ps_enabled(pmap) &&
3060 pmap_enter_2mpage(pmap, va, m, prot, &lock))
3061 m = &m[L2_SIZE / PAGE_SIZE - 1];
3063 mpte = pmap_enter_quick_locked(pmap, va, m, prot, mpte,
3065 m = TAILQ_NEXT(m, listq);
3069 rw_runlock(&pvh_global_lock);
3074 * this code makes some *MAJOR* assumptions:
3075 * 1. Current pmap & pmap exists.
3078 * 4. No page table pages.
3079 * but is *MUCH* faster than pmap_enter...
3083 pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
3085 struct rwlock *lock;
3088 rw_rlock(&pvh_global_lock);
3090 (void)pmap_enter_quick_locked(pmap, va, m, prot, NULL, &lock);
3093 rw_runlock(&pvh_global_lock);
3098 pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m,
3099 vm_prot_t prot, vm_page_t mpte, struct rwlock **lockp)
3101 struct spglist free;
3104 pt_entry_t *l3, newl3;
3106 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva ||
3107 (m->oflags & VPO_UNMANAGED) != 0,
3108 ("pmap_enter_quick_locked: managed mapping within the clean submap"));
3109 rw_assert(&pvh_global_lock, RA_LOCKED);
3110 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
3112 CTR2(KTR_PMAP, "pmap_enter_quick_locked: %p %lx", pmap, va);
3114 * In the case that a page table page is not
3115 * resident, we are creating it here.
3117 if (va < VM_MAXUSER_ADDRESS) {
3118 vm_pindex_t l2pindex;
3121 * Calculate pagetable page index
3123 l2pindex = pmap_l2_pindex(va);
3124 if (mpte && (mpte->pindex == l2pindex)) {
3130 l2 = pmap_l2(pmap, va);
3133 * If the page table page is mapped, we just increment
3134 * the hold count, and activate it. Otherwise, we
3135 * attempt to allocate a page table page. If this
3136 * attempt fails, we don't retry. Instead, we give up.
3138 if (l2 != NULL && pmap_load(l2) != 0) {
3139 phys = PTE_TO_PHYS(pmap_load(l2));
3140 mpte = PHYS_TO_VM_PAGE(phys);
3144 * Pass NULL instead of the PV list lock
3145 * pointer, because we don't intend to sleep.
3147 mpte = _pmap_alloc_l3(pmap, l2pindex, NULL);
3152 l3 = (pt_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mpte));
3153 l3 = &l3[pmap_l3_index(va)];
3156 l3 = pmap_l3(kernel_pmap, va);
3159 panic("pmap_enter_quick_locked: No l3");
3160 if (pmap_load(l3) != 0) {
3169 * Enter on the PV list if part of our managed memory.
3171 if ((m->oflags & VPO_UNMANAGED) == 0 &&
3172 !pmap_try_insert_pv_entry(pmap, va, m, lockp)) {
3175 if (pmap_unwire_ptp(pmap, va, mpte, &free)) {
3176 pmap_invalidate_page(pmap, va);
3177 vm_page_free_pages_toq(&free, false);
3185 * Increment counters
3187 pmap_resident_count_inc(pmap, 1);
3189 newl3 = ((VM_PAGE_TO_PHYS(m) / PAGE_SIZE) << PTE_PPN0_S) |
3191 if ((prot & VM_PROT_EXECUTE) != 0)
3193 if ((m->oflags & VPO_UNMANAGED) == 0)
3194 newl3 |= PTE_SW_MANAGED;
3195 if (va < VM_MAX_USER_ADDRESS)
3199 * Sync the i-cache on all harts before updating the PTE
3200 * if the new PTE is executable.
3202 if (prot & VM_PROT_EXECUTE)
3203 pmap_sync_icache(pmap, va, PAGE_SIZE);
3205 pmap_store(l3, newl3);
3207 pmap_invalidate_page(pmap, va);
3212 * This code maps large physical mmap regions into the
3213 * processor address space. Note that some shortcuts
3214 * are taken, but the code works.
3217 pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, vm_object_t object,
3218 vm_pindex_t pindex, vm_size_t size)
3221 VM_OBJECT_ASSERT_WLOCKED(object);
3222 KASSERT(object->type == OBJT_DEVICE || object->type == OBJT_SG,
3223 ("pmap_object_init_pt: non-device object"));
3227 * Clear the wired attribute from the mappings for the specified range of
3228 * addresses in the given pmap. Every valid mapping within that range
3229 * must have the wired attribute set. In contrast, invalid mappings
3230 * cannot have the wired attribute set, so they are ignored.
3232 * The wired attribute of the page table entry is not a hardware feature,
3233 * so there is no need to invalidate any TLB entries.
3236 pmap_unwire(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
3238 vm_offset_t va_next;
3239 pd_entry_t *l1, *l2, l2e;
3240 pt_entry_t *l3, l3e;
3241 bool pv_lists_locked;
3243 pv_lists_locked = false;
3246 for (; sva < eva; sva = va_next) {
3247 l1 = pmap_l1(pmap, sva);
3248 if (pmap_load(l1) == 0) {
3249 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
3255 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
3259 l2 = pmap_l1_to_l2(l1, sva);
3260 if ((l2e = pmap_load(l2)) == 0)
3262 if ((l2e & PTE_RWX) != 0) {
3263 if (sva + L2_SIZE == va_next && eva >= va_next) {
3264 if ((l2e & PTE_SW_WIRED) == 0)
3265 panic("pmap_unwire: l2 %#jx is missing "
3266 "PTE_SW_WIRED", (uintmax_t)l2e);
3267 pmap_clear_bits(l2, PTE_SW_WIRED);
3270 if (!pv_lists_locked) {
3271 pv_lists_locked = true;
3272 if (!rw_try_rlock(&pvh_global_lock)) {
3274 rw_rlock(&pvh_global_lock);
3279 if (!pmap_demote_l2(pmap, l2, sva))
3280 panic("pmap_unwire: demotion failed");
3286 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
3288 if ((l3e = pmap_load(l3)) == 0)
3290 if ((l3e & PTE_SW_WIRED) == 0)
3291 panic("pmap_unwire: l3 %#jx is missing "
3292 "PTE_SW_WIRED", (uintmax_t)l3e);
3295 * PG_W must be cleared atomically. Although the pmap
3296 * lock synchronizes access to PG_W, another processor
3297 * could be setting PG_M and/or PG_A concurrently.
3299 pmap_clear_bits(l3, PTE_SW_WIRED);
3300 pmap->pm_stats.wired_count--;
3303 if (pv_lists_locked)
3304 rw_runlock(&pvh_global_lock);
3309 * Copy the range specified by src_addr/len
3310 * from the source map to the range dst_addr/len
3311 * in the destination map.
3313 * This routine is only advisory and need not do anything.
3317 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len,
3318 vm_offset_t src_addr)
3324 * pmap_zero_page zeros the specified hardware page by mapping
3325 * the page into KVM and using bzero to clear its contents.
3328 pmap_zero_page(vm_page_t m)
3330 vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
3332 pagezero((void *)va);
3336 * pmap_zero_page_area zeros the specified hardware page by mapping
3337 * the page into KVM and using bzero to clear its contents.
3339 * off and size may not cover an area beyond a single hardware page.
3342 pmap_zero_page_area(vm_page_t m, int off, int size)
3344 vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
3346 if (off == 0 && size == PAGE_SIZE)
3347 pagezero((void *)va);
3349 bzero((char *)va + off, size);
3353 * pmap_copy_page copies the specified (machine independent)
3354 * page by mapping the page into virtual memory and using
3355 * bcopy to copy the page, one machine dependent page at a
3359 pmap_copy_page(vm_page_t msrc, vm_page_t mdst)
3361 vm_offset_t src = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(msrc));
3362 vm_offset_t dst = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mdst));
3364 pagecopy((void *)src, (void *)dst);
3367 int unmapped_buf_allowed = 1;
3370 pmap_copy_pages(vm_page_t ma[], vm_offset_t a_offset, vm_page_t mb[],
3371 vm_offset_t b_offset, int xfersize)
3375 vm_paddr_t p_a, p_b;
3376 vm_offset_t a_pg_offset, b_pg_offset;
3379 while (xfersize > 0) {
3380 a_pg_offset = a_offset & PAGE_MASK;
3381 m_a = ma[a_offset >> PAGE_SHIFT];
3382 p_a = m_a->phys_addr;
3383 b_pg_offset = b_offset & PAGE_MASK;
3384 m_b = mb[b_offset >> PAGE_SHIFT];
3385 p_b = m_b->phys_addr;
3386 cnt = min(xfersize, PAGE_SIZE - a_pg_offset);
3387 cnt = min(cnt, PAGE_SIZE - b_pg_offset);
3388 if (__predict_false(!PHYS_IN_DMAP(p_a))) {
3389 panic("!DMAP a %lx", p_a);
3391 a_cp = (char *)PHYS_TO_DMAP(p_a) + a_pg_offset;
3393 if (__predict_false(!PHYS_IN_DMAP(p_b))) {
3394 panic("!DMAP b %lx", p_b);
3396 b_cp = (char *)PHYS_TO_DMAP(p_b) + b_pg_offset;
3398 bcopy(a_cp, b_cp, cnt);
3406 pmap_quick_enter_page(vm_page_t m)
3409 return (PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m)));
3413 pmap_quick_remove_page(vm_offset_t addr)
3418 * Returns true if the pmap's pv is one of the first
3419 * 16 pvs linked to from this page. This count may
3420 * be changed upwards or downwards in the future; it
3421 * is only necessary that true be returned for a small
3422 * subset of pmaps for proper page aging.
3425 pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
3427 struct md_page *pvh;
3428 struct rwlock *lock;
3433 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3434 ("pmap_page_exists_quick: page %p is not managed", m));
3436 rw_rlock(&pvh_global_lock);
3437 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3439 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3440 if (PV_PMAP(pv) == pmap) {
3448 if (!rv && loops < 16 && (m->flags & PG_FICTITIOUS) == 0) {
3449 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
3450 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
3451 if (PV_PMAP(pv) == pmap) {
3461 rw_runlock(&pvh_global_lock);
3466 * pmap_page_wired_mappings:
3468 * Return the number of managed mappings to the given physical page
3472 pmap_page_wired_mappings(vm_page_t m)
3474 struct md_page *pvh;
3475 struct rwlock *lock;
3480 int count, md_gen, pvh_gen;
3482 if ((m->oflags & VPO_UNMANAGED) != 0)
3484 rw_rlock(&pvh_global_lock);
3485 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3489 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3491 if (!PMAP_TRYLOCK(pmap)) {
3492 md_gen = m->md.pv_gen;
3496 if (md_gen != m->md.pv_gen) {
3501 l3 = pmap_l3(pmap, pv->pv_va);
3502 if ((pmap_load(l3) & PTE_SW_WIRED) != 0)
3506 if ((m->flags & PG_FICTITIOUS) == 0) {
3507 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
3508 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
3510 if (!PMAP_TRYLOCK(pmap)) {
3511 md_gen = m->md.pv_gen;
3512 pvh_gen = pvh->pv_gen;
3516 if (md_gen != m->md.pv_gen ||
3517 pvh_gen != pvh->pv_gen) {
3522 l2 = pmap_l2(pmap, pv->pv_va);
3523 if ((pmap_load(l2) & PTE_SW_WIRED) != 0)
3529 rw_runlock(&pvh_global_lock);
3534 * Returns true if the given page is mapped individually or as part of
3535 * a 2mpage. Otherwise, returns false.
3538 pmap_page_is_mapped(vm_page_t m)
3540 struct rwlock *lock;
3543 if ((m->oflags & VPO_UNMANAGED) != 0)
3545 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3547 rv = !TAILQ_EMPTY(&m->md.pv_list) ||
3548 ((m->flags & PG_FICTITIOUS) == 0 &&
3549 !TAILQ_EMPTY(&pa_to_pvh(VM_PAGE_TO_PHYS(m))->pv_list));
3555 pmap_remove_pages_pv(pmap_t pmap, vm_page_t m, pv_entry_t pv,
3556 struct spglist *free, bool superpage)
3558 struct md_page *pvh;
3562 pmap_resident_count_dec(pmap, Ln_ENTRIES);
3563 pvh = pa_to_pvh(m->phys_addr);
3564 TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
3566 if (TAILQ_EMPTY(&pvh->pv_list)) {
3567 for (mt = m; mt < &m[Ln_ENTRIES]; mt++)
3568 if (TAILQ_EMPTY(&mt->md.pv_list) &&
3569 (mt->a.flags & PGA_WRITEABLE) != 0)
3570 vm_page_aflag_clear(mt, PGA_WRITEABLE);
3572 mpte = pmap_remove_pt_page(pmap, pv->pv_va);
3574 KASSERT(mpte->valid == VM_PAGE_BITS_ALL,
3575 ("pmap_remove_pages: pte page not promoted"));
3576 pmap_resident_count_dec(pmap, 1);
3577 KASSERT(mpte->ref_count == Ln_ENTRIES,
3578 ("pmap_remove_pages: pte page ref count error"));
3579 mpte->ref_count = 0;
3580 pmap_add_delayed_free_list(mpte, free, FALSE);
3583 pmap_resident_count_dec(pmap, 1);
3584 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
3586 if (TAILQ_EMPTY(&m->md.pv_list) &&
3587 (m->a.flags & PGA_WRITEABLE) != 0) {
3588 pvh = pa_to_pvh(m->phys_addr);
3589 if (TAILQ_EMPTY(&pvh->pv_list))
3590 vm_page_aflag_clear(m, PGA_WRITEABLE);
3596 * Destroy all managed, non-wired mappings in the given user-space
3597 * pmap. This pmap cannot be active on any processor besides the
3600 * This function cannot be applied to the kernel pmap. Moreover, it
3601 * is not intended for general use. It is only to be used during
3602 * process termination. Consequently, it can be implemented in ways
3603 * that make it faster than pmap_remove(). First, it can more quickly
3604 * destroy mappings by iterating over the pmap's collection of PV
3605 * entries, rather than searching the page table. Second, it doesn't
3606 * have to test and clear the page table entries atomically, because
3607 * no processor is currently accessing the user address space. In
3608 * particular, a page table entry's dirty bit won't change state once
3609 * this function starts.
3612 pmap_remove_pages(pmap_t pmap)
3614 struct spglist free;
3616 pt_entry_t *pte, tpte;
3619 struct pv_chunk *pc, *npc;
3620 struct rwlock *lock;
3622 uint64_t inuse, bitmask;
3623 int allfree, field, freed, idx;
3629 rw_rlock(&pvh_global_lock);
3631 TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) {
3634 for (field = 0; field < _NPCM; field++) {
3635 inuse = ~pc->pc_map[field] & pc_freemask[field];
3636 while (inuse != 0) {
3637 bit = ffsl(inuse) - 1;
3638 bitmask = 1UL << bit;
3639 idx = field * 64 + bit;
3640 pv = &pc->pc_pventry[idx];
3643 pte = pmap_l1(pmap, pv->pv_va);
3644 ptepde = pmap_load(pte);
3645 pte = pmap_l1_to_l2(pte, pv->pv_va);
3646 tpte = pmap_load(pte);
3647 if ((tpte & PTE_RWX) != 0) {
3651 pte = pmap_l2_to_l3(pte, pv->pv_va);
3652 tpte = pmap_load(pte);
3657 * We cannot remove wired pages from a
3658 * process' mapping at this time.
3660 if (tpte & PTE_SW_WIRED) {
3665 m = PHYS_TO_VM_PAGE(PTE_TO_PHYS(tpte));
3666 KASSERT((m->flags & PG_FICTITIOUS) != 0 ||
3667 m < &vm_page_array[vm_page_array_size],
3668 ("pmap_remove_pages: bad pte %#jx",
3674 * Update the vm_page_t clean/reference bits.
3676 if ((tpte & (PTE_D | PTE_W)) ==
3680 mt < &m[Ln_ENTRIES]; mt++)
3686 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(&lock, m);
3689 pc->pc_map[field] |= bitmask;
3691 pmap_remove_pages_pv(pmap, m, pv, &free,
3693 pmap_unuse_pt(pmap, pv->pv_va, ptepde, &free);
3697 PV_STAT(atomic_add_long(&pv_entry_frees, freed));
3698 PV_STAT(atomic_add_int(&pv_entry_spare, freed));
3699 PV_STAT(atomic_subtract_long(&pv_entry_count, freed));
3701 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
3707 pmap_invalidate_all(pmap);
3708 rw_runlock(&pvh_global_lock);
3710 vm_page_free_pages_toq(&free, false);
3714 pmap_page_test_mappings(vm_page_t m, boolean_t accessed, boolean_t modified)
3716 struct md_page *pvh;
3717 struct rwlock *lock;
3719 pt_entry_t *l3, mask;
3722 int md_gen, pvh_gen;
3732 rw_rlock(&pvh_global_lock);
3733 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3736 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3738 if (!PMAP_TRYLOCK(pmap)) {
3739 md_gen = m->md.pv_gen;
3743 if (md_gen != m->md.pv_gen) {
3748 l3 = pmap_l3(pmap, pv->pv_va);
3749 rv = (pmap_load(l3) & mask) == mask;
3754 if ((m->flags & PG_FICTITIOUS) == 0) {
3755 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
3756 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
3758 if (!PMAP_TRYLOCK(pmap)) {
3759 md_gen = m->md.pv_gen;
3760 pvh_gen = pvh->pv_gen;
3764 if (md_gen != m->md.pv_gen ||
3765 pvh_gen != pvh->pv_gen) {
3770 l2 = pmap_l2(pmap, pv->pv_va);
3771 rv = (pmap_load(l2) & mask) == mask;
3779 rw_runlock(&pvh_global_lock);
3786 * Return whether or not the specified physical page was modified
3787 * in any physical maps.
3790 pmap_is_modified(vm_page_t m)
3793 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3794 ("pmap_is_modified: page %p is not managed", m));
3797 * If the page is not busied then this check is racy.
3799 if (!pmap_page_is_write_mapped(m))
3801 return (pmap_page_test_mappings(m, FALSE, TRUE));
3805 * pmap_is_prefaultable:
3807 * Return whether or not the specified virtual address is eligible
3811 pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr)
3818 l3 = pmap_l3(pmap, addr);
3819 if (l3 != NULL && pmap_load(l3) != 0) {
3827 * pmap_is_referenced:
3829 * Return whether or not the specified physical page was referenced
3830 * in any physical maps.
3833 pmap_is_referenced(vm_page_t m)
3836 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3837 ("pmap_is_referenced: page %p is not managed", m));
3838 return (pmap_page_test_mappings(m, TRUE, FALSE));
3842 * Clear the write and modified bits in each of the given page's mappings.
3845 pmap_remove_write(vm_page_t m)
3847 struct md_page *pvh;
3848 struct rwlock *lock;
3851 pt_entry_t *l3, oldl3, newl3;
3852 pv_entry_t next_pv, pv;
3854 int md_gen, pvh_gen;
3856 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3857 ("pmap_remove_write: page %p is not managed", m));
3858 vm_page_assert_busied(m);
3860 if (!pmap_page_is_write_mapped(m))
3862 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3863 pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy :
3864 pa_to_pvh(VM_PAGE_TO_PHYS(m));
3865 rw_rlock(&pvh_global_lock);
3868 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_next, next_pv) {
3870 if (!PMAP_TRYLOCK(pmap)) {
3871 pvh_gen = pvh->pv_gen;
3875 if (pvh_gen != pvh->pv_gen) {
3882 l2 = pmap_l2(pmap, va);
3883 if ((pmap_load(l2) & PTE_W) != 0)
3884 (void)pmap_demote_l2_locked(pmap, l2, va, &lock);
3885 KASSERT(lock == VM_PAGE_TO_PV_LIST_LOCK(m),
3886 ("inconsistent pv lock %p %p for page %p",
3887 lock, VM_PAGE_TO_PV_LIST_LOCK(m), m));
3890 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3892 if (!PMAP_TRYLOCK(pmap)) {
3893 pvh_gen = pvh->pv_gen;
3894 md_gen = m->md.pv_gen;
3898 if (pvh_gen != pvh->pv_gen || md_gen != m->md.pv_gen) {
3904 l3 = pmap_l3(pmap, pv->pv_va);
3905 oldl3 = pmap_load(l3);
3907 if ((oldl3 & PTE_W) != 0) {
3908 newl3 = oldl3 & ~(PTE_D | PTE_W);
3909 if (!atomic_fcmpset_long(l3, &oldl3, newl3))
3911 if ((oldl3 & PTE_D) != 0)
3913 pmap_invalidate_page(pmap, pv->pv_va);
3918 vm_page_aflag_clear(m, PGA_WRITEABLE);
3919 rw_runlock(&pvh_global_lock);
3923 * pmap_ts_referenced:
3925 * Return a count of reference bits for a page, clearing those bits.
3926 * It is not necessary for every reference bit to be cleared, but it
3927 * is necessary that 0 only be returned when there are truly no
3928 * reference bits set.
3930 * As an optimization, update the page's dirty field if a modified bit is
3931 * found while counting reference bits. This opportunistic update can be
3932 * performed at low cost and can eliminate the need for some future calls
3933 * to pmap_is_modified(). However, since this function stops after
3934 * finding PMAP_TS_REFERENCED_MAX reference bits, it may not detect some
3935 * dirty pages. Those dirty pages will only be detected by a future call
3936 * to pmap_is_modified().
3939 pmap_ts_referenced(vm_page_t m)
3941 struct spglist free;
3942 struct md_page *pvh;
3943 struct rwlock *lock;
3946 pd_entry_t *l2, l2e;
3947 pt_entry_t *l3, l3e;
3950 int cleared, md_gen, not_cleared, pvh_gen;
3952 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3953 ("pmap_ts_referenced: page %p is not managed", m));
3956 pa = VM_PAGE_TO_PHYS(m);
3957 pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy : pa_to_pvh(pa);
3959 lock = PHYS_TO_PV_LIST_LOCK(pa);
3960 rw_rlock(&pvh_global_lock);
3964 if ((pvf = TAILQ_FIRST(&pvh->pv_list)) == NULL)
3965 goto small_mappings;
3969 if (!PMAP_TRYLOCK(pmap)) {
3970 pvh_gen = pvh->pv_gen;
3974 if (pvh_gen != pvh->pv_gen) {
3980 l2 = pmap_l2(pmap, va);
3981 l2e = pmap_load(l2);
3982 if ((l2e & (PTE_W | PTE_D)) == (PTE_W | PTE_D)) {
3984 * Although l2e is mapping a 2MB page, because
3985 * this function is called at a 4KB page granularity,
3986 * we only update the 4KB page under test.
3990 if ((l2e & PTE_A) != 0) {
3992 * Since this reference bit is shared by 512 4KB
3993 * pages, it should not be cleared every time it is
3994 * tested. Apply a simple "hash" function on the
3995 * physical page number, the virtual superpage number,
3996 * and the pmap address to select one 4KB page out of
3997 * the 512 on which testing the reference bit will
3998 * result in clearing that reference bit. This
3999 * function is designed to avoid the selection of the
4000 * same 4KB page for every 2MB page mapping.
4002 * On demotion, a mapping that hasn't been referenced
4003 * is simply destroyed. To avoid the possibility of a
4004 * subsequent page fault on a demoted wired mapping,
4005 * always leave its reference bit set. Moreover,
4006 * since the superpage is wired, the current state of
4007 * its reference bit won't affect page replacement.
4009 if ((((pa >> PAGE_SHIFT) ^ (pv->pv_va >> L2_SHIFT) ^
4010 (uintptr_t)pmap) & (Ln_ENTRIES - 1)) == 0 &&
4011 (l2e & PTE_SW_WIRED) == 0) {
4012 pmap_clear_bits(l2, PTE_A);
4013 pmap_invalidate_page(pmap, va);
4019 /* Rotate the PV list if it has more than one entry. */
4020 if (pv != NULL && TAILQ_NEXT(pv, pv_next) != NULL) {
4021 TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
4022 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_next);
4025 if (cleared + not_cleared >= PMAP_TS_REFERENCED_MAX)
4027 } while ((pv = TAILQ_FIRST(&pvh->pv_list)) != pvf);
4029 if ((pvf = TAILQ_FIRST(&m->md.pv_list)) == NULL)
4034 if (!PMAP_TRYLOCK(pmap)) {
4035 pvh_gen = pvh->pv_gen;
4036 md_gen = m->md.pv_gen;
4040 if (pvh_gen != pvh->pv_gen || md_gen != m->md.pv_gen) {
4045 l2 = pmap_l2(pmap, pv->pv_va);
4047 KASSERT((pmap_load(l2) & PTE_RX) == 0,
4048 ("pmap_ts_referenced: found an invalid l2 table"));
4050 l3 = pmap_l2_to_l3(l2, pv->pv_va);
4051 l3e = pmap_load(l3);
4052 if ((l3e & PTE_D) != 0)
4054 if ((l3e & PTE_A) != 0) {
4055 if ((l3e & PTE_SW_WIRED) == 0) {
4057 * Wired pages cannot be paged out so
4058 * doing accessed bit emulation for
4059 * them is wasted effort. We do the
4060 * hard work for unwired pages only.
4062 pmap_clear_bits(l3, PTE_A);
4063 pmap_invalidate_page(pmap, pv->pv_va);
4069 /* Rotate the PV list if it has more than one entry. */
4070 if (pv != NULL && TAILQ_NEXT(pv, pv_next) != NULL) {
4071 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
4072 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
4075 } while ((pv = TAILQ_FIRST(&m->md.pv_list)) != pvf && cleared +
4076 not_cleared < PMAP_TS_REFERENCED_MAX);
4079 rw_runlock(&pvh_global_lock);
4080 vm_page_free_pages_toq(&free, false);
4081 return (cleared + not_cleared);
4085 * Apply the given advice to the specified range of addresses within the
4086 * given pmap. Depending on the advice, clear the referenced and/or
4087 * modified flags in each mapping and set the mapped page's dirty field.
4090 pmap_advise(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, int advice)
4095 * Clear the modify bits on the specified physical page.
4098 pmap_clear_modify(vm_page_t m)
4100 struct md_page *pvh;
4101 struct rwlock *lock;
4103 pv_entry_t next_pv, pv;
4104 pd_entry_t *l2, oldl2;
4107 int md_gen, pvh_gen;
4109 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
4110 ("pmap_clear_modify: page %p is not managed", m));
4111 vm_page_assert_busied(m);
4113 if (!pmap_page_is_write_mapped(m))
4117 * If the page is not PGA_WRITEABLE, then no PTEs can have PG_M set.
4118 * If the object containing the page is locked and the page is not
4119 * exclusive busied, then PGA_WRITEABLE cannot be concurrently set.
4121 if ((m->a.flags & PGA_WRITEABLE) == 0)
4123 pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy :
4124 pa_to_pvh(VM_PAGE_TO_PHYS(m));
4125 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
4126 rw_rlock(&pvh_global_lock);
4129 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_next, next_pv) {
4131 if (!PMAP_TRYLOCK(pmap)) {
4132 pvh_gen = pvh->pv_gen;
4136 if (pvh_gen != pvh->pv_gen) {
4142 l2 = pmap_l2(pmap, va);
4143 oldl2 = pmap_load(l2);
4144 /* If oldl2 has PTE_W set, then it also has PTE_D set. */
4145 if ((oldl2 & PTE_W) != 0 &&
4146 pmap_demote_l2_locked(pmap, l2, va, &lock) &&
4147 (oldl2 & PTE_SW_WIRED) == 0) {
4149 * Write protect the mapping to a single page so that
4150 * a subsequent write access may repromote.
4152 va += VM_PAGE_TO_PHYS(m) - PTE_TO_PHYS(oldl2);
4153 l3 = pmap_l2_to_l3(l2, va);
4154 pmap_clear_bits(l3, PTE_D | PTE_W);
4156 pmap_invalidate_page(pmap, va);
4160 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
4162 if (!PMAP_TRYLOCK(pmap)) {
4163 md_gen = m->md.pv_gen;
4164 pvh_gen = pvh->pv_gen;
4168 if (pvh_gen != pvh->pv_gen || md_gen != m->md.pv_gen) {
4173 l2 = pmap_l2(pmap, pv->pv_va);
4174 KASSERT((pmap_load(l2) & PTE_RWX) == 0,
4175 ("pmap_clear_modify: found a 2mpage in page %p's pv list",
4177 l3 = pmap_l2_to_l3(l2, pv->pv_va);
4178 if ((pmap_load(l3) & (PTE_D | PTE_W)) == (PTE_D | PTE_W)) {
4179 pmap_clear_bits(l3, PTE_D | PTE_W);
4180 pmap_invalidate_page(pmap, pv->pv_va);
4185 rw_runlock(&pvh_global_lock);
4189 pmap_mapbios(vm_paddr_t pa, vm_size_t size)
4192 return ((void *)PHYS_TO_DMAP(pa));
4196 pmap_unmapbios(vm_paddr_t pa, vm_size_t size)
4201 * Sets the memory attribute for the specified page.
4204 pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma)
4207 m->md.pv_memattr = ma;
4211 * Perform the pmap work for mincore(2). If the page is not both referenced and
4212 * modified by this pmap, returns its physical address so that the caller can
4213 * find other mappings.
4216 pmap_mincore(pmap_t pmap, vm_offset_t addr, vm_paddr_t *pap)
4218 pt_entry_t *l2, *l3, tpte;
4224 l2 = pmap_l2(pmap, addr);
4225 if (l2 != NULL && ((tpte = pmap_load(l2)) & PTE_V) != 0) {
4226 if ((tpte & PTE_RWX) != 0) {
4227 pa = PTE_TO_PHYS(tpte) | (addr & L2_OFFSET);
4228 val = MINCORE_INCORE | MINCORE_PSIND(1);
4230 l3 = pmap_l2_to_l3(l2, addr);
4231 tpte = pmap_load(l3);
4232 if ((tpte & PTE_V) == 0) {
4236 pa = PTE_TO_PHYS(tpte) | (addr & L3_OFFSET);
4237 val = MINCORE_INCORE;
4240 if ((tpte & PTE_D) != 0)
4241 val |= MINCORE_MODIFIED | MINCORE_MODIFIED_OTHER;
4242 if ((tpte & PTE_A) != 0)
4243 val |= MINCORE_REFERENCED | MINCORE_REFERENCED_OTHER;
4244 managed = (tpte & PTE_SW_MANAGED) == PTE_SW_MANAGED;
4249 if ((val & (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER)) !=
4250 (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER) && managed) {
4258 pmap_activate_sw(struct thread *td)
4260 pmap_t oldpmap, pmap;
4263 oldpmap = PCPU_GET(curpmap);
4264 pmap = vmspace_pmap(td->td_proc->p_vmspace);
4265 if (pmap == oldpmap)
4267 load_satp(pmap->pm_satp);
4269 hart = PCPU_GET(hart);
4271 CPU_SET_ATOMIC(hart, &pmap->pm_active);
4272 CPU_CLR_ATOMIC(hart, &oldpmap->pm_active);
4274 CPU_SET(hart, &pmap->pm_active);
4275 CPU_CLR(hart, &oldpmap->pm_active);
4277 PCPU_SET(curpmap, pmap);
4283 pmap_activate(struct thread *td)
4287 pmap_activate_sw(td);
4292 pmap_activate_boot(pmap_t pmap)
4296 hart = PCPU_GET(hart);
4298 CPU_SET_ATOMIC(hart, &pmap->pm_active);
4300 CPU_SET(hart, &pmap->pm_active);
4302 PCPU_SET(curpmap, pmap);
4306 pmap_sync_icache(pmap_t pmap, vm_offset_t va, vm_size_t sz)
4311 * From the RISC-V User-Level ISA V2.2:
4313 * "To make a store to instruction memory visible to all
4314 * RISC-V harts, the writing hart has to execute a data FENCE
4315 * before requesting that all remote RISC-V harts execute a
4318 * However, this is slightly misleading; we still need to
4319 * perform a FENCE.I for the local hart, as FENCE does nothing
4320 * for its icache. FENCE.I alone is also sufficient for the
4325 CPU_CLR(PCPU_GET(hart), &mask);
4327 if (!CPU_EMPTY(&mask) && smp_started) {
4329 sbi_remote_fence_i(mask.__bits);
4335 * Increase the starting virtual address of the given mapping if a
4336 * different alignment might result in more superpage mappings.
4339 pmap_align_superpage(vm_object_t object, vm_ooffset_t offset,
4340 vm_offset_t *addr, vm_size_t size)
4342 vm_offset_t superpage_offset;
4346 if (object != NULL && (object->flags & OBJ_COLORED) != 0)
4347 offset += ptoa(object->pg_color);
4348 superpage_offset = offset & L2_OFFSET;
4349 if (size - ((L2_SIZE - superpage_offset) & L2_OFFSET) < L2_SIZE ||
4350 (*addr & L2_OFFSET) == superpage_offset)
4352 if ((*addr & L2_OFFSET) < superpage_offset)
4353 *addr = (*addr & ~L2_OFFSET) + superpage_offset;
4355 *addr = ((*addr + L2_OFFSET) & ~L2_OFFSET) + superpage_offset;
4359 * Get the kernel virtual address of a set of physical pages. If there are
4360 * physical addresses not covered by the DMAP perform a transient mapping
4361 * that will be removed when calling pmap_unmap_io_transient.
4363 * \param page The pages the caller wishes to obtain the virtual
4364 * address on the kernel memory map.
4365 * \param vaddr On return contains the kernel virtual memory address
4366 * of the pages passed in the page parameter.
4367 * \param count Number of pages passed in.
4368 * \param can_fault TRUE if the thread using the mapped pages can take
4369 * page faults, FALSE otherwise.
4371 * \returns TRUE if the caller must call pmap_unmap_io_transient when
4372 * finished or FALSE otherwise.
4376 pmap_map_io_transient(vm_page_t page[], vm_offset_t vaddr[], int count,
4377 boolean_t can_fault)
4380 boolean_t needs_mapping;
4384 * Allocate any KVA space that we need, this is done in a separate
4385 * loop to prevent calling vmem_alloc while pinned.
4387 needs_mapping = FALSE;
4388 for (i = 0; i < count; i++) {
4389 paddr = VM_PAGE_TO_PHYS(page[i]);
4390 if (__predict_false(paddr >= DMAP_MAX_PHYSADDR)) {
4391 error = vmem_alloc(kernel_arena, PAGE_SIZE,
4392 M_BESTFIT | M_WAITOK, &vaddr[i]);
4393 KASSERT(error == 0, ("vmem_alloc failed: %d", error));
4394 needs_mapping = TRUE;
4396 vaddr[i] = PHYS_TO_DMAP(paddr);
4400 /* Exit early if everything is covered by the DMAP */
4406 for (i = 0; i < count; i++) {
4407 paddr = VM_PAGE_TO_PHYS(page[i]);
4408 if (paddr >= DMAP_MAX_PHYSADDR) {
4410 "pmap_map_io_transient: TODO: Map out of DMAP data");
4414 return (needs_mapping);
4418 pmap_unmap_io_transient(vm_page_t page[], vm_offset_t vaddr[], int count,
4419 boolean_t can_fault)
4426 for (i = 0; i < count; i++) {
4427 paddr = VM_PAGE_TO_PHYS(page[i]);
4428 if (paddr >= DMAP_MAX_PHYSADDR) {
4429 panic("RISCVTODO: pmap_unmap_io_transient: Unmap data");
4435 pmap_is_valid_memattr(pmap_t pmap __unused, vm_memattr_t mode)
4438 return (mode >= VM_MEMATTR_DEVICE && mode <= VM_MEMATTR_WRITE_BACK);
4442 pmap_get_tables(pmap_t pmap, vm_offset_t va, pd_entry_t **l1, pd_entry_t **l2,
4445 pd_entry_t *l1p, *l2p;
4447 /* Get l1 directory entry. */
4448 l1p = pmap_l1(pmap, va);
4451 if (l1p == NULL || (pmap_load(l1p) & PTE_V) == 0)
4454 if ((pmap_load(l1p) & PTE_RX) != 0) {
4460 /* Get l2 directory entry. */
4461 l2p = pmap_l1_to_l2(l1p, va);
4464 if (l2p == NULL || (pmap_load(l2p) & PTE_V) == 0)
4467 if ((pmap_load(l2p) & PTE_RX) != 0) {
4472 /* Get l3 page table entry. */
4473 *l3 = pmap_l2_to_l3(l2p, va);
4479 * Track a range of the kernel's virtual address space that is contiguous
4480 * in various mapping attributes.
4482 struct pmap_kernel_map_range {
4491 sysctl_kmaps_dump(struct sbuf *sb, struct pmap_kernel_map_range *range,
4495 if (eva <= range->sva)
4498 sbuf_printf(sb, "0x%016lx-0x%016lx r%c%c%c%c %d %d %d\n",
4500 (range->attrs & PTE_W) == PTE_W ? 'w' : '-',
4501 (range->attrs & PTE_X) == PTE_X ? 'x' : '-',
4502 (range->attrs & PTE_U) == PTE_U ? 'u' : 's',
4503 (range->attrs & PTE_G) == PTE_G ? 'g' : '-',
4504 range->l1pages, range->l2pages, range->l3pages);
4506 /* Reset to sentinel value. */
4507 range->sva = 0xfffffffffffffffful;
4511 * Determine whether the attributes specified by a page table entry match those
4512 * being tracked by the current range.
4515 sysctl_kmaps_match(struct pmap_kernel_map_range *range, pt_entry_t attrs)
4518 return (range->attrs == attrs);
4522 sysctl_kmaps_reinit(struct pmap_kernel_map_range *range, vm_offset_t va,
4526 memset(range, 0, sizeof(*range));
4528 range->attrs = attrs;
4532 * Given a leaf PTE, derive the mapping's attributes. If they do not match
4533 * those of the current run, dump the address range and its attributes, and
4537 sysctl_kmaps_check(struct sbuf *sb, struct pmap_kernel_map_range *range,
4538 vm_offset_t va, pd_entry_t l1e, pd_entry_t l2e, pt_entry_t l3e)
4542 /* The PTE global bit is inherited by lower levels. */
4543 attrs = l1e & PTE_G;
4544 if ((l1e & PTE_RWX) != 0)
4545 attrs |= l1e & (PTE_RWX | PTE_U);
4547 attrs |= l2e & PTE_G;
4548 if ((l2e & PTE_RWX) != 0)
4549 attrs |= l2e & (PTE_RWX | PTE_U);
4551 attrs |= l3e & (PTE_RWX | PTE_U | PTE_G);
4553 if (range->sva > va || !sysctl_kmaps_match(range, attrs)) {
4554 sysctl_kmaps_dump(sb, range, va);
4555 sysctl_kmaps_reinit(range, va, attrs);
4560 sysctl_kmaps(SYSCTL_HANDLER_ARGS)
4562 struct pmap_kernel_map_range range;
4563 struct sbuf sbuf, *sb;
4564 pd_entry_t l1e, *l2, l2e;
4565 pt_entry_t *l3, l3e;
4570 error = sysctl_wire_old_buffer(req, 0);
4574 sbuf_new_for_sysctl(sb, NULL, PAGE_SIZE, req);
4576 /* Sentinel value. */
4577 range.sva = 0xfffffffffffffffful;
4580 * Iterate over the kernel page tables without holding the kernel pmap
4581 * lock. Kernel page table pages are never freed, so at worst we will
4582 * observe inconsistencies in the output.
4584 sva = VM_MIN_KERNEL_ADDRESS;
4585 for (i = pmap_l1_index(sva); i < Ln_ENTRIES; i++) {
4586 if (i == pmap_l1_index(DMAP_MIN_ADDRESS))
4587 sbuf_printf(sb, "\nDirect map:\n");
4588 else if (i == pmap_l1_index(VM_MIN_KERNEL_ADDRESS))
4589 sbuf_printf(sb, "\nKernel map:\n");
4591 l1e = kernel_pmap->pm_l1[i];
4592 if ((l1e & PTE_V) == 0) {
4593 sysctl_kmaps_dump(sb, &range, sva);
4597 if ((l1e & PTE_RWX) != 0) {
4598 sysctl_kmaps_check(sb, &range, sva, l1e, 0, 0);
4603 pa = PTE_TO_PHYS(l1e);
4604 l2 = (pd_entry_t *)PHYS_TO_DMAP(pa);
4606 for (j = pmap_l2_index(sva); j < Ln_ENTRIES; j++) {
4608 if ((l2e & PTE_V) == 0) {
4609 sysctl_kmaps_dump(sb, &range, sva);
4613 if ((l2e & PTE_RWX) != 0) {
4614 sysctl_kmaps_check(sb, &range, sva, l1e, l2e, 0);
4619 pa = PTE_TO_PHYS(l2e);
4620 l3 = (pd_entry_t *)PHYS_TO_DMAP(pa);
4622 for (k = pmap_l3_index(sva); k < Ln_ENTRIES; k++,
4625 if ((l3e & PTE_V) == 0) {
4626 sysctl_kmaps_dump(sb, &range, sva);
4629 sysctl_kmaps_check(sb, &range, sva,
4636 error = sbuf_finish(sb);
4640 SYSCTL_OID(_vm_pmap, OID_AUTO, kernel_maps,
4641 CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_MPSAFE | CTLFLAG_SKIP,
4642 NULL, 0, sysctl_kmaps, "A",
4643 "Dump kernel address layout");