1 //===--- CGRecordLayout.h - LLVM Record Layout Information ------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #ifndef CLANG_CODEGEN_CGRECORDLAYOUT_H
11 #define CLANG_CODEGEN_CGRECORDLAYOUT_H
13 #include "clang/AST/CharUnits.h"
14 #include "clang/AST/Decl.h"
15 #include "clang/Basic/LLVM.h"
16 #include "llvm/ADT/DenseMap.h"
17 #include "llvm/DerivedTypes.h"
26 /// \brief Helper object for describing how to generate the code for access to a
29 /// This structure is intended to describe the "policy" of how the bit-field
30 /// should be accessed, which may be target, language, or ABI dependent.
31 class CGBitFieldInfo {
33 /// Descriptor for a single component of a bit-field access. The entire
34 /// bit-field is constituted of a bitwise OR of all of the individual
37 /// Each component describes an accessed value, which is how the component
38 /// should be transferred to/from memory, and a target placement, which is how
39 /// that component fits into the constituted bit-field. The pseudo-IR for a
42 /// %0 = gep %base, 0, FieldIndex
43 /// %1 = gep (i8*) %0, FieldByteOffset
44 /// %2 = (i(AccessWidth) *) %1
45 /// %3 = load %2, align AccessAlignment
46 /// %4 = shr %3, FieldBitStart
48 /// and the composed bit-field is formed as the boolean OR of all accesses,
49 /// masked to TargetBitWidth bits and shifted to TargetBitOffset.
51 /// Offset of the field to load in the LLVM structure, if any.
54 /// Byte offset from the field address, if any. This should generally be
55 /// unused as the cleanest IR comes from having a well-constructed LLVM type
56 /// with proper GEP instructions, but sometimes its use is required, for
57 /// example if an access is intended to straddle an LLVM field boundary.
58 CharUnits FieldByteOffset;
60 /// Bit offset in the accessed value to use. The width is implied by \see
62 unsigned FieldBitStart;
64 /// Bit width of the memory access to perform.
67 /// The alignment of the memory access, or 0 if the default alignment should
70 // FIXME: Remove use of 0 to encode default, instead have IRgen do the right
71 // thing when it generates the code, if avoiding align directives is
73 CharUnits AccessAlignment;
75 /// Offset for the target value.
76 unsigned TargetBitOffset;
78 /// Number of bits in the access that are destined for the bit-field.
79 unsigned TargetBitWidth;
83 /// The components to use to access the bit-field. We may need up to three
84 /// separate components to support up to i64 bit-field access (4 + 2 + 1 byte
87 // FIXME: De-hardcode this, just allocate following the struct.
88 AccessInfo Components[3];
90 /// The total size of the bit-field, in bits.
93 /// The number of access components to use.
94 unsigned NumComponents;
96 /// Whether the bit-field is signed.
100 CGBitFieldInfo(unsigned Size, unsigned NumComponents, AccessInfo *_Components,
101 bool IsSigned) : Size(Size), NumComponents(NumComponents),
103 assert(NumComponents <= 3 && "invalid number of components!");
104 for (unsigned i = 0; i != NumComponents; ++i)
105 Components[i] = _Components[i];
107 // Check some invariants.
108 unsigned AccessedSize = 0;
109 for (unsigned i = 0, e = getNumComponents(); i != e; ++i) {
110 const AccessInfo &AI = getComponent(i);
111 AccessedSize += AI.TargetBitWidth;
113 // We shouldn't try to load 0 bits.
114 assert(AI.TargetBitWidth > 0);
116 // We can't load more bits than we accessed.
117 assert(AI.FieldBitStart + AI.TargetBitWidth <= AI.AccessWidth);
119 // We shouldn't put any bits outside the result size.
120 assert(AI.TargetBitWidth + AI.TargetBitOffset <= Size);
123 // Check that the total number of target bits matches the total bit-field
125 assert(AccessedSize == Size && "Total size does not match accessed size!");
129 /// \brief Check whether this bit-field access is (i.e., should be sign
130 /// extended on loads).
131 bool isSigned() const { return IsSigned; }
133 /// \brief Get the size of the bit-field, in bits.
134 unsigned getSize() const { return Size; }
136 /// @name Component Access
139 unsigned getNumComponents() const { return NumComponents; }
141 const AccessInfo &getComponent(unsigned Index) const {
142 assert(Index < getNumComponents() && "Invalid access!");
143 return Components[Index];
148 void print(raw_ostream &OS) const;
151 /// \brief Given a bit-field decl, build an appropriate helper object for
152 /// accessing that field (which is expected to have the given offset and
154 static CGBitFieldInfo MakeInfo(class CodeGenTypes &Types, const FieldDecl *FD,
155 uint64_t FieldOffset, uint64_t FieldSize);
157 /// \brief Given a bit-field decl, build an appropriate helper object for
158 /// accessing that field (which is expected to have the given offset and
159 /// size). The field decl should be known to be contained within a type of at
160 /// least the given size and with the given alignment.
161 static CGBitFieldInfo MakeInfo(CodeGenTypes &Types, const FieldDecl *FD,
162 uint64_t FieldOffset, uint64_t FieldSize,
163 uint64_t ContainingTypeSizeInBits,
164 unsigned ContainingTypeAlign);
167 /// CGRecordLayout - This class handles struct and union layout info while
168 /// lowering AST types to LLVM types.
170 /// These layout objects are only created on demand as IR generation requires.
171 class CGRecordLayout {
172 friend class CodeGenTypes;
174 CGRecordLayout(const CGRecordLayout&); // DO NOT IMPLEMENT
175 void operator=(const CGRecordLayout&); // DO NOT IMPLEMENT
178 /// The LLVM type corresponding to this record layout; used when
179 /// laying it out as a complete object.
180 llvm::StructType *CompleteObjectType;
182 /// The LLVM type for the non-virtual part of this record layout;
183 /// used when laying it out as a base subobject.
184 llvm::StructType *BaseSubobjectType;
186 /// Map from (non-bit-field) struct field to the corresponding llvm struct
187 /// type field no. This info is populated by record builder.
188 llvm::DenseMap<const FieldDecl *, unsigned> FieldInfo;
190 /// Map from (bit-field) struct field to the corresponding llvm struct type
191 /// field no. This info is populated by record builder.
192 llvm::DenseMap<const FieldDecl *, CGBitFieldInfo> BitFields;
194 // FIXME: Maybe we could use a CXXBaseSpecifier as the key and use a single
195 // map for both virtual and non virtual bases.
196 llvm::DenseMap<const CXXRecordDecl *, unsigned> NonVirtualBases;
198 /// Map from virtual bases to their field index in the complete object.
199 llvm::DenseMap<const CXXRecordDecl *, unsigned> CompleteObjectVirtualBases;
201 /// False if any direct or indirect subobject of this class, when
202 /// considered as a complete object, requires a non-zero bitpattern
203 /// when zero-initialized.
204 bool IsZeroInitializable : 1;
206 /// False if any direct or indirect subobject of this class, when
207 /// considered as a base subobject, requires a non-zero bitpattern
208 /// when zero-initialized.
209 bool IsZeroInitializableAsBase : 1;
212 CGRecordLayout(llvm::StructType *CompleteObjectType,
213 llvm::StructType *BaseSubobjectType,
214 bool IsZeroInitializable,
215 bool IsZeroInitializableAsBase)
216 : CompleteObjectType(CompleteObjectType),
217 BaseSubobjectType(BaseSubobjectType),
218 IsZeroInitializable(IsZeroInitializable),
219 IsZeroInitializableAsBase(IsZeroInitializableAsBase) {}
221 /// \brief Return the "complete object" LLVM type associated with
223 llvm::StructType *getLLVMType() const {
224 return CompleteObjectType;
227 /// \brief Return the "base subobject" LLVM type associated with
229 llvm::StructType *getBaseSubobjectLLVMType() const {
230 return BaseSubobjectType;
233 /// \brief Check whether this struct can be C++ zero-initialized
234 /// with a zeroinitializer.
235 bool isZeroInitializable() const {
236 return IsZeroInitializable;
239 /// \brief Check whether this struct can be C++ zero-initialized
240 /// with a zeroinitializer when considered as a base subobject.
241 bool isZeroInitializableAsBase() const {
242 return IsZeroInitializableAsBase;
245 /// \brief Return llvm::StructType element number that corresponds to the
247 unsigned getLLVMFieldNo(const FieldDecl *FD) const {
248 assert(!FD->isBitField() && "Invalid call for bit-field decl!");
249 assert(FieldInfo.count(FD) && "Invalid field for record!");
250 return FieldInfo.lookup(FD);
253 unsigned getNonVirtualBaseLLVMFieldNo(const CXXRecordDecl *RD) const {
254 assert(NonVirtualBases.count(RD) && "Invalid non-virtual base!");
255 return NonVirtualBases.lookup(RD);
258 /// \brief Return the LLVM field index corresponding to the given
259 /// virtual base. Only valid when operating on the complete object.
260 unsigned getVirtualBaseIndex(const CXXRecordDecl *base) const {
261 assert(CompleteObjectVirtualBases.count(base) && "Invalid virtual base!");
262 return CompleteObjectVirtualBases.lookup(base);
265 /// \brief Return the BitFieldInfo that corresponds to the field FD.
266 const CGBitFieldInfo &getBitFieldInfo(const FieldDecl *FD) const {
267 assert(FD->isBitField() && "Invalid call for non bit-field decl!");
268 llvm::DenseMap<const FieldDecl *, CGBitFieldInfo>::const_iterator
269 it = BitFields.find(FD);
270 assert(it != BitFields.end() && "Unable to find bitfield info");
274 void print(raw_ostream &OS) const;
278 } // end namespace CodeGen
279 } // end namespace clang