1 /******************************************************************************
3 Copyright (c) 2001-2010, Intel Corporation
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
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10 this list of conditions and the following disclaimer.
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13 notice, this list of conditions and the following disclaimer in the
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21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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32 ******************************************************************************/
35 #include "ixgbe_api.h"
36 #include "ixgbe_common.h"
38 extern s32 ixgbe_init_ops_82598(struct ixgbe_hw *hw);
39 extern s32 ixgbe_init_ops_82599(struct ixgbe_hw *hw);
40 extern s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw);
43 * ixgbe_init_shared_code - Initialize the shared code
44 * @hw: pointer to hardware structure
46 * This will assign function pointers and assign the MAC type and PHY code.
47 * Does not touch the hardware. This function must be called prior to any
48 * other function in the shared code. The ixgbe_hw structure should be
49 * memset to 0 prior to calling this function. The following fields in
50 * hw structure should be filled in prior to calling this function:
51 * hw_addr, back, device_id, vendor_id, subsystem_device_id,
52 * subsystem_vendor_id, and revision_id
54 s32 ixgbe_init_shared_code(struct ixgbe_hw *hw)
58 DEBUGFUNC("ixgbe_init_shared_code");
63 ixgbe_set_mac_type(hw);
65 switch (hw->mac.type) {
66 case ixgbe_mac_82598EB:
67 status = ixgbe_init_ops_82598(hw);
69 case ixgbe_mac_82599EB:
70 status = ixgbe_init_ops_82599(hw);
72 case ixgbe_mac_82599_vf:
73 status = ixgbe_init_ops_vf(hw);
76 status = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
84 * ixgbe_set_mac_type - Sets MAC type
85 * @hw: pointer to the HW structure
87 * This function sets the mac type of the adapter based on the
88 * vendor ID and device ID stored in the hw structure.
90 s32 ixgbe_set_mac_type(struct ixgbe_hw *hw)
92 s32 ret_val = IXGBE_SUCCESS;
94 DEBUGFUNC("ixgbe_set_mac_type\n");
96 if (hw->vendor_id == IXGBE_INTEL_VENDOR_ID) {
97 switch (hw->device_id) {
98 case IXGBE_DEV_ID_82598:
99 case IXGBE_DEV_ID_82598_BX:
100 case IXGBE_DEV_ID_82598AF_SINGLE_PORT:
101 case IXGBE_DEV_ID_82598AF_DUAL_PORT:
102 case IXGBE_DEV_ID_82598AT:
103 case IXGBE_DEV_ID_82598AT2:
104 case IXGBE_DEV_ID_82598EB_CX4:
105 case IXGBE_DEV_ID_82598_CX4_DUAL_PORT:
106 case IXGBE_DEV_ID_82598_DA_DUAL_PORT:
107 case IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM:
108 case IXGBE_DEV_ID_82598EB_XF_LR:
109 case IXGBE_DEV_ID_82598EB_SFP_LOM:
110 hw->mac.type = ixgbe_mac_82598EB;
112 case IXGBE_DEV_ID_82599_KX4:
113 case IXGBE_DEV_ID_82599_KX4_MEZZ:
114 case IXGBE_DEV_ID_82599_XAUI_LOM:
115 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
116 case IXGBE_DEV_ID_82599_SFP:
117 case IXGBE_DEV_ID_82599_BACKPLANE_FCOE:
118 case IXGBE_DEV_ID_82599_SFP_FCOE:
119 case IXGBE_DEV_ID_82599_CX4:
120 case IXGBE_DEV_ID_82599_T3_LOM:
121 hw->mac.type = ixgbe_mac_82599EB;
123 case IXGBE_DEV_ID_82599_VF:
124 hw->mac.type = ixgbe_mac_82599_vf;
127 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
131 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
134 DEBUGOUT2("ixgbe_set_mac_type found mac: %d, returns: %d\n",
135 hw->mac.type, ret_val);
140 * ixgbe_init_hw - Initialize the hardware
141 * @hw: pointer to hardware structure
143 * Initialize the hardware by resetting and then starting the hardware
145 s32 ixgbe_init_hw(struct ixgbe_hw *hw)
147 return ixgbe_call_func(hw, hw->mac.ops.init_hw, (hw),
148 IXGBE_NOT_IMPLEMENTED);
152 * ixgbe_reset_hw - Performs a hardware reset
153 * @hw: pointer to hardware structure
155 * Resets the hardware by resetting the transmit and receive units, masks and
156 * clears all interrupts, performs a PHY reset, and performs a MAC reset
158 s32 ixgbe_reset_hw(struct ixgbe_hw *hw)
160 return ixgbe_call_func(hw, hw->mac.ops.reset_hw, (hw),
161 IXGBE_NOT_IMPLEMENTED);
165 * ixgbe_start_hw - Prepares hardware for Rx/Tx
166 * @hw: pointer to hardware structure
168 * Starts the hardware by filling the bus info structure and media type,
169 * clears all on chip counters, initializes receive address registers,
170 * multicast table, VLAN filter table, calls routine to setup link and
171 * flow control settings, and leaves transmit and receive units disabled
174 s32 ixgbe_start_hw(struct ixgbe_hw *hw)
176 return ixgbe_call_func(hw, hw->mac.ops.start_hw, (hw),
177 IXGBE_NOT_IMPLEMENTED);
181 * ixgbe_enable_relaxed_ordering - Enables tx relaxed ordering,
182 * which is disabled by default in ixgbe_start_hw();
184 * @hw: pointer to hardware structure
186 * Enable relaxed ordering;
188 void ixgbe_enable_relaxed_ordering(struct ixgbe_hw *hw)
190 if (hw->mac.ops.enable_relaxed_ordering)
191 hw->mac.ops.enable_relaxed_ordering(hw);
195 * ixgbe_clear_hw_cntrs - Clear hardware counters
196 * @hw: pointer to hardware structure
198 * Clears all hardware statistics counters by reading them from the hardware
199 * Statistics counters are clear on read.
201 s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw)
203 return ixgbe_call_func(hw, hw->mac.ops.clear_hw_cntrs, (hw),
204 IXGBE_NOT_IMPLEMENTED);
208 * ixgbe_get_media_type - Get media type
209 * @hw: pointer to hardware structure
211 * Returns the media type (fiber, copper, backplane)
213 enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw)
215 return ixgbe_call_func(hw, hw->mac.ops.get_media_type, (hw),
216 ixgbe_media_type_unknown);
220 * ixgbe_get_mac_addr - Get MAC address
221 * @hw: pointer to hardware structure
222 * @mac_addr: Adapter MAC address
224 * Reads the adapter's MAC address from the first Receive Address Register
225 * (RAR0) A reset of the adapter must have been performed prior to calling
226 * this function in order for the MAC address to have been loaded from the
229 s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr)
231 return ixgbe_call_func(hw, hw->mac.ops.get_mac_addr,
232 (hw, mac_addr), IXGBE_NOT_IMPLEMENTED);
236 * ixgbe_get_san_mac_addr - Get SAN MAC address
237 * @hw: pointer to hardware structure
238 * @san_mac_addr: SAN MAC address
240 * Reads the SAN MAC address from the EEPROM, if it's available. This is
241 * per-port, so set_lan_id() must be called before reading the addresses.
243 s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr)
245 return ixgbe_call_func(hw, hw->mac.ops.get_san_mac_addr,
246 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED);
250 * ixgbe_set_san_mac_addr - Write a SAN MAC address
251 * @hw: pointer to hardware structure
252 * @san_mac_addr: SAN MAC address
254 * Writes A SAN MAC address to the EEPROM.
256 s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr)
258 return ixgbe_call_func(hw, hw->mac.ops.set_san_mac_addr,
259 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED);
263 * ixgbe_get_device_caps - Get additional device capabilities
264 * @hw: pointer to hardware structure
265 * @device_caps: the EEPROM word for device capabilities
267 * Reads the extra device capabilities from the EEPROM
269 s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps)
271 return ixgbe_call_func(hw, hw->mac.ops.get_device_caps,
272 (hw, device_caps), IXGBE_NOT_IMPLEMENTED);
276 * ixgbe_get_wwn_prefix - Get alternative WWNN/WWPN prefix from the EEPROM
277 * @hw: pointer to hardware structure
278 * @wwnn_prefix: the alternative WWNN prefix
279 * @wwpn_prefix: the alternative WWPN prefix
281 * This function will read the EEPROM from the alternative SAN MAC address
282 * block to check the support for the alternative WWNN/WWPN prefix support.
284 s32 ixgbe_get_wwn_prefix(struct ixgbe_hw *hw, u16 *wwnn_prefix,
287 return ixgbe_call_func(hw, hw->mac.ops.get_wwn_prefix,
288 (hw, wwnn_prefix, wwpn_prefix),
289 IXGBE_NOT_IMPLEMENTED);
293 * ixgbe_get_fcoe_boot_status - Get FCOE boot status from EEPROM
294 * @hw: pointer to hardware structure
295 * @bs: the fcoe boot status
297 * This function will read the FCOE boot status from the iSCSI FCOE block
299 s32 ixgbe_get_fcoe_boot_status(struct ixgbe_hw *hw, u16 *bs)
301 return ixgbe_call_func(hw, hw->mac.ops.get_fcoe_boot_status,
303 IXGBE_NOT_IMPLEMENTED);
307 * ixgbe_get_bus_info - Set PCI bus info
308 * @hw: pointer to hardware structure
310 * Sets the PCI bus info (speed, width, type) within the ixgbe_hw structure
312 s32 ixgbe_get_bus_info(struct ixgbe_hw *hw)
314 return ixgbe_call_func(hw, hw->mac.ops.get_bus_info, (hw),
315 IXGBE_NOT_IMPLEMENTED);
319 * ixgbe_get_num_of_tx_queues - Get Tx queues
320 * @hw: pointer to hardware structure
322 * Returns the number of transmit queues for the given adapter.
324 u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw)
326 return hw->mac.max_tx_queues;
330 * ixgbe_get_num_of_rx_queues - Get Rx queues
331 * @hw: pointer to hardware structure
333 * Returns the number of receive queues for the given adapter.
335 u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw)
337 return hw->mac.max_rx_queues;
341 * ixgbe_stop_adapter - Disable Rx/Tx units
342 * @hw: pointer to hardware structure
344 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
345 * disables transmit and receive units. The adapter_stopped flag is used by
346 * the shared code and drivers to determine if the adapter is in a stopped
347 * state and should not touch the hardware.
349 s32 ixgbe_stop_adapter(struct ixgbe_hw *hw)
351 return ixgbe_call_func(hw, hw->mac.ops.stop_adapter, (hw),
352 IXGBE_NOT_IMPLEMENTED);
356 * ixgbe_read_pba_string - Reads part number string from EEPROM
357 * @hw: pointer to hardware structure
358 * @pba_num: stores the part number string from the EEPROM
359 * @pba_num_size: part number string buffer length
361 * Reads the part number string from the EEPROM.
363 s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size)
365 return ixgbe_read_pba_string_generic(hw, pba_num, pba_num_size);
369 * ixgbe_read_pba_length - Reads part number string length from EEPROM
370 * @hw: pointer to hardware structure
371 * @pba_num_size: part number string buffer length
373 * Reads the part number length from the EEPROM.
374 * Returns expected buffer size in pba_num_size.
376 s32 ixgbe_read_pba_length(struct ixgbe_hw *hw, u32 *pba_num_size)
378 return ixgbe_read_pba_length_generic(hw, pba_num_size);
382 * ixgbe_read_pba_num - Reads part number from EEPROM
383 * @hw: pointer to hardware structure
384 * @pba_num: stores the part number from the EEPROM
386 * Reads the part number from the EEPROM.
388 s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num)
390 return ixgbe_read_pba_num_generic(hw, pba_num);
394 * ixgbe_identify_phy - Get PHY type
395 * @hw: pointer to hardware structure
397 * Determines the physical layer module found on the current adapter.
399 s32 ixgbe_identify_phy(struct ixgbe_hw *hw)
401 s32 status = IXGBE_SUCCESS;
403 if (hw->phy.type == ixgbe_phy_unknown) {
404 status = ixgbe_call_func(hw, hw->phy.ops.identify, (hw),
405 IXGBE_NOT_IMPLEMENTED);
412 * ixgbe_reset_phy - Perform a PHY reset
413 * @hw: pointer to hardware structure
415 s32 ixgbe_reset_phy(struct ixgbe_hw *hw)
417 s32 status = IXGBE_SUCCESS;
419 if (hw->phy.type == ixgbe_phy_unknown) {
420 if (ixgbe_identify_phy(hw) != IXGBE_SUCCESS)
421 status = IXGBE_ERR_PHY;
424 if (status == IXGBE_SUCCESS) {
425 status = ixgbe_call_func(hw, hw->phy.ops.reset, (hw),
426 IXGBE_NOT_IMPLEMENTED);
432 * ixgbe_get_phy_firmware_version -
433 * @hw: pointer to hardware structure
434 * @firmware_version: pointer to firmware version
436 s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw, u16 *firmware_version)
438 s32 status = IXGBE_SUCCESS;
440 status = ixgbe_call_func(hw, hw->phy.ops.get_firmware_version,
441 (hw, firmware_version),
442 IXGBE_NOT_IMPLEMENTED);
447 * ixgbe_read_phy_reg - Read PHY register
448 * @hw: pointer to hardware structure
449 * @reg_addr: 32 bit address of PHY register to read
450 * @phy_data: Pointer to read data from PHY register
452 * Reads a value from a specified PHY register
454 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
458 ixgbe_identify_phy(hw);
460 return ixgbe_call_func(hw, hw->phy.ops.read_reg, (hw, reg_addr,
461 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
465 * ixgbe_write_phy_reg - Write PHY register
466 * @hw: pointer to hardware structure
467 * @reg_addr: 32 bit PHY register to write
468 * @phy_data: Data to write to the PHY register
470 * Writes a value to specified PHY register
472 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
476 ixgbe_identify_phy(hw);
478 return ixgbe_call_func(hw, hw->phy.ops.write_reg, (hw, reg_addr,
479 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
483 * ixgbe_setup_phy_link - Restart PHY autoneg
484 * @hw: pointer to hardware structure
486 * Restart autonegotiation and PHY and waits for completion.
488 s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw)
490 return ixgbe_call_func(hw, hw->phy.ops.setup_link, (hw),
491 IXGBE_NOT_IMPLEMENTED);
495 * ixgbe_check_phy_link - Determine link and speed status
496 * @hw: pointer to hardware structure
498 * Reads a PHY register to determine if link is up and the current speed for
501 s32 ixgbe_check_phy_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
504 return ixgbe_call_func(hw, hw->phy.ops.check_link, (hw, speed,
505 link_up), IXGBE_NOT_IMPLEMENTED);
509 * ixgbe_setup_phy_link_speed - Set auto advertise
510 * @hw: pointer to hardware structure
511 * @speed: new link speed
512 * @autoneg: TRUE if autonegotiation enabled
514 * Sets the auto advertised capabilities
516 s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed,
518 bool autoneg_wait_to_complete)
520 return ixgbe_call_func(hw, hw->phy.ops.setup_link_speed, (hw, speed,
521 autoneg, autoneg_wait_to_complete),
522 IXGBE_NOT_IMPLEMENTED);
526 * ixgbe_check_link - Get link and speed status
527 * @hw: pointer to hardware structure
529 * Reads the links register to determine if link is up and the current speed
531 s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
532 bool *link_up, bool link_up_wait_to_complete)
534 return ixgbe_call_func(hw, hw->mac.ops.check_link, (hw, speed,
535 link_up, link_up_wait_to_complete),
536 IXGBE_NOT_IMPLEMENTED);
540 * ixgbe_disable_tx_laser - Disable Tx laser
541 * @hw: pointer to hardware structure
543 * If the driver needs to disable the laser on SFI optics.
545 void ixgbe_disable_tx_laser(struct ixgbe_hw *hw)
547 if (hw->mac.ops.disable_tx_laser)
548 hw->mac.ops.disable_tx_laser(hw);
552 * ixgbe_enable_tx_laser - Enable Tx laser
553 * @hw: pointer to hardware structure
555 * If the driver needs to enable the laser on SFI optics.
557 void ixgbe_enable_tx_laser(struct ixgbe_hw *hw)
559 if (hw->mac.ops.enable_tx_laser)
560 hw->mac.ops.enable_tx_laser(hw);
564 * ixgbe_flap_tx_laser - flap Tx laser to start autotry process
565 * @hw: pointer to hardware structure
567 * When the driver changes the link speeds that it can support then
568 * flap the tx laser to alert the link partner to start autotry
569 * process on its end.
571 void ixgbe_flap_tx_laser(struct ixgbe_hw *hw)
573 if (hw->mac.ops.flap_tx_laser)
574 hw->mac.ops.flap_tx_laser(hw);
578 * ixgbe_setup_link - Set link speed
579 * @hw: pointer to hardware structure
580 * @speed: new link speed
581 * @autoneg: TRUE if autonegotiation enabled
583 * Configures link settings. Restarts the link.
584 * Performs autonegotiation if needed.
586 s32 ixgbe_setup_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
588 bool autoneg_wait_to_complete)
590 return ixgbe_call_func(hw, hw->mac.ops.setup_link, (hw, speed,
591 autoneg, autoneg_wait_to_complete),
592 IXGBE_NOT_IMPLEMENTED);
596 * ixgbe_get_link_capabilities - Returns link capabilities
597 * @hw: pointer to hardware structure
599 * Determines the link capabilities of the current configuration.
601 s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
604 return ixgbe_call_func(hw, hw->mac.ops.get_link_capabilities, (hw,
605 speed, autoneg), IXGBE_NOT_IMPLEMENTED);
609 * ixgbe_led_on - Turn on LEDs
610 * @hw: pointer to hardware structure
611 * @index: led number to turn on
613 * Turns on the software controllable LEDs.
615 s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index)
617 return ixgbe_call_func(hw, hw->mac.ops.led_on, (hw, index),
618 IXGBE_NOT_IMPLEMENTED);
622 * ixgbe_led_off - Turn off LEDs
623 * @hw: pointer to hardware structure
624 * @index: led number to turn off
626 * Turns off the software controllable LEDs.
628 s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index)
630 return ixgbe_call_func(hw, hw->mac.ops.led_off, (hw, index),
631 IXGBE_NOT_IMPLEMENTED);
635 * ixgbe_blink_led_start - Blink LEDs
636 * @hw: pointer to hardware structure
637 * @index: led number to blink
639 * Blink LED based on index.
641 s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index)
643 return ixgbe_call_func(hw, hw->mac.ops.blink_led_start, (hw, index),
644 IXGBE_NOT_IMPLEMENTED);
648 * ixgbe_blink_led_stop - Stop blinking LEDs
649 * @hw: pointer to hardware structure
651 * Stop blinking LED based on index.
653 s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index)
655 return ixgbe_call_func(hw, hw->mac.ops.blink_led_stop, (hw, index),
656 IXGBE_NOT_IMPLEMENTED);
660 * ixgbe_init_eeprom_params - Initialize EEPROM parameters
661 * @hw: pointer to hardware structure
663 * Initializes the EEPROM parameters ixgbe_eeprom_info within the
664 * ixgbe_hw struct in order to set up EEPROM access.
666 s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw)
668 return ixgbe_call_func(hw, hw->eeprom.ops.init_params, (hw),
669 IXGBE_NOT_IMPLEMENTED);
674 * ixgbe_write_eeprom - Write word to EEPROM
675 * @hw: pointer to hardware structure
676 * @offset: offset within the EEPROM to be written to
677 * @data: 16 bit word to be written to the EEPROM
679 * Writes 16 bit value to EEPROM. If ixgbe_eeprom_update_checksum is not
680 * called after this function, the EEPROM will most likely contain an
683 s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data)
685 return ixgbe_call_func(hw, hw->eeprom.ops.write, (hw, offset, data),
686 IXGBE_NOT_IMPLEMENTED);
690 * ixgbe_read_eeprom - Read word from EEPROM
691 * @hw: pointer to hardware structure
692 * @offset: offset within the EEPROM to be read
693 * @data: read 16 bit value from EEPROM
695 * Reads 16 bit value from EEPROM
697 s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data)
699 return ixgbe_call_func(hw, hw->eeprom.ops.read, (hw, offset, data),
700 IXGBE_NOT_IMPLEMENTED);
704 * ixgbe_validate_eeprom_checksum - Validate EEPROM checksum
705 * @hw: pointer to hardware structure
706 * @checksum_val: calculated checksum
708 * Performs checksum calculation and validates the EEPROM checksum
710 s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val)
712 return ixgbe_call_func(hw, hw->eeprom.ops.validate_checksum,
713 (hw, checksum_val), IXGBE_NOT_IMPLEMENTED);
717 * ixgbe_eeprom_update_checksum - Updates the EEPROM checksum
718 * @hw: pointer to hardware structure
720 s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw)
722 return ixgbe_call_func(hw, hw->eeprom.ops.update_checksum, (hw),
723 IXGBE_NOT_IMPLEMENTED);
727 * ixgbe_insert_mac_addr - Find a RAR for this mac address
728 * @hw: pointer to hardware structure
729 * @addr: Address to put into receive address register
730 * @vmdq: VMDq pool to assign
732 * Puts an ethernet address into a receive address register, or
733 * finds the rar that it is aleady in; adds to the pool list
735 s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq)
737 return ixgbe_call_func(hw, hw->mac.ops.insert_mac_addr,
739 IXGBE_NOT_IMPLEMENTED);
743 * ixgbe_set_rar - Set Rx address register
744 * @hw: pointer to hardware structure
745 * @index: Receive address register to write
746 * @addr: Address to put into receive address register
748 * @enable_addr: set flag that address is active
750 * Puts an ethernet address into a receive address register.
752 s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
755 return ixgbe_call_func(hw, hw->mac.ops.set_rar, (hw, index, addr, vmdq,
756 enable_addr), IXGBE_NOT_IMPLEMENTED);
760 * ixgbe_clear_rar - Clear Rx address register
761 * @hw: pointer to hardware structure
762 * @index: Receive address register to write
764 * Puts an ethernet address into a receive address register.
766 s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index)
768 return ixgbe_call_func(hw, hw->mac.ops.clear_rar, (hw, index),
769 IXGBE_NOT_IMPLEMENTED);
773 * ixgbe_set_vmdq - Associate a VMDq index with a receive address
774 * @hw: pointer to hardware structure
775 * @rar: receive address register index to associate with VMDq index
776 * @vmdq: VMDq set or pool index
778 s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
780 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq, (hw, rar, vmdq),
781 IXGBE_NOT_IMPLEMENTED);
785 * ixgbe_clear_vmdq - Disassociate a VMDq index from a receive address
786 * @hw: pointer to hardware structure
787 * @rar: receive address register index to disassociate with VMDq index
788 * @vmdq: VMDq set or pool index
790 s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
792 return ixgbe_call_func(hw, hw->mac.ops.clear_vmdq, (hw, rar, vmdq),
793 IXGBE_NOT_IMPLEMENTED);
797 * ixgbe_init_rx_addrs - Initializes receive address filters.
798 * @hw: pointer to hardware structure
800 * Places the MAC address in receive address register 0 and clears the rest
801 * of the receive address registers. Clears the multicast table. Assumes
802 * the receiver is in reset when the routine is called.
804 s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw)
806 return ixgbe_call_func(hw, hw->mac.ops.init_rx_addrs, (hw),
807 IXGBE_NOT_IMPLEMENTED);
811 * ixgbe_get_num_rx_addrs - Returns the number of RAR entries.
812 * @hw: pointer to hardware structure
814 u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw)
816 return hw->mac.num_rar_entries;
820 * ixgbe_update_uc_addr_list - Updates the MAC's list of secondary addresses
821 * @hw: pointer to hardware structure
822 * @addr_list: the list of new multicast addresses
823 * @addr_count: number of addresses
824 * @func: iterator function to walk the multicast address list
826 * The given list replaces any existing list. Clears the secondary addrs from
827 * receive address registers. Uses unused receive address registers for the
828 * first secondary addresses, and falls back to promiscuous mode as needed.
830 s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list,
831 u32 addr_count, ixgbe_mc_addr_itr func)
833 return ixgbe_call_func(hw, hw->mac.ops.update_uc_addr_list, (hw,
834 addr_list, addr_count, func),
835 IXGBE_NOT_IMPLEMENTED);
839 * ixgbe_update_mc_addr_list - Updates the MAC's list of multicast addresses
840 * @hw: pointer to hardware structure
841 * @mc_addr_list: the list of new multicast addresses
842 * @mc_addr_count: number of addresses
843 * @func: iterator function to walk the multicast address list
845 * The given list replaces any existing list. Clears the MC addrs from receive
846 * address registers and the multicast table. Uses unused receive address
847 * registers for the first multicast addresses, and hashes the rest into the
850 s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list,
851 u32 mc_addr_count, ixgbe_mc_addr_itr func)
853 return ixgbe_call_func(hw, hw->mac.ops.update_mc_addr_list, (hw,
854 mc_addr_list, mc_addr_count, func),
855 IXGBE_NOT_IMPLEMENTED);
859 * ixgbe_enable_mc - Enable multicast address in RAR
860 * @hw: pointer to hardware structure
862 * Enables multicast address in RAR and the use of the multicast hash table.
864 s32 ixgbe_enable_mc(struct ixgbe_hw *hw)
866 return ixgbe_call_func(hw, hw->mac.ops.enable_mc, (hw),
867 IXGBE_NOT_IMPLEMENTED);
871 * ixgbe_disable_mc - Disable multicast address in RAR
872 * @hw: pointer to hardware structure
874 * Disables multicast address in RAR and the use of the multicast hash table.
876 s32 ixgbe_disable_mc(struct ixgbe_hw *hw)
878 return ixgbe_call_func(hw, hw->mac.ops.disable_mc, (hw),
879 IXGBE_NOT_IMPLEMENTED);
883 * ixgbe_clear_vfta - Clear VLAN filter table
884 * @hw: pointer to hardware structure
886 * Clears the VLAN filer table, and the VMDq index associated with the filter
888 s32 ixgbe_clear_vfta(struct ixgbe_hw *hw)
890 return ixgbe_call_func(hw, hw->mac.ops.clear_vfta, (hw),
891 IXGBE_NOT_IMPLEMENTED);
895 * ixgbe_set_vfta - Set VLAN filter table
896 * @hw: pointer to hardware structure
897 * @vlan: VLAN id to write to VLAN filter
898 * @vind: VMDq output index that maps queue to VLAN id in VFTA
899 * @vlan_on: boolean flag to turn on/off VLAN in VFTA
901 * Turn on/off specified VLAN in the VLAN filter table.
903 s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on)
905 return ixgbe_call_func(hw, hw->mac.ops.set_vfta, (hw, vlan, vind,
906 vlan_on), IXGBE_NOT_IMPLEMENTED);
910 * ixgbe_fc_enable - Enable flow control
911 * @hw: pointer to hardware structure
912 * @packetbuf_num: packet buffer number (0-7)
914 * Configures the flow control settings based on SW configuration.
916 s32 ixgbe_fc_enable(struct ixgbe_hw *hw, s32 packetbuf_num)
918 return ixgbe_call_func(hw, hw->mac.ops.fc_enable, (hw, packetbuf_num),
919 IXGBE_NOT_IMPLEMENTED);
923 * ixgbe_read_analog_reg8 - Reads 8 bit analog register
924 * @hw: pointer to hardware structure
925 * @reg: analog register to read
928 * Performs write operation to analog register specified.
930 s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val)
932 return ixgbe_call_func(hw, hw->mac.ops.read_analog_reg8, (hw, reg,
933 val), IXGBE_NOT_IMPLEMENTED);
937 * ixgbe_write_analog_reg8 - Writes 8 bit analog register
938 * @hw: pointer to hardware structure
939 * @reg: analog register to write
940 * @val: value to write
942 * Performs write operation to Atlas analog register specified.
944 s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val)
946 return ixgbe_call_func(hw, hw->mac.ops.write_analog_reg8, (hw, reg,
947 val), IXGBE_NOT_IMPLEMENTED);
951 * ixgbe_init_uta_tables - Initializes Unicast Table Arrays.
952 * @hw: pointer to hardware structure
954 * Initializes the Unicast Table Arrays to zero on device load. This
955 * is part of the Rx init addr execution path.
957 s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw)
959 return ixgbe_call_func(hw, hw->mac.ops.init_uta_tables, (hw),
960 IXGBE_NOT_IMPLEMENTED);
964 * ixgbe_read_i2c_byte - Reads 8 bit word over I2C at specified device address
965 * @hw: pointer to hardware structure
966 * @byte_offset: byte offset to read
969 * Performs byte read operation to SFP module's EEPROM over I2C interface.
971 s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
974 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_byte, (hw, byte_offset,
975 dev_addr, data), IXGBE_NOT_IMPLEMENTED);
979 * ixgbe_write_i2c_byte - Writes 8 bit word over I2C
980 * @hw: pointer to hardware structure
981 * @byte_offset: byte offset to write
982 * @data: value to write
984 * Performs byte write operation to SFP module's EEPROM over I2C interface
985 * at a specified device address.
987 s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
990 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_byte, (hw, byte_offset,
991 dev_addr, data), IXGBE_NOT_IMPLEMENTED);
995 * ixgbe_write_i2c_eeprom - Writes 8 bit EEPROM word over I2C interface
996 * @hw: pointer to hardware structure
997 * @byte_offset: EEPROM byte offset to write
998 * @eeprom_data: value to write
1000 * Performs byte write operation to SFP module's EEPROM over I2C interface.
1002 s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw,
1003 u8 byte_offset, u8 eeprom_data)
1005 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_eeprom,
1006 (hw, byte_offset, eeprom_data),
1007 IXGBE_NOT_IMPLEMENTED);
1011 * ixgbe_read_i2c_eeprom - Reads 8 bit EEPROM word over I2C interface
1012 * @hw: pointer to hardware structure
1013 * @byte_offset: EEPROM byte offset to read
1014 * @eeprom_data: value read
1016 * Performs byte read operation to SFP module's EEPROM over I2C interface.
1018 s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data)
1020 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_eeprom,
1021 (hw, byte_offset, eeprom_data),
1022 IXGBE_NOT_IMPLEMENTED);
1026 * ixgbe_get_supported_physical_layer - Returns physical layer type
1027 * @hw: pointer to hardware structure
1029 * Determines physical layer capabilities of the current configuration.
1031 u32 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw)
1033 return ixgbe_call_func(hw, hw->mac.ops.get_supported_physical_layer,
1034 (hw), IXGBE_PHYSICAL_LAYER_UNKNOWN);
1038 * ixgbe_enable_rx_dma - Enables Rx DMA unit, dependant on device specifics
1039 * @hw: pointer to hardware structure
1040 * @regval: bitfield to write to the Rx DMA register
1042 * Enables the Rx DMA unit of the device.
1044 s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval)
1046 return ixgbe_call_func(hw, hw->mac.ops.enable_rx_dma,
1047 (hw, regval), IXGBE_NOT_IMPLEMENTED);
1051 * ixgbe_acquire_swfw_semaphore - Acquire SWFW semaphore
1052 * @hw: pointer to hardware structure
1053 * @mask: Mask to specify which semaphore to acquire
1055 * Acquires the SWFW semaphore through SW_FW_SYNC register for the specified
1056 * function (CSR, PHY0, PHY1, EEPROM, Flash)
1058 s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u16 mask)
1060 return ixgbe_call_func(hw, hw->mac.ops.acquire_swfw_sync,
1061 (hw, mask), IXGBE_NOT_IMPLEMENTED);
1065 * ixgbe_release_swfw_semaphore - Release SWFW semaphore
1066 * @hw: pointer to hardware structure
1067 * @mask: Mask to specify which semaphore to release
1069 * Releases the SWFW semaphore through SW_FW_SYNC register for the specified
1070 * function (CSR, PHY0, PHY1, EEPROM, Flash)
1072 void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u16 mask)
1074 if (hw->mac.ops.release_swfw_sync)
1075 hw->mac.ops.release_swfw_sync(hw, mask);