2 * Copyright (C) 2008-2009 Semihalf, Michal Hajduk
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
30 #include <sys/param.h>
31 #include <sys/systm.h>
33 #include <sys/kernel.h>
34 #include <sys/module.h>
35 #include <sys/resource.h>
37 #include <machine/bus.h>
38 #include <machine/resource.h>
42 #include <sys/mutex.h>
44 #include <dev/iicbus/iiconf.h>
45 #include <dev/iicbus/iicbus.h>
46 #include "iicbus_if.h"
48 #include <dev/ofw/ofw_bus.h>
49 #include <dev/ofw/ofw_bus_subr.h>
51 #define I2C_ADDR_REG 0x00 /* I2C slave address register */
52 #define I2C_FDR_REG 0x04 /* I2C frequency divider register */
53 #define I2C_CONTROL_REG 0x08 /* I2C control register */
54 #define I2C_STATUS_REG 0x0C /* I2C status register */
55 #define I2C_DATA_REG 0x10 /* I2C data register */
56 #define I2C_DFSRR_REG 0x14 /* I2C Digital Filter Sampling rate */
57 #define I2C_ENABLE 0x80 /* Module enable - interrupt disable */
58 #define I2CSR_RXAK 0x01 /* Received acknowledge */
59 #define I2CSR_MCF (1<<7) /* Data transfer */
60 #define I2CSR_MASS (1<<6) /* Addressed as a slave */
61 #define I2CSR_MBB (1<<5) /* Bus busy */
62 #define I2CSR_MAL (1<<4) /* Arbitration lost */
63 #define I2CSR_SRW (1<<2) /* Slave read/write */
64 #define I2CSR_MIF (1<<1) /* Module interrupt */
65 #define I2CCR_MEN (1<<7) /* Module enable */
66 #define I2CCR_MSTA (1<<5) /* Master/slave mode */
67 #define I2CCR_MTX (1<<4) /* Transmit/receive mode */
68 #define I2CCR_TXAK (1<<3) /* Transfer acknowledge */
69 #define I2CCR_RSTA (1<<2) /* Repeated START */
71 #define I2C_BAUD_RATE_FAST 0x31
72 #define I2C_BAUD_RATE_DEF 0x3F
73 #define I2C_DFSSR_DIV 0x10
79 #define debugf(fmt, args...) do { printf("%s(): ", __func__); printf(fmt,##args); } while (0)
81 #define debugf(fmt, args...)
90 bus_space_handle_t bsh;
94 static int i2c_probe(device_t);
95 static int i2c_attach(device_t);
97 static int i2c_repeated_start(device_t dev, u_char slave, int timeout);
98 static int i2c_start(device_t dev, u_char slave, int timeout);
99 static int i2c_stop(device_t dev);
100 static int i2c_reset(device_t dev, u_char speed, u_char addr, u_char *oldaddr);
101 static int i2c_read(device_t dev, char *buf, int len, int *read, int last, int delay);
102 static int i2c_write(device_t dev, const char *buf, int len, int *sent, int timeout);
104 static device_method_t i2c_methods[] = {
105 DEVMETHOD(device_probe, i2c_probe),
106 DEVMETHOD(device_attach, i2c_attach),
108 DEVMETHOD(iicbus_callback, iicbus_null_callback),
109 DEVMETHOD(iicbus_repeated_start, i2c_repeated_start),
110 DEVMETHOD(iicbus_start, i2c_start),
111 DEVMETHOD(iicbus_stop, i2c_stop),
112 DEVMETHOD(iicbus_reset, i2c_reset),
113 DEVMETHOD(iicbus_read, i2c_read),
114 DEVMETHOD(iicbus_write, i2c_write),
115 DEVMETHOD(iicbus_transfer, iicbus_transfer_gen),
120 static driver_t i2c_driver = {
123 sizeof(struct i2c_softc),
125 static devclass_t i2c_devclass;
127 DRIVER_MODULE(i2c, simplebus, i2c_driver, i2c_devclass, 0, 0);
128 DRIVER_MODULE(iicbus, i2c, iicbus_driver, iicbus_devclass, 0, 0);
131 i2c_write_reg(struct i2c_softc *sc, bus_size_t off, uint8_t val)
134 bus_space_write_1(sc->bst, sc->bsh, off, val);
137 static __inline uint8_t
138 i2c_read_reg(struct i2c_softc *sc, bus_size_t off)
141 return (bus_space_read_1(sc->bst, sc->bsh, off));
145 i2c_flag_set(struct i2c_softc *sc, bus_size_t off, uint8_t mask)
149 status = i2c_read_reg(sc, off);
151 i2c_write_reg(sc, off, status);
155 i2c_do_wait(device_t dev, struct i2c_softc *sc, int write, int start)
160 status = i2c_read_reg(sc, I2C_STATUS_REG);
161 if (status & I2CSR_MIF) {
162 if (write && start && (status & I2CSR_RXAK)) {
163 debugf("no ack %s", start ?
164 "after sending slave address" : "");
168 if (status & I2CSR_MAL) {
169 debugf("arbitration lost");
173 if (!write && !(status & I2CSR_MCF)) {
174 debugf("transfer unfinished");
183 i2c_write_reg(sc, I2C_STATUS_REG, 0x0);
184 i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN | I2CCR_TXAK);
189 i2c_probe(device_t dev)
191 struct i2c_softc *sc;
193 if (!ofw_bus_is_compatible(dev, "fsl-i2c"))
196 sc = device_get_softc(dev);
199 sc->res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->rid,
201 if (sc->res == NULL) {
202 device_printf(dev, "could not allocate resources\n");
206 sc->bst = rman_get_bustag(sc->res);
207 sc->bsh = rman_get_bushandle(sc->res);
210 i2c_write_reg(sc, I2C_CONTROL_REG, I2C_ENABLE);
211 bus_release_resource(dev, SYS_RES_MEMORY, sc->rid, sc->res);
212 device_set_desc(dev, "I2C bus controller");
214 return (BUS_PROBE_DEFAULT);
218 i2c_attach(device_t dev)
220 struct i2c_softc *sc;
221 sc = device_get_softc(dev);
226 mtx_init(&sc->mutex, device_get_nameunit(dev), "I2C", MTX_DEF);
228 sc->res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->rid,
230 if (sc->res == NULL) {
231 device_printf(dev, "could not allocate resources");
232 mtx_destroy(&sc->mutex);
236 sc->bst = rman_get_bustag(sc->res);
237 sc->bsh = rman_get_bushandle(sc->res);
239 sc->iicbus = device_add_child(dev, "iicbus", -1);
240 if (sc->iicbus == NULL) {
241 device_printf(dev, "could not add iicbus child");
242 mtx_destroy(&sc->mutex);
246 bus_generic_attach(dev);
250 i2c_repeated_start(device_t dev, u_char slave, int timeout)
252 struct i2c_softc *sc;
255 sc = device_get_softc(dev);
257 mtx_lock(&sc->mutex);
258 /* Set repeated start condition */
259 i2c_flag_set(sc, I2C_CONTROL_REG ,I2CCR_RSTA);
260 /* Write target address - LSB is R/W bit */
261 i2c_write_reg(sc, I2C_DATA_REG, slave);
264 error = i2c_do_wait(dev, sc, 1, 1);
265 mtx_unlock(&sc->mutex);
274 i2c_start(device_t dev, u_char slave, int timeout)
276 struct i2c_softc *sc;
280 sc = device_get_softc(dev);
283 mtx_lock(&sc->mutex);
284 status = i2c_read_reg(sc, I2C_STATUS_REG);
285 /* Check if bus is idle or busy */
286 if (status & I2CSR_MBB) {
288 mtx_unlock(&sc->mutex);
290 return (IIC_EBUSBSY);
293 /* Set start condition */
294 i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN | I2CCR_MSTA | I2CCR_MTX);
295 /* Write target address - LSB is R/W bit */
296 i2c_write_reg(sc, I2C_DATA_REG, slave);
299 error = i2c_do_wait(dev, sc, 1, 1);
301 mtx_unlock(&sc->mutex);
309 i2c_stop(device_t dev)
311 struct i2c_softc *sc;
313 sc = device_get_softc(dev);
314 mtx_lock(&sc->mutex);
315 i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN | I2CCR_TXAK);
317 mtx_unlock(&sc->mutex);
323 i2c_reset(device_t dev, u_char speed, u_char addr, u_char *oldadr)
325 struct i2c_softc *sc;
328 sc = device_get_softc(dev);
332 baud_rate = I2C_BAUD_RATE_FAST;
338 baud_rate = I2C_BAUD_RATE_DEF;
342 mtx_lock(&sc->mutex);
343 i2c_write_reg(sc, I2C_CONTROL_REG, 0x0);
344 i2c_write_reg(sc, I2C_STATUS_REG, 0x0);
346 i2c_write_reg(sc, I2C_FDR_REG, baud_rate);
347 i2c_write_reg(sc, I2C_DFSRR_REG, I2C_DFSSR_DIV);
348 i2c_write_reg(sc, I2C_CONTROL_REG, I2C_ENABLE);
350 mtx_unlock(&sc->mutex);
356 i2c_read(device_t dev, char *buf, int len, int *read, int last, int delay)
358 struct i2c_softc *sc;
361 sc = device_get_softc(dev);
364 mtx_lock(&sc->mutex);
367 i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN |
368 I2CCR_MSTA | I2CCR_TXAK);
371 i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN |
375 i2c_read_reg(sc, I2C_DATA_REG);
379 while (*read < len) {
381 error = i2c_do_wait(dev, sc, 0, 0);
383 mtx_unlock(&sc->mutex);
386 if ((*read == len - 2) && last) {
387 i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN |
388 I2CCR_MSTA | I2CCR_TXAK);
391 if ((*read == len - 1) && last) {
392 i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN |
396 *buf++ = i2c_read_reg(sc, I2C_DATA_REG);
400 mtx_unlock(&sc->mutex);
406 i2c_write(device_t dev, const char *buf, int len, int *sent, int timeout)
408 struct i2c_softc *sc;
411 sc = device_get_softc(dev);
414 mtx_lock(&sc->mutex);
415 while (*sent < len) {
416 i2c_write_reg(sc, I2C_DATA_REG, *buf++);
419 error = i2c_do_wait(dev, sc, 1, 0);
421 mtx_unlock(&sc->mutex);
427 mtx_unlock(&sc->mutex);